greth.c 40 KB

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  1. /*
  2. * Aeroflex Gaisler GRETH 10/100/1G Ethernet MAC.
  3. *
  4. * 2005-2010 (c) Aeroflex Gaisler AB
  5. *
  6. * This driver supports GRETH 10/100 and GRETH 10/100/1G Ethernet MACs
  7. * available in the GRLIB VHDL IP core library.
  8. *
  9. * Full documentation of both cores can be found here:
  10. * http://www.gaisler.com/products/grlib/grip.pdf
  11. *
  12. * The Gigabit version supports scatter/gather DMA, any alignment of
  13. * buffers and checksum offloading.
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. *
  20. * Contributors: Kristoffer Glembo
  21. * Daniel Hellstrom
  22. * Marko Isomaki
  23. */
  24. #include <linux/dma-mapping.h>
  25. #include <linux/module.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/init.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/io.h>
  34. #include <linux/crc32.h>
  35. #include <linux/mii.h>
  36. #include <linux/of_device.h>
  37. #include <linux/of_platform.h>
  38. #include <linux/slab.h>
  39. #include <asm/cacheflush.h>
  40. #include <asm/byteorder.h>
  41. #ifdef CONFIG_SPARC
  42. #include <asm/idprom.h>
  43. #endif
  44. #include "greth.h"
  45. #define GRETH_DEF_MSG_ENABLE \
  46. (NETIF_MSG_DRV | \
  47. NETIF_MSG_PROBE | \
  48. NETIF_MSG_LINK | \
  49. NETIF_MSG_IFDOWN | \
  50. NETIF_MSG_IFUP | \
  51. NETIF_MSG_RX_ERR | \
  52. NETIF_MSG_TX_ERR)
  53. static int greth_debug = -1; /* -1 == use GRETH_DEF_MSG_ENABLE as value */
  54. module_param(greth_debug, int, 0);
  55. MODULE_PARM_DESC(greth_debug, "GRETH bitmapped debugging message enable value");
  56. /* Accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  57. static int macaddr[6];
  58. module_param_array(macaddr, int, NULL, 0);
  59. MODULE_PARM_DESC(macaddr, "GRETH Ethernet MAC address");
  60. static int greth_edcl = 1;
  61. module_param(greth_edcl, int, 0);
  62. MODULE_PARM_DESC(greth_edcl, "GRETH EDCL usage indicator. Set to 1 if EDCL is used.");
  63. static int greth_open(struct net_device *dev);
  64. static netdev_tx_t greth_start_xmit(struct sk_buff *skb,
  65. struct net_device *dev);
  66. static netdev_tx_t greth_start_xmit_gbit(struct sk_buff *skb,
  67. struct net_device *dev);
  68. static int greth_rx(struct net_device *dev, int limit);
  69. static int greth_rx_gbit(struct net_device *dev, int limit);
  70. static void greth_clean_tx(struct net_device *dev);
  71. static void greth_clean_tx_gbit(struct net_device *dev);
  72. static irqreturn_t greth_interrupt(int irq, void *dev_id);
  73. static int greth_close(struct net_device *dev);
  74. static int greth_set_mac_add(struct net_device *dev, void *p);
  75. static void greth_set_multicast_list(struct net_device *dev);
  76. #define GRETH_REGLOAD(a) (be32_to_cpu(__raw_readl(&(a))))
  77. #define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a)))
  78. #define GRETH_REGORIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) | (v))))
  79. #define GRETH_REGANDIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) & (v))))
  80. #define NEXT_TX(N) (((N) + 1) & GRETH_TXBD_NUM_MASK)
  81. #define SKIP_TX(N, C) (((N) + C) & GRETH_TXBD_NUM_MASK)
  82. #define NEXT_RX(N) (((N) + 1) & GRETH_RXBD_NUM_MASK)
  83. static void greth_print_rx_packet(void *addr, int len)
  84. {
  85. print_hex_dump(KERN_DEBUG, "RX: ", DUMP_PREFIX_OFFSET, 16, 1,
  86. addr, len, true);
  87. }
  88. static void greth_print_tx_packet(struct sk_buff *skb)
  89. {
  90. int i;
  91. int length;
  92. if (skb_shinfo(skb)->nr_frags == 0)
  93. length = skb->len;
  94. else
  95. length = skb_headlen(skb);
  96. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  97. skb->data, length, true);
  98. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  99. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  100. skb_frag_address(&skb_shinfo(skb)->frags[i]),
  101. skb_shinfo(skb)->frags[i].size, true);
  102. }
  103. }
  104. static inline void greth_enable_tx(struct greth_private *greth)
  105. {
  106. wmb();
  107. GRETH_REGORIN(greth->regs->control, GRETH_TXEN);
  108. }
  109. static inline void greth_disable_tx(struct greth_private *greth)
  110. {
  111. GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN);
  112. }
  113. static inline void greth_enable_rx(struct greth_private *greth)
  114. {
  115. wmb();
  116. GRETH_REGORIN(greth->regs->control, GRETH_RXEN);
  117. }
  118. static inline void greth_disable_rx(struct greth_private *greth)
  119. {
  120. GRETH_REGANDIN(greth->regs->control, ~GRETH_RXEN);
  121. }
  122. static inline void greth_enable_irqs(struct greth_private *greth)
  123. {
  124. GRETH_REGORIN(greth->regs->control, GRETH_RXI | GRETH_TXI);
  125. }
  126. static inline void greth_disable_irqs(struct greth_private *greth)
  127. {
  128. GRETH_REGANDIN(greth->regs->control, ~(GRETH_RXI|GRETH_TXI));
  129. }
  130. static inline void greth_write_bd(u32 *bd, u32 val)
  131. {
  132. __raw_writel(cpu_to_be32(val), bd);
  133. }
  134. static inline u32 greth_read_bd(u32 *bd)
  135. {
  136. return be32_to_cpu(__raw_readl(bd));
  137. }
  138. static void greth_clean_rings(struct greth_private *greth)
  139. {
  140. int i;
  141. struct greth_bd *rx_bdp = greth->rx_bd_base;
  142. struct greth_bd *tx_bdp = greth->tx_bd_base;
  143. if (greth->gbit_mac) {
  144. /* Free and unmap RX buffers */
  145. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  146. if (greth->rx_skbuff[i] != NULL) {
  147. dev_kfree_skb(greth->rx_skbuff[i]);
  148. dma_unmap_single(greth->dev,
  149. greth_read_bd(&rx_bdp->addr),
  150. MAX_FRAME_SIZE+NET_IP_ALIGN,
  151. DMA_FROM_DEVICE);
  152. }
  153. }
  154. /* TX buffers */
  155. while (greth->tx_free < GRETH_TXBD_NUM) {
  156. struct sk_buff *skb = greth->tx_skbuff[greth->tx_last];
  157. int nr_frags = skb_shinfo(skb)->nr_frags;
  158. tx_bdp = greth->tx_bd_base + greth->tx_last;
  159. greth->tx_last = NEXT_TX(greth->tx_last);
  160. dma_unmap_single(greth->dev,
  161. greth_read_bd(&tx_bdp->addr),
  162. skb_headlen(skb),
  163. DMA_TO_DEVICE);
  164. for (i = 0; i < nr_frags; i++) {
  165. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  166. tx_bdp = greth->tx_bd_base + greth->tx_last;
  167. dma_unmap_page(greth->dev,
  168. greth_read_bd(&tx_bdp->addr),
  169. skb_frag_size(frag),
  170. DMA_TO_DEVICE);
  171. greth->tx_last = NEXT_TX(greth->tx_last);
  172. }
  173. greth->tx_free += nr_frags+1;
  174. dev_kfree_skb(skb);
  175. }
  176. } else { /* 10/100 Mbps MAC */
  177. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  178. kfree(greth->rx_bufs[i]);
  179. dma_unmap_single(greth->dev,
  180. greth_read_bd(&rx_bdp->addr),
  181. MAX_FRAME_SIZE,
  182. DMA_FROM_DEVICE);
  183. }
  184. for (i = 0; i < GRETH_TXBD_NUM; i++, tx_bdp++) {
  185. kfree(greth->tx_bufs[i]);
  186. dma_unmap_single(greth->dev,
  187. greth_read_bd(&tx_bdp->addr),
  188. MAX_FRAME_SIZE,
  189. DMA_TO_DEVICE);
  190. }
  191. }
  192. }
  193. static int greth_init_rings(struct greth_private *greth)
  194. {
  195. struct sk_buff *skb;
  196. struct greth_bd *rx_bd, *tx_bd;
  197. u32 dma_addr;
  198. int i;
  199. rx_bd = greth->rx_bd_base;
  200. tx_bd = greth->tx_bd_base;
  201. /* Initialize descriptor rings and buffers */
  202. if (greth->gbit_mac) {
  203. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  204. skb = netdev_alloc_skb(greth->netdev, MAX_FRAME_SIZE+NET_IP_ALIGN);
  205. if (skb == NULL) {
  206. if (netif_msg_ifup(greth))
  207. dev_err(greth->dev, "Error allocating DMA ring.\n");
  208. goto cleanup;
  209. }
  210. skb_reserve(skb, NET_IP_ALIGN);
  211. dma_addr = dma_map_single(greth->dev,
  212. skb->data,
  213. MAX_FRAME_SIZE+NET_IP_ALIGN,
  214. DMA_FROM_DEVICE);
  215. if (dma_mapping_error(greth->dev, dma_addr)) {
  216. if (netif_msg_ifup(greth))
  217. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  218. goto cleanup;
  219. }
  220. greth->rx_skbuff[i] = skb;
  221. greth_write_bd(&rx_bd[i].addr, dma_addr);
  222. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  223. }
  224. } else {
  225. /* 10/100 MAC uses a fixed set of buffers and copy to/from SKBs */
  226. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  227. greth->rx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  228. if (greth->rx_bufs[i] == NULL) {
  229. if (netif_msg_ifup(greth))
  230. dev_err(greth->dev, "Error allocating DMA ring.\n");
  231. goto cleanup;
  232. }
  233. dma_addr = dma_map_single(greth->dev,
  234. greth->rx_bufs[i],
  235. MAX_FRAME_SIZE,
  236. DMA_FROM_DEVICE);
  237. if (dma_mapping_error(greth->dev, dma_addr)) {
  238. if (netif_msg_ifup(greth))
  239. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  240. goto cleanup;
  241. }
  242. greth_write_bd(&rx_bd[i].addr, dma_addr);
  243. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  244. }
  245. for (i = 0; i < GRETH_TXBD_NUM; i++) {
  246. greth->tx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  247. if (greth->tx_bufs[i] == NULL) {
  248. if (netif_msg_ifup(greth))
  249. dev_err(greth->dev, "Error allocating DMA ring.\n");
  250. goto cleanup;
  251. }
  252. dma_addr = dma_map_single(greth->dev,
  253. greth->tx_bufs[i],
  254. MAX_FRAME_SIZE,
  255. DMA_TO_DEVICE);
  256. if (dma_mapping_error(greth->dev, dma_addr)) {
  257. if (netif_msg_ifup(greth))
  258. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  259. goto cleanup;
  260. }
  261. greth_write_bd(&tx_bd[i].addr, dma_addr);
  262. greth_write_bd(&tx_bd[i].stat, 0);
  263. }
  264. }
  265. greth_write_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat,
  266. greth_read_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat) | GRETH_BD_WR);
  267. /* Initialize pointers. */
  268. greth->rx_cur = 0;
  269. greth->tx_next = 0;
  270. greth->tx_last = 0;
  271. greth->tx_free = GRETH_TXBD_NUM;
  272. /* Initialize descriptor base address */
  273. GRETH_REGSAVE(greth->regs->tx_desc_p, greth->tx_bd_base_phys);
  274. GRETH_REGSAVE(greth->regs->rx_desc_p, greth->rx_bd_base_phys);
  275. return 0;
  276. cleanup:
  277. greth_clean_rings(greth);
  278. return -ENOMEM;
  279. }
  280. static int greth_open(struct net_device *dev)
  281. {
  282. struct greth_private *greth = netdev_priv(dev);
  283. int err;
  284. err = greth_init_rings(greth);
  285. if (err) {
  286. if (netif_msg_ifup(greth))
  287. dev_err(&dev->dev, "Could not allocate memory for DMA rings\n");
  288. return err;
  289. }
  290. err = request_irq(greth->irq, greth_interrupt, 0, "eth", (void *) dev);
  291. if (err) {
  292. if (netif_msg_ifup(greth))
  293. dev_err(&dev->dev, "Could not allocate interrupt %d\n", dev->irq);
  294. greth_clean_rings(greth);
  295. return err;
  296. }
  297. if (netif_msg_ifup(greth))
  298. dev_dbg(&dev->dev, " starting queue\n");
  299. netif_start_queue(dev);
  300. GRETH_REGSAVE(greth->regs->status, 0xFF);
  301. napi_enable(&greth->napi);
  302. greth_enable_irqs(greth);
  303. greth_enable_tx(greth);
  304. greth_enable_rx(greth);
  305. return 0;
  306. }
  307. static int greth_close(struct net_device *dev)
  308. {
  309. struct greth_private *greth = netdev_priv(dev);
  310. napi_disable(&greth->napi);
  311. greth_disable_irqs(greth);
  312. greth_disable_tx(greth);
  313. greth_disable_rx(greth);
  314. netif_stop_queue(dev);
  315. free_irq(greth->irq, (void *) dev);
  316. greth_clean_rings(greth);
  317. return 0;
  318. }
  319. static netdev_tx_t
  320. greth_start_xmit(struct sk_buff *skb, struct net_device *dev)
  321. {
  322. struct greth_private *greth = netdev_priv(dev);
  323. struct greth_bd *bdp;
  324. int err = NETDEV_TX_OK;
  325. u32 status, dma_addr, ctrl;
  326. unsigned long flags;
  327. /* Clean TX Ring */
  328. greth_clean_tx(greth->netdev);
  329. if (unlikely(greth->tx_free <= 0)) {
  330. spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/
  331. ctrl = GRETH_REGLOAD(greth->regs->control);
  332. /* Enable TX IRQ only if not already in poll() routine */
  333. if (ctrl & GRETH_RXI)
  334. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI);
  335. netif_stop_queue(dev);
  336. spin_unlock_irqrestore(&greth->devlock, flags);
  337. return NETDEV_TX_BUSY;
  338. }
  339. if (netif_msg_pktdata(greth))
  340. greth_print_tx_packet(skb);
  341. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  342. dev->stats.tx_errors++;
  343. goto out;
  344. }
  345. bdp = greth->tx_bd_base + greth->tx_next;
  346. dma_addr = greth_read_bd(&bdp->addr);
  347. memcpy((unsigned char *) phys_to_virt(dma_addr), skb->data, skb->len);
  348. dma_sync_single_for_device(greth->dev, dma_addr, skb->len, DMA_TO_DEVICE);
  349. status = GRETH_BD_EN | GRETH_BD_IE | (skb->len & GRETH_BD_LEN);
  350. greth->tx_bufs_length[greth->tx_next] = skb->len & GRETH_BD_LEN;
  351. /* Wrap around descriptor ring */
  352. if (greth->tx_next == GRETH_TXBD_NUM_MASK) {
  353. status |= GRETH_BD_WR;
  354. }
  355. greth->tx_next = NEXT_TX(greth->tx_next);
  356. greth->tx_free--;
  357. /* Write descriptor control word and enable transmission */
  358. greth_write_bd(&bdp->stat, status);
  359. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  360. greth_enable_tx(greth);
  361. spin_unlock_irqrestore(&greth->devlock, flags);
  362. out:
  363. dev_kfree_skb(skb);
  364. return err;
  365. }
  366. static netdev_tx_t
  367. greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev)
  368. {
  369. struct greth_private *greth = netdev_priv(dev);
  370. struct greth_bd *bdp;
  371. u32 status = 0, dma_addr, ctrl;
  372. int curr_tx, nr_frags, i, err = NETDEV_TX_OK;
  373. unsigned long flags;
  374. nr_frags = skb_shinfo(skb)->nr_frags;
  375. /* Clean TX Ring */
  376. greth_clean_tx_gbit(dev);
  377. if (greth->tx_free < nr_frags + 1) {
  378. spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/
  379. ctrl = GRETH_REGLOAD(greth->regs->control);
  380. /* Enable TX IRQ only if not already in poll() routine */
  381. if (ctrl & GRETH_RXI)
  382. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI);
  383. netif_stop_queue(dev);
  384. spin_unlock_irqrestore(&greth->devlock, flags);
  385. err = NETDEV_TX_BUSY;
  386. goto out;
  387. }
  388. if (netif_msg_pktdata(greth))
  389. greth_print_tx_packet(skb);
  390. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  391. dev->stats.tx_errors++;
  392. goto out;
  393. }
  394. /* Save skb pointer. */
  395. greth->tx_skbuff[greth->tx_next] = skb;
  396. /* Linear buf */
  397. if (nr_frags != 0)
  398. status = GRETH_TXBD_MORE;
  399. if (skb->ip_summed == CHECKSUM_PARTIAL)
  400. status |= GRETH_TXBD_CSALL;
  401. status |= skb_headlen(skb) & GRETH_BD_LEN;
  402. if (greth->tx_next == GRETH_TXBD_NUM_MASK)
  403. status |= GRETH_BD_WR;
  404. bdp = greth->tx_bd_base + greth->tx_next;
  405. greth_write_bd(&bdp->stat, status);
  406. dma_addr = dma_map_single(greth->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  407. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  408. goto map_error;
  409. greth_write_bd(&bdp->addr, dma_addr);
  410. curr_tx = NEXT_TX(greth->tx_next);
  411. /* Frags */
  412. for (i = 0; i < nr_frags; i++) {
  413. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  414. greth->tx_skbuff[curr_tx] = NULL;
  415. bdp = greth->tx_bd_base + curr_tx;
  416. status = GRETH_BD_EN;
  417. if (skb->ip_summed == CHECKSUM_PARTIAL)
  418. status |= GRETH_TXBD_CSALL;
  419. status |= skb_frag_size(frag) & GRETH_BD_LEN;
  420. /* Wrap around descriptor ring */
  421. if (curr_tx == GRETH_TXBD_NUM_MASK)
  422. status |= GRETH_BD_WR;
  423. /* More fragments left */
  424. if (i < nr_frags - 1)
  425. status |= GRETH_TXBD_MORE;
  426. else
  427. status |= GRETH_BD_IE; /* enable IRQ on last fragment */
  428. greth_write_bd(&bdp->stat, status);
  429. dma_addr = skb_frag_dma_map(greth->dev, frag, 0, skb_frag_size(frag),
  430. DMA_TO_DEVICE);
  431. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  432. goto frag_map_error;
  433. greth_write_bd(&bdp->addr, dma_addr);
  434. curr_tx = NEXT_TX(curr_tx);
  435. }
  436. wmb();
  437. /* Enable the descriptor chain by enabling the first descriptor */
  438. bdp = greth->tx_bd_base + greth->tx_next;
  439. greth_write_bd(&bdp->stat, greth_read_bd(&bdp->stat) | GRETH_BD_EN);
  440. greth->tx_next = curr_tx;
  441. greth->tx_free -= nr_frags + 1;
  442. wmb();
  443. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  444. greth_enable_tx(greth);
  445. spin_unlock_irqrestore(&greth->devlock, flags);
  446. return NETDEV_TX_OK;
  447. frag_map_error:
  448. /* Unmap SKB mappings that succeeded and disable descriptor */
  449. for (i = 0; greth->tx_next + i != curr_tx; i++) {
  450. bdp = greth->tx_bd_base + greth->tx_next + i;
  451. dma_unmap_single(greth->dev,
  452. greth_read_bd(&bdp->addr),
  453. greth_read_bd(&bdp->stat) & GRETH_BD_LEN,
  454. DMA_TO_DEVICE);
  455. greth_write_bd(&bdp->stat, 0);
  456. }
  457. map_error:
  458. if (net_ratelimit())
  459. dev_warn(greth->dev, "Could not create TX DMA mapping\n");
  460. dev_kfree_skb(skb);
  461. out:
  462. return err;
  463. }
  464. static irqreturn_t greth_interrupt(int irq, void *dev_id)
  465. {
  466. struct net_device *dev = dev_id;
  467. struct greth_private *greth;
  468. u32 status, ctrl;
  469. irqreturn_t retval = IRQ_NONE;
  470. greth = netdev_priv(dev);
  471. spin_lock(&greth->devlock);
  472. /* Get the interrupt events that caused us to be here. */
  473. status = GRETH_REGLOAD(greth->regs->status);
  474. /* Must see if interrupts are enabled also, INT_TX|INT_RX flags may be
  475. * set regardless of whether IRQ is enabled or not. Especially
  476. * important when shared IRQ.
  477. */
  478. ctrl = GRETH_REGLOAD(greth->regs->control);
  479. /* Handle rx and tx interrupts through poll */
  480. if (((status & (GRETH_INT_RE | GRETH_INT_RX)) && (ctrl & GRETH_RXI)) ||
  481. ((status & (GRETH_INT_TE | GRETH_INT_TX)) && (ctrl & GRETH_TXI))) {
  482. retval = IRQ_HANDLED;
  483. /* Disable interrupts and schedule poll() */
  484. greth_disable_irqs(greth);
  485. napi_schedule(&greth->napi);
  486. }
  487. mmiowb();
  488. spin_unlock(&greth->devlock);
  489. return retval;
  490. }
  491. static void greth_clean_tx(struct net_device *dev)
  492. {
  493. struct greth_private *greth;
  494. struct greth_bd *bdp;
  495. u32 stat;
  496. greth = netdev_priv(dev);
  497. while (1) {
  498. bdp = greth->tx_bd_base + greth->tx_last;
  499. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  500. mb();
  501. stat = greth_read_bd(&bdp->stat);
  502. if (unlikely(stat & GRETH_BD_EN))
  503. break;
  504. if (greth->tx_free == GRETH_TXBD_NUM)
  505. break;
  506. /* Check status for errors */
  507. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  508. dev->stats.tx_errors++;
  509. if (stat & GRETH_TXBD_ERR_AL)
  510. dev->stats.tx_aborted_errors++;
  511. if (stat & GRETH_TXBD_ERR_UE)
  512. dev->stats.tx_fifo_errors++;
  513. }
  514. dev->stats.tx_packets++;
  515. dev->stats.tx_bytes += greth->tx_bufs_length[greth->tx_last];
  516. greth->tx_last = NEXT_TX(greth->tx_last);
  517. greth->tx_free++;
  518. }
  519. if (greth->tx_free > 0) {
  520. netif_wake_queue(dev);
  521. }
  522. }
  523. static inline void greth_update_tx_stats(struct net_device *dev, u32 stat)
  524. {
  525. /* Check status for errors */
  526. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  527. dev->stats.tx_errors++;
  528. if (stat & GRETH_TXBD_ERR_AL)
  529. dev->stats.tx_aborted_errors++;
  530. if (stat & GRETH_TXBD_ERR_UE)
  531. dev->stats.tx_fifo_errors++;
  532. if (stat & GRETH_TXBD_ERR_LC)
  533. dev->stats.tx_aborted_errors++;
  534. }
  535. dev->stats.tx_packets++;
  536. }
  537. static void greth_clean_tx_gbit(struct net_device *dev)
  538. {
  539. struct greth_private *greth;
  540. struct greth_bd *bdp, *bdp_last_frag;
  541. struct sk_buff *skb;
  542. u32 stat;
  543. int nr_frags, i;
  544. greth = netdev_priv(dev);
  545. while (greth->tx_free < GRETH_TXBD_NUM) {
  546. skb = greth->tx_skbuff[greth->tx_last];
  547. nr_frags = skb_shinfo(skb)->nr_frags;
  548. /* We only clean fully completed SKBs */
  549. bdp_last_frag = greth->tx_bd_base + SKIP_TX(greth->tx_last, nr_frags);
  550. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  551. mb();
  552. stat = greth_read_bd(&bdp_last_frag->stat);
  553. if (stat & GRETH_BD_EN)
  554. break;
  555. greth->tx_skbuff[greth->tx_last] = NULL;
  556. greth_update_tx_stats(dev, stat);
  557. dev->stats.tx_bytes += skb->len;
  558. bdp = greth->tx_bd_base + greth->tx_last;
  559. greth->tx_last = NEXT_TX(greth->tx_last);
  560. dma_unmap_single(greth->dev,
  561. greth_read_bd(&bdp->addr),
  562. skb_headlen(skb),
  563. DMA_TO_DEVICE);
  564. for (i = 0; i < nr_frags; i++) {
  565. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  566. bdp = greth->tx_bd_base + greth->tx_last;
  567. dma_unmap_page(greth->dev,
  568. greth_read_bd(&bdp->addr),
  569. skb_frag_size(frag),
  570. DMA_TO_DEVICE);
  571. greth->tx_last = NEXT_TX(greth->tx_last);
  572. }
  573. greth->tx_free += nr_frags+1;
  574. dev_kfree_skb(skb);
  575. }
  576. if (netif_queue_stopped(dev) && (greth->tx_free > (MAX_SKB_FRAGS+1)))
  577. netif_wake_queue(dev);
  578. }
  579. static int greth_rx(struct net_device *dev, int limit)
  580. {
  581. struct greth_private *greth;
  582. struct greth_bd *bdp;
  583. struct sk_buff *skb;
  584. int pkt_len;
  585. int bad, count;
  586. u32 status, dma_addr;
  587. unsigned long flags;
  588. greth = netdev_priv(dev);
  589. for (count = 0; count < limit; ++count) {
  590. bdp = greth->rx_bd_base + greth->rx_cur;
  591. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  592. mb();
  593. status = greth_read_bd(&bdp->stat);
  594. if (unlikely(status & GRETH_BD_EN)) {
  595. break;
  596. }
  597. dma_addr = greth_read_bd(&bdp->addr);
  598. bad = 0;
  599. /* Check status for errors. */
  600. if (unlikely(status & GRETH_RXBD_STATUS)) {
  601. if (status & GRETH_RXBD_ERR_FT) {
  602. dev->stats.rx_length_errors++;
  603. bad = 1;
  604. }
  605. if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
  606. dev->stats.rx_frame_errors++;
  607. bad = 1;
  608. }
  609. if (status & GRETH_RXBD_ERR_CRC) {
  610. dev->stats.rx_crc_errors++;
  611. bad = 1;
  612. }
  613. }
  614. if (unlikely(bad)) {
  615. dev->stats.rx_errors++;
  616. } else {
  617. pkt_len = status & GRETH_BD_LEN;
  618. skb = netdev_alloc_skb(dev, pkt_len + NET_IP_ALIGN);
  619. if (unlikely(skb == NULL)) {
  620. if (net_ratelimit())
  621. dev_warn(&dev->dev, "low on memory - " "packet dropped\n");
  622. dev->stats.rx_dropped++;
  623. } else {
  624. skb_reserve(skb, NET_IP_ALIGN);
  625. dma_sync_single_for_cpu(greth->dev,
  626. dma_addr,
  627. pkt_len,
  628. DMA_FROM_DEVICE);
  629. if (netif_msg_pktdata(greth))
  630. greth_print_rx_packet(phys_to_virt(dma_addr), pkt_len);
  631. memcpy(skb_put(skb, pkt_len), phys_to_virt(dma_addr), pkt_len);
  632. skb->protocol = eth_type_trans(skb, dev);
  633. dev->stats.rx_bytes += pkt_len;
  634. dev->stats.rx_packets++;
  635. netif_receive_skb(skb);
  636. }
  637. }
  638. status = GRETH_BD_EN | GRETH_BD_IE;
  639. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  640. status |= GRETH_BD_WR;
  641. }
  642. wmb();
  643. greth_write_bd(&bdp->stat, status);
  644. dma_sync_single_for_device(greth->dev, dma_addr, MAX_FRAME_SIZE, DMA_FROM_DEVICE);
  645. spin_lock_irqsave(&greth->devlock, flags); /* save from XMIT */
  646. greth_enable_rx(greth);
  647. spin_unlock_irqrestore(&greth->devlock, flags);
  648. greth->rx_cur = NEXT_RX(greth->rx_cur);
  649. }
  650. return count;
  651. }
  652. static inline int hw_checksummed(u32 status)
  653. {
  654. if (status & GRETH_RXBD_IP_FRAG)
  655. return 0;
  656. if (status & GRETH_RXBD_IP && status & GRETH_RXBD_IP_CSERR)
  657. return 0;
  658. if (status & GRETH_RXBD_UDP && status & GRETH_RXBD_UDP_CSERR)
  659. return 0;
  660. if (status & GRETH_RXBD_TCP && status & GRETH_RXBD_TCP_CSERR)
  661. return 0;
  662. return 1;
  663. }
  664. static int greth_rx_gbit(struct net_device *dev, int limit)
  665. {
  666. struct greth_private *greth;
  667. struct greth_bd *bdp;
  668. struct sk_buff *skb, *newskb;
  669. int pkt_len;
  670. int bad, count = 0;
  671. u32 status, dma_addr;
  672. unsigned long flags;
  673. greth = netdev_priv(dev);
  674. for (count = 0; count < limit; ++count) {
  675. bdp = greth->rx_bd_base + greth->rx_cur;
  676. skb = greth->rx_skbuff[greth->rx_cur];
  677. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  678. mb();
  679. status = greth_read_bd(&bdp->stat);
  680. bad = 0;
  681. if (status & GRETH_BD_EN)
  682. break;
  683. /* Check status for errors. */
  684. if (unlikely(status & GRETH_RXBD_STATUS)) {
  685. if (status & GRETH_RXBD_ERR_FT) {
  686. dev->stats.rx_length_errors++;
  687. bad = 1;
  688. } else if (status &
  689. (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE | GRETH_RXBD_ERR_LE)) {
  690. dev->stats.rx_frame_errors++;
  691. bad = 1;
  692. } else if (status & GRETH_RXBD_ERR_CRC) {
  693. dev->stats.rx_crc_errors++;
  694. bad = 1;
  695. }
  696. }
  697. /* Allocate new skb to replace current, not needed if the
  698. * current skb can be reused */
  699. if (!bad && (newskb=netdev_alloc_skb(dev, MAX_FRAME_SIZE + NET_IP_ALIGN))) {
  700. skb_reserve(newskb, NET_IP_ALIGN);
  701. dma_addr = dma_map_single(greth->dev,
  702. newskb->data,
  703. MAX_FRAME_SIZE + NET_IP_ALIGN,
  704. DMA_FROM_DEVICE);
  705. if (!dma_mapping_error(greth->dev, dma_addr)) {
  706. /* Process the incoming frame. */
  707. pkt_len = status & GRETH_BD_LEN;
  708. dma_unmap_single(greth->dev,
  709. greth_read_bd(&bdp->addr),
  710. MAX_FRAME_SIZE + NET_IP_ALIGN,
  711. DMA_FROM_DEVICE);
  712. if (netif_msg_pktdata(greth))
  713. greth_print_rx_packet(phys_to_virt(greth_read_bd(&bdp->addr)), pkt_len);
  714. skb_put(skb, pkt_len);
  715. if (dev->features & NETIF_F_RXCSUM && hw_checksummed(status))
  716. skb->ip_summed = CHECKSUM_UNNECESSARY;
  717. else
  718. skb_checksum_none_assert(skb);
  719. skb->protocol = eth_type_trans(skb, dev);
  720. dev->stats.rx_packets++;
  721. dev->stats.rx_bytes += pkt_len;
  722. netif_receive_skb(skb);
  723. greth->rx_skbuff[greth->rx_cur] = newskb;
  724. greth_write_bd(&bdp->addr, dma_addr);
  725. } else {
  726. if (net_ratelimit())
  727. dev_warn(greth->dev, "Could not create DMA mapping, dropping packet\n");
  728. dev_kfree_skb(newskb);
  729. /* reusing current skb, so it is a drop */
  730. dev->stats.rx_dropped++;
  731. }
  732. } else if (bad) {
  733. /* Bad Frame transfer, the skb is reused */
  734. dev->stats.rx_dropped++;
  735. } else {
  736. /* Failed Allocating a new skb. This is rather stupid
  737. * but the current "filled" skb is reused, as if
  738. * transfer failure. One could argue that RX descriptor
  739. * table handling should be divided into cleaning and
  740. * filling as the TX part of the driver
  741. */
  742. if (net_ratelimit())
  743. dev_warn(greth->dev, "Could not allocate SKB, dropping packet\n");
  744. /* reusing current skb, so it is a drop */
  745. dev->stats.rx_dropped++;
  746. }
  747. status = GRETH_BD_EN | GRETH_BD_IE;
  748. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  749. status |= GRETH_BD_WR;
  750. }
  751. wmb();
  752. greth_write_bd(&bdp->stat, status);
  753. spin_lock_irqsave(&greth->devlock, flags);
  754. greth_enable_rx(greth);
  755. spin_unlock_irqrestore(&greth->devlock, flags);
  756. greth->rx_cur = NEXT_RX(greth->rx_cur);
  757. }
  758. return count;
  759. }
  760. static int greth_poll(struct napi_struct *napi, int budget)
  761. {
  762. struct greth_private *greth;
  763. int work_done = 0;
  764. unsigned long flags;
  765. u32 mask, ctrl;
  766. greth = container_of(napi, struct greth_private, napi);
  767. restart_txrx_poll:
  768. if (netif_queue_stopped(greth->netdev)) {
  769. if (greth->gbit_mac)
  770. greth_clean_tx_gbit(greth->netdev);
  771. else
  772. greth_clean_tx(greth->netdev);
  773. }
  774. if (greth->gbit_mac) {
  775. work_done += greth_rx_gbit(greth->netdev, budget - work_done);
  776. } else {
  777. work_done += greth_rx(greth->netdev, budget - work_done);
  778. }
  779. if (work_done < budget) {
  780. spin_lock_irqsave(&greth->devlock, flags);
  781. ctrl = GRETH_REGLOAD(greth->regs->control);
  782. if (netif_queue_stopped(greth->netdev)) {
  783. GRETH_REGSAVE(greth->regs->control,
  784. ctrl | GRETH_TXI | GRETH_RXI);
  785. mask = GRETH_INT_RX | GRETH_INT_RE |
  786. GRETH_INT_TX | GRETH_INT_TE;
  787. } else {
  788. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_RXI);
  789. mask = GRETH_INT_RX | GRETH_INT_RE;
  790. }
  791. if (GRETH_REGLOAD(greth->regs->status) & mask) {
  792. GRETH_REGSAVE(greth->regs->control, ctrl);
  793. spin_unlock_irqrestore(&greth->devlock, flags);
  794. goto restart_txrx_poll;
  795. } else {
  796. __napi_complete(napi);
  797. spin_unlock_irqrestore(&greth->devlock, flags);
  798. }
  799. }
  800. return work_done;
  801. }
  802. static int greth_set_mac_add(struct net_device *dev, void *p)
  803. {
  804. struct sockaddr *addr = p;
  805. struct greth_private *greth;
  806. struct greth_regs *regs;
  807. greth = netdev_priv(dev);
  808. regs = (struct greth_regs *) greth->regs;
  809. if (!is_valid_ether_addr(addr->sa_data))
  810. return -EADDRNOTAVAIL;
  811. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  812. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  813. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  814. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  815. return 0;
  816. }
  817. static u32 greth_hash_get_index(__u8 *addr)
  818. {
  819. return (ether_crc(6, addr)) & 0x3F;
  820. }
  821. static void greth_set_hash_filter(struct net_device *dev)
  822. {
  823. struct netdev_hw_addr *ha;
  824. struct greth_private *greth = netdev_priv(dev);
  825. struct greth_regs *regs = (struct greth_regs *) greth->regs;
  826. u32 mc_filter[2];
  827. unsigned int bitnr;
  828. mc_filter[0] = mc_filter[1] = 0;
  829. netdev_for_each_mc_addr(ha, dev) {
  830. bitnr = greth_hash_get_index(ha->addr);
  831. mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
  832. }
  833. GRETH_REGSAVE(regs->hash_msb, mc_filter[1]);
  834. GRETH_REGSAVE(regs->hash_lsb, mc_filter[0]);
  835. }
  836. static void greth_set_multicast_list(struct net_device *dev)
  837. {
  838. int cfg;
  839. struct greth_private *greth = netdev_priv(dev);
  840. struct greth_regs *regs = (struct greth_regs *) greth->regs;
  841. cfg = GRETH_REGLOAD(regs->control);
  842. if (dev->flags & IFF_PROMISC)
  843. cfg |= GRETH_CTRL_PR;
  844. else
  845. cfg &= ~GRETH_CTRL_PR;
  846. if (greth->multicast) {
  847. if (dev->flags & IFF_ALLMULTI) {
  848. GRETH_REGSAVE(regs->hash_msb, -1);
  849. GRETH_REGSAVE(regs->hash_lsb, -1);
  850. cfg |= GRETH_CTRL_MCEN;
  851. GRETH_REGSAVE(regs->control, cfg);
  852. return;
  853. }
  854. if (netdev_mc_empty(dev)) {
  855. cfg &= ~GRETH_CTRL_MCEN;
  856. GRETH_REGSAVE(regs->control, cfg);
  857. return;
  858. }
  859. /* Setup multicast filter */
  860. greth_set_hash_filter(dev);
  861. cfg |= GRETH_CTRL_MCEN;
  862. }
  863. GRETH_REGSAVE(regs->control, cfg);
  864. }
  865. static u32 greth_get_msglevel(struct net_device *dev)
  866. {
  867. struct greth_private *greth = netdev_priv(dev);
  868. return greth->msg_enable;
  869. }
  870. static void greth_set_msglevel(struct net_device *dev, u32 value)
  871. {
  872. struct greth_private *greth = netdev_priv(dev);
  873. greth->msg_enable = value;
  874. }
  875. static int greth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  876. {
  877. struct greth_private *greth = netdev_priv(dev);
  878. struct phy_device *phy = greth->phy;
  879. if (!phy)
  880. return -ENODEV;
  881. return phy_ethtool_gset(phy, cmd);
  882. }
  883. static int greth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  884. {
  885. struct greth_private *greth = netdev_priv(dev);
  886. struct phy_device *phy = greth->phy;
  887. if (!phy)
  888. return -ENODEV;
  889. return phy_ethtool_sset(phy, cmd);
  890. }
  891. static int greth_get_regs_len(struct net_device *dev)
  892. {
  893. return sizeof(struct greth_regs);
  894. }
  895. static void greth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  896. {
  897. struct greth_private *greth = netdev_priv(dev);
  898. strncpy(info->driver, dev_driver_string(greth->dev), 32);
  899. strncpy(info->version, "revision: 1.0", 32);
  900. strncpy(info->bus_info, greth->dev->bus->name, 32);
  901. strncpy(info->fw_version, "N/A", 32);
  902. info->eedump_len = 0;
  903. info->regdump_len = sizeof(struct greth_regs);
  904. }
  905. static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  906. {
  907. int i;
  908. struct greth_private *greth = netdev_priv(dev);
  909. u32 __iomem *greth_regs = (u32 __iomem *) greth->regs;
  910. u32 *buff = p;
  911. for (i = 0; i < sizeof(struct greth_regs) / sizeof(u32); i++)
  912. buff[i] = greth_read_bd(&greth_regs[i]);
  913. }
  914. static const struct ethtool_ops greth_ethtool_ops = {
  915. .get_msglevel = greth_get_msglevel,
  916. .set_msglevel = greth_set_msglevel,
  917. .get_settings = greth_get_settings,
  918. .set_settings = greth_set_settings,
  919. .get_drvinfo = greth_get_drvinfo,
  920. .get_regs_len = greth_get_regs_len,
  921. .get_regs = greth_get_regs,
  922. .get_link = ethtool_op_get_link,
  923. };
  924. static struct net_device_ops greth_netdev_ops = {
  925. .ndo_open = greth_open,
  926. .ndo_stop = greth_close,
  927. .ndo_start_xmit = greth_start_xmit,
  928. .ndo_set_mac_address = greth_set_mac_add,
  929. .ndo_validate_addr = eth_validate_addr,
  930. };
  931. static inline int wait_for_mdio(struct greth_private *greth)
  932. {
  933. unsigned long timeout = jiffies + 4*HZ/100;
  934. while (GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_BUSY) {
  935. if (time_after(jiffies, timeout))
  936. return 0;
  937. }
  938. return 1;
  939. }
  940. static int greth_mdio_read(struct mii_bus *bus, int phy, int reg)
  941. {
  942. struct greth_private *greth = bus->priv;
  943. int data;
  944. if (!wait_for_mdio(greth))
  945. return -EBUSY;
  946. GRETH_REGSAVE(greth->regs->mdio, ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 2);
  947. if (!wait_for_mdio(greth))
  948. return -EBUSY;
  949. if (!(GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_NVALID)) {
  950. data = (GRETH_REGLOAD(greth->regs->mdio) >> 16) & 0xFFFF;
  951. return data;
  952. } else {
  953. return -1;
  954. }
  955. }
  956. static int greth_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
  957. {
  958. struct greth_private *greth = bus->priv;
  959. if (!wait_for_mdio(greth))
  960. return -EBUSY;
  961. GRETH_REGSAVE(greth->regs->mdio,
  962. ((val & 0xFFFF) << 16) | ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 1);
  963. if (!wait_for_mdio(greth))
  964. return -EBUSY;
  965. return 0;
  966. }
  967. static int greth_mdio_reset(struct mii_bus *bus)
  968. {
  969. return 0;
  970. }
  971. static void greth_link_change(struct net_device *dev)
  972. {
  973. struct greth_private *greth = netdev_priv(dev);
  974. struct phy_device *phydev = greth->phy;
  975. unsigned long flags;
  976. int status_change = 0;
  977. u32 ctrl;
  978. spin_lock_irqsave(&greth->devlock, flags);
  979. if (phydev->link) {
  980. if ((greth->speed != phydev->speed) || (greth->duplex != phydev->duplex)) {
  981. ctrl = GRETH_REGLOAD(greth->regs->control) &
  982. ~(GRETH_CTRL_FD | GRETH_CTRL_SP | GRETH_CTRL_GB);
  983. if (phydev->duplex)
  984. ctrl |= GRETH_CTRL_FD;
  985. if (phydev->speed == SPEED_100)
  986. ctrl |= GRETH_CTRL_SP;
  987. else if (phydev->speed == SPEED_1000)
  988. ctrl |= GRETH_CTRL_GB;
  989. GRETH_REGSAVE(greth->regs->control, ctrl);
  990. greth->speed = phydev->speed;
  991. greth->duplex = phydev->duplex;
  992. status_change = 1;
  993. }
  994. }
  995. if (phydev->link != greth->link) {
  996. if (!phydev->link) {
  997. greth->speed = 0;
  998. greth->duplex = -1;
  999. }
  1000. greth->link = phydev->link;
  1001. status_change = 1;
  1002. }
  1003. spin_unlock_irqrestore(&greth->devlock, flags);
  1004. if (status_change) {
  1005. if (phydev->link)
  1006. pr_debug("%s: link up (%d/%s)\n",
  1007. dev->name, phydev->speed,
  1008. DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
  1009. else
  1010. pr_debug("%s: link down\n", dev->name);
  1011. }
  1012. }
  1013. static int greth_mdio_probe(struct net_device *dev)
  1014. {
  1015. struct greth_private *greth = netdev_priv(dev);
  1016. struct phy_device *phy = NULL;
  1017. int ret;
  1018. /* Find the first PHY */
  1019. phy = phy_find_first(greth->mdio);
  1020. if (!phy) {
  1021. if (netif_msg_probe(greth))
  1022. dev_err(&dev->dev, "no PHY found\n");
  1023. return -ENXIO;
  1024. }
  1025. ret = phy_connect_direct(dev, phy, &greth_link_change,
  1026. 0, greth->gbit_mac ?
  1027. PHY_INTERFACE_MODE_GMII :
  1028. PHY_INTERFACE_MODE_MII);
  1029. if (ret) {
  1030. if (netif_msg_ifup(greth))
  1031. dev_err(&dev->dev, "could not attach to PHY\n");
  1032. return ret;
  1033. }
  1034. if (greth->gbit_mac)
  1035. phy->supported &= PHY_GBIT_FEATURES;
  1036. else
  1037. phy->supported &= PHY_BASIC_FEATURES;
  1038. phy->advertising = phy->supported;
  1039. greth->link = 0;
  1040. greth->speed = 0;
  1041. greth->duplex = -1;
  1042. greth->phy = phy;
  1043. return 0;
  1044. }
  1045. static inline int phy_aneg_done(struct phy_device *phydev)
  1046. {
  1047. int retval;
  1048. retval = phy_read(phydev, MII_BMSR);
  1049. return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
  1050. }
  1051. static int greth_mdio_init(struct greth_private *greth)
  1052. {
  1053. int ret, phy;
  1054. unsigned long timeout;
  1055. greth->mdio = mdiobus_alloc();
  1056. if (!greth->mdio) {
  1057. return -ENOMEM;
  1058. }
  1059. greth->mdio->name = "greth-mdio";
  1060. snprintf(greth->mdio->id, MII_BUS_ID_SIZE, "%s-%d", greth->mdio->name, greth->irq);
  1061. greth->mdio->read = greth_mdio_read;
  1062. greth->mdio->write = greth_mdio_write;
  1063. greth->mdio->reset = greth_mdio_reset;
  1064. greth->mdio->priv = greth;
  1065. greth->mdio->irq = greth->mdio_irqs;
  1066. for (phy = 0; phy < PHY_MAX_ADDR; phy++)
  1067. greth->mdio->irq[phy] = PHY_POLL;
  1068. ret = mdiobus_register(greth->mdio);
  1069. if (ret) {
  1070. goto error;
  1071. }
  1072. ret = greth_mdio_probe(greth->netdev);
  1073. if (ret) {
  1074. if (netif_msg_probe(greth))
  1075. dev_err(&greth->netdev->dev, "failed to probe MDIO bus\n");
  1076. goto unreg_mdio;
  1077. }
  1078. phy_start(greth->phy);
  1079. /* If Ethernet debug link is used make autoneg happen right away */
  1080. if (greth->edcl && greth_edcl == 1) {
  1081. phy_start_aneg(greth->phy);
  1082. timeout = jiffies + 6*HZ;
  1083. while (!phy_aneg_done(greth->phy) && time_before(jiffies, timeout)) {
  1084. }
  1085. genphy_read_status(greth->phy);
  1086. greth_link_change(greth->netdev);
  1087. }
  1088. return 0;
  1089. unreg_mdio:
  1090. mdiobus_unregister(greth->mdio);
  1091. error:
  1092. mdiobus_free(greth->mdio);
  1093. return ret;
  1094. }
  1095. /* Initialize the GRETH MAC */
  1096. static int __devinit greth_of_probe(struct platform_device *ofdev)
  1097. {
  1098. struct net_device *dev;
  1099. struct greth_private *greth;
  1100. struct greth_regs *regs;
  1101. int i;
  1102. int err;
  1103. int tmp;
  1104. unsigned long timeout;
  1105. dev = alloc_etherdev(sizeof(struct greth_private));
  1106. if (dev == NULL)
  1107. return -ENOMEM;
  1108. greth = netdev_priv(dev);
  1109. greth->netdev = dev;
  1110. greth->dev = &ofdev->dev;
  1111. if (greth_debug > 0)
  1112. greth->msg_enable = greth_debug;
  1113. else
  1114. greth->msg_enable = GRETH_DEF_MSG_ENABLE;
  1115. spin_lock_init(&greth->devlock);
  1116. greth->regs = of_ioremap(&ofdev->resource[0], 0,
  1117. resource_size(&ofdev->resource[0]),
  1118. "grlib-greth regs");
  1119. if (greth->regs == NULL) {
  1120. if (netif_msg_probe(greth))
  1121. dev_err(greth->dev, "ioremap failure.\n");
  1122. err = -EIO;
  1123. goto error1;
  1124. }
  1125. regs = (struct greth_regs *) greth->regs;
  1126. greth->irq = ofdev->archdata.irqs[0];
  1127. dev_set_drvdata(greth->dev, dev);
  1128. SET_NETDEV_DEV(dev, greth->dev);
  1129. if (netif_msg_probe(greth))
  1130. dev_dbg(greth->dev, "resetting controller.\n");
  1131. /* Reset the controller. */
  1132. GRETH_REGSAVE(regs->control, GRETH_RESET);
  1133. /* Wait for MAC to reset itself */
  1134. timeout = jiffies + HZ/100;
  1135. while (GRETH_REGLOAD(regs->control) & GRETH_RESET) {
  1136. if (time_after(jiffies, timeout)) {
  1137. err = -EIO;
  1138. if (netif_msg_probe(greth))
  1139. dev_err(greth->dev, "timeout when waiting for reset.\n");
  1140. goto error2;
  1141. }
  1142. }
  1143. /* Get default PHY address */
  1144. greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F;
  1145. /* Check if we have GBIT capable MAC */
  1146. tmp = GRETH_REGLOAD(regs->control);
  1147. greth->gbit_mac = (tmp >> 27) & 1;
  1148. /* Check for multicast capability */
  1149. greth->multicast = (tmp >> 25) & 1;
  1150. greth->edcl = (tmp >> 31) & 1;
  1151. /* If we have EDCL we disable the EDCL speed-duplex FSM so
  1152. * it doesn't interfere with the software */
  1153. if (greth->edcl != 0)
  1154. GRETH_REGORIN(regs->control, GRETH_CTRL_DISDUPLEX);
  1155. /* Check if MAC can handle MDIO interrupts */
  1156. greth->mdio_int_en = (tmp >> 26) & 1;
  1157. err = greth_mdio_init(greth);
  1158. if (err) {
  1159. if (netif_msg_probe(greth))
  1160. dev_err(greth->dev, "failed to register MDIO bus\n");
  1161. goto error2;
  1162. }
  1163. /* Allocate TX descriptor ring in coherent memory */
  1164. greth->tx_bd_base = (struct greth_bd *) dma_alloc_coherent(greth->dev,
  1165. 1024,
  1166. &greth->tx_bd_base_phys,
  1167. GFP_KERNEL);
  1168. if (!greth->tx_bd_base) {
  1169. if (netif_msg_probe(greth))
  1170. dev_err(&dev->dev, "could not allocate descriptor memory.\n");
  1171. err = -ENOMEM;
  1172. goto error3;
  1173. }
  1174. memset(greth->tx_bd_base, 0, 1024);
  1175. /* Allocate RX descriptor ring in coherent memory */
  1176. greth->rx_bd_base = (struct greth_bd *) dma_alloc_coherent(greth->dev,
  1177. 1024,
  1178. &greth->rx_bd_base_phys,
  1179. GFP_KERNEL);
  1180. if (!greth->rx_bd_base) {
  1181. if (netif_msg_probe(greth))
  1182. dev_err(greth->dev, "could not allocate descriptor memory.\n");
  1183. err = -ENOMEM;
  1184. goto error4;
  1185. }
  1186. memset(greth->rx_bd_base, 0, 1024);
  1187. /* Get MAC address from: module param, OF property or ID prom */
  1188. for (i = 0; i < 6; i++) {
  1189. if (macaddr[i] != 0)
  1190. break;
  1191. }
  1192. if (i == 6) {
  1193. const unsigned char *addr;
  1194. int len;
  1195. addr = of_get_property(ofdev->dev.of_node, "local-mac-address",
  1196. &len);
  1197. if (addr != NULL && len == 6) {
  1198. for (i = 0; i < 6; i++)
  1199. macaddr[i] = (unsigned int) addr[i];
  1200. } else {
  1201. #ifdef CONFIG_SPARC
  1202. for (i = 0; i < 6; i++)
  1203. macaddr[i] = (unsigned int) idprom->id_ethaddr[i];
  1204. #endif
  1205. }
  1206. }
  1207. for (i = 0; i < 6; i++)
  1208. dev->dev_addr[i] = macaddr[i];
  1209. macaddr[5]++;
  1210. if (!is_valid_ether_addr(&dev->dev_addr[0])) {
  1211. if (netif_msg_probe(greth))
  1212. dev_err(greth->dev, "no valid ethernet address, aborting.\n");
  1213. err = -EINVAL;
  1214. goto error5;
  1215. }
  1216. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  1217. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  1218. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  1219. /* Clear all pending interrupts except PHY irq */
  1220. GRETH_REGSAVE(regs->status, 0xFF);
  1221. if (greth->gbit_mac) {
  1222. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
  1223. NETIF_F_RXCSUM;
  1224. dev->features = dev->hw_features | NETIF_F_HIGHDMA;
  1225. greth_netdev_ops.ndo_start_xmit = greth_start_xmit_gbit;
  1226. }
  1227. if (greth->multicast) {
  1228. greth_netdev_ops.ndo_set_rx_mode = greth_set_multicast_list;
  1229. dev->flags |= IFF_MULTICAST;
  1230. } else {
  1231. dev->flags &= ~IFF_MULTICAST;
  1232. }
  1233. dev->netdev_ops = &greth_netdev_ops;
  1234. dev->ethtool_ops = &greth_ethtool_ops;
  1235. err = register_netdev(dev);
  1236. if (err) {
  1237. if (netif_msg_probe(greth))
  1238. dev_err(greth->dev, "netdevice registration failed.\n");
  1239. goto error5;
  1240. }
  1241. /* setup NAPI */
  1242. netif_napi_add(dev, &greth->napi, greth_poll, 64);
  1243. return 0;
  1244. error5:
  1245. dma_free_coherent(greth->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1246. error4:
  1247. dma_free_coherent(greth->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1248. error3:
  1249. mdiobus_unregister(greth->mdio);
  1250. error2:
  1251. of_iounmap(&ofdev->resource[0], greth->regs, resource_size(&ofdev->resource[0]));
  1252. error1:
  1253. free_netdev(dev);
  1254. return err;
  1255. }
  1256. static int __devexit greth_of_remove(struct platform_device *of_dev)
  1257. {
  1258. struct net_device *ndev = dev_get_drvdata(&of_dev->dev);
  1259. struct greth_private *greth = netdev_priv(ndev);
  1260. /* Free descriptor areas */
  1261. dma_free_coherent(&of_dev->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1262. dma_free_coherent(&of_dev->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1263. dev_set_drvdata(&of_dev->dev, NULL);
  1264. if (greth->phy)
  1265. phy_stop(greth->phy);
  1266. mdiobus_unregister(greth->mdio);
  1267. unregister_netdev(ndev);
  1268. free_netdev(ndev);
  1269. of_iounmap(&of_dev->resource[0], greth->regs, resource_size(&of_dev->resource[0]));
  1270. return 0;
  1271. }
  1272. static struct of_device_id greth_of_match[] = {
  1273. {
  1274. .name = "GAISLER_ETHMAC",
  1275. },
  1276. {
  1277. .name = "01_01d",
  1278. },
  1279. {},
  1280. };
  1281. MODULE_DEVICE_TABLE(of, greth_of_match);
  1282. static struct platform_driver greth_of_driver = {
  1283. .driver = {
  1284. .name = "grlib-greth",
  1285. .owner = THIS_MODULE,
  1286. .of_match_table = greth_of_match,
  1287. },
  1288. .probe = greth_of_probe,
  1289. .remove = __devexit_p(greth_of_remove),
  1290. };
  1291. module_platform_driver(greth_of_driver);
  1292. MODULE_AUTHOR("Aeroflex Gaisler AB.");
  1293. MODULE_DESCRIPTION("Aeroflex Gaisler Ethernet MAC driver");
  1294. MODULE_LICENSE("GPL");