w83781d.c 57 KB

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  1. /*
  2. * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring
  4. * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. * Philip Edelbrock <phil@netroedge.com>,
  6. * and Mark Studebaker <mdsxyz123@yahoo.com>
  7. * Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. /*
  24. * Supports following chips:
  25. *
  26. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  27. * as99127f 7 3 0 3 0x31 0x12c3 yes no
  28. * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  29. * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  30. * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  31. * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  32. *
  33. */
  34. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  35. #include <linux/module.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/i2c.h>
  40. #include <linux/hwmon.h>
  41. #include <linux/hwmon-vid.h>
  42. #include <linux/hwmon-sysfs.h>
  43. #include <linux/sysfs.h>
  44. #include <linux/err.h>
  45. #include <linux/mutex.h>
  46. #ifdef CONFIG_ISA
  47. #include <linux/platform_device.h>
  48. #include <linux/ioport.h>
  49. #include <linux/io.h>
  50. #endif
  51. #include "lm75.h"
  52. /* Addresses to scan */
  53. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  54. 0x2e, 0x2f, I2C_CLIENT_END };
  55. enum chips { w83781d, w83782d, w83783s, as99127f };
  56. /* Insmod parameters */
  57. static unsigned short force_subclients[4];
  58. module_param_array(force_subclients, short, NULL, 0);
  59. MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
  60. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  61. static bool reset;
  62. module_param(reset, bool, 0);
  63. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  64. static bool init = 1;
  65. module_param(init, bool, 0);
  66. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  67. /* Constants specified below */
  68. /* Length of ISA address segment */
  69. #define W83781D_EXTENT 8
  70. /* Where are the ISA address/data registers relative to the base address */
  71. #define W83781D_ADDR_REG_OFFSET 5
  72. #define W83781D_DATA_REG_OFFSET 6
  73. /* The device registers */
  74. /* in nr from 0 to 8 */
  75. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  76. (0x554 + (((nr) - 7) * 2)))
  77. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  78. (0x555 + (((nr) - 7) * 2)))
  79. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  80. (0x550 + (nr) - 7))
  81. /* fan nr from 0 to 2 */
  82. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  83. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  84. #define W83781D_REG_BANK 0x4E
  85. #define W83781D_REG_TEMP2_CONFIG 0x152
  86. #define W83781D_REG_TEMP3_CONFIG 0x252
  87. /* temp nr from 1 to 3 */
  88. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  89. ((nr == 2) ? (0x0150) : \
  90. (0x27)))
  91. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  92. ((nr == 2) ? (0x153) : \
  93. (0x3A)))
  94. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  95. ((nr == 2) ? (0x155) : \
  96. (0x39)))
  97. #define W83781D_REG_CONFIG 0x40
  98. /* Interrupt status (W83781D, AS99127F) */
  99. #define W83781D_REG_ALARM1 0x41
  100. #define W83781D_REG_ALARM2 0x42
  101. /* Real-time status (W83782D, W83783S) */
  102. #define W83782D_REG_ALARM1 0x459
  103. #define W83782D_REG_ALARM2 0x45A
  104. #define W83782D_REG_ALARM3 0x45B
  105. #define W83781D_REG_BEEP_CONFIG 0x4D
  106. #define W83781D_REG_BEEP_INTS1 0x56
  107. #define W83781D_REG_BEEP_INTS2 0x57
  108. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  109. #define W83781D_REG_VID_FANDIV 0x47
  110. #define W83781D_REG_CHIPID 0x49
  111. #define W83781D_REG_WCHIPID 0x58
  112. #define W83781D_REG_CHIPMAN 0x4F
  113. #define W83781D_REG_PIN 0x4B
  114. /* 782D/783S only */
  115. #define W83781D_REG_VBAT 0x5D
  116. /* PWM 782D (1-4) and 783S (1-2) only */
  117. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  118. #define W83781D_REG_PWMCLK12 0x5C
  119. #define W83781D_REG_PWMCLK34 0x45C
  120. #define W83781D_REG_I2C_ADDR 0x48
  121. #define W83781D_REG_I2C_SUBADDR 0x4A
  122. /*
  123. * The following are undocumented in the data sheets however we
  124. * received the information in an email from Winbond tech support
  125. */
  126. /* Sensor selection - not on 781d */
  127. #define W83781D_REG_SCFG1 0x5D
  128. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  129. #define W83781D_REG_SCFG2 0x59
  130. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  131. #define W83781D_DEFAULT_BETA 3435
  132. /* Conversions */
  133. #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
  134. #define IN_FROM_REG(val) ((val) * 16)
  135. static inline u8
  136. FAN_TO_REG(long rpm, int div)
  137. {
  138. if (rpm == 0)
  139. return 255;
  140. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  141. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  142. }
  143. static inline long
  144. FAN_FROM_REG(u8 val, int div)
  145. {
  146. if (val == 0)
  147. return -1;
  148. if (val == 255)
  149. return 0;
  150. return 1350000 / (val * div);
  151. }
  152. #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
  153. #define TEMP_FROM_REG(val) ((val) * 1000)
  154. #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
  155. (~(val)) & 0x7fff : (val) & 0xff7fff)
  156. #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
  157. (~(val)) & 0x7fff : (val) & 0xff7fff)
  158. #define DIV_FROM_REG(val) (1 << (val))
  159. static inline u8
  160. DIV_TO_REG(long val, enum chips type)
  161. {
  162. int i;
  163. val = SENSORS_LIMIT(val, 1,
  164. ((type == w83781d
  165. || type == as99127f) ? 8 : 128)) >> 1;
  166. for (i = 0; i < 7; i++) {
  167. if (val == 0)
  168. break;
  169. val >>= 1;
  170. }
  171. return i;
  172. }
  173. struct w83781d_data {
  174. struct i2c_client *client;
  175. struct device *hwmon_dev;
  176. struct mutex lock;
  177. enum chips type;
  178. /* For ISA device only */
  179. const char *name;
  180. int isa_addr;
  181. struct mutex update_lock;
  182. char valid; /* !=0 if following fields are valid */
  183. unsigned long last_updated; /* In jiffies */
  184. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  185. /* array of 2 pointers to subclients */
  186. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  187. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  188. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  189. u8 fan[3]; /* Register value */
  190. u8 fan_min[3]; /* Register value */
  191. s8 temp; /* Register value */
  192. s8 temp_max; /* Register value */
  193. s8 temp_max_hyst; /* Register value */
  194. u16 temp_add[2]; /* Register value */
  195. u16 temp_max_add[2]; /* Register value */
  196. u16 temp_max_hyst_add[2]; /* Register value */
  197. u8 fan_div[3]; /* Register encoding, shifted right */
  198. u8 vid; /* Register encoding, combined */
  199. u32 alarms; /* Register encoding, combined */
  200. u32 beep_mask; /* Register encoding, combined */
  201. u8 pwm[4]; /* Register value */
  202. u8 pwm2_enable; /* Boolean */
  203. u16 sens[3]; /*
  204. * 782D/783S only.
  205. * 1 = pentium diode; 2 = 3904 diode;
  206. * 4 = thermistor
  207. */
  208. u8 vrm;
  209. };
  210. static struct w83781d_data *w83781d_data_if_isa(void);
  211. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  212. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  213. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  214. static struct w83781d_data *w83781d_update_device(struct device *dev);
  215. static void w83781d_init_device(struct device *dev);
  216. /* following are the sysfs callback functions */
  217. #define show_in_reg(reg) \
  218. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  219. char *buf) \
  220. { \
  221. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  222. struct w83781d_data *data = w83781d_update_device(dev); \
  223. return sprintf(buf, "%ld\n", \
  224. (long)IN_FROM_REG(data->reg[attr->index])); \
  225. }
  226. show_in_reg(in);
  227. show_in_reg(in_min);
  228. show_in_reg(in_max);
  229. #define store_in_reg(REG, reg) \
  230. static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
  231. *da, const char *buf, size_t count) \
  232. { \
  233. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  234. struct w83781d_data *data = dev_get_drvdata(dev); \
  235. int nr = attr->index; \
  236. unsigned long val; \
  237. int err = kstrtoul(buf, 10, &val); \
  238. if (err) \
  239. return err; \
  240. mutex_lock(&data->update_lock); \
  241. data->in_##reg[nr] = IN_TO_REG(val); \
  242. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
  243. data->in_##reg[nr]); \
  244. \
  245. mutex_unlock(&data->update_lock); \
  246. return count; \
  247. }
  248. store_in_reg(MIN, min);
  249. store_in_reg(MAX, max);
  250. #define sysfs_in_offsets(offset) \
  251. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  252. show_in, NULL, offset); \
  253. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  254. show_in_min, store_in_min, offset); \
  255. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  256. show_in_max, store_in_max, offset)
  257. sysfs_in_offsets(0);
  258. sysfs_in_offsets(1);
  259. sysfs_in_offsets(2);
  260. sysfs_in_offsets(3);
  261. sysfs_in_offsets(4);
  262. sysfs_in_offsets(5);
  263. sysfs_in_offsets(6);
  264. sysfs_in_offsets(7);
  265. sysfs_in_offsets(8);
  266. #define show_fan_reg(reg) \
  267. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  268. char *buf) \
  269. { \
  270. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  271. struct w83781d_data *data = w83781d_update_device(dev); \
  272. return sprintf(buf, "%ld\n", \
  273. FAN_FROM_REG(data->reg[attr->index], \
  274. DIV_FROM_REG(data->fan_div[attr->index]))); \
  275. }
  276. show_fan_reg(fan);
  277. show_fan_reg(fan_min);
  278. static ssize_t
  279. store_fan_min(struct device *dev, struct device_attribute *da,
  280. const char *buf, size_t count)
  281. {
  282. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  283. struct w83781d_data *data = dev_get_drvdata(dev);
  284. int nr = attr->index;
  285. unsigned long val;
  286. int err;
  287. err = kstrtoul(buf, 10, &val);
  288. if (err)
  289. return err;
  290. mutex_lock(&data->update_lock);
  291. data->fan_min[nr] =
  292. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  293. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  294. data->fan_min[nr]);
  295. mutex_unlock(&data->update_lock);
  296. return count;
  297. }
  298. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  299. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  300. show_fan_min, store_fan_min, 0);
  301. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  302. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  303. show_fan_min, store_fan_min, 1);
  304. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  305. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  306. show_fan_min, store_fan_min, 2);
  307. #define show_temp_reg(reg) \
  308. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  309. char *buf) \
  310. { \
  311. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  312. struct w83781d_data *data = w83781d_update_device(dev); \
  313. int nr = attr->index; \
  314. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  315. return sprintf(buf, "%d\n", \
  316. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  317. } else { /* TEMP1 */ \
  318. return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  319. } \
  320. }
  321. show_temp_reg(temp);
  322. show_temp_reg(temp_max);
  323. show_temp_reg(temp_max_hyst);
  324. #define store_temp_reg(REG, reg) \
  325. static ssize_t store_temp_##reg(struct device *dev, \
  326. struct device_attribute *da, const char *buf, size_t count) \
  327. { \
  328. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  329. struct w83781d_data *data = dev_get_drvdata(dev); \
  330. int nr = attr->index; \
  331. long val; \
  332. int err = kstrtol(buf, 10, &val); \
  333. if (err) \
  334. return err; \
  335. mutex_lock(&data->update_lock); \
  336. \
  337. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  338. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  339. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  340. data->temp_##reg##_add[nr-2]); \
  341. } else { /* TEMP1 */ \
  342. data->temp_##reg = TEMP_TO_REG(val); \
  343. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  344. data->temp_##reg); \
  345. } \
  346. \
  347. mutex_unlock(&data->update_lock); \
  348. return count; \
  349. }
  350. store_temp_reg(OVER, max);
  351. store_temp_reg(HYST, max_hyst);
  352. #define sysfs_temp_offsets(offset) \
  353. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  354. show_temp, NULL, offset); \
  355. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  356. show_temp_max, store_temp_max, offset); \
  357. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  358. show_temp_max_hyst, store_temp_max_hyst, offset);
  359. sysfs_temp_offsets(1);
  360. sysfs_temp_offsets(2);
  361. sysfs_temp_offsets(3);
  362. static ssize_t
  363. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  364. {
  365. struct w83781d_data *data = w83781d_update_device(dev);
  366. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  367. }
  368. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  369. static ssize_t
  370. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  371. {
  372. struct w83781d_data *data = dev_get_drvdata(dev);
  373. return sprintf(buf, "%ld\n", (long) data->vrm);
  374. }
  375. static ssize_t
  376. store_vrm_reg(struct device *dev, struct device_attribute *attr,
  377. const char *buf, size_t count)
  378. {
  379. struct w83781d_data *data = dev_get_drvdata(dev);
  380. unsigned long val;
  381. int err;
  382. err = kstrtoul(buf, 10, &val);
  383. if (err)
  384. return err;
  385. data->vrm = SENSORS_LIMIT(val, 0, 255);
  386. return count;
  387. }
  388. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  389. static ssize_t
  390. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  391. {
  392. struct w83781d_data *data = w83781d_update_device(dev);
  393. return sprintf(buf, "%u\n", data->alarms);
  394. }
  395. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  396. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  397. char *buf)
  398. {
  399. struct w83781d_data *data = w83781d_update_device(dev);
  400. int bitnr = to_sensor_dev_attr(attr)->index;
  401. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  402. }
  403. /* The W83781D has a single alarm bit for temp2 and temp3 */
  404. static ssize_t show_temp3_alarm(struct device *dev,
  405. struct device_attribute *attr, char *buf)
  406. {
  407. struct w83781d_data *data = w83781d_update_device(dev);
  408. int bitnr = (data->type == w83781d) ? 5 : 13;
  409. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  410. }
  411. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  412. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  413. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  414. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  415. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  416. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  417. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  418. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  419. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  420. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  421. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  422. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  423. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  424. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  425. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  426. static ssize_t show_beep_mask(struct device *dev,
  427. struct device_attribute *attr, char *buf)
  428. {
  429. struct w83781d_data *data = w83781d_update_device(dev);
  430. return sprintf(buf, "%ld\n",
  431. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  432. }
  433. static ssize_t
  434. store_beep_mask(struct device *dev, struct device_attribute *attr,
  435. const char *buf, size_t count)
  436. {
  437. struct w83781d_data *data = dev_get_drvdata(dev);
  438. unsigned long val;
  439. int err;
  440. err = kstrtoul(buf, 10, &val);
  441. if (err)
  442. return err;
  443. mutex_lock(&data->update_lock);
  444. data->beep_mask &= 0x8000; /* preserve beep enable */
  445. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  446. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  447. data->beep_mask & 0xff);
  448. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  449. (data->beep_mask >> 8) & 0xff);
  450. if (data->type != w83781d && data->type != as99127f) {
  451. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  452. ((data->beep_mask) >> 16) & 0xff);
  453. }
  454. mutex_unlock(&data->update_lock);
  455. return count;
  456. }
  457. static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
  458. show_beep_mask, store_beep_mask);
  459. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  460. char *buf)
  461. {
  462. struct w83781d_data *data = w83781d_update_device(dev);
  463. int bitnr = to_sensor_dev_attr(attr)->index;
  464. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  465. }
  466. static ssize_t
  467. store_beep(struct device *dev, struct device_attribute *attr,
  468. const char *buf, size_t count)
  469. {
  470. struct w83781d_data *data = dev_get_drvdata(dev);
  471. int bitnr = to_sensor_dev_attr(attr)->index;
  472. u8 reg;
  473. unsigned long bit;
  474. int err;
  475. err = kstrtoul(buf, 10, &bit);
  476. if (err)
  477. return err;
  478. if (bit & ~1)
  479. return -EINVAL;
  480. mutex_lock(&data->update_lock);
  481. if (bit)
  482. data->beep_mask |= (1 << bitnr);
  483. else
  484. data->beep_mask &= ~(1 << bitnr);
  485. if (bitnr < 8) {
  486. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  487. if (bit)
  488. reg |= (1 << bitnr);
  489. else
  490. reg &= ~(1 << bitnr);
  491. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  492. } else if (bitnr < 16) {
  493. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  494. if (bit)
  495. reg |= (1 << (bitnr - 8));
  496. else
  497. reg &= ~(1 << (bitnr - 8));
  498. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  499. } else {
  500. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  501. if (bit)
  502. reg |= (1 << (bitnr - 16));
  503. else
  504. reg &= ~(1 << (bitnr - 16));
  505. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  506. }
  507. mutex_unlock(&data->update_lock);
  508. return count;
  509. }
  510. /* The W83781D has a single beep bit for temp2 and temp3 */
  511. static ssize_t show_temp3_beep(struct device *dev,
  512. struct device_attribute *attr, char *buf)
  513. {
  514. struct w83781d_data *data = w83781d_update_device(dev);
  515. int bitnr = (data->type == w83781d) ? 5 : 13;
  516. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  517. }
  518. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  519. show_beep, store_beep, 0);
  520. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  521. show_beep, store_beep, 1);
  522. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  523. show_beep, store_beep, 2);
  524. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  525. show_beep, store_beep, 3);
  526. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  527. show_beep, store_beep, 8);
  528. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  529. show_beep, store_beep, 9);
  530. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  531. show_beep, store_beep, 10);
  532. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  533. show_beep, store_beep, 16);
  534. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  535. show_beep, store_beep, 17);
  536. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  537. show_beep, store_beep, 6);
  538. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  539. show_beep, store_beep, 7);
  540. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  541. show_beep, store_beep, 11);
  542. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  543. show_beep, store_beep, 4);
  544. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  545. show_beep, store_beep, 5);
  546. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  547. show_temp3_beep, store_beep, 13);
  548. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  549. show_beep, store_beep, 15);
  550. static ssize_t
  551. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  552. {
  553. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  554. struct w83781d_data *data = w83781d_update_device(dev);
  555. return sprintf(buf, "%ld\n",
  556. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  557. }
  558. /*
  559. * Note: we save and restore the fan minimum here, because its value is
  560. * determined in part by the fan divisor. This follows the principle of
  561. * least surprise; the user doesn't expect the fan minimum to change just
  562. * because the divisor changed.
  563. */
  564. static ssize_t
  565. store_fan_div(struct device *dev, struct device_attribute *da,
  566. const char *buf, size_t count)
  567. {
  568. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  569. struct w83781d_data *data = dev_get_drvdata(dev);
  570. unsigned long min;
  571. int nr = attr->index;
  572. u8 reg;
  573. unsigned long val;
  574. int err;
  575. err = kstrtoul(buf, 10, &val);
  576. if (err)
  577. return err;
  578. mutex_lock(&data->update_lock);
  579. /* Save fan_min */
  580. min = FAN_FROM_REG(data->fan_min[nr],
  581. DIV_FROM_REG(data->fan_div[nr]));
  582. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  583. reg = (w83781d_read_value(data, nr == 2 ?
  584. W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  585. & (nr == 0 ? 0xcf : 0x3f))
  586. | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
  587. w83781d_write_value(data, nr == 2 ?
  588. W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  589. /* w83781d and as99127f don't have extended divisor bits */
  590. if (data->type != w83781d && data->type != as99127f) {
  591. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  592. & ~(1 << (5 + nr)))
  593. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  594. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  595. }
  596. /* Restore fan_min */
  597. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  598. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  599. mutex_unlock(&data->update_lock);
  600. return count;
  601. }
  602. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  603. show_fan_div, store_fan_div, 0);
  604. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  605. show_fan_div, store_fan_div, 1);
  606. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  607. show_fan_div, store_fan_div, 2);
  608. static ssize_t
  609. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  610. {
  611. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  612. struct w83781d_data *data = w83781d_update_device(dev);
  613. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  614. }
  615. static ssize_t
  616. show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
  617. {
  618. struct w83781d_data *data = w83781d_update_device(dev);
  619. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  620. }
  621. static ssize_t
  622. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  623. size_t count)
  624. {
  625. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  626. struct w83781d_data *data = dev_get_drvdata(dev);
  627. int nr = attr->index;
  628. unsigned long val;
  629. int err;
  630. err = kstrtoul(buf, 10, &val);
  631. if (err)
  632. return err;
  633. mutex_lock(&data->update_lock);
  634. data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
  635. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  636. mutex_unlock(&data->update_lock);
  637. return count;
  638. }
  639. static ssize_t
  640. store_pwm2_enable(struct device *dev, struct device_attribute *da,
  641. const char *buf, size_t count)
  642. {
  643. struct w83781d_data *data = dev_get_drvdata(dev);
  644. unsigned long val;
  645. u32 reg;
  646. int err;
  647. err = kstrtoul(buf, 10, &val);
  648. if (err)
  649. return err;
  650. mutex_lock(&data->update_lock);
  651. switch (val) {
  652. case 0:
  653. case 1:
  654. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  655. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  656. (reg & 0xf7) | (val << 3));
  657. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  658. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  659. (reg & 0xef) | (!val << 4));
  660. data->pwm2_enable = val;
  661. break;
  662. default:
  663. mutex_unlock(&data->update_lock);
  664. return -EINVAL;
  665. }
  666. mutex_unlock(&data->update_lock);
  667. return count;
  668. }
  669. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  670. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  671. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  672. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  673. /* only PWM2 can be enabled/disabled */
  674. static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  675. show_pwm2_enable, store_pwm2_enable);
  676. static ssize_t
  677. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  678. {
  679. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  680. struct w83781d_data *data = w83781d_update_device(dev);
  681. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  682. }
  683. static ssize_t
  684. store_sensor(struct device *dev, struct device_attribute *da,
  685. const char *buf, size_t count)
  686. {
  687. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  688. struct w83781d_data *data = dev_get_drvdata(dev);
  689. int nr = attr->index;
  690. unsigned long val;
  691. u32 tmp;
  692. int err;
  693. err = kstrtoul(buf, 10, &val);
  694. if (err)
  695. return err;
  696. mutex_lock(&data->update_lock);
  697. switch (val) {
  698. case 1: /* PII/Celeron diode */
  699. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  700. w83781d_write_value(data, W83781D_REG_SCFG1,
  701. tmp | BIT_SCFG1[nr]);
  702. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  703. w83781d_write_value(data, W83781D_REG_SCFG2,
  704. tmp | BIT_SCFG2[nr]);
  705. data->sens[nr] = val;
  706. break;
  707. case 2: /* 3904 */
  708. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  709. w83781d_write_value(data, W83781D_REG_SCFG1,
  710. tmp | BIT_SCFG1[nr]);
  711. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  712. w83781d_write_value(data, W83781D_REG_SCFG2,
  713. tmp & ~BIT_SCFG2[nr]);
  714. data->sens[nr] = val;
  715. break;
  716. case W83781D_DEFAULT_BETA:
  717. dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
  718. "instead\n", W83781D_DEFAULT_BETA);
  719. /* fall through */
  720. case 4: /* thermistor */
  721. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  722. w83781d_write_value(data, W83781D_REG_SCFG1,
  723. tmp & ~BIT_SCFG1[nr]);
  724. data->sens[nr] = val;
  725. break;
  726. default:
  727. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  728. (long) val);
  729. break;
  730. }
  731. mutex_unlock(&data->update_lock);
  732. return count;
  733. }
  734. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  735. show_sensor, store_sensor, 0);
  736. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  737. show_sensor, store_sensor, 1);
  738. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  739. show_sensor, store_sensor, 2);
  740. /*
  741. * Assumes that adapter is of I2C, not ISA variety.
  742. * OTHERWISE DON'T CALL THIS
  743. */
  744. static int
  745. w83781d_detect_subclients(struct i2c_client *new_client)
  746. {
  747. int i, val1 = 0, id;
  748. int err;
  749. int address = new_client->addr;
  750. unsigned short sc_addr[2];
  751. struct i2c_adapter *adapter = new_client->adapter;
  752. struct w83781d_data *data = i2c_get_clientdata(new_client);
  753. enum chips kind = data->type;
  754. id = i2c_adapter_id(adapter);
  755. if (force_subclients[0] == id && force_subclients[1] == address) {
  756. for (i = 2; i <= 3; i++) {
  757. if (force_subclients[i] < 0x48 ||
  758. force_subclients[i] > 0x4f) {
  759. dev_err(&new_client->dev, "Invalid subclient "
  760. "address %d; must be 0x48-0x4f\n",
  761. force_subclients[i]);
  762. err = -EINVAL;
  763. goto ERROR_SC_1;
  764. }
  765. }
  766. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  767. (force_subclients[2] & 0x07) |
  768. ((force_subclients[3] & 0x07) << 4));
  769. sc_addr[0] = force_subclients[2];
  770. } else {
  771. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  772. sc_addr[0] = 0x48 + (val1 & 0x07);
  773. }
  774. if (kind != w83783s) {
  775. if (force_subclients[0] == id &&
  776. force_subclients[1] == address) {
  777. sc_addr[1] = force_subclients[3];
  778. } else {
  779. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  780. }
  781. if (sc_addr[0] == sc_addr[1]) {
  782. dev_err(&new_client->dev,
  783. "Duplicate addresses 0x%x for subclients.\n",
  784. sc_addr[0]);
  785. err = -EBUSY;
  786. goto ERROR_SC_2;
  787. }
  788. }
  789. for (i = 0; i <= 1; i++) {
  790. data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
  791. if (!data->lm75[i]) {
  792. dev_err(&new_client->dev, "Subclient %d "
  793. "registration at address 0x%x "
  794. "failed.\n", i, sc_addr[i]);
  795. err = -ENOMEM;
  796. if (i == 1)
  797. goto ERROR_SC_3;
  798. goto ERROR_SC_2;
  799. }
  800. if (kind == w83783s)
  801. break;
  802. }
  803. return 0;
  804. /* Undo inits in case of errors */
  805. ERROR_SC_3:
  806. i2c_unregister_device(data->lm75[0]);
  807. ERROR_SC_2:
  808. ERROR_SC_1:
  809. return err;
  810. }
  811. #define IN_UNIT_ATTRS(X) \
  812. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  813. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  814. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  815. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  816. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  817. #define FAN_UNIT_ATTRS(X) \
  818. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  819. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  820. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  821. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  822. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  823. #define TEMP_UNIT_ATTRS(X) \
  824. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  825. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  826. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  827. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  828. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  829. static struct attribute *w83781d_attributes[] = {
  830. IN_UNIT_ATTRS(0),
  831. IN_UNIT_ATTRS(2),
  832. IN_UNIT_ATTRS(3),
  833. IN_UNIT_ATTRS(4),
  834. IN_UNIT_ATTRS(5),
  835. IN_UNIT_ATTRS(6),
  836. FAN_UNIT_ATTRS(1),
  837. FAN_UNIT_ATTRS(2),
  838. FAN_UNIT_ATTRS(3),
  839. TEMP_UNIT_ATTRS(1),
  840. TEMP_UNIT_ATTRS(2),
  841. &dev_attr_cpu0_vid.attr,
  842. &dev_attr_vrm.attr,
  843. &dev_attr_alarms.attr,
  844. &dev_attr_beep_mask.attr,
  845. &sensor_dev_attr_beep_enable.dev_attr.attr,
  846. NULL
  847. };
  848. static const struct attribute_group w83781d_group = {
  849. .attrs = w83781d_attributes,
  850. };
  851. static struct attribute *w83781d_attributes_in1[] = {
  852. IN_UNIT_ATTRS(1),
  853. NULL
  854. };
  855. static const struct attribute_group w83781d_group_in1 = {
  856. .attrs = w83781d_attributes_in1,
  857. };
  858. static struct attribute *w83781d_attributes_in78[] = {
  859. IN_UNIT_ATTRS(7),
  860. IN_UNIT_ATTRS(8),
  861. NULL
  862. };
  863. static const struct attribute_group w83781d_group_in78 = {
  864. .attrs = w83781d_attributes_in78,
  865. };
  866. static struct attribute *w83781d_attributes_temp3[] = {
  867. TEMP_UNIT_ATTRS(3),
  868. NULL
  869. };
  870. static const struct attribute_group w83781d_group_temp3 = {
  871. .attrs = w83781d_attributes_temp3,
  872. };
  873. static struct attribute *w83781d_attributes_pwm12[] = {
  874. &sensor_dev_attr_pwm1.dev_attr.attr,
  875. &sensor_dev_attr_pwm2.dev_attr.attr,
  876. &dev_attr_pwm2_enable.attr,
  877. NULL
  878. };
  879. static const struct attribute_group w83781d_group_pwm12 = {
  880. .attrs = w83781d_attributes_pwm12,
  881. };
  882. static struct attribute *w83781d_attributes_pwm34[] = {
  883. &sensor_dev_attr_pwm3.dev_attr.attr,
  884. &sensor_dev_attr_pwm4.dev_attr.attr,
  885. NULL
  886. };
  887. static const struct attribute_group w83781d_group_pwm34 = {
  888. .attrs = w83781d_attributes_pwm34,
  889. };
  890. static struct attribute *w83781d_attributes_other[] = {
  891. &sensor_dev_attr_temp1_type.dev_attr.attr,
  892. &sensor_dev_attr_temp2_type.dev_attr.attr,
  893. &sensor_dev_attr_temp3_type.dev_attr.attr,
  894. NULL
  895. };
  896. static const struct attribute_group w83781d_group_other = {
  897. .attrs = w83781d_attributes_other,
  898. };
  899. /* No clean up is done on error, it's up to the caller */
  900. static int
  901. w83781d_create_files(struct device *dev, int kind, int is_isa)
  902. {
  903. int err;
  904. err = sysfs_create_group(&dev->kobj, &w83781d_group);
  905. if (err)
  906. return err;
  907. if (kind != w83783s) {
  908. err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
  909. if (err)
  910. return err;
  911. }
  912. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  913. err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
  914. if (err)
  915. return err;
  916. }
  917. if (kind != w83783s) {
  918. err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
  919. if (err)
  920. return err;
  921. if (kind != w83781d) {
  922. err = sysfs_chmod_file(&dev->kobj,
  923. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  924. S_IRUGO | S_IWUSR);
  925. if (err)
  926. return err;
  927. }
  928. }
  929. if (kind != w83781d && kind != as99127f) {
  930. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
  931. if (err)
  932. return err;
  933. }
  934. if (kind == w83782d && !is_isa) {
  935. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
  936. if (err)
  937. return err;
  938. }
  939. if (kind != as99127f && kind != w83781d) {
  940. err = device_create_file(dev,
  941. &sensor_dev_attr_temp1_type.dev_attr);
  942. if (err)
  943. return err;
  944. err = device_create_file(dev,
  945. &sensor_dev_attr_temp2_type.dev_attr);
  946. if (err)
  947. return err;
  948. if (kind != w83783s) {
  949. err = device_create_file(dev,
  950. &sensor_dev_attr_temp3_type.dev_attr);
  951. if (err)
  952. return err;
  953. }
  954. }
  955. return 0;
  956. }
  957. /* Return 0 if detection is successful, -ENODEV otherwise */
  958. static int
  959. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  960. {
  961. int val1, val2;
  962. struct w83781d_data *isa = w83781d_data_if_isa();
  963. struct i2c_adapter *adapter = client->adapter;
  964. int address = client->addr;
  965. const char *client_name;
  966. enum vendor { winbond, asus } vendid;
  967. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  968. return -ENODEV;
  969. /*
  970. * We block updates of the ISA device to minimize the risk of
  971. * concurrent access to the same W83781D chip through different
  972. * interfaces.
  973. */
  974. if (isa)
  975. mutex_lock(&isa->update_lock);
  976. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  977. dev_dbg(&adapter->dev,
  978. "Detection of w83781d chip failed at step 3\n");
  979. goto err_nodev;
  980. }
  981. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  982. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  983. /* Check for Winbond or Asus ID if in bank 0 */
  984. if (!(val1 & 0x07) &&
  985. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  986. ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  987. dev_dbg(&adapter->dev,
  988. "Detection of w83781d chip failed at step 4\n");
  989. goto err_nodev;
  990. }
  991. /*
  992. * If Winbond SMBus, check address at 0x48.
  993. * Asus doesn't support, except for as99127f rev.2
  994. */
  995. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  996. ((val1 & 0x80) && val2 == 0x5c)) {
  997. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  998. != address) {
  999. dev_dbg(&adapter->dev,
  1000. "Detection of w83781d chip failed at step 5\n");
  1001. goto err_nodev;
  1002. }
  1003. }
  1004. /* Put it now into bank 0 and Vendor ID High Byte */
  1005. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1006. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  1007. & 0x78) | 0x80);
  1008. /* Get the vendor ID */
  1009. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  1010. if (val2 == 0x5c)
  1011. vendid = winbond;
  1012. else if (val2 == 0x12)
  1013. vendid = asus;
  1014. else {
  1015. dev_dbg(&adapter->dev,
  1016. "w83781d chip vendor is neither Winbond nor Asus\n");
  1017. goto err_nodev;
  1018. }
  1019. /* Determine the chip type. */
  1020. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  1021. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  1022. client_name = "w83781d";
  1023. else if (val1 == 0x30 && vendid == winbond)
  1024. client_name = "w83782d";
  1025. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  1026. client_name = "w83783s";
  1027. else if (val1 == 0x31)
  1028. client_name = "as99127f";
  1029. else
  1030. goto err_nodev;
  1031. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  1032. dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
  1033. "be the same as ISA device\n", address);
  1034. goto err_nodev;
  1035. }
  1036. if (isa)
  1037. mutex_unlock(&isa->update_lock);
  1038. strlcpy(info->type, client_name, I2C_NAME_SIZE);
  1039. return 0;
  1040. err_nodev:
  1041. if (isa)
  1042. mutex_unlock(&isa->update_lock);
  1043. return -ENODEV;
  1044. }
  1045. static void w83781d_remove_files(struct device *dev)
  1046. {
  1047. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1048. sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
  1049. sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
  1050. sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
  1051. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
  1052. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
  1053. sysfs_remove_group(&dev->kobj, &w83781d_group_other);
  1054. }
  1055. static int
  1056. w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
  1057. {
  1058. struct device *dev = &client->dev;
  1059. struct w83781d_data *data;
  1060. int err;
  1061. data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
  1062. if (!data) {
  1063. err = -ENOMEM;
  1064. goto ERROR1;
  1065. }
  1066. i2c_set_clientdata(client, data);
  1067. mutex_init(&data->lock);
  1068. mutex_init(&data->update_lock);
  1069. data->type = id->driver_data;
  1070. data->client = client;
  1071. /* attach secondary i2c lm75-like clients */
  1072. err = w83781d_detect_subclients(client);
  1073. if (err)
  1074. goto ERROR3;
  1075. /* Initialize the chip */
  1076. w83781d_init_device(dev);
  1077. /* Register sysfs hooks */
  1078. err = w83781d_create_files(dev, data->type, 0);
  1079. if (err)
  1080. goto ERROR4;
  1081. data->hwmon_dev = hwmon_device_register(dev);
  1082. if (IS_ERR(data->hwmon_dev)) {
  1083. err = PTR_ERR(data->hwmon_dev);
  1084. goto ERROR4;
  1085. }
  1086. return 0;
  1087. ERROR4:
  1088. w83781d_remove_files(dev);
  1089. if (data->lm75[0])
  1090. i2c_unregister_device(data->lm75[0]);
  1091. if (data->lm75[1])
  1092. i2c_unregister_device(data->lm75[1]);
  1093. ERROR3:
  1094. kfree(data);
  1095. ERROR1:
  1096. return err;
  1097. }
  1098. static int
  1099. w83781d_remove(struct i2c_client *client)
  1100. {
  1101. struct w83781d_data *data = i2c_get_clientdata(client);
  1102. struct device *dev = &client->dev;
  1103. hwmon_device_unregister(data->hwmon_dev);
  1104. w83781d_remove_files(dev);
  1105. if (data->lm75[0])
  1106. i2c_unregister_device(data->lm75[0]);
  1107. if (data->lm75[1])
  1108. i2c_unregister_device(data->lm75[1]);
  1109. kfree(data);
  1110. return 0;
  1111. }
  1112. static int
  1113. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1114. {
  1115. struct i2c_client *client = data->client;
  1116. int res, bank;
  1117. struct i2c_client *cl;
  1118. bank = (reg >> 8) & 0x0f;
  1119. if (bank > 2)
  1120. /* switch banks */
  1121. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1122. bank);
  1123. if (bank == 0 || bank > 2) {
  1124. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1125. } else {
  1126. /* switch to subclient */
  1127. cl = data->lm75[bank - 1];
  1128. /* convert from ISA to LM75 I2C addresses */
  1129. switch (reg & 0xff) {
  1130. case 0x50: /* TEMP */
  1131. res = i2c_smbus_read_word_swapped(cl, 0);
  1132. break;
  1133. case 0x52: /* CONFIG */
  1134. res = i2c_smbus_read_byte_data(cl, 1);
  1135. break;
  1136. case 0x53: /* HYST */
  1137. res = i2c_smbus_read_word_swapped(cl, 2);
  1138. break;
  1139. case 0x55: /* OVER */
  1140. default:
  1141. res = i2c_smbus_read_word_swapped(cl, 3);
  1142. break;
  1143. }
  1144. }
  1145. if (bank > 2)
  1146. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1147. return res;
  1148. }
  1149. static int
  1150. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1151. {
  1152. struct i2c_client *client = data->client;
  1153. int bank;
  1154. struct i2c_client *cl;
  1155. bank = (reg >> 8) & 0x0f;
  1156. if (bank > 2)
  1157. /* switch banks */
  1158. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1159. bank);
  1160. if (bank == 0 || bank > 2) {
  1161. i2c_smbus_write_byte_data(client, reg & 0xff,
  1162. value & 0xff);
  1163. } else {
  1164. /* switch to subclient */
  1165. cl = data->lm75[bank - 1];
  1166. /* convert from ISA to LM75 I2C addresses */
  1167. switch (reg & 0xff) {
  1168. case 0x52: /* CONFIG */
  1169. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1170. break;
  1171. case 0x53: /* HYST */
  1172. i2c_smbus_write_word_swapped(cl, 2, value);
  1173. break;
  1174. case 0x55: /* OVER */
  1175. i2c_smbus_write_word_swapped(cl, 3, value);
  1176. break;
  1177. }
  1178. }
  1179. if (bank > 2)
  1180. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1181. return 0;
  1182. }
  1183. static void
  1184. w83781d_init_device(struct device *dev)
  1185. {
  1186. struct w83781d_data *data = dev_get_drvdata(dev);
  1187. int i, p;
  1188. int type = data->type;
  1189. u8 tmp;
  1190. if (reset && type != as99127f) { /*
  1191. * this resets registers we don't have
  1192. * documentation for on the as99127f
  1193. */
  1194. /*
  1195. * Resetting the chip has been the default for a long time,
  1196. * but it causes the BIOS initializations (fan clock dividers,
  1197. * thermal sensor types...) to be lost, so it is now optional.
  1198. * It might even go away if nobody reports it as being useful,
  1199. * as I see very little reason why this would be needed at
  1200. * all.
  1201. */
  1202. dev_info(dev, "If reset=1 solved a problem you were "
  1203. "having, please report!\n");
  1204. /* save these registers */
  1205. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1206. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1207. /*
  1208. * Reset all except Watchdog values and last conversion values
  1209. * This sets fan-divs to 2, among others
  1210. */
  1211. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1212. /*
  1213. * Restore the registers and disable power-on abnormal beep.
  1214. * This saves FAN 1/2/3 input/output values set by BIOS.
  1215. */
  1216. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1217. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1218. /*
  1219. * Disable master beep-enable (reset turns it on).
  1220. * Individual beep_mask should be reset to off but for some
  1221. * reason disabling this bit helps some people not get beeped
  1222. */
  1223. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1224. }
  1225. /*
  1226. * Disable power-on abnormal beep, as advised by the datasheet.
  1227. * Already done if reset=1.
  1228. */
  1229. if (init && !reset && type != as99127f) {
  1230. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1231. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1232. }
  1233. data->vrm = vid_which_vrm();
  1234. if ((type != w83781d) && (type != as99127f)) {
  1235. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1236. for (i = 1; i <= 3; i++) {
  1237. if (!(tmp & BIT_SCFG1[i - 1])) {
  1238. data->sens[i - 1] = 4;
  1239. } else {
  1240. if (w83781d_read_value
  1241. (data,
  1242. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1243. data->sens[i - 1] = 1;
  1244. else
  1245. data->sens[i - 1] = 2;
  1246. }
  1247. if (type == w83783s && i == 2)
  1248. break;
  1249. }
  1250. }
  1251. if (init && type != as99127f) {
  1252. /* Enable temp2 */
  1253. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1254. if (tmp & 0x01) {
  1255. dev_warn(dev, "Enabling temp2, readings "
  1256. "might not make sense\n");
  1257. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1258. tmp & 0xfe);
  1259. }
  1260. /* Enable temp3 */
  1261. if (type != w83783s) {
  1262. tmp = w83781d_read_value(data,
  1263. W83781D_REG_TEMP3_CONFIG);
  1264. if (tmp & 0x01) {
  1265. dev_warn(dev, "Enabling temp3, "
  1266. "readings might not make sense\n");
  1267. w83781d_write_value(data,
  1268. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1269. }
  1270. }
  1271. }
  1272. /* Start monitoring */
  1273. w83781d_write_value(data, W83781D_REG_CONFIG,
  1274. (w83781d_read_value(data,
  1275. W83781D_REG_CONFIG) & 0xf7)
  1276. | 0x01);
  1277. /* A few vars need to be filled upon startup */
  1278. for (i = 0; i < 3; i++) {
  1279. data->fan_min[i] = w83781d_read_value(data,
  1280. W83781D_REG_FAN_MIN(i));
  1281. }
  1282. mutex_init(&data->update_lock);
  1283. }
  1284. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1285. {
  1286. struct w83781d_data *data = dev_get_drvdata(dev);
  1287. struct i2c_client *client = data->client;
  1288. int i;
  1289. mutex_lock(&data->update_lock);
  1290. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1291. || !data->valid) {
  1292. dev_dbg(dev, "Starting device update\n");
  1293. for (i = 0; i <= 8; i++) {
  1294. if (data->type == w83783s && i == 1)
  1295. continue; /* 783S has no in1 */
  1296. data->in[i] =
  1297. w83781d_read_value(data, W83781D_REG_IN(i));
  1298. data->in_min[i] =
  1299. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1300. data->in_max[i] =
  1301. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1302. if ((data->type != w83782d) && (i == 6))
  1303. break;
  1304. }
  1305. for (i = 0; i < 3; i++) {
  1306. data->fan[i] =
  1307. w83781d_read_value(data, W83781D_REG_FAN(i));
  1308. data->fan_min[i] =
  1309. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1310. }
  1311. if (data->type != w83781d && data->type != as99127f) {
  1312. for (i = 0; i < 4; i++) {
  1313. data->pwm[i] =
  1314. w83781d_read_value(data,
  1315. W83781D_REG_PWM[i]);
  1316. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1317. if ((data->type != w83782d || !client)
  1318. && i == 1)
  1319. break;
  1320. }
  1321. /* Only PWM2 can be disabled */
  1322. data->pwm2_enable = (w83781d_read_value(data,
  1323. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1324. }
  1325. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1326. data->temp_max =
  1327. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1328. data->temp_max_hyst =
  1329. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1330. data->temp_add[0] =
  1331. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1332. data->temp_max_add[0] =
  1333. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1334. data->temp_max_hyst_add[0] =
  1335. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1336. if (data->type != w83783s) {
  1337. data->temp_add[1] =
  1338. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1339. data->temp_max_add[1] =
  1340. w83781d_read_value(data,
  1341. W83781D_REG_TEMP_OVER(3));
  1342. data->temp_max_hyst_add[1] =
  1343. w83781d_read_value(data,
  1344. W83781D_REG_TEMP_HYST(3));
  1345. }
  1346. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1347. data->vid = i & 0x0f;
  1348. data->vid |= (w83781d_read_value(data,
  1349. W83781D_REG_CHIPID) & 0x01) << 4;
  1350. data->fan_div[0] = (i >> 4) & 0x03;
  1351. data->fan_div[1] = (i >> 6) & 0x03;
  1352. data->fan_div[2] = (w83781d_read_value(data,
  1353. W83781D_REG_PIN) >> 6) & 0x03;
  1354. if ((data->type != w83781d) && (data->type != as99127f)) {
  1355. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1356. data->fan_div[0] |= (i >> 3) & 0x04;
  1357. data->fan_div[1] |= (i >> 4) & 0x04;
  1358. data->fan_div[2] |= (i >> 5) & 0x04;
  1359. }
  1360. if (data->type == w83782d) {
  1361. data->alarms = w83781d_read_value(data,
  1362. W83782D_REG_ALARM1)
  1363. | (w83781d_read_value(data,
  1364. W83782D_REG_ALARM2) << 8)
  1365. | (w83781d_read_value(data,
  1366. W83782D_REG_ALARM3) << 16);
  1367. } else if (data->type == w83783s) {
  1368. data->alarms = w83781d_read_value(data,
  1369. W83782D_REG_ALARM1)
  1370. | (w83781d_read_value(data,
  1371. W83782D_REG_ALARM2) << 8);
  1372. } else {
  1373. /*
  1374. * No real-time status registers, fall back to
  1375. * interrupt status registers
  1376. */
  1377. data->alarms = w83781d_read_value(data,
  1378. W83781D_REG_ALARM1)
  1379. | (w83781d_read_value(data,
  1380. W83781D_REG_ALARM2) << 8);
  1381. }
  1382. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1383. data->beep_mask = (i << 8) +
  1384. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1385. if ((data->type != w83781d) && (data->type != as99127f)) {
  1386. data->beep_mask |=
  1387. w83781d_read_value(data,
  1388. W83781D_REG_BEEP_INTS3) << 16;
  1389. }
  1390. data->last_updated = jiffies;
  1391. data->valid = 1;
  1392. }
  1393. mutex_unlock(&data->update_lock);
  1394. return data;
  1395. }
  1396. static const struct i2c_device_id w83781d_ids[] = {
  1397. { "w83781d", w83781d, },
  1398. { "w83782d", w83782d, },
  1399. { "w83783s", w83783s, },
  1400. { "as99127f", as99127f },
  1401. { /* LIST END */ }
  1402. };
  1403. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1404. static struct i2c_driver w83781d_driver = {
  1405. .class = I2C_CLASS_HWMON,
  1406. .driver = {
  1407. .name = "w83781d",
  1408. },
  1409. .probe = w83781d_probe,
  1410. .remove = w83781d_remove,
  1411. .id_table = w83781d_ids,
  1412. .detect = w83781d_detect,
  1413. .address_list = normal_i2c,
  1414. };
  1415. /*
  1416. * ISA related code
  1417. */
  1418. #ifdef CONFIG_ISA
  1419. /* ISA device, if found */
  1420. static struct platform_device *pdev;
  1421. static unsigned short isa_address = 0x290;
  1422. /*
  1423. * I2C devices get this name attribute automatically, but for ISA devices
  1424. * we must create it by ourselves.
  1425. */
  1426. static ssize_t
  1427. show_name(struct device *dev, struct device_attribute *devattr, char *buf)
  1428. {
  1429. struct w83781d_data *data = dev_get_drvdata(dev);
  1430. return sprintf(buf, "%s\n", data->name);
  1431. }
  1432. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1433. static struct w83781d_data *w83781d_data_if_isa(void)
  1434. {
  1435. return pdev ? platform_get_drvdata(pdev) : NULL;
  1436. }
  1437. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1438. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1439. {
  1440. struct w83781d_data *isa;
  1441. int i;
  1442. if (!pdev) /* No ISA chip */
  1443. return 0;
  1444. isa = platform_get_drvdata(pdev);
  1445. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1446. return 0; /* Address doesn't match */
  1447. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1448. return 0; /* Chip type doesn't match */
  1449. /*
  1450. * We compare all the limit registers, the config register and the
  1451. * interrupt mask registers
  1452. */
  1453. for (i = 0x2b; i <= 0x3d; i++) {
  1454. if (w83781d_read_value(isa, i) !=
  1455. i2c_smbus_read_byte_data(client, i))
  1456. return 0;
  1457. }
  1458. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1459. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1460. return 0;
  1461. for (i = 0x43; i <= 0x46; i++) {
  1462. if (w83781d_read_value(isa, i) !=
  1463. i2c_smbus_read_byte_data(client, i))
  1464. return 0;
  1465. }
  1466. return 1;
  1467. }
  1468. static int
  1469. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1470. {
  1471. int word_sized, res;
  1472. word_sized = (((reg & 0xff00) == 0x100)
  1473. || ((reg & 0xff00) == 0x200))
  1474. && (((reg & 0x00ff) == 0x50)
  1475. || ((reg & 0x00ff) == 0x53)
  1476. || ((reg & 0x00ff) == 0x55));
  1477. if (reg & 0xff00) {
  1478. outb_p(W83781D_REG_BANK,
  1479. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1480. outb_p(reg >> 8,
  1481. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1482. }
  1483. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1484. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1485. if (word_sized) {
  1486. outb_p((reg & 0xff) + 1,
  1487. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1488. res =
  1489. (res << 8) + inb_p(data->isa_addr +
  1490. W83781D_DATA_REG_OFFSET);
  1491. }
  1492. if (reg & 0xff00) {
  1493. outb_p(W83781D_REG_BANK,
  1494. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1495. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1496. }
  1497. return res;
  1498. }
  1499. static void
  1500. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1501. {
  1502. int word_sized;
  1503. word_sized = (((reg & 0xff00) == 0x100)
  1504. || ((reg & 0xff00) == 0x200))
  1505. && (((reg & 0x00ff) == 0x53)
  1506. || ((reg & 0x00ff) == 0x55));
  1507. if (reg & 0xff00) {
  1508. outb_p(W83781D_REG_BANK,
  1509. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1510. outb_p(reg >> 8,
  1511. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1512. }
  1513. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1514. if (word_sized) {
  1515. outb_p(value >> 8,
  1516. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1517. outb_p((reg & 0xff) + 1,
  1518. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1519. }
  1520. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1521. if (reg & 0xff00) {
  1522. outb_p(W83781D_REG_BANK,
  1523. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1524. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1525. }
  1526. }
  1527. /*
  1528. * The SMBus locks itself, usually, but nothing may access the Winbond between
  1529. * bank switches. ISA access must always be locked explicitly!
  1530. * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1531. * would slow down the W83781D access and should not be necessary.
  1532. * There are some ugly typecasts here, but the good news is - they should
  1533. * nowhere else be necessary!
  1534. */
  1535. static int
  1536. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1537. {
  1538. struct i2c_client *client = data->client;
  1539. int res;
  1540. mutex_lock(&data->lock);
  1541. if (client)
  1542. res = w83781d_read_value_i2c(data, reg);
  1543. else
  1544. res = w83781d_read_value_isa(data, reg);
  1545. mutex_unlock(&data->lock);
  1546. return res;
  1547. }
  1548. static int
  1549. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1550. {
  1551. struct i2c_client *client = data->client;
  1552. mutex_lock(&data->lock);
  1553. if (client)
  1554. w83781d_write_value_i2c(data, reg, value);
  1555. else
  1556. w83781d_write_value_isa(data, reg, value);
  1557. mutex_unlock(&data->lock);
  1558. return 0;
  1559. }
  1560. static int __devinit
  1561. w83781d_isa_probe(struct platform_device *pdev)
  1562. {
  1563. int err, reg;
  1564. struct w83781d_data *data;
  1565. struct resource *res;
  1566. /* Reserve the ISA region */
  1567. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1568. if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
  1569. "w83781d")) {
  1570. err = -EBUSY;
  1571. goto exit;
  1572. }
  1573. data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
  1574. if (!data) {
  1575. err = -ENOMEM;
  1576. goto exit_release_region;
  1577. }
  1578. mutex_init(&data->lock);
  1579. data->isa_addr = res->start;
  1580. platform_set_drvdata(pdev, data);
  1581. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1582. switch (reg) {
  1583. case 0x30:
  1584. data->type = w83782d;
  1585. data->name = "w83782d";
  1586. break;
  1587. default:
  1588. data->type = w83781d;
  1589. data->name = "w83781d";
  1590. }
  1591. /* Initialize the W83781D chip */
  1592. w83781d_init_device(&pdev->dev);
  1593. /* Register sysfs hooks */
  1594. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1595. if (err)
  1596. goto exit_remove_files;
  1597. err = device_create_file(&pdev->dev, &dev_attr_name);
  1598. if (err)
  1599. goto exit_remove_files;
  1600. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1601. if (IS_ERR(data->hwmon_dev)) {
  1602. err = PTR_ERR(data->hwmon_dev);
  1603. goto exit_remove_files;
  1604. }
  1605. return 0;
  1606. exit_remove_files:
  1607. w83781d_remove_files(&pdev->dev);
  1608. device_remove_file(&pdev->dev, &dev_attr_name);
  1609. kfree(data);
  1610. exit_release_region:
  1611. release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
  1612. exit:
  1613. return err;
  1614. }
  1615. static int __devexit
  1616. w83781d_isa_remove(struct platform_device *pdev)
  1617. {
  1618. struct w83781d_data *data = platform_get_drvdata(pdev);
  1619. hwmon_device_unregister(data->hwmon_dev);
  1620. w83781d_remove_files(&pdev->dev);
  1621. device_remove_file(&pdev->dev, &dev_attr_name);
  1622. release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
  1623. kfree(data);
  1624. return 0;
  1625. }
  1626. static struct platform_driver w83781d_isa_driver = {
  1627. .driver = {
  1628. .owner = THIS_MODULE,
  1629. .name = "w83781d",
  1630. },
  1631. .probe = w83781d_isa_probe,
  1632. .remove = __devexit_p(w83781d_isa_remove),
  1633. };
  1634. /* return 1 if a supported chip is found, 0 otherwise */
  1635. static int __init
  1636. w83781d_isa_found(unsigned short address)
  1637. {
  1638. int val, save, found = 0;
  1639. int port;
  1640. /*
  1641. * Some boards declare base+0 to base+7 as a PNP device, some base+4
  1642. * to base+7 and some base+5 to base+6. So we better request each port
  1643. * individually for the probing phase.
  1644. */
  1645. for (port = address; port < address + W83781D_EXTENT; port++) {
  1646. if (!request_region(port, 1, "w83781d")) {
  1647. pr_debug("Failed to request port 0x%x\n", port);
  1648. goto release;
  1649. }
  1650. }
  1651. #define REALLY_SLOW_IO
  1652. /*
  1653. * We need the timeouts for at least some W83781D-like
  1654. * chips. But only if we read 'undefined' registers.
  1655. */
  1656. val = inb_p(address + 1);
  1657. if (inb_p(address + 2) != val
  1658. || inb_p(address + 3) != val
  1659. || inb_p(address + 7) != val) {
  1660. pr_debug("Detection failed at step %d\n", 1);
  1661. goto release;
  1662. }
  1663. #undef REALLY_SLOW_IO
  1664. /*
  1665. * We should be able to change the 7 LSB of the address port. The
  1666. * MSB (busy flag) should be clear initially, set after the write.
  1667. */
  1668. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1669. if (save & 0x80) {
  1670. pr_debug("Detection failed at step %d\n", 2);
  1671. goto release;
  1672. }
  1673. val = ~save & 0x7f;
  1674. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1675. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1676. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1677. pr_debug("Detection failed at step %d\n", 3);
  1678. goto release;
  1679. }
  1680. /* We found a device, now see if it could be a W83781D */
  1681. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1682. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1683. if (val & 0x80) {
  1684. pr_debug("Detection failed at step %d\n", 4);
  1685. goto release;
  1686. }
  1687. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1688. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1689. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1690. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1691. if ((!(save & 0x80) && (val != 0xa3))
  1692. || ((save & 0x80) && (val != 0x5c))) {
  1693. pr_debug("Detection failed at step %d\n", 5);
  1694. goto release;
  1695. }
  1696. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1697. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1698. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1699. pr_debug("Detection failed at step %d\n", 6);
  1700. goto release;
  1701. }
  1702. /* The busy flag should be clear again */
  1703. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1704. pr_debug("Detection failed at step %d\n", 7);
  1705. goto release;
  1706. }
  1707. /* Determine the chip type */
  1708. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1709. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1710. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1711. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1712. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1713. if ((val & 0xfe) == 0x10 /* W83781D */
  1714. || val == 0x30) /* W83782D */
  1715. found = 1;
  1716. if (found)
  1717. pr_info("Found a %s chip at %#x\n",
  1718. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1719. release:
  1720. for (port--; port >= address; port--)
  1721. release_region(port, 1);
  1722. return found;
  1723. }
  1724. static int __init
  1725. w83781d_isa_device_add(unsigned short address)
  1726. {
  1727. struct resource res = {
  1728. .start = address,
  1729. .end = address + W83781D_EXTENT - 1,
  1730. .name = "w83781d",
  1731. .flags = IORESOURCE_IO,
  1732. };
  1733. int err;
  1734. pdev = platform_device_alloc("w83781d", address);
  1735. if (!pdev) {
  1736. err = -ENOMEM;
  1737. pr_err("Device allocation failed\n");
  1738. goto exit;
  1739. }
  1740. err = platform_device_add_resources(pdev, &res, 1);
  1741. if (err) {
  1742. pr_err("Device resource addition failed (%d)\n", err);
  1743. goto exit_device_put;
  1744. }
  1745. err = platform_device_add(pdev);
  1746. if (err) {
  1747. pr_err("Device addition failed (%d)\n", err);
  1748. goto exit_device_put;
  1749. }
  1750. return 0;
  1751. exit_device_put:
  1752. platform_device_put(pdev);
  1753. exit:
  1754. pdev = NULL;
  1755. return err;
  1756. }
  1757. static int __init
  1758. w83781d_isa_register(void)
  1759. {
  1760. int res;
  1761. if (w83781d_isa_found(isa_address)) {
  1762. res = platform_driver_register(&w83781d_isa_driver);
  1763. if (res)
  1764. goto exit;
  1765. /* Sets global pdev as a side effect */
  1766. res = w83781d_isa_device_add(isa_address);
  1767. if (res)
  1768. goto exit_unreg_isa_driver;
  1769. }
  1770. return 0;
  1771. exit_unreg_isa_driver:
  1772. platform_driver_unregister(&w83781d_isa_driver);
  1773. exit:
  1774. return res;
  1775. }
  1776. static void
  1777. w83781d_isa_unregister(void)
  1778. {
  1779. if (pdev) {
  1780. platform_device_unregister(pdev);
  1781. platform_driver_unregister(&w83781d_isa_driver);
  1782. }
  1783. }
  1784. #else /* !CONFIG_ISA */
  1785. static struct w83781d_data *w83781d_data_if_isa(void)
  1786. {
  1787. return NULL;
  1788. }
  1789. static int
  1790. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1791. {
  1792. return 0;
  1793. }
  1794. static int
  1795. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1796. {
  1797. int res;
  1798. mutex_lock(&data->lock);
  1799. res = w83781d_read_value_i2c(data, reg);
  1800. mutex_unlock(&data->lock);
  1801. return res;
  1802. }
  1803. static int
  1804. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1805. {
  1806. mutex_lock(&data->lock);
  1807. w83781d_write_value_i2c(data, reg, value);
  1808. mutex_unlock(&data->lock);
  1809. return 0;
  1810. }
  1811. static int __init
  1812. w83781d_isa_register(void)
  1813. {
  1814. return 0;
  1815. }
  1816. static void
  1817. w83781d_isa_unregister(void)
  1818. {
  1819. }
  1820. #endif /* CONFIG_ISA */
  1821. static int __init
  1822. sensors_w83781d_init(void)
  1823. {
  1824. int res;
  1825. /*
  1826. * We register the ISA device first, so that we can skip the
  1827. * registration of an I2C interface to the same device.
  1828. */
  1829. res = w83781d_isa_register();
  1830. if (res)
  1831. goto exit;
  1832. res = i2c_add_driver(&w83781d_driver);
  1833. if (res)
  1834. goto exit_unreg_isa;
  1835. return 0;
  1836. exit_unreg_isa:
  1837. w83781d_isa_unregister();
  1838. exit:
  1839. return res;
  1840. }
  1841. static void __exit
  1842. sensors_w83781d_exit(void)
  1843. {
  1844. w83781d_isa_unregister();
  1845. i2c_del_driver(&w83781d_driver);
  1846. }
  1847. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1848. "Philip Edelbrock <phil@netroedge.com>, "
  1849. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1850. MODULE_DESCRIPTION("W83781D driver");
  1851. MODULE_LICENSE("GPL");
  1852. module_init(sensors_w83781d_init);
  1853. module_exit(sensors_w83781d_exit);