board-ag5evm.c 15 KB

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  1. /*
  2. * arch/arm/mach-shmobile/board-ag5evm.c
  3. *
  4. * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
  5. * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. *
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/io.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/serial_sci.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/gpio.h>
  32. #include <linux/videodev2.h>
  33. #include <linux/input.h>
  34. #include <linux/input/sh_keysc.h>
  35. #include <linux/mmc/host.h>
  36. #include <linux/mmc/sh_mmcif.h>
  37. #include <linux/mmc/sh_mobile_sdhi.h>
  38. #include <linux/mfd/tmio.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/videodev2.h>
  41. #include <video/sh_mobile_lcdc.h>
  42. #include <video/sh_mipi_dsi.h>
  43. #include <sound/sh_fsi.h>
  44. #include <mach/hardware.h>
  45. #include <mach/sh73a0.h>
  46. #include <mach/common.h>
  47. #include <asm/mach-types.h>
  48. #include <asm/mach/arch.h>
  49. #include <asm/mach/map.h>
  50. #include <asm/mach/time.h>
  51. #include <asm/hardware/gic.h>
  52. #include <asm/hardware/cache-l2x0.h>
  53. #include <asm/traps.h>
  54. static struct resource smsc9220_resources[] = {
  55. [0] = {
  56. .start = 0x14000000,
  57. .end = 0x14000000 + SZ_64K - 1,
  58. .flags = IORESOURCE_MEM,
  59. },
  60. [1] = {
  61. .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
  62. .flags = IORESOURCE_IRQ,
  63. },
  64. };
  65. static struct smsc911x_platform_config smsc9220_platdata = {
  66. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  67. .phy_interface = PHY_INTERFACE_MODE_MII,
  68. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  69. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  70. };
  71. static struct platform_device eth_device = {
  72. .name = "smsc911x",
  73. .id = 0,
  74. .dev = {
  75. .platform_data = &smsc9220_platdata,
  76. },
  77. .resource = smsc9220_resources,
  78. .num_resources = ARRAY_SIZE(smsc9220_resources),
  79. };
  80. static struct sh_keysc_info keysc_platdata = {
  81. .mode = SH_KEYSC_MODE_6,
  82. .scan_timing = 3,
  83. .delay = 100,
  84. .keycodes = {
  85. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
  86. KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
  87. KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
  88. KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
  89. KEY_SPACE, KEY_9, KEY_6, KEY_3, KEY_WAKEUP, KEY_RIGHT, \
  90. KEY_COFFEE,
  91. KEY_0, KEY_8, KEY_5, KEY_2, KEY_DOWN, KEY_ENTER, KEY_UP,
  92. KEY_KPASTERISK, KEY_7, KEY_4, KEY_1, KEY_STOP, KEY_LEFT, \
  93. KEY_COMPUTER,
  94. },
  95. };
  96. static struct resource keysc_resources[] = {
  97. [0] = {
  98. .name = "KEYSC",
  99. .start = 0xe61b0000,
  100. .end = 0xe61b0098 - 1,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. [1] = {
  104. .start = gic_spi(71),
  105. .flags = IORESOURCE_IRQ,
  106. },
  107. };
  108. static struct platform_device keysc_device = {
  109. .name = "sh_keysc",
  110. .id = 0,
  111. .num_resources = ARRAY_SIZE(keysc_resources),
  112. .resource = keysc_resources,
  113. .dev = {
  114. .platform_data = &keysc_platdata,
  115. },
  116. };
  117. /* FSI A */
  118. static struct resource fsi_resources[] = {
  119. [0] = {
  120. .name = "FSI",
  121. .start = 0xEC230000,
  122. .end = 0xEC230400 - 1,
  123. .flags = IORESOURCE_MEM,
  124. },
  125. [1] = {
  126. .start = gic_spi(146),
  127. .flags = IORESOURCE_IRQ,
  128. },
  129. };
  130. static struct platform_device fsi_device = {
  131. .name = "sh_fsi2",
  132. .id = -1,
  133. .num_resources = ARRAY_SIZE(fsi_resources),
  134. .resource = fsi_resources,
  135. };
  136. static struct resource sh_mmcif_resources[] = {
  137. [0] = {
  138. .name = "MMCIF",
  139. .start = 0xe6bd0000,
  140. .end = 0xe6bd00ff,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. [1] = {
  144. .start = gic_spi(141),
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. [2] = {
  148. .start = gic_spi(140),
  149. .flags = IORESOURCE_IRQ,
  150. },
  151. };
  152. static struct sh_mmcif_plat_data sh_mmcif_platdata = {
  153. .sup_pclk = 0,
  154. .ocr = MMC_VDD_165_195,
  155. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  156. .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
  157. .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
  158. };
  159. static struct platform_device mmc_device = {
  160. .name = "sh_mmcif",
  161. .id = 0,
  162. .dev = {
  163. .dma_mask = NULL,
  164. .coherent_dma_mask = 0xffffffff,
  165. .platform_data = &sh_mmcif_platdata,
  166. },
  167. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  168. .resource = sh_mmcif_resources,
  169. };
  170. /* IrDA */
  171. static struct resource irda_resources[] = {
  172. [0] = {
  173. .start = 0xE6D00000,
  174. .end = 0xE6D01FD4 - 1,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [1] = {
  178. .start = gic_spi(95),
  179. .flags = IORESOURCE_IRQ,
  180. },
  181. };
  182. static struct platform_device irda_device = {
  183. .name = "sh_irda",
  184. .id = 0,
  185. .resource = irda_resources,
  186. .num_resources = ARRAY_SIZE(irda_resources),
  187. };
  188. static unsigned char lcd_backlight_seq[3][2] = {
  189. { 0x04, 0x07 },
  190. { 0x23, 0x80 },
  191. { 0x03, 0x01 },
  192. };
  193. static void lcd_backlight_on(void)
  194. {
  195. struct i2c_adapter *a;
  196. struct i2c_msg msg;
  197. int k;
  198. a = i2c_get_adapter(1);
  199. for (k = 0; a && k < 3; k++) {
  200. msg.addr = 0x6d;
  201. msg.buf = &lcd_backlight_seq[k][0];
  202. msg.len = 2;
  203. msg.flags = 0;
  204. if (i2c_transfer(a, &msg, 1) != 1)
  205. break;
  206. }
  207. }
  208. static void lcd_backlight_reset(void)
  209. {
  210. gpio_set_value(GPIO_PORT235, 0);
  211. mdelay(24);
  212. gpio_set_value(GPIO_PORT235, 1);
  213. }
  214. /* LCDC0 */
  215. static const struct fb_videomode lcdc0_modes[] = {
  216. {
  217. .name = "R63302(QHD)",
  218. .xres = 544,
  219. .yres = 961,
  220. .left_margin = 72,
  221. .right_margin = 600,
  222. .hsync_len = 16,
  223. .upper_margin = 8,
  224. .lower_margin = 8,
  225. .vsync_len = 2,
  226. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  227. },
  228. };
  229. static struct sh_mobile_lcdc_info lcdc0_info = {
  230. .clock_source = LCDC_CLK_PERIPHERAL,
  231. .ch[0] = {
  232. .chan = LCDC_CHAN_MAINLCD,
  233. .interface_type = RGB24,
  234. .clock_divider = 1,
  235. .flags = LCDC_FLAGS_DWPOL,
  236. .fourcc = V4L2_PIX_FMT_RGB565,
  237. .lcd_modes = lcdc0_modes,
  238. .num_modes = ARRAY_SIZE(lcdc0_modes),
  239. .panel_cfg = {
  240. .width = 44,
  241. .height = 79,
  242. .display_on = lcd_backlight_on,
  243. .display_off = lcd_backlight_reset,
  244. },
  245. }
  246. };
  247. static struct resource lcdc0_resources[] = {
  248. [0] = {
  249. .name = "LCDC0",
  250. .start = 0xfe940000, /* P4-only space */
  251. .end = 0xfe943fff,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. [1] = {
  255. .start = intcs_evt2irq(0x580),
  256. .flags = IORESOURCE_IRQ,
  257. },
  258. };
  259. static struct platform_device lcdc0_device = {
  260. .name = "sh_mobile_lcdc_fb",
  261. .num_resources = ARRAY_SIZE(lcdc0_resources),
  262. .resource = lcdc0_resources,
  263. .id = 0,
  264. .dev = {
  265. .platform_data = &lcdc0_info,
  266. .coherent_dma_mask = ~0,
  267. },
  268. };
  269. /* MIPI-DSI */
  270. static struct resource mipidsi0_resources[] = {
  271. [0] = {
  272. .name = "DSI0",
  273. .start = 0xfeab0000,
  274. .end = 0xfeab3fff,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. [1] = {
  278. .name = "DSI0",
  279. .start = 0xfeab4000,
  280. .end = 0xfeab7fff,
  281. .flags = IORESOURCE_MEM,
  282. },
  283. };
  284. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  285. void __iomem *base,
  286. int enable)
  287. {
  288. struct clk *pck, *phy;
  289. int ret;
  290. pck = clk_get(&pdev->dev, "dsip_clk");
  291. if (IS_ERR(pck)) {
  292. ret = PTR_ERR(pck);
  293. goto sh_mipi_set_dot_clock_pck_err;
  294. }
  295. phy = clk_get(&pdev->dev, "dsiphy_clk");
  296. if (IS_ERR(phy)) {
  297. ret = PTR_ERR(phy);
  298. goto sh_mipi_set_dot_clock_phy_err;
  299. }
  300. if (enable) {
  301. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  302. clk_set_rate(phy, clk_round_rate(pck, 510000000));
  303. clk_enable(pck);
  304. clk_enable(phy);
  305. } else {
  306. clk_disable(pck);
  307. clk_disable(phy);
  308. }
  309. ret = 0;
  310. clk_put(phy);
  311. sh_mipi_set_dot_clock_phy_err:
  312. clk_put(pck);
  313. sh_mipi_set_dot_clock_pck_err:
  314. return ret;
  315. }
  316. static struct sh_mipi_dsi_info mipidsi0_info = {
  317. .data_format = MIPI_RGB888,
  318. .lcd_chan = &lcdc0_info.ch[0],
  319. .lane = 2,
  320. .vsynw_offset = 20,
  321. .clksrc = 1,
  322. .flags = SH_MIPI_DSI_HSABM |
  323. SH_MIPI_DSI_SYNC_PULSES_MODE |
  324. SH_MIPI_DSI_HSbyteCLK,
  325. .set_dot_clock = sh_mipi_set_dot_clock,
  326. };
  327. static struct platform_device mipidsi0_device = {
  328. .name = "sh-mipi-dsi",
  329. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  330. .resource = mipidsi0_resources,
  331. .id = 0,
  332. .dev = {
  333. .platform_data = &mipidsi0_info,
  334. },
  335. };
  336. /* SDHI0 */
  337. static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
  338. {
  339. struct device *dev = arg;
  340. struct sh_mobile_sdhi_info *info = dev->platform_data;
  341. struct tmio_mmc_data *pdata = info->pdata;
  342. tmio_mmc_cd_wakeup(pdata);
  343. return IRQ_HANDLED;
  344. }
  345. static struct sh_mobile_sdhi_info sdhi0_info = {
  346. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  347. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  348. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  349. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  350. .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  351. };
  352. static struct resource sdhi0_resources[] = {
  353. [0] = {
  354. .name = "SDHI0",
  355. .start = 0xee100000,
  356. .end = 0xee1000ff,
  357. .flags = IORESOURCE_MEM,
  358. },
  359. [1] = {
  360. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  361. .start = gic_spi(83),
  362. .flags = IORESOURCE_IRQ,
  363. },
  364. [2] = {
  365. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  366. .start = gic_spi(84),
  367. .flags = IORESOURCE_IRQ,
  368. },
  369. [3] = {
  370. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  371. .start = gic_spi(85),
  372. .flags = IORESOURCE_IRQ,
  373. },
  374. };
  375. static struct platform_device sdhi0_device = {
  376. .name = "sh_mobile_sdhi",
  377. .id = 0,
  378. .num_resources = ARRAY_SIZE(sdhi0_resources),
  379. .resource = sdhi0_resources,
  380. .dev = {
  381. .platform_data = &sdhi0_info,
  382. },
  383. };
  384. void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
  385. {
  386. gpio_set_value(GPIO_PORT114, state);
  387. }
  388. static struct sh_mobile_sdhi_info sh_sdhi1_info = {
  389. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
  390. .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
  391. .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
  392. .set_pwr = ag5evm_sdhi1_set_pwr,
  393. };
  394. static struct resource sdhi1_resources[] = {
  395. [0] = {
  396. .name = "SDHI1",
  397. .start = 0xee120000,
  398. .end = 0xee1200ff,
  399. .flags = IORESOURCE_MEM,
  400. },
  401. [1] = {
  402. .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
  403. .start = gic_spi(87),
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. [2] = {
  407. .name = SH_MOBILE_SDHI_IRQ_SDCARD,
  408. .start = gic_spi(88),
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. [3] = {
  412. .name = SH_MOBILE_SDHI_IRQ_SDIO,
  413. .start = gic_spi(89),
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device sdhi1_device = {
  418. .name = "sh_mobile_sdhi",
  419. .id = 1,
  420. .dev = {
  421. .platform_data = &sh_sdhi1_info,
  422. },
  423. .num_resources = ARRAY_SIZE(sdhi1_resources),
  424. .resource = sdhi1_resources,
  425. };
  426. static struct platform_device *ag5evm_devices[] __initdata = {
  427. &eth_device,
  428. &keysc_device,
  429. &fsi_device,
  430. &mmc_device,
  431. &irda_device,
  432. &lcdc0_device,
  433. &mipidsi0_device,
  434. &sdhi0_device,
  435. &sdhi1_device,
  436. };
  437. static struct map_desc ag5evm_io_desc[] __initdata = {
  438. /* create a 1:1 entity map for 0xe6xxxxxx
  439. * used by CPGA, INTC and PFC.
  440. */
  441. {
  442. .virtual = 0xe6000000,
  443. .pfn = __phys_to_pfn(0xe6000000),
  444. .length = 256 << 20,
  445. .type = MT_DEVICE_NONSHARED
  446. },
  447. };
  448. static void __init ag5evm_map_io(void)
  449. {
  450. iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
  451. /* setup early devices and console here as well */
  452. sh73a0_add_early_devices();
  453. shmobile_setup_console();
  454. }
  455. static void __init ag5evm_init(void)
  456. {
  457. sh73a0_pinmux_init();
  458. /* enable SCIFA2 */
  459. gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
  460. gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
  461. gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL);
  462. gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL);
  463. /* enable KEYSC */
  464. gpio_request(GPIO_FN_KEYIN0_PU, NULL);
  465. gpio_request(GPIO_FN_KEYIN1_PU, NULL);
  466. gpio_request(GPIO_FN_KEYIN2_PU, NULL);
  467. gpio_request(GPIO_FN_KEYIN3_PU, NULL);
  468. gpio_request(GPIO_FN_KEYIN4_PU, NULL);
  469. gpio_request(GPIO_FN_KEYIN5_PU, NULL);
  470. gpio_request(GPIO_FN_KEYIN6_PU, NULL);
  471. gpio_request(GPIO_FN_KEYIN7_PU, NULL);
  472. gpio_request(GPIO_FN_KEYOUT0, NULL);
  473. gpio_request(GPIO_FN_KEYOUT1, NULL);
  474. gpio_request(GPIO_FN_KEYOUT2, NULL);
  475. gpio_request(GPIO_FN_KEYOUT3, NULL);
  476. gpio_request(GPIO_FN_KEYOUT4, NULL);
  477. gpio_request(GPIO_FN_KEYOUT5, NULL);
  478. gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL);
  479. gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL);
  480. gpio_request(GPIO_FN_KEYOUT8, NULL);
  481. gpio_request(GPIO_FN_PORT149_KEYOUT9, NULL);
  482. /* enable I2C channel 2 and 3 */
  483. gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
  484. gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
  485. gpio_request(GPIO_FN_PORT248_I2C_SCL3, NULL);
  486. gpio_request(GPIO_FN_PORT249_I2C_SDA3, NULL);
  487. /* enable MMCIF */
  488. gpio_request(GPIO_FN_MMCCLK0, NULL);
  489. gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
  490. gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
  491. gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
  492. gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
  493. gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
  494. gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
  495. gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
  496. gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
  497. gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
  498. gpio_request(GPIO_PORT208, NULL); /* Reset */
  499. gpio_direction_output(GPIO_PORT208, 1);
  500. /* enable SMSC911X */
  501. gpio_request(GPIO_PORT144, NULL); /* PINTA2 */
  502. gpio_direction_input(GPIO_PORT144);
  503. gpio_request(GPIO_PORT145, NULL); /* RESET */
  504. gpio_direction_output(GPIO_PORT145, 1);
  505. /* FSI A */
  506. gpio_request(GPIO_FN_FSIACK, NULL);
  507. gpio_request(GPIO_FN_FSIAILR, NULL);
  508. gpio_request(GPIO_FN_FSIAIBT, NULL);
  509. gpio_request(GPIO_FN_FSIAISLD, NULL);
  510. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  511. /* IrDA */
  512. gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
  513. gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
  514. gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
  515. /* LCD panel */
  516. gpio_request(GPIO_PORT217, NULL); /* RESET */
  517. gpio_direction_output(GPIO_PORT217, 0);
  518. mdelay(1);
  519. gpio_set_value(GPIO_PORT217, 1);
  520. mdelay(100);
  521. /* LCD backlight controller */
  522. gpio_request(GPIO_PORT235, NULL); /* RESET */
  523. gpio_direction_output(GPIO_PORT235, 0);
  524. lcd_backlight_reset();
  525. /* enable SDHI0 on CN15 [SD I/F] */
  526. gpio_request(GPIO_FN_SDHICD0, NULL);
  527. gpio_request(GPIO_FN_SDHIWP0, NULL);
  528. gpio_request(GPIO_FN_SDHICMD0, NULL);
  529. gpio_request(GPIO_FN_SDHICLK0, NULL);
  530. gpio_request(GPIO_FN_SDHID0_3, NULL);
  531. gpio_request(GPIO_FN_SDHID0_2, NULL);
  532. gpio_request(GPIO_FN_SDHID0_1, NULL);
  533. gpio_request(GPIO_FN_SDHID0_0, NULL);
  534. if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
  535. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  536. "sdhi0 cd", &sdhi0_device.dev))
  537. sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
  538. else
  539. pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
  540. /* enable SDHI1 on CN4 [WLAN I/F] */
  541. gpio_request(GPIO_FN_SDHICLK1, NULL);
  542. gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
  543. gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
  544. gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
  545. gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
  546. gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
  547. gpio_request(GPIO_PORT114, "sdhi1_power");
  548. gpio_direction_output(GPIO_PORT114, 0);
  549. #ifdef CONFIG_CACHE_L2X0
  550. /* Shared attribute override enable, 64K*8way */
  551. l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
  552. #endif
  553. sh73a0_add_standard_devices();
  554. platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
  555. }
  556. static void __init ag5evm_timer_init(void)
  557. {
  558. sh73a0_clock_init();
  559. shmobile_timer.init();
  560. return;
  561. }
  562. struct sys_timer ag5evm_timer = {
  563. .init = ag5evm_timer_init,
  564. };
  565. MACHINE_START(AG5EVM, "ag5evm")
  566. .map_io = ag5evm_map_io,
  567. .nr_irqs = NR_IRQS_LEGACY,
  568. .init_irq = sh73a0_init_irq,
  569. .handle_irq = gic_handle_irq,
  570. .init_machine = ag5evm_init,
  571. .timer = &ag5evm_timer,
  572. MACHINE_END