common.c 5.2 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * Copyright 2009 Samsung Electronics Co.
  6. * Byungho Min <bhmin@samsung.com>
  7. *
  8. * Common Codes for S5PC100
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/clk.h>
  21. #include <linux/io.h>
  22. #include <linux/device.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/sched.h>
  26. #include <asm/irq.h>
  27. #include <asm/proc-fns.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <mach/map.h>
  32. #include <mach/hardware.h>
  33. #include <mach/regs-clock.h>
  34. #include <plat/cpu.h>
  35. #include <plat/devs.h>
  36. #include <plat/clock.h>
  37. #include <plat/sdhci.h>
  38. #include <plat/adc-core.h>
  39. #include <plat/ata-core.h>
  40. #include <plat/fb-core.h>
  41. #include <plat/iic-core.h>
  42. #include <plat/onenand-core.h>
  43. #include <plat/regs-serial.h>
  44. #include <plat/watchdog-reset.h>
  45. #include "common.h"
  46. static const char name_s5pc100[] = "S5PC100";
  47. static struct cpu_table cpu_ids[] __initdata = {
  48. {
  49. .idcode = S5PC100_CPU_ID,
  50. .idmask = S5PC100_CPU_MASK,
  51. .map_io = s5pc100_map_io,
  52. .init_clocks = s5pc100_init_clocks,
  53. .init_uarts = s5pc100_init_uarts,
  54. .init = s5pc100_init,
  55. .name = name_s5pc100,
  56. },
  57. };
  58. /* Initial IO mappings */
  59. static struct map_desc s5pc100_iodesc[] __initdata = {
  60. {
  61. .virtual = (unsigned long)S5P_VA_CHIPID,
  62. .pfn = __phys_to_pfn(S5PC100_PA_CHIPID),
  63. .length = SZ_4K,
  64. .type = MT_DEVICE,
  65. }, {
  66. .virtual = (unsigned long)S3C_VA_SYS,
  67. .pfn = __phys_to_pfn(S5PC100_PA_SYSCON),
  68. .length = SZ_64K,
  69. .type = MT_DEVICE,
  70. }, {
  71. .virtual = (unsigned long)S3C_VA_TIMER,
  72. .pfn = __phys_to_pfn(S5PC100_PA_TIMER),
  73. .length = SZ_16K,
  74. .type = MT_DEVICE,
  75. }, {
  76. .virtual = (unsigned long)S3C_VA_WATCHDOG,
  77. .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG),
  78. .length = SZ_4K,
  79. .type = MT_DEVICE,
  80. }, {
  81. .virtual = (unsigned long)S5P_VA_SROMC,
  82. .pfn = __phys_to_pfn(S5PC100_PA_SROMC),
  83. .length = SZ_4K,
  84. .type = MT_DEVICE,
  85. }, {
  86. .virtual = (unsigned long)S5P_VA_SYSTIMER,
  87. .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER),
  88. .length = SZ_16K,
  89. .type = MT_DEVICE,
  90. }, {
  91. .virtual = (unsigned long)S5P_VA_GPIO,
  92. .pfn = __phys_to_pfn(S5PC100_PA_GPIO),
  93. .length = SZ_4K,
  94. .type = MT_DEVICE,
  95. }, {
  96. .virtual = (unsigned long)VA_VIC0,
  97. .pfn = __phys_to_pfn(S5PC100_PA_VIC0),
  98. .length = SZ_16K,
  99. .type = MT_DEVICE,
  100. }, {
  101. .virtual = (unsigned long)VA_VIC1,
  102. .pfn = __phys_to_pfn(S5PC100_PA_VIC1),
  103. .length = SZ_16K,
  104. .type = MT_DEVICE,
  105. }, {
  106. .virtual = (unsigned long)VA_VIC2,
  107. .pfn = __phys_to_pfn(S5PC100_PA_VIC2),
  108. .length = SZ_16K,
  109. .type = MT_DEVICE,
  110. }, {
  111. .virtual = (unsigned long)S3C_VA_UART,
  112. .pfn = __phys_to_pfn(S3C_PA_UART),
  113. .length = SZ_512K,
  114. .type = MT_DEVICE,
  115. }, {
  116. .virtual = (unsigned long)S5PC100_VA_OTHERS,
  117. .pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
  118. .length = SZ_4K,
  119. .type = MT_DEVICE,
  120. }
  121. };
  122. static void s5pc100_idle(void)
  123. {
  124. if (!need_resched())
  125. cpu_do_idle();
  126. local_irq_enable();
  127. }
  128. /*
  129. * s5pc100_map_io
  130. *
  131. * register the standard CPU IO areas
  132. */
  133. void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
  134. {
  135. /* initialize the io descriptors we need for initialization */
  136. iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
  137. if (mach_desc)
  138. iotable_init(mach_desc, size);
  139. /* detect cpu id and rev. */
  140. s5p_init_cpu(S5P_VA_CHIPID);
  141. s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
  142. }
  143. void __init s5pc100_map_io(void)
  144. {
  145. /* initialise device information early */
  146. s5pc100_default_sdhci0();
  147. s5pc100_default_sdhci1();
  148. s5pc100_default_sdhci2();
  149. s3c_adc_setname("s3c64xx-adc");
  150. /* the i2c devices are directly compatible with s3c2440 */
  151. s3c_i2c0_setname("s3c2440-i2c");
  152. s3c_i2c1_setname("s3c2440-i2c");
  153. s3c_onenand_setname("s5pc100-onenand");
  154. s3c_fb_setname("s5pc100-fb");
  155. s3c_cfcon_setname("s5pc100-pata");
  156. }
  157. void __init s5pc100_init_clocks(int xtal)
  158. {
  159. printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
  160. s3c24xx_register_baseclocks(xtal);
  161. s5p_register_clocks(xtal);
  162. s5pc100_register_clocks();
  163. s5pc100_setup_clocks();
  164. }
  165. void __init s5pc100_init_irq(void)
  166. {
  167. u32 vic[] = {~0, ~0, ~0};
  168. /* VIC0, VIC1, and VIC2 are fully populated. */
  169. s5p_init_irq(vic, ARRAY_SIZE(vic));
  170. }
  171. static struct bus_type s5pc100_subsys = {
  172. .name = "s5pc100-core",
  173. .dev_name = "s5pc100-core",
  174. };
  175. static struct device s5pc100_dev = {
  176. .bus = &s5pc100_subsys,
  177. };
  178. static int __init s5pc100_core_init(void)
  179. {
  180. return subsys_system_register(&s5pc100_subsys, NULL);
  181. }
  182. core_initcall(s5pc100_core_init);
  183. int __init s5pc100_init(void)
  184. {
  185. printk(KERN_INFO "S5PC100: Initializing architecture\n");
  186. /* set idle function */
  187. pm_idle = s5pc100_idle;
  188. return device_register(&s5pc100_dev);
  189. }
  190. /* uart registration process */
  191. void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  192. {
  193. s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
  194. }
  195. void s5pc100_restart(char mode, const char *cmd)
  196. {
  197. if (mode != 's')
  198. arch_wdt_reset();
  199. soft_restart(0);
  200. }