mach-imx6q.c 3.4 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/init.h>
  14. #include <linux/io.h>
  15. #include <linux/irq.h>
  16. #include <linux/irqdomain.h>
  17. #include <linux/of.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/phy.h>
  22. #include <linux/micrel_phy.h>
  23. #include <asm/hardware/cache-l2x0.h>
  24. #include <asm/hardware/gic.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/time.h>
  27. #include <mach/common.h>
  28. #include <mach/hardware.h>
  29. void imx6q_restart(char mode, const char *cmd)
  30. {
  31. struct device_node *np;
  32. void __iomem *wdog_base;
  33. np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  34. wdog_base = of_iomap(np, 0);
  35. if (!wdog_base)
  36. goto soft;
  37. imx_src_prepare_restart();
  38. /* enable wdog */
  39. writew_relaxed(1 << 2, wdog_base);
  40. /* write twice to ensure the request will not get ignored */
  41. writew_relaxed(1 << 2, wdog_base);
  42. /* wait for reset to assert ... */
  43. mdelay(500);
  44. pr_err("Watchdog reset failed to assert reset\n");
  45. /* delay to allow the serial port to show the message */
  46. mdelay(50);
  47. soft:
  48. /* we'll take a jump through zero as a poor second */
  49. soft_restart(0);
  50. }
  51. /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  52. static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  53. {
  54. /* min rx data delay */
  55. phy_write(phydev, 0x0b, 0x8105);
  56. phy_write(phydev, 0x0c, 0x0000);
  57. /* max rx/tx clock delay, min rx/tx control delay */
  58. phy_write(phydev, 0x0b, 0x8104);
  59. phy_write(phydev, 0x0c, 0xf0f0);
  60. phy_write(phydev, 0x0b, 0x104);
  61. return 0;
  62. }
  63. static void __init imx6q_init_machine(void)
  64. {
  65. if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
  66. phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
  67. ksz9021rn_phy_fixup);
  68. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  69. imx6q_pm_init();
  70. }
  71. static void __init imx6q_map_io(void)
  72. {
  73. imx_lluart_map_io();
  74. imx_scu_map_io();
  75. imx6q_clock_map_io();
  76. }
  77. static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
  78. struct device_node *interrupt_parent)
  79. {
  80. static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
  81. gpio_irq_base -= 32;
  82. irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
  83. NULL);
  84. return 0;
  85. }
  86. static const struct of_device_id imx6q_irq_match[] __initconst = {
  87. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  88. { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
  89. { /* sentinel */ }
  90. };
  91. static void __init imx6q_init_irq(void)
  92. {
  93. l2x0_of_init(0, ~0UL);
  94. imx_src_init();
  95. imx_gpc_init();
  96. of_irq_init(imx6q_irq_match);
  97. }
  98. static void __init imx6q_timer_init(void)
  99. {
  100. mx6q_clocks_init();
  101. }
  102. static struct sys_timer imx6q_timer = {
  103. .init = imx6q_timer_init,
  104. };
  105. static const char *imx6q_dt_compat[] __initdata = {
  106. "fsl,imx6q-arm2",
  107. "fsl,imx6q-sabrelite",
  108. NULL,
  109. };
  110. DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
  111. .map_io = imx6q_map_io,
  112. .init_irq = imx6q_init_irq,
  113. .handle_irq = imx6q_handle_irq,
  114. .timer = &imx6q_timer,
  115. .init_machine = imx6q_init_machine,
  116. .dt_compat = imx6q_dt_compat,
  117. .restart = imx6q_restart,
  118. MACHINE_END