mach-universal_c210.c 26 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/hardware/gic.h>
  27. #include <asm/mach-types.h>
  28. #include <plat/regs-serial.h>
  29. #include <plat/cpu.h>
  30. #include <plat/devs.h>
  31. #include <plat/iic.h>
  32. #include <plat/gpio-cfg.h>
  33. #include <plat/fb.h>
  34. #include <plat/mfc.h>
  35. #include <plat/sdhci.h>
  36. #include <plat/pd.h>
  37. #include <plat/regs-fb-v4.h>
  38. #include <plat/fimc-core.h>
  39. #include <plat/camport.h>
  40. #include <plat/mipi_csis.h>
  41. #include <mach/map.h>
  42. #include <media/v4l2-mediabus.h>
  43. #include <media/s5p_fimc.h>
  44. #include <media/m5mols.h>
  45. #include "common.h"
  46. /* Following are default values for UCON, ULCON and UFCON UART registers */
  47. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  48. S3C2410_UCON_RXILEVEL | \
  49. S3C2410_UCON_TXIRQMODE | \
  50. S3C2410_UCON_RXIRQMODE | \
  51. S3C2410_UCON_RXFIFO_TOI | \
  52. S3C2443_UCON_RXERR_IRQEN)
  53. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  54. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  55. S5PV210_UFCON_TXTRIG256 | \
  56. S5PV210_UFCON_RXTRIG256)
  57. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  58. [0] = {
  59. .hwport = 0,
  60. .ucon = UNIVERSAL_UCON_DEFAULT,
  61. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  62. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  63. },
  64. [1] = {
  65. .hwport = 1,
  66. .ucon = UNIVERSAL_UCON_DEFAULT,
  67. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  68. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  69. },
  70. [2] = {
  71. .hwport = 2,
  72. .ucon = UNIVERSAL_UCON_DEFAULT,
  73. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  74. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  75. },
  76. [3] = {
  77. .hwport = 3,
  78. .ucon = UNIVERSAL_UCON_DEFAULT,
  79. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  80. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  81. },
  82. };
  83. static struct regulator_consumer_supply max8952_consumer =
  84. REGULATOR_SUPPLY("vdd_arm", NULL);
  85. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  86. .gpio_vid0 = EXYNOS4_GPX0(3),
  87. .gpio_vid1 = EXYNOS4_GPX0(4),
  88. .gpio_en = -1, /* Not controllable, set "Always High" */
  89. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  90. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  91. .sync_freq = 0, /* default: fastest */
  92. .ramp_speed = 0, /* default: fastest */
  93. .reg_data = {
  94. .constraints = {
  95. .name = "VARM_1.2V",
  96. .min_uV = 770000,
  97. .max_uV = 1400000,
  98. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  99. .always_on = 1,
  100. .boot_on = 1,
  101. },
  102. .num_consumer_supplies = 1,
  103. .consumer_supplies = &max8952_consumer,
  104. },
  105. };
  106. static struct regulator_consumer_supply lp3974_buck1_consumer =
  107. REGULATOR_SUPPLY("vdd_int", NULL);
  108. static struct regulator_consumer_supply lp3974_buck2_consumer =
  109. REGULATOR_SUPPLY("vddg3d", NULL);
  110. static struct regulator_consumer_supply lp3974_buck3_consumer =
  111. REGULATOR_SUPPLY("vdet", "s5p-sdo");
  112. static struct regulator_init_data lp3974_buck1_data = {
  113. .constraints = {
  114. .name = "VINT_1.1V",
  115. .min_uV = 750000,
  116. .max_uV = 1500000,
  117. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  118. REGULATOR_CHANGE_STATUS,
  119. .boot_on = 1,
  120. .state_mem = {
  121. .disabled = 1,
  122. },
  123. },
  124. .num_consumer_supplies = 1,
  125. .consumer_supplies = &lp3974_buck1_consumer,
  126. };
  127. static struct regulator_init_data lp3974_buck2_data = {
  128. .constraints = {
  129. .name = "VG3D_1.1V",
  130. .min_uV = 750000,
  131. .max_uV = 1500000,
  132. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  133. REGULATOR_CHANGE_STATUS,
  134. .boot_on = 1,
  135. .state_mem = {
  136. .disabled = 1,
  137. },
  138. },
  139. .num_consumer_supplies = 1,
  140. .consumer_supplies = &lp3974_buck2_consumer,
  141. };
  142. static struct regulator_init_data lp3974_buck3_data = {
  143. .constraints = {
  144. .name = "VCC_1.8V",
  145. .min_uV = 1800000,
  146. .max_uV = 1800000,
  147. .apply_uV = 1,
  148. .always_on = 1,
  149. .state_mem = {
  150. .enabled = 1,
  151. },
  152. },
  153. .num_consumer_supplies = 1,
  154. .consumer_supplies = &lp3974_buck3_consumer,
  155. };
  156. static struct regulator_init_data lp3974_buck4_data = {
  157. .constraints = {
  158. .name = "VMEM_1.2V",
  159. .min_uV = 1200000,
  160. .max_uV = 1200000,
  161. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  162. .apply_uV = 1,
  163. .state_mem = {
  164. .disabled = 1,
  165. },
  166. },
  167. };
  168. static struct regulator_init_data lp3974_ldo2_data = {
  169. .constraints = {
  170. .name = "VALIVE_1.2V",
  171. .min_uV = 1200000,
  172. .max_uV = 1200000,
  173. .apply_uV = 1,
  174. .always_on = 1,
  175. .state_mem = {
  176. .enabled = 1,
  177. },
  178. },
  179. };
  180. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  181. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  182. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  183. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  184. };
  185. static struct regulator_init_data lp3974_ldo3_data = {
  186. .constraints = {
  187. .name = "VUSB+MIPI_1.1V",
  188. .min_uV = 1100000,
  189. .max_uV = 1100000,
  190. .apply_uV = 1,
  191. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  192. .state_mem = {
  193. .disabled = 1,
  194. },
  195. },
  196. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  197. .consumer_supplies = lp3974_ldo3_consumer,
  198. };
  199. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  200. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  201. };
  202. static struct regulator_init_data lp3974_ldo4_data = {
  203. .constraints = {
  204. .name = "VADC_3.3V",
  205. .min_uV = 3300000,
  206. .max_uV = 3300000,
  207. .apply_uV = 1,
  208. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  209. .state_mem = {
  210. .disabled = 1,
  211. },
  212. },
  213. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  214. .consumer_supplies = lp3974_ldo4_consumer,
  215. };
  216. static struct regulator_init_data lp3974_ldo5_data = {
  217. .constraints = {
  218. .name = "VTF_2.8V",
  219. .min_uV = 2800000,
  220. .max_uV = 2800000,
  221. .apply_uV = 1,
  222. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  223. .state_mem = {
  224. .disabled = 1,
  225. },
  226. },
  227. };
  228. static struct regulator_init_data lp3974_ldo6_data = {
  229. .constraints = {
  230. .name = "LDO6",
  231. .min_uV = 2000000,
  232. .max_uV = 2000000,
  233. .apply_uV = 1,
  234. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  235. .state_mem = {
  236. .disabled = 1,
  237. },
  238. },
  239. };
  240. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  241. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  242. };
  243. static struct regulator_init_data lp3974_ldo7_data = {
  244. .constraints = {
  245. .name = "VLCD+VMIPI_1.8V",
  246. .min_uV = 1800000,
  247. .max_uV = 1800000,
  248. .apply_uV = 1,
  249. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  250. .state_mem = {
  251. .disabled = 1,
  252. },
  253. },
  254. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  255. .consumer_supplies = lp3974_ldo7_consumer,
  256. };
  257. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  258. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  259. };
  260. static struct regulator_init_data lp3974_ldo8_data = {
  261. .constraints = {
  262. .name = "VUSB+VDAC_3.3V",
  263. .min_uV = 3300000,
  264. .max_uV = 3300000,
  265. .apply_uV = 1,
  266. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  267. .state_mem = {
  268. .disabled = 1,
  269. },
  270. },
  271. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  272. .consumer_supplies = lp3974_ldo8_consumer,
  273. };
  274. static struct regulator_init_data lp3974_ldo9_data = {
  275. .constraints = {
  276. .name = "VCC_2.8V",
  277. .min_uV = 2800000,
  278. .max_uV = 2800000,
  279. .apply_uV = 1,
  280. .always_on = 1,
  281. .state_mem = {
  282. .enabled = 1,
  283. },
  284. },
  285. };
  286. static struct regulator_init_data lp3974_ldo10_data = {
  287. .constraints = {
  288. .name = "VPLL_1.1V",
  289. .min_uV = 1100000,
  290. .max_uV = 1100000,
  291. .boot_on = 1,
  292. .apply_uV = 1,
  293. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  294. .state_mem = {
  295. .disabled = 1,
  296. },
  297. },
  298. };
  299. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  300. REGULATOR_SUPPLY("dig_28", "0-001f");
  301. static struct regulator_init_data lp3974_ldo11_data = {
  302. .constraints = {
  303. .name = "CAM_AF_3.3V",
  304. .min_uV = 3300000,
  305. .max_uV = 3300000,
  306. .apply_uV = 1,
  307. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  308. .state_mem = {
  309. .disabled = 1,
  310. },
  311. },
  312. .num_consumer_supplies = 1,
  313. .consumer_supplies = &lp3974_ldo11_consumer,
  314. };
  315. static struct regulator_init_data lp3974_ldo12_data = {
  316. .constraints = {
  317. .name = "PS_2.8V",
  318. .min_uV = 2800000,
  319. .max_uV = 2800000,
  320. .apply_uV = 1,
  321. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  322. .state_mem = {
  323. .disabled = 1,
  324. },
  325. },
  326. };
  327. static struct regulator_init_data lp3974_ldo13_data = {
  328. .constraints = {
  329. .name = "VHIC_1.2V",
  330. .min_uV = 1200000,
  331. .max_uV = 1200000,
  332. .apply_uV = 1,
  333. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  334. .state_mem = {
  335. .disabled = 1,
  336. },
  337. },
  338. };
  339. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  340. REGULATOR_SUPPLY("dig_18", "0-001f");
  341. static struct regulator_init_data lp3974_ldo14_data = {
  342. .constraints = {
  343. .name = "CAM_I_HOST_1.8V",
  344. .min_uV = 1800000,
  345. .max_uV = 1800000,
  346. .apply_uV = 1,
  347. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  348. .state_mem = {
  349. .disabled = 1,
  350. },
  351. },
  352. .num_consumer_supplies = 1,
  353. .consumer_supplies = &lp3974_ldo14_consumer,
  354. };
  355. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  356. REGULATOR_SUPPLY("dig_12", "0-001f");
  357. static struct regulator_init_data lp3974_ldo15_data = {
  358. .constraints = {
  359. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  360. .min_uV = 1200000,
  361. .max_uV = 1200000,
  362. .apply_uV = 1,
  363. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  364. .state_mem = {
  365. .disabled = 1,
  366. },
  367. },
  368. .num_consumer_supplies = 1,
  369. .consumer_supplies = &lp3974_ldo15_consumer,
  370. };
  371. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  372. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  373. };
  374. static struct regulator_init_data lp3974_ldo16_data = {
  375. .constraints = {
  376. .name = "CAM_S_ANA_2.8V",
  377. .min_uV = 2800000,
  378. .max_uV = 2800000,
  379. .apply_uV = 1,
  380. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  381. .state_mem = {
  382. .disabled = 1,
  383. },
  384. },
  385. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  386. .consumer_supplies = lp3974_ldo16_consumer,
  387. };
  388. static struct regulator_init_data lp3974_ldo17_data = {
  389. .constraints = {
  390. .name = "VCC_3.0V_LCD",
  391. .min_uV = 3000000,
  392. .max_uV = 3000000,
  393. .apply_uV = 1,
  394. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  395. .boot_on = 1,
  396. .state_mem = {
  397. .disabled = 1,
  398. },
  399. },
  400. };
  401. static struct regulator_init_data lp3974_32khz_ap_data = {
  402. .constraints = {
  403. .name = "32KHz AP",
  404. .always_on = 1,
  405. .state_mem = {
  406. .enabled = 1,
  407. },
  408. },
  409. };
  410. static struct regulator_init_data lp3974_32khz_cp_data = {
  411. .constraints = {
  412. .name = "32KHz CP",
  413. .state_mem = {
  414. .disabled = 1,
  415. },
  416. },
  417. };
  418. static struct regulator_init_data lp3974_vichg_data = {
  419. .constraints = {
  420. .name = "VICHG",
  421. .state_mem = {
  422. .disabled = 1,
  423. },
  424. },
  425. };
  426. static struct regulator_init_data lp3974_esafeout1_data = {
  427. .constraints = {
  428. .name = "SAFEOUT1",
  429. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  430. .state_mem = {
  431. .enabled = 1,
  432. },
  433. },
  434. };
  435. static struct regulator_init_data lp3974_esafeout2_data = {
  436. .constraints = {
  437. .name = "SAFEOUT2",
  438. .boot_on = 1,
  439. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  440. .state_mem = {
  441. .enabled = 1,
  442. },
  443. },
  444. };
  445. static struct max8998_regulator_data lp3974_regulators[] = {
  446. { MAX8998_LDO2, &lp3974_ldo2_data },
  447. { MAX8998_LDO3, &lp3974_ldo3_data },
  448. { MAX8998_LDO4, &lp3974_ldo4_data },
  449. { MAX8998_LDO5, &lp3974_ldo5_data },
  450. { MAX8998_LDO6, &lp3974_ldo6_data },
  451. { MAX8998_LDO7, &lp3974_ldo7_data },
  452. { MAX8998_LDO8, &lp3974_ldo8_data },
  453. { MAX8998_LDO9, &lp3974_ldo9_data },
  454. { MAX8998_LDO10, &lp3974_ldo10_data },
  455. { MAX8998_LDO11, &lp3974_ldo11_data },
  456. { MAX8998_LDO12, &lp3974_ldo12_data },
  457. { MAX8998_LDO13, &lp3974_ldo13_data },
  458. { MAX8998_LDO14, &lp3974_ldo14_data },
  459. { MAX8998_LDO15, &lp3974_ldo15_data },
  460. { MAX8998_LDO16, &lp3974_ldo16_data },
  461. { MAX8998_LDO17, &lp3974_ldo17_data },
  462. { MAX8998_BUCK1, &lp3974_buck1_data },
  463. { MAX8998_BUCK2, &lp3974_buck2_data },
  464. { MAX8998_BUCK3, &lp3974_buck3_data },
  465. { MAX8998_BUCK4, &lp3974_buck4_data },
  466. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  467. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  468. { MAX8998_ENVICHG, &lp3974_vichg_data },
  469. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  470. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  471. };
  472. static struct max8998_platform_data universal_lp3974_pdata = {
  473. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  474. .regulators = lp3974_regulators,
  475. .buck1_voltage1 = 1100000, /* INT */
  476. .buck1_voltage2 = 1000000,
  477. .buck1_voltage3 = 1100000,
  478. .buck1_voltage4 = 1000000,
  479. .buck1_set1 = EXYNOS4_GPX0(5),
  480. .buck1_set2 = EXYNOS4_GPX0(6),
  481. .buck2_voltage1 = 1200000, /* G3D */
  482. .buck2_voltage2 = 1100000,
  483. .buck1_default_idx = 0,
  484. .buck2_set3 = EXYNOS4_GPE2(0),
  485. .buck2_default_idx = 0,
  486. .wakeup = true,
  487. };
  488. enum fixed_regulator_id {
  489. FIXED_REG_ID_MMC0,
  490. FIXED_REG_ID_HDMI_5V,
  491. FIXED_REG_ID_CAM_S_IF,
  492. FIXED_REG_ID_CAM_I_CORE,
  493. FIXED_REG_ID_CAM_VT_DIO,
  494. };
  495. static struct regulator_consumer_supply hdmi_fixed_consumer =
  496. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  497. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  498. .constraints = {
  499. .name = "HDMI_5V",
  500. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  501. },
  502. .num_consumer_supplies = 1,
  503. .consumer_supplies = &hdmi_fixed_consumer,
  504. };
  505. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  506. .supply_name = "HDMI_EN1",
  507. .microvolts = 5000000,
  508. .gpio = EXYNOS4_GPE0(1),
  509. .enable_high = true,
  510. .init_data = &hdmi_fixed_voltage_init_data,
  511. };
  512. static struct platform_device hdmi_fixed_voltage = {
  513. .name = "reg-fixed-voltage",
  514. .id = FIXED_REG_ID_HDMI_5V,
  515. .dev = {
  516. .platform_data = &hdmi_fixed_voltage_config,
  517. },
  518. };
  519. /* GPIO I2C 5 (PMIC) */
  520. static struct i2c_board_info i2c5_devs[] __initdata = {
  521. {
  522. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  523. .platform_data = &universal_max8952_pdata,
  524. }, {
  525. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  526. .platform_data = &universal_lp3974_pdata,
  527. },
  528. };
  529. /* I2C3 (TSP) */
  530. static struct mxt_platform_data qt602240_platform_data = {
  531. .x_line = 19,
  532. .y_line = 11,
  533. .x_size = 800,
  534. .y_size = 480,
  535. .blen = 0x11,
  536. .threshold = 0x28,
  537. .voltage = 2800000, /* 2.8V */
  538. .orient = MXT_DIAGONAL,
  539. .irqflags = IRQF_TRIGGER_FALLING,
  540. };
  541. static struct i2c_board_info i2c3_devs[] __initdata = {
  542. {
  543. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  544. .platform_data = &qt602240_platform_data,
  545. },
  546. };
  547. static void __init universal_tsp_init(void)
  548. {
  549. int gpio;
  550. /* TSP_LDO_ON: XMDMADDR_11 */
  551. gpio = EXYNOS4_GPE2(3);
  552. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  553. gpio_export(gpio, 0);
  554. /* TSP_INT: XMDMADDR_7 */
  555. gpio = EXYNOS4_GPE1(7);
  556. gpio_request(gpio, "TSP_INT");
  557. s5p_register_gpio_interrupt(gpio);
  558. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  559. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  560. i2c3_devs[0].irq = gpio_to_irq(gpio);
  561. }
  562. /* GPIO I2C 12 (3 Touchkey) */
  563. static uint32_t touchkey_keymap[] = {
  564. /* MCS_KEY_MAP(value, keycode) */
  565. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  566. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  567. };
  568. static struct mcs_platform_data touchkey_data = {
  569. .keymap = touchkey_keymap,
  570. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  571. .key_maxval = 2,
  572. };
  573. /* GPIO I2C 3_TOUCH 2.8V */
  574. #define I2C_GPIO_BUS_12 12
  575. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  576. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  577. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  578. };
  579. static struct platform_device i2c_gpio12 = {
  580. .name = "i2c-gpio",
  581. .id = I2C_GPIO_BUS_12,
  582. .dev = {
  583. .platform_data = &i2c_gpio12_data,
  584. },
  585. };
  586. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  587. {
  588. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  589. .platform_data = &touchkey_data,
  590. },
  591. };
  592. static void __init universal_touchkey_init(void)
  593. {
  594. int gpio;
  595. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  596. gpio_request(gpio, "3_TOUCH_INT");
  597. s5p_register_gpio_interrupt(gpio);
  598. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  599. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  600. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  601. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  602. }
  603. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  604. .frequency = 300 * 1000,
  605. .sda_delay = 200,
  606. };
  607. /* GPIO KEYS */
  608. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  609. {
  610. .code = KEY_VOLUMEUP,
  611. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  612. .desc = "gpio-keys: KEY_VOLUMEUP",
  613. .type = EV_KEY,
  614. .active_low = 1,
  615. .debounce_interval = 1,
  616. }, {
  617. .code = KEY_VOLUMEDOWN,
  618. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  619. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  620. .type = EV_KEY,
  621. .active_low = 1,
  622. .debounce_interval = 1,
  623. }, {
  624. .code = KEY_CONFIG,
  625. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  626. .desc = "gpio-keys: KEY_CONFIG",
  627. .type = EV_KEY,
  628. .active_low = 1,
  629. .debounce_interval = 1,
  630. }, {
  631. .code = KEY_CAMERA,
  632. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  633. .desc = "gpio-keys: KEY_CAMERA",
  634. .type = EV_KEY,
  635. .active_low = 1,
  636. .debounce_interval = 1,
  637. }, {
  638. .code = KEY_OK,
  639. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  640. .desc = "gpio-keys: KEY_OK",
  641. .type = EV_KEY,
  642. .active_low = 1,
  643. .debounce_interval = 1,
  644. },
  645. };
  646. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  647. .buttons = universal_gpio_keys_tables,
  648. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  649. };
  650. static struct platform_device universal_gpio_keys = {
  651. .name = "gpio-keys",
  652. .dev = {
  653. .platform_data = &universal_gpio_keys_data,
  654. },
  655. };
  656. /* eMMC */
  657. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  658. .max_width = 8,
  659. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  660. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  661. MMC_CAP_DISABLE),
  662. .cd_type = S3C_SDHCI_CD_PERMANENT,
  663. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  664. };
  665. static struct regulator_consumer_supply mmc0_supplies[] = {
  666. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  667. };
  668. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  669. .constraints = {
  670. .name = "VMEM_VDD_2.8V",
  671. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  672. },
  673. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  674. .consumer_supplies = mmc0_supplies,
  675. };
  676. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  677. .supply_name = "MASSMEMORY_EN",
  678. .microvolts = 2800000,
  679. .gpio = EXYNOS4_GPE1(3),
  680. .enable_high = true,
  681. .init_data = &mmc0_fixed_voltage_init_data,
  682. };
  683. static struct platform_device mmc0_fixed_voltage = {
  684. .name = "reg-fixed-voltage",
  685. .id = FIXED_REG_ID_MMC0,
  686. .dev = {
  687. .platform_data = &mmc0_fixed_voltage_config,
  688. },
  689. };
  690. /* SD */
  691. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  692. .max_width = 4,
  693. .host_caps = MMC_CAP_4_BIT_DATA |
  694. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  695. MMC_CAP_DISABLE,
  696. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  697. .ext_cd_gpio_invert = 1,
  698. .cd_type = S3C_SDHCI_CD_GPIO,
  699. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  700. };
  701. /* WiFi */
  702. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  703. .max_width = 4,
  704. .host_caps = MMC_CAP_4_BIT_DATA |
  705. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  706. MMC_CAP_DISABLE,
  707. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  708. };
  709. static void __init universal_sdhci_init(void)
  710. {
  711. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  712. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  713. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  714. }
  715. /* I2C1 */
  716. static struct i2c_board_info i2c1_devs[] __initdata = {
  717. /* Gyro, To be updated */
  718. };
  719. /* Frame Buffer */
  720. static struct s3c_fb_pd_win universal_fb_win0 = {
  721. .win_mode = {
  722. .left_margin = 16,
  723. .right_margin = 16,
  724. .upper_margin = 2,
  725. .lower_margin = 28,
  726. .hsync_len = 2,
  727. .vsync_len = 1,
  728. .xres = 480,
  729. .yres = 800,
  730. .refresh = 55,
  731. },
  732. .max_bpp = 32,
  733. .default_bpp = 16,
  734. };
  735. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  736. .win[0] = &universal_fb_win0,
  737. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  738. VIDCON0_CLKSEL_LCD,
  739. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  740. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  741. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  742. };
  743. static struct regulator_consumer_supply cam_i_core_supply =
  744. REGULATOR_SUPPLY("core", "0-001f");
  745. static struct regulator_init_data cam_i_core_reg_init_data = {
  746. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  747. .num_consumer_supplies = 1,
  748. .consumer_supplies = &cam_i_core_supply,
  749. };
  750. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  751. .supply_name = "CAM_I_CORE_1.2V",
  752. .microvolts = 1200000,
  753. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  754. .enable_high = 1,
  755. .init_data = &cam_i_core_reg_init_data,
  756. };
  757. static struct platform_device cam_i_core_fixed_reg_dev = {
  758. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  759. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  760. };
  761. static struct regulator_consumer_supply cam_s_if_supply =
  762. REGULATOR_SUPPLY("d_sensor", "0-001f");
  763. static struct regulator_init_data cam_s_if_reg_init_data = {
  764. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  765. .num_consumer_supplies = 1,
  766. .consumer_supplies = &cam_s_if_supply,
  767. };
  768. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  769. .supply_name = "CAM_S_IF_1.8V",
  770. .microvolts = 1800000,
  771. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  772. .enable_high = 1,
  773. .init_data = &cam_s_if_reg_init_data,
  774. };
  775. static struct platform_device cam_s_if_fixed_reg_dev = {
  776. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  777. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  778. };
  779. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  780. .clk_rate = 166000000UL,
  781. .lanes = 2,
  782. .alignment = 32,
  783. .hs_settle = 12,
  784. .phy_enable = s5p_csis_phy_enable,
  785. };
  786. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  787. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  788. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  789. static int m5mols_set_power(struct device *dev, int on)
  790. {
  791. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  792. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  793. return 0;
  794. }
  795. static struct m5mols_platform_data m5mols_platdata = {
  796. .gpio_reset = GPIO_CAM_MEGA_nRST,
  797. .reset_polarity = 0,
  798. .set_power = m5mols_set_power,
  799. };
  800. static struct i2c_board_info m5mols_board_info = {
  801. I2C_BOARD_INFO("M5MOLS", 0x1F),
  802. .platform_data = &m5mols_platdata,
  803. };
  804. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  805. {
  806. .mux_id = 0,
  807. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  808. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  809. .bus_type = FIMC_MIPI_CSI2,
  810. .board_info = &m5mols_board_info,
  811. .i2c_bus_num = 0,
  812. .clk_frequency = 24000000UL,
  813. .csi_data_align = 32,
  814. },
  815. };
  816. static struct s5p_platform_fimc fimc_md_platdata = {
  817. .isp_info = universal_camera_sensors,
  818. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  819. };
  820. static struct gpio universal_camera_gpios[] = {
  821. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  822. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  823. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  824. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  825. };
  826. static void universal_camera_init(void)
  827. {
  828. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  829. &s5p_device_mipi_csis0);
  830. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  831. &s5p_device_fimc_md);
  832. if (gpio_request_array(universal_camera_gpios,
  833. ARRAY_SIZE(universal_camera_gpios))) {
  834. pr_err("%s: GPIO request failed\n", __func__);
  835. return;
  836. }
  837. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  838. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  839. else
  840. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  841. /* Free GPIOs controlled directly by the sensor drivers. */
  842. gpio_free(GPIO_CAM_MEGA_nRST);
  843. gpio_free(GPIO_CAM_8M_ISP_INT);
  844. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  845. pr_err("Camera port A setup failed\n");
  846. }
  847. static struct platform_device *universal_devices[] __initdata = {
  848. /* Samsung Platform Devices */
  849. &s5p_device_mipi_csis0,
  850. &s5p_device_fimc0,
  851. &s5p_device_fimc1,
  852. &s5p_device_fimc2,
  853. &s5p_device_fimc3,
  854. &mmc0_fixed_voltage,
  855. &s3c_device_hsmmc0,
  856. &s3c_device_hsmmc2,
  857. &s3c_device_hsmmc3,
  858. &s3c_device_i2c0,
  859. &s3c_device_i2c3,
  860. &s3c_device_i2c5,
  861. &s5p_device_i2c_hdmiphy,
  862. &hdmi_fixed_voltage,
  863. &s5p_device_hdmi,
  864. &s5p_device_sdo,
  865. &s5p_device_mixer,
  866. /* Universal Devices */
  867. &i2c_gpio12,
  868. &universal_gpio_keys,
  869. &s5p_device_onenand,
  870. &s5p_device_fimd0,
  871. &s5p_device_mfc,
  872. &s5p_device_mfc_l,
  873. &s5p_device_mfc_r,
  874. &cam_i_core_fixed_reg_dev,
  875. &cam_s_if_fixed_reg_dev,
  876. &s5p_device_fimc_md,
  877. };
  878. static void __init universal_map_io(void)
  879. {
  880. exynos_init_io(NULL, 0);
  881. s3c24xx_init_clocks(24000000);
  882. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  883. }
  884. void s5p_tv_setup(void)
  885. {
  886. /* direct HPD to HDMI chip */
  887. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  888. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  889. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  890. }
  891. static void __init universal_reserve(void)
  892. {
  893. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  894. }
  895. static void __init universal_machine_init(void)
  896. {
  897. universal_sdhci_init();
  898. s5p_tv_setup();
  899. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  900. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  901. universal_tsp_init();
  902. s3c_i2c3_set_platdata(NULL);
  903. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  904. s3c_i2c5_set_platdata(NULL);
  905. s5p_i2c_hdmiphy_set_platdata(NULL);
  906. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  907. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  908. universal_touchkey_init();
  909. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  910. ARRAY_SIZE(i2c_gpio12_devs));
  911. universal_camera_init();
  912. /* Last */
  913. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  914. }
  915. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  916. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  917. .atag_offset = 0x100,
  918. .init_irq = exynos4_init_irq,
  919. .map_io = universal_map_io,
  920. .handle_irq = gic_handle_irq,
  921. .init_machine = universal_machine_init,
  922. .timer = &exynos4_timer,
  923. .reserve = &universal_reserve,
  924. .restart = exynos4_restart,
  925. MACHINE_END