mach-origen.c 17 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-origen.c
  2. *
  3. * Copyright (c) 2011 Insignal Co., Ltd.
  4. * http://www.insignal.co.kr/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/gpio.h>
  12. #include <linux/mmc/host.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/input.h>
  16. #include <linux/pwm_backlight.h>
  17. #include <linux/gpio_keys.h>
  18. #include <linux/i2c.h>
  19. #include <linux/regulator/machine.h>
  20. #include <linux/mfd/max8997.h>
  21. #include <linux/lcd.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/hardware/gic.h>
  24. #include <asm/mach-types.h>
  25. #include <video/platform_lcd.h>
  26. #include <plat/regs-serial.h>
  27. #include <plat/regs-fb-v4.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/sdhci.h>
  31. #include <plat/iic.h>
  32. #include <plat/ehci.h>
  33. #include <plat/clock.h>
  34. #include <plat/gpio-cfg.h>
  35. #include <plat/backlight.h>
  36. #include <plat/pd.h>
  37. #include <plat/fb.h>
  38. #include <plat/mfc.h>
  39. #include <mach/ohci.h>
  40. #include <mach/map.h>
  41. #include "common.h"
  42. /* Following are default values for UCON, ULCON and UFCON UART registers */
  43. #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  44. S3C2410_UCON_RXILEVEL | \
  45. S3C2410_UCON_TXIRQMODE | \
  46. S3C2410_UCON_RXIRQMODE | \
  47. S3C2410_UCON_RXFIFO_TOI | \
  48. S3C2443_UCON_RXERR_IRQEN)
  49. #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
  50. #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  51. S5PV210_UFCON_TXTRIG4 | \
  52. S5PV210_UFCON_RXTRIG4)
  53. static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
  54. [0] = {
  55. .hwport = 0,
  56. .flags = 0,
  57. .ucon = ORIGEN_UCON_DEFAULT,
  58. .ulcon = ORIGEN_ULCON_DEFAULT,
  59. .ufcon = ORIGEN_UFCON_DEFAULT,
  60. },
  61. [1] = {
  62. .hwport = 1,
  63. .flags = 0,
  64. .ucon = ORIGEN_UCON_DEFAULT,
  65. .ulcon = ORIGEN_ULCON_DEFAULT,
  66. .ufcon = ORIGEN_UFCON_DEFAULT,
  67. },
  68. [2] = {
  69. .hwport = 2,
  70. .flags = 0,
  71. .ucon = ORIGEN_UCON_DEFAULT,
  72. .ulcon = ORIGEN_ULCON_DEFAULT,
  73. .ufcon = ORIGEN_UFCON_DEFAULT,
  74. },
  75. [3] = {
  76. .hwport = 3,
  77. .flags = 0,
  78. .ucon = ORIGEN_UCON_DEFAULT,
  79. .ulcon = ORIGEN_ULCON_DEFAULT,
  80. .ufcon = ORIGEN_UFCON_DEFAULT,
  81. },
  82. };
  83. static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
  84. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
  85. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
  86. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
  87. };
  88. static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
  89. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
  90. };
  91. static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
  92. REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
  93. };
  94. static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
  95. REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
  96. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
  97. };
  98. static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
  99. REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  100. };
  101. static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
  102. REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
  103. };
  104. static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
  105. REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  106. };
  107. static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
  108. REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
  109. };
  110. static struct regulator_consumer_supply __initdata buck1_consumer[] = {
  111. REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
  112. };
  113. static struct regulator_consumer_supply __initdata buck2_consumer[] = {
  114. REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
  115. };
  116. static struct regulator_consumer_supply __initdata buck3_consumer[] = {
  117. REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
  118. };
  119. static struct regulator_consumer_supply __initdata buck7_consumer[] = {
  120. REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
  121. };
  122. static struct regulator_init_data __initdata max8997_ldo1_data = {
  123. .constraints = {
  124. .name = "VDD_ABB_3.3V",
  125. .min_uV = 3300000,
  126. .max_uV = 3300000,
  127. .apply_uV = 1,
  128. .state_mem = {
  129. .disabled = 1,
  130. },
  131. },
  132. };
  133. static struct regulator_init_data __initdata max8997_ldo2_data = {
  134. .constraints = {
  135. .name = "VDD_ALIVE_1.1V",
  136. .min_uV = 1100000,
  137. .max_uV = 1100000,
  138. .apply_uV = 1,
  139. .always_on = 1,
  140. .state_mem = {
  141. .enabled = 1,
  142. },
  143. },
  144. };
  145. static struct regulator_init_data __initdata max8997_ldo3_data = {
  146. .constraints = {
  147. .name = "VMIPI_1.1V",
  148. .min_uV = 1100000,
  149. .max_uV = 1100000,
  150. .apply_uV = 1,
  151. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  152. .state_mem = {
  153. .disabled = 1,
  154. },
  155. },
  156. .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
  157. .consumer_supplies = ldo3_consumer,
  158. };
  159. static struct regulator_init_data __initdata max8997_ldo4_data = {
  160. .constraints = {
  161. .name = "VDD_RTC_1.8V",
  162. .min_uV = 1800000,
  163. .max_uV = 1800000,
  164. .apply_uV = 1,
  165. .always_on = 1,
  166. .state_mem = {
  167. .disabled = 1,
  168. },
  169. },
  170. };
  171. static struct regulator_init_data __initdata max8997_ldo6_data = {
  172. .constraints = {
  173. .name = "VMIPI_1.8V",
  174. .min_uV = 1800000,
  175. .max_uV = 1800000,
  176. .apply_uV = 1,
  177. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  178. .state_mem = {
  179. .disabled = 1,
  180. },
  181. },
  182. .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
  183. .consumer_supplies = ldo6_consumer,
  184. };
  185. static struct regulator_init_data __initdata max8997_ldo7_data = {
  186. .constraints = {
  187. .name = "VDD_AUD_1.8V",
  188. .min_uV = 1800000,
  189. .max_uV = 1800000,
  190. .apply_uV = 1,
  191. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  192. .state_mem = {
  193. .disabled = 1,
  194. },
  195. },
  196. .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
  197. .consumer_supplies = ldo7_consumer,
  198. };
  199. static struct regulator_init_data __initdata max8997_ldo8_data = {
  200. .constraints = {
  201. .name = "VADC_3.3V",
  202. .min_uV = 3300000,
  203. .max_uV = 3300000,
  204. .apply_uV = 1,
  205. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  206. .state_mem = {
  207. .disabled = 1,
  208. },
  209. },
  210. .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
  211. .consumer_supplies = ldo8_consumer,
  212. };
  213. static struct regulator_init_data __initdata max8997_ldo9_data = {
  214. .constraints = {
  215. .name = "DVDD_SWB_2.8V",
  216. .min_uV = 2800000,
  217. .max_uV = 2800000,
  218. .apply_uV = 1,
  219. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  220. .state_mem = {
  221. .disabled = 1,
  222. },
  223. },
  224. .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
  225. .consumer_supplies = ldo9_consumer,
  226. };
  227. static struct regulator_init_data __initdata max8997_ldo10_data = {
  228. .constraints = {
  229. .name = "VDD_PLL_1.1V",
  230. .min_uV = 1100000,
  231. .max_uV = 1100000,
  232. .apply_uV = 1,
  233. .always_on = 1,
  234. .state_mem = {
  235. .disabled = 1,
  236. },
  237. },
  238. };
  239. static struct regulator_init_data __initdata max8997_ldo11_data = {
  240. .constraints = {
  241. .name = "VDD_AUD_3V",
  242. .min_uV = 3000000,
  243. .max_uV = 3000000,
  244. .apply_uV = 1,
  245. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  246. .state_mem = {
  247. .disabled = 1,
  248. },
  249. },
  250. .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
  251. .consumer_supplies = ldo11_consumer,
  252. };
  253. static struct regulator_init_data __initdata max8997_ldo14_data = {
  254. .constraints = {
  255. .name = "AVDD18_SWB_1.8V",
  256. .min_uV = 1800000,
  257. .max_uV = 1800000,
  258. .apply_uV = 1,
  259. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  260. .state_mem = {
  261. .disabled = 1,
  262. },
  263. },
  264. .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
  265. .consumer_supplies = ldo14_consumer,
  266. };
  267. static struct regulator_init_data __initdata max8997_ldo17_data = {
  268. .constraints = {
  269. .name = "VDD_SWB_3.3V",
  270. .min_uV = 3300000,
  271. .max_uV = 3300000,
  272. .apply_uV = 1,
  273. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  274. .state_mem = {
  275. .disabled = 1,
  276. },
  277. },
  278. .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
  279. .consumer_supplies = ldo17_consumer,
  280. };
  281. static struct regulator_init_data __initdata max8997_ldo21_data = {
  282. .constraints = {
  283. .name = "VDD_MIF_1.2V",
  284. .min_uV = 1200000,
  285. .max_uV = 1200000,
  286. .apply_uV = 1,
  287. .always_on = 1,
  288. .state_mem = {
  289. .disabled = 1,
  290. },
  291. },
  292. };
  293. static struct regulator_init_data __initdata max8997_buck1_data = {
  294. .constraints = {
  295. .name = "VDD_ARM_1.2V",
  296. .min_uV = 950000,
  297. .max_uV = 1350000,
  298. .always_on = 1,
  299. .boot_on = 1,
  300. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  301. .state_mem = {
  302. .disabled = 1,
  303. },
  304. },
  305. .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
  306. .consumer_supplies = buck1_consumer,
  307. };
  308. static struct regulator_init_data __initdata max8997_buck2_data = {
  309. .constraints = {
  310. .name = "VDD_INT_1.1V",
  311. .min_uV = 900000,
  312. .max_uV = 1100000,
  313. .always_on = 1,
  314. .boot_on = 1,
  315. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  316. .state_mem = {
  317. .disabled = 1,
  318. },
  319. },
  320. .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
  321. .consumer_supplies = buck2_consumer,
  322. };
  323. static struct regulator_init_data __initdata max8997_buck3_data = {
  324. .constraints = {
  325. .name = "VDD_G3D_1.1V",
  326. .min_uV = 900000,
  327. .max_uV = 1100000,
  328. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  329. REGULATOR_CHANGE_STATUS,
  330. .state_mem = {
  331. .disabled = 1,
  332. },
  333. },
  334. .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
  335. .consumer_supplies = buck3_consumer,
  336. };
  337. static struct regulator_init_data __initdata max8997_buck5_data = {
  338. .constraints = {
  339. .name = "VDDQ_M1M2_1.2V",
  340. .min_uV = 1200000,
  341. .max_uV = 1200000,
  342. .apply_uV = 1,
  343. .always_on = 1,
  344. .state_mem = {
  345. .disabled = 1,
  346. },
  347. },
  348. };
  349. static struct regulator_init_data __initdata max8997_buck7_data = {
  350. .constraints = {
  351. .name = "VDD_LCD_3.3V",
  352. .min_uV = 3300000,
  353. .max_uV = 3300000,
  354. .boot_on = 1,
  355. .apply_uV = 1,
  356. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  357. .state_mem = {
  358. .disabled = 1
  359. },
  360. },
  361. .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
  362. .consumer_supplies = buck7_consumer,
  363. };
  364. static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
  365. { MAX8997_LDO1, &max8997_ldo1_data },
  366. { MAX8997_LDO2, &max8997_ldo2_data },
  367. { MAX8997_LDO3, &max8997_ldo3_data },
  368. { MAX8997_LDO4, &max8997_ldo4_data },
  369. { MAX8997_LDO6, &max8997_ldo6_data },
  370. { MAX8997_LDO7, &max8997_ldo7_data },
  371. { MAX8997_LDO8, &max8997_ldo8_data },
  372. { MAX8997_LDO9, &max8997_ldo9_data },
  373. { MAX8997_LDO10, &max8997_ldo10_data },
  374. { MAX8997_LDO11, &max8997_ldo11_data },
  375. { MAX8997_LDO14, &max8997_ldo14_data },
  376. { MAX8997_LDO17, &max8997_ldo17_data },
  377. { MAX8997_LDO21, &max8997_ldo21_data },
  378. { MAX8997_BUCK1, &max8997_buck1_data },
  379. { MAX8997_BUCK2, &max8997_buck2_data },
  380. { MAX8997_BUCK3, &max8997_buck3_data },
  381. { MAX8997_BUCK5, &max8997_buck5_data },
  382. { MAX8997_BUCK7, &max8997_buck7_data },
  383. };
  384. struct max8997_platform_data __initdata origen_max8997_pdata = {
  385. .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
  386. .regulators = origen_max8997_regulators,
  387. .wakeup = true,
  388. .buck1_gpiodvs = false,
  389. .buck2_gpiodvs = false,
  390. .buck5_gpiodvs = false,
  391. .irq_base = IRQ_GPIO_END + 1,
  392. .ignore_gpiodvs_side_effect = true,
  393. .buck125_default_idx = 0x0,
  394. .buck125_gpios[0] = EXYNOS4_GPX0(0),
  395. .buck125_gpios[1] = EXYNOS4_GPX0(1),
  396. .buck125_gpios[2] = EXYNOS4_GPX0(2),
  397. .buck1_voltage[0] = 1350000,
  398. .buck1_voltage[1] = 1300000,
  399. .buck1_voltage[2] = 1250000,
  400. .buck1_voltage[3] = 1200000,
  401. .buck1_voltage[4] = 1150000,
  402. .buck1_voltage[5] = 1100000,
  403. .buck1_voltage[6] = 1000000,
  404. .buck1_voltage[7] = 950000,
  405. .buck2_voltage[0] = 1100000,
  406. .buck2_voltage[1] = 1100000,
  407. .buck2_voltage[2] = 1100000,
  408. .buck2_voltage[3] = 1100000,
  409. .buck2_voltage[4] = 1000000,
  410. .buck2_voltage[5] = 1000000,
  411. .buck2_voltage[6] = 1000000,
  412. .buck2_voltage[7] = 1000000,
  413. .buck5_voltage[0] = 1200000,
  414. .buck5_voltage[1] = 1200000,
  415. .buck5_voltage[2] = 1200000,
  416. .buck5_voltage[3] = 1200000,
  417. .buck5_voltage[4] = 1200000,
  418. .buck5_voltage[5] = 1200000,
  419. .buck5_voltage[6] = 1200000,
  420. .buck5_voltage[7] = 1200000,
  421. };
  422. /* I2C0 */
  423. static struct i2c_board_info i2c0_devs[] __initdata = {
  424. {
  425. I2C_BOARD_INFO("max8997", (0xCC >> 1)),
  426. .platform_data = &origen_max8997_pdata,
  427. .irq = IRQ_EINT(4),
  428. },
  429. };
  430. static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
  431. .cd_type = S3C_SDHCI_CD_INTERNAL,
  432. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  433. };
  434. static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
  435. .cd_type = S3C_SDHCI_CD_INTERNAL,
  436. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  437. };
  438. /* USB EHCI */
  439. static struct s5p_ehci_platdata origen_ehci_pdata;
  440. static void __init origen_ehci_init(void)
  441. {
  442. struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
  443. s5p_ehci_set_platdata(pdata);
  444. }
  445. /* USB OHCI */
  446. static struct exynos4_ohci_platdata origen_ohci_pdata;
  447. static void __init origen_ohci_init(void)
  448. {
  449. struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
  450. exynos4_ohci_set_platdata(pdata);
  451. }
  452. static struct gpio_keys_button origen_gpio_keys_table[] = {
  453. {
  454. .code = KEY_MENU,
  455. .gpio = EXYNOS4_GPX1(5),
  456. .desc = "gpio-keys: KEY_MENU",
  457. .type = EV_KEY,
  458. .active_low = 1,
  459. .wakeup = 1,
  460. .debounce_interval = 1,
  461. }, {
  462. .code = KEY_HOME,
  463. .gpio = EXYNOS4_GPX1(6),
  464. .desc = "gpio-keys: KEY_HOME",
  465. .type = EV_KEY,
  466. .active_low = 1,
  467. .wakeup = 1,
  468. .debounce_interval = 1,
  469. }, {
  470. .code = KEY_BACK,
  471. .gpio = EXYNOS4_GPX1(7),
  472. .desc = "gpio-keys: KEY_BACK",
  473. .type = EV_KEY,
  474. .active_low = 1,
  475. .wakeup = 1,
  476. .debounce_interval = 1,
  477. }, {
  478. .code = KEY_UP,
  479. .gpio = EXYNOS4_GPX2(0),
  480. .desc = "gpio-keys: KEY_UP",
  481. .type = EV_KEY,
  482. .active_low = 1,
  483. .wakeup = 1,
  484. .debounce_interval = 1,
  485. }, {
  486. .code = KEY_DOWN,
  487. .gpio = EXYNOS4_GPX2(1),
  488. .desc = "gpio-keys: KEY_DOWN",
  489. .type = EV_KEY,
  490. .active_low = 1,
  491. .wakeup = 1,
  492. .debounce_interval = 1,
  493. },
  494. };
  495. static struct gpio_keys_platform_data origen_gpio_keys_data = {
  496. .buttons = origen_gpio_keys_table,
  497. .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
  498. };
  499. static struct platform_device origen_device_gpiokeys = {
  500. .name = "gpio-keys",
  501. .dev = {
  502. .platform_data = &origen_gpio_keys_data,
  503. },
  504. };
  505. static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
  506. {
  507. int ret;
  508. if (power)
  509. ret = gpio_request_one(EXYNOS4_GPE3(4),
  510. GPIOF_OUT_INIT_HIGH, "GPE3_4");
  511. else
  512. ret = gpio_request_one(EXYNOS4_GPE3(4),
  513. GPIOF_OUT_INIT_LOW, "GPE3_4");
  514. gpio_free(EXYNOS4_GPE3(4));
  515. if (ret)
  516. pr_err("failed to request gpio for LCD power: %d\n", ret);
  517. }
  518. static struct plat_lcd_data origen_lcd_hv070wsa_data = {
  519. .set_power = lcd_hv070wsa_set_power,
  520. };
  521. static struct platform_device origen_lcd_hv070wsa = {
  522. .name = "platform-lcd",
  523. .dev.parent = &s5p_device_fimd0.dev,
  524. .dev.platform_data = &origen_lcd_hv070wsa_data,
  525. };
  526. static struct s3c_fb_pd_win origen_fb_win0 = {
  527. .win_mode = {
  528. .left_margin = 64,
  529. .right_margin = 16,
  530. .upper_margin = 64,
  531. .lower_margin = 16,
  532. .hsync_len = 48,
  533. .vsync_len = 3,
  534. .xres = 1024,
  535. .yres = 600,
  536. },
  537. .max_bpp = 32,
  538. .default_bpp = 24,
  539. };
  540. static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
  541. .win[0] = &origen_fb_win0,
  542. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  543. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
  544. VIDCON1_INV_VCLK,
  545. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  546. };
  547. static struct platform_device *origen_devices[] __initdata = {
  548. &s3c_device_hsmmc2,
  549. &s3c_device_hsmmc0,
  550. &s3c_device_i2c0,
  551. &s3c_device_rtc,
  552. &s3c_device_wdt,
  553. &s5p_device_ehci,
  554. &s5p_device_fimc0,
  555. &s5p_device_fimc1,
  556. &s5p_device_fimc2,
  557. &s5p_device_fimc3,
  558. &s5p_device_fimd0,
  559. &s5p_device_hdmi,
  560. &s5p_device_i2c_hdmiphy,
  561. &s5p_device_mfc,
  562. &s5p_device_mfc_l,
  563. &s5p_device_mfc_r,
  564. &s5p_device_mixer,
  565. &exynos4_device_ohci,
  566. &origen_device_gpiokeys,
  567. &origen_lcd_hv070wsa,
  568. };
  569. /* LCD Backlight data */
  570. static struct samsung_bl_gpio_info origen_bl_gpio_info = {
  571. .no = EXYNOS4_GPD0(0),
  572. .func = S3C_GPIO_SFN(2),
  573. };
  574. static struct platform_pwm_backlight_data origen_bl_data = {
  575. .pwm_id = 0,
  576. .pwm_period_ns = 1000,
  577. };
  578. static void s5p_tv_setup(void)
  579. {
  580. /* Direct HPD to HDMI chip */
  581. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  582. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  583. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  584. }
  585. static void __init origen_map_io(void)
  586. {
  587. exynos_init_io(NULL, 0);
  588. s3c24xx_init_clocks(24000000);
  589. s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
  590. }
  591. static void __init origen_power_init(void)
  592. {
  593. gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
  594. s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
  595. s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
  596. }
  597. static void __init origen_reserve(void)
  598. {
  599. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  600. }
  601. static void __init origen_machine_init(void)
  602. {
  603. origen_power_init();
  604. s3c_i2c0_set_platdata(NULL);
  605. i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
  606. /*
  607. * Since sdhci instance 2 can contain a bootable media,
  608. * sdhci instance 0 is registered after instance 2.
  609. */
  610. s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
  611. s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
  612. origen_ehci_init();
  613. origen_ohci_init();
  614. clk_xusbxti.rate = 24000000;
  615. s5p_tv_setup();
  616. s5p_i2c_hdmiphy_set_platdata(NULL);
  617. s5p_fimd0_set_platdata(&origen_lcd_pdata);
  618. platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
  619. samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
  620. }
  621. MACHINE_START(ORIGEN, "ORIGEN")
  622. /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
  623. .atag_offset = 0x100,
  624. .init_irq = exynos4_init_irq,
  625. .map_io = origen_map_io,
  626. .handle_irq = gic_handle_irq,
  627. .init_machine = origen_machine_init,
  628. .timer = &exynos4_timer,
  629. .reserve = &origen_reserve,
  630. .restart = exynos4_restart,
  631. MACHINE_END