panel-lgphilips-lb035q02.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275
  1. /*
  2. * LCD panel driver for LG.Philips LB035Q02
  3. *
  4. * Author: Steve Sakoman <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/delay.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/mutex.h>
  22. #include <video/omapdss.h>
  23. struct lb035q02_data {
  24. struct mutex lock;
  25. };
  26. static struct omap_video_timings lb035q02_timings = {
  27. .x_res = 320,
  28. .y_res = 240,
  29. .pixel_clock = 6500,
  30. .hsw = 2,
  31. .hfp = 20,
  32. .hbp = 68,
  33. .vsw = 2,
  34. .vfp = 4,
  35. .vbp = 18,
  36. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  37. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  38. .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
  39. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  40. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  41. };
  42. static int lb035q02_panel_power_on(struct omap_dss_device *dssdev)
  43. {
  44. int r;
  45. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  46. return 0;
  47. omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings);
  48. r = omapdss_dpi_display_enable(dssdev);
  49. if (r)
  50. goto err0;
  51. if (dssdev->platform_enable) {
  52. r = dssdev->platform_enable(dssdev);
  53. if (r)
  54. goto err1;
  55. }
  56. return 0;
  57. err1:
  58. omapdss_dpi_display_disable(dssdev);
  59. err0:
  60. return r;
  61. }
  62. static void lb035q02_panel_power_off(struct omap_dss_device *dssdev)
  63. {
  64. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  65. return;
  66. if (dssdev->platform_disable)
  67. dssdev->platform_disable(dssdev);
  68. omapdss_dpi_display_disable(dssdev);
  69. }
  70. static int lb035q02_panel_probe(struct omap_dss_device *dssdev)
  71. {
  72. struct lb035q02_data *ld;
  73. int r;
  74. dssdev->panel.timings = lb035q02_timings;
  75. ld = kzalloc(sizeof(*ld), GFP_KERNEL);
  76. if (!ld) {
  77. r = -ENOMEM;
  78. goto err;
  79. }
  80. mutex_init(&ld->lock);
  81. dev_set_drvdata(&dssdev->dev, ld);
  82. return 0;
  83. err:
  84. return r;
  85. }
  86. static void lb035q02_panel_remove(struct omap_dss_device *dssdev)
  87. {
  88. struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev);
  89. kfree(ld);
  90. }
  91. static int lb035q02_panel_enable(struct omap_dss_device *dssdev)
  92. {
  93. struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev);
  94. int r;
  95. mutex_lock(&ld->lock);
  96. r = lb035q02_panel_power_on(dssdev);
  97. if (r)
  98. goto err;
  99. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  100. mutex_unlock(&ld->lock);
  101. return 0;
  102. err:
  103. mutex_unlock(&ld->lock);
  104. return r;
  105. }
  106. static void lb035q02_panel_disable(struct omap_dss_device *dssdev)
  107. {
  108. struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev);
  109. mutex_lock(&ld->lock);
  110. lb035q02_panel_power_off(dssdev);
  111. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  112. mutex_unlock(&ld->lock);
  113. }
  114. static int lb035q02_panel_suspend(struct omap_dss_device *dssdev)
  115. {
  116. struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev);
  117. mutex_lock(&ld->lock);
  118. lb035q02_panel_power_off(dssdev);
  119. dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
  120. mutex_unlock(&ld->lock);
  121. return 0;
  122. }
  123. static int lb035q02_panel_resume(struct omap_dss_device *dssdev)
  124. {
  125. struct lb035q02_data *ld = dev_get_drvdata(&dssdev->dev);
  126. int r;
  127. mutex_lock(&ld->lock);
  128. r = lb035q02_panel_power_on(dssdev);
  129. if (r)
  130. goto err;
  131. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  132. mutex_unlock(&ld->lock);
  133. return 0;
  134. err:
  135. mutex_unlock(&ld->lock);
  136. return r;
  137. }
  138. static struct omap_dss_driver lb035q02_driver = {
  139. .probe = lb035q02_panel_probe,
  140. .remove = lb035q02_panel_remove,
  141. .enable = lb035q02_panel_enable,
  142. .disable = lb035q02_panel_disable,
  143. .suspend = lb035q02_panel_suspend,
  144. .resume = lb035q02_panel_resume,
  145. .driver = {
  146. .name = "lgphilips_lb035q02_panel",
  147. .owner = THIS_MODULE,
  148. },
  149. };
  150. static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val)
  151. {
  152. struct spi_message msg;
  153. struct spi_transfer index_xfer = {
  154. .len = 3,
  155. .cs_change = 1,
  156. };
  157. struct spi_transfer value_xfer = {
  158. .len = 3,
  159. };
  160. u8 buffer[16];
  161. spi_message_init(&msg);
  162. /* register index */
  163. buffer[0] = 0x70;
  164. buffer[1] = 0x00;
  165. buffer[2] = reg & 0x7f;
  166. index_xfer.tx_buf = buffer;
  167. spi_message_add_tail(&index_xfer, &msg);
  168. /* register value */
  169. buffer[4] = 0x72;
  170. buffer[5] = val >> 8;
  171. buffer[6] = val;
  172. value_xfer.tx_buf = buffer + 4;
  173. spi_message_add_tail(&value_xfer, &msg);
  174. return spi_sync(spi, &msg);
  175. }
  176. static void init_lb035q02_panel(struct spi_device *spi)
  177. {
  178. /* Init sequence from page 28 of the lb035q02 spec */
  179. lb035q02_write_reg(spi, 0x01, 0x6300);
  180. lb035q02_write_reg(spi, 0x02, 0x0200);
  181. lb035q02_write_reg(spi, 0x03, 0x0177);
  182. lb035q02_write_reg(spi, 0x04, 0x04c7);
  183. lb035q02_write_reg(spi, 0x05, 0xffc0);
  184. lb035q02_write_reg(spi, 0x06, 0xe806);
  185. lb035q02_write_reg(spi, 0x0a, 0x4008);
  186. lb035q02_write_reg(spi, 0x0b, 0x0000);
  187. lb035q02_write_reg(spi, 0x0d, 0x0030);
  188. lb035q02_write_reg(spi, 0x0e, 0x2800);
  189. lb035q02_write_reg(spi, 0x0f, 0x0000);
  190. lb035q02_write_reg(spi, 0x16, 0x9f80);
  191. lb035q02_write_reg(spi, 0x17, 0x0a0f);
  192. lb035q02_write_reg(spi, 0x1e, 0x00c1);
  193. lb035q02_write_reg(spi, 0x30, 0x0300);
  194. lb035q02_write_reg(spi, 0x31, 0x0007);
  195. lb035q02_write_reg(spi, 0x32, 0x0000);
  196. lb035q02_write_reg(spi, 0x33, 0x0000);
  197. lb035q02_write_reg(spi, 0x34, 0x0707);
  198. lb035q02_write_reg(spi, 0x35, 0x0004);
  199. lb035q02_write_reg(spi, 0x36, 0x0302);
  200. lb035q02_write_reg(spi, 0x37, 0x0202);
  201. lb035q02_write_reg(spi, 0x3a, 0x0a0d);
  202. lb035q02_write_reg(spi, 0x3b, 0x0806);
  203. }
  204. static int __devinit lb035q02_panel_spi_probe(struct spi_device *spi)
  205. {
  206. init_lb035q02_panel(spi);
  207. return omap_dss_register_driver(&lb035q02_driver);
  208. }
  209. static int __devexit lb035q02_panel_spi_remove(struct spi_device *spi)
  210. {
  211. omap_dss_unregister_driver(&lb035q02_driver);
  212. return 0;
  213. }
  214. static struct spi_driver lb035q02_spi_driver = {
  215. .driver = {
  216. .name = "lgphilips_lb035q02_panel-spi",
  217. .owner = THIS_MODULE,
  218. },
  219. .probe = lb035q02_panel_spi_probe,
  220. .remove = __devexit_p(lb035q02_panel_spi_remove),
  221. };
  222. module_spi_driver(lb035q02_spi_driver);
  223. MODULE_LICENSE("GPL");