solos-pci.c 34 KB

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  1. /*
  2. * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
  3. * Traverse Technologies -- http://www.traverse.com.au/
  4. * Xrio Limited -- http://www.xrio.com/
  5. *
  6. *
  7. * Copyright © 2008 Traverse Technologies
  8. * Copyright © 2008 Intel Corporation
  9. *
  10. * Authors: Nathan Williams <nathan@traverse.com.au>
  11. * David Woodhouse <dwmw2@infradead.org>
  12. * Treker Chen <treker@xrio.com>
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License
  16. * version 2, as published by the Free Software Foundation.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. */
  23. #define DEBUG
  24. #define VERBOSE_DEBUG
  25. #include <linux/interrupt.h>
  26. #include <linux/module.h>
  27. #include <linux/kernel.h>
  28. #include <linux/errno.h>
  29. #include <linux/ioport.h>
  30. #include <linux/types.h>
  31. #include <linux/pci.h>
  32. #include <linux/atm.h>
  33. #include <linux/atmdev.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/sysfs.h>
  36. #include <linux/device.h>
  37. #include <linux/kobject.h>
  38. #include <linux/firmware.h>
  39. #include <linux/ctype.h>
  40. #include <linux/swab.h>
  41. #include <linux/slab.h>
  42. #define VERSION "0.07"
  43. #define PTAG "solos-pci"
  44. #define CONFIG_RAM_SIZE 128
  45. #define FLAGS_ADDR 0x7C
  46. #define IRQ_EN_ADDR 0x78
  47. #define FPGA_VER 0x74
  48. #define IRQ_CLEAR 0x70
  49. #define WRITE_FLASH 0x6C
  50. #define PORTS 0x68
  51. #define FLASH_BLOCK 0x64
  52. #define FLASH_BUSY 0x60
  53. #define FPGA_MODE 0x5C
  54. #define FLASH_MODE 0x58
  55. #define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
  56. #define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
  57. #define DATA_RAM_SIZE 32768
  58. #define BUF_SIZE 2048
  59. #define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
  60. #define FPGA_PAGE 528 /* FPGA flash page size*/
  61. #define SOLOS_PAGE 512 /* Solos flash page size*/
  62. #define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
  63. #define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
  64. #define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
  65. #define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
  66. #define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
  67. #define RX_DMA_SIZE 2048
  68. #define FPGA_VERSION(a,b) (((a) << 8) + (b))
  69. #define LEGACY_BUFFERS 2
  70. #define DMA_SUPPORTED 4
  71. static int reset = 0;
  72. static int atmdebug = 0;
  73. static int firmware_upgrade = 0;
  74. static int fpga_upgrade = 0;
  75. static int db_firmware_upgrade = 0;
  76. static int db_fpga_upgrade = 0;
  77. struct pkt_hdr {
  78. __le16 size;
  79. __le16 vpi;
  80. __le16 vci;
  81. __le16 type;
  82. };
  83. struct solos_skb_cb {
  84. struct atm_vcc *vcc;
  85. uint32_t dma_addr;
  86. };
  87. #define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
  88. #define PKT_DATA 0
  89. #define PKT_COMMAND 1
  90. #define PKT_POPEN 3
  91. #define PKT_PCLOSE 4
  92. #define PKT_STATUS 5
  93. struct solos_card {
  94. void __iomem *config_regs;
  95. void __iomem *buffers;
  96. int nr_ports;
  97. int tx_mask;
  98. struct pci_dev *dev;
  99. struct atm_dev *atmdev[4];
  100. struct tasklet_struct tlet;
  101. spinlock_t tx_lock;
  102. spinlock_t tx_queue_lock;
  103. spinlock_t cli_queue_lock;
  104. spinlock_t param_queue_lock;
  105. struct list_head param_queue;
  106. struct sk_buff_head tx_queue[4];
  107. struct sk_buff_head cli_queue[4];
  108. struct sk_buff *tx_skb[4];
  109. struct sk_buff *rx_skb[4];
  110. wait_queue_head_t param_wq;
  111. wait_queue_head_t fw_wq;
  112. int using_dma;
  113. int fpga_version;
  114. int buffer_size;
  115. };
  116. struct solos_param {
  117. struct list_head list;
  118. pid_t pid;
  119. int port;
  120. struct sk_buff *response;
  121. };
  122. #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
  123. MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
  124. MODULE_DESCRIPTION("Solos PCI driver");
  125. MODULE_VERSION(VERSION);
  126. MODULE_LICENSE("GPL");
  127. MODULE_FIRMWARE("solos-FPGA.bin");
  128. MODULE_FIRMWARE("solos-Firmware.bin");
  129. MODULE_FIRMWARE("solos-db-FPGA.bin");
  130. MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
  131. MODULE_PARM_DESC(atmdebug, "Print ATM data");
  132. MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
  133. MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
  134. MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
  135. MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
  136. module_param(reset, int, 0444);
  137. module_param(atmdebug, int, 0644);
  138. module_param(firmware_upgrade, int, 0444);
  139. module_param(fpga_upgrade, int, 0444);
  140. module_param(db_firmware_upgrade, int, 0444);
  141. module_param(db_fpga_upgrade, int, 0444);
  142. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  143. struct atm_vcc *vcc);
  144. static uint32_t fpga_tx(struct solos_card *);
  145. static irqreturn_t solos_irq(int irq, void *dev_id);
  146. static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
  147. static int atm_init(struct solos_card *, struct device *);
  148. static void atm_remove(struct solos_card *);
  149. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
  150. static void solos_bh(unsigned long);
  151. static int print_buffer(struct sk_buff *buf);
  152. static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
  153. {
  154. if (vcc->pop)
  155. vcc->pop(vcc, skb);
  156. else
  157. dev_kfree_skb_any(skb);
  158. }
  159. static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
  160. char *buf)
  161. {
  162. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  163. struct solos_card *card = atmdev->dev_data;
  164. struct solos_param prm;
  165. struct sk_buff *skb;
  166. struct pkt_hdr *header;
  167. int buflen;
  168. buflen = strlen(attr->attr.name) + 10;
  169. skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
  170. if (!skb) {
  171. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
  172. return -ENOMEM;
  173. }
  174. header = (void *)skb_put(skb, sizeof(*header));
  175. buflen = snprintf((void *)&header[1], buflen - 1,
  176. "L%05d\n%s\n", current->pid, attr->attr.name);
  177. skb_put(skb, buflen);
  178. header->size = cpu_to_le16(buflen);
  179. header->vpi = cpu_to_le16(0);
  180. header->vci = cpu_to_le16(0);
  181. header->type = cpu_to_le16(PKT_COMMAND);
  182. prm.pid = current->pid;
  183. prm.response = NULL;
  184. prm.port = SOLOS_CHAN(atmdev);
  185. spin_lock_irq(&card->param_queue_lock);
  186. list_add(&prm.list, &card->param_queue);
  187. spin_unlock_irq(&card->param_queue_lock);
  188. fpga_queue(card, prm.port, skb, NULL);
  189. wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
  190. spin_lock_irq(&card->param_queue_lock);
  191. list_del(&prm.list);
  192. spin_unlock_irq(&card->param_queue_lock);
  193. if (!prm.response)
  194. return -EIO;
  195. buflen = prm.response->len;
  196. memcpy(buf, prm.response->data, buflen);
  197. kfree_skb(prm.response);
  198. return buflen;
  199. }
  200. static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
  201. const char *buf, size_t count)
  202. {
  203. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  204. struct solos_card *card = atmdev->dev_data;
  205. struct solos_param prm;
  206. struct sk_buff *skb;
  207. struct pkt_hdr *header;
  208. int buflen;
  209. ssize_t ret;
  210. buflen = strlen(attr->attr.name) + 11 + count;
  211. skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
  212. if (!skb) {
  213. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
  214. return -ENOMEM;
  215. }
  216. header = (void *)skb_put(skb, sizeof(*header));
  217. buflen = snprintf((void *)&header[1], buflen - 1,
  218. "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
  219. skb_put(skb, buflen);
  220. header->size = cpu_to_le16(buflen);
  221. header->vpi = cpu_to_le16(0);
  222. header->vci = cpu_to_le16(0);
  223. header->type = cpu_to_le16(PKT_COMMAND);
  224. prm.pid = current->pid;
  225. prm.response = NULL;
  226. prm.port = SOLOS_CHAN(atmdev);
  227. spin_lock_irq(&card->param_queue_lock);
  228. list_add(&prm.list, &card->param_queue);
  229. spin_unlock_irq(&card->param_queue_lock);
  230. fpga_queue(card, prm.port, skb, NULL);
  231. wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
  232. spin_lock_irq(&card->param_queue_lock);
  233. list_del(&prm.list);
  234. spin_unlock_irq(&card->param_queue_lock);
  235. skb = prm.response;
  236. if (!skb)
  237. return -EIO;
  238. buflen = skb->len;
  239. /* Sometimes it has a newline, sometimes it doesn't. */
  240. if (skb->data[buflen - 1] == '\n')
  241. buflen--;
  242. if (buflen == 2 && !strncmp(skb->data, "OK", 2))
  243. ret = count;
  244. else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
  245. ret = -EIO;
  246. else {
  247. /* We know we have enough space allocated for this; we allocated
  248. it ourselves */
  249. skb->data[buflen] = 0;
  250. dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
  251. skb->data);
  252. ret = -EIO;
  253. }
  254. kfree_skb(skb);
  255. return ret;
  256. }
  257. static char *next_string(struct sk_buff *skb)
  258. {
  259. int i = 0;
  260. char *this = skb->data;
  261. for (i = 0; i < skb->len; i++) {
  262. if (this[i] == '\n') {
  263. this[i] = 0;
  264. skb_pull(skb, i + 1);
  265. return this;
  266. }
  267. if (!isprint(this[i]))
  268. return NULL;
  269. }
  270. return NULL;
  271. }
  272. /*
  273. * Status packet has fields separated by \n, starting with a version number
  274. * for the information therein. Fields are....
  275. *
  276. * packet version
  277. * RxBitRate (version >= 1)
  278. * TxBitRate (version >= 1)
  279. * State (version >= 1)
  280. * LocalSNRMargin (version >= 1)
  281. * LocalLineAttn (version >= 1)
  282. */
  283. static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
  284. {
  285. char *str, *end, *state_str, *snr, *attn;
  286. int ver, rate_up, rate_down;
  287. if (!card->atmdev[port])
  288. return -ENODEV;
  289. str = next_string(skb);
  290. if (!str)
  291. return -EIO;
  292. ver = simple_strtol(str, NULL, 10);
  293. if (ver < 1) {
  294. dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
  295. ver);
  296. return -EIO;
  297. }
  298. str = next_string(skb);
  299. if (!str)
  300. return -EIO;
  301. if (!strcmp(str, "ERROR")) {
  302. dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
  303. port);
  304. return 0;
  305. }
  306. rate_down = simple_strtol(str, &end, 10);
  307. if (*end)
  308. return -EIO;
  309. str = next_string(skb);
  310. if (!str)
  311. return -EIO;
  312. rate_up = simple_strtol(str, &end, 10);
  313. if (*end)
  314. return -EIO;
  315. state_str = next_string(skb);
  316. if (!state_str)
  317. return -EIO;
  318. /* Anything but 'Showtime' is down */
  319. if (strcmp(state_str, "Showtime")) {
  320. atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
  321. dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
  322. return 0;
  323. }
  324. snr = next_string(skb);
  325. if (!snr)
  326. return -EIO;
  327. attn = next_string(skb);
  328. if (!attn)
  329. return -EIO;
  330. dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
  331. port, state_str, rate_down/1000, rate_up/1000,
  332. snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
  333. card->atmdev[port]->link_rate = rate_down / 424;
  334. atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
  335. return 0;
  336. }
  337. static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
  338. {
  339. struct solos_param *prm;
  340. unsigned long flags;
  341. int cmdpid;
  342. int found = 0;
  343. if (skb->len < 7)
  344. return 0;
  345. if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
  346. !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
  347. !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
  348. skb->data[6] != '\n')
  349. return 0;
  350. cmdpid = simple_strtol(&skb->data[1], NULL, 10);
  351. spin_lock_irqsave(&card->param_queue_lock, flags);
  352. list_for_each_entry(prm, &card->param_queue, list) {
  353. if (prm->port == port && prm->pid == cmdpid) {
  354. prm->response = skb;
  355. skb_pull(skb, 7);
  356. wake_up(&card->param_wq);
  357. found = 1;
  358. break;
  359. }
  360. }
  361. spin_unlock_irqrestore(&card->param_queue_lock, flags);
  362. return found;
  363. }
  364. static ssize_t console_show(struct device *dev, struct device_attribute *attr,
  365. char *buf)
  366. {
  367. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  368. struct solos_card *card = atmdev->dev_data;
  369. struct sk_buff *skb;
  370. unsigned int len;
  371. spin_lock(&card->cli_queue_lock);
  372. skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
  373. spin_unlock(&card->cli_queue_lock);
  374. if(skb == NULL)
  375. return sprintf(buf, "No data.\n");
  376. len = skb->len;
  377. memcpy(buf, skb->data, len);
  378. dev_dbg(&card->dev->dev, "len: %d\n", len);
  379. kfree_skb(skb);
  380. return len;
  381. }
  382. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
  383. {
  384. struct sk_buff *skb;
  385. struct pkt_hdr *header;
  386. if (size > (BUF_SIZE - sizeof(*header))) {
  387. dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
  388. return 0;
  389. }
  390. skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
  391. if (!skb) {
  392. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
  393. return 0;
  394. }
  395. header = (void *)skb_put(skb, sizeof(*header));
  396. header->size = cpu_to_le16(size);
  397. header->vpi = cpu_to_le16(0);
  398. header->vci = cpu_to_le16(0);
  399. header->type = cpu_to_le16(PKT_COMMAND);
  400. memcpy(skb_put(skb, size), buf, size);
  401. fpga_queue(card, dev, skb, NULL);
  402. return 0;
  403. }
  404. static ssize_t console_store(struct device *dev, struct device_attribute *attr,
  405. const char *buf, size_t count)
  406. {
  407. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  408. struct solos_card *card = atmdev->dev_data;
  409. int err;
  410. err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
  411. return err?:count;
  412. }
  413. static DEVICE_ATTR(console, 0644, console_show, console_store);
  414. #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
  415. #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
  416. #include "solos-attrlist.c"
  417. #undef SOLOS_ATTR_RO
  418. #undef SOLOS_ATTR_RW
  419. #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
  420. #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
  421. static struct attribute *solos_attrs[] = {
  422. #include "solos-attrlist.c"
  423. NULL
  424. };
  425. static struct attribute_group solos_attr_group = {
  426. .attrs = solos_attrs,
  427. .name = "parameters",
  428. };
  429. static int flash_upgrade(struct solos_card *card, int chip)
  430. {
  431. const struct firmware *fw;
  432. const char *fw_name;
  433. int blocksize = 0;
  434. int numblocks = 0;
  435. int offset;
  436. switch (chip) {
  437. case 0:
  438. fw_name = "solos-FPGA.bin";
  439. blocksize = FPGA_BLOCK;
  440. break;
  441. case 1:
  442. fw_name = "solos-Firmware.bin";
  443. blocksize = SOLOS_BLOCK;
  444. break;
  445. case 2:
  446. if (card->fpga_version > LEGACY_BUFFERS){
  447. fw_name = "solos-db-FPGA.bin";
  448. blocksize = FPGA_BLOCK;
  449. } else {
  450. dev_info(&card->dev->dev, "FPGA version doesn't support"
  451. " daughter board upgrades\n");
  452. return -EPERM;
  453. }
  454. break;
  455. case 3:
  456. if (card->fpga_version > LEGACY_BUFFERS){
  457. fw_name = "solos-Firmware.bin";
  458. blocksize = SOLOS_BLOCK;
  459. } else {
  460. dev_info(&card->dev->dev, "FPGA version doesn't support"
  461. " daughter board upgrades\n");
  462. return -EPERM;
  463. }
  464. break;
  465. default:
  466. return -ENODEV;
  467. }
  468. if (request_firmware(&fw, fw_name, &card->dev->dev))
  469. return -ENOENT;
  470. dev_info(&card->dev->dev, "Flash upgrade starting\n");
  471. numblocks = fw->size / blocksize;
  472. dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
  473. dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
  474. dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
  475. iowrite32(1, card->config_regs + FPGA_MODE);
  476. (void) ioread32(card->config_regs + FPGA_MODE);
  477. /* Set mode to Chip Erase */
  478. if(chip == 0 || chip == 2)
  479. dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
  480. if(chip == 1 || chip == 3)
  481. dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
  482. iowrite32((chip * 2), card->config_regs + FLASH_MODE);
  483. iowrite32(1, card->config_regs + WRITE_FLASH);
  484. wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
  485. for (offset = 0; offset < fw->size; offset += blocksize) {
  486. int i;
  487. /* Clear write flag */
  488. iowrite32(0, card->config_regs + WRITE_FLASH);
  489. /* Set mode to Block Write */
  490. /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
  491. iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
  492. /* Copy block to buffer, swapping each 16 bits */
  493. for(i = 0; i < blocksize; i += 4) {
  494. uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
  495. if(card->fpga_version > LEGACY_BUFFERS)
  496. iowrite32(word, FLASH_BUF + i);
  497. else
  498. iowrite32(word, RX_BUF(card, 3) + i);
  499. }
  500. /* Specify block number and then trigger flash write */
  501. iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
  502. iowrite32(1, card->config_regs + WRITE_FLASH);
  503. wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
  504. }
  505. release_firmware(fw);
  506. iowrite32(0, card->config_regs + WRITE_FLASH);
  507. iowrite32(0, card->config_regs + FPGA_MODE);
  508. iowrite32(0, card->config_regs + FLASH_MODE);
  509. dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
  510. return 0;
  511. }
  512. static irqreturn_t solos_irq(int irq, void *dev_id)
  513. {
  514. struct solos_card *card = dev_id;
  515. int handled = 1;
  516. iowrite32(0, card->config_regs + IRQ_CLEAR);
  517. /* If we're up and running, just kick the tasklet to process TX/RX */
  518. if (card->atmdev[0])
  519. tasklet_schedule(&card->tlet);
  520. else
  521. wake_up(&card->fw_wq);
  522. return IRQ_RETVAL(handled);
  523. }
  524. void solos_bh(unsigned long card_arg)
  525. {
  526. struct solos_card *card = (void *)card_arg;
  527. uint32_t card_flags;
  528. uint32_t rx_done = 0;
  529. int port;
  530. /*
  531. * Since fpga_tx() is going to need to read the flags under its lock,
  532. * it can return them to us so that we don't have to hit PCI MMIO
  533. * again for the same information
  534. */
  535. card_flags = fpga_tx(card);
  536. for (port = 0; port < card->nr_ports; port++) {
  537. if (card_flags & (0x10 << port)) {
  538. struct pkt_hdr _hdr, *header;
  539. struct sk_buff *skb;
  540. struct atm_vcc *vcc;
  541. int size;
  542. if (card->using_dma) {
  543. skb = card->rx_skb[port];
  544. card->rx_skb[port] = NULL;
  545. pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
  546. RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
  547. header = (void *)skb->data;
  548. size = le16_to_cpu(header->size);
  549. skb_put(skb, size + sizeof(*header));
  550. skb_pull(skb, sizeof(*header));
  551. } else {
  552. header = &_hdr;
  553. rx_done |= 0x10 << port;
  554. memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
  555. size = le16_to_cpu(header->size);
  556. if (size > (card->buffer_size - sizeof(*header))){
  557. dev_warn(&card->dev->dev, "Invalid buffer size\n");
  558. continue;
  559. }
  560. skb = alloc_skb(size + 1, GFP_ATOMIC);
  561. if (!skb) {
  562. if (net_ratelimit())
  563. dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
  564. continue;
  565. }
  566. memcpy_fromio(skb_put(skb, size),
  567. RX_BUF(card, port) + sizeof(*header),
  568. size);
  569. }
  570. if (atmdebug) {
  571. dev_info(&card->dev->dev, "Received: port %d\n", port);
  572. dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
  573. size, le16_to_cpu(header->vpi),
  574. le16_to_cpu(header->vci));
  575. print_buffer(skb);
  576. }
  577. switch (le16_to_cpu(header->type)) {
  578. case PKT_DATA:
  579. vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
  580. le16_to_cpu(header->vci));
  581. if (!vcc) {
  582. if (net_ratelimit())
  583. dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
  584. le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
  585. port);
  586. dev_kfree_skb_any(skb);
  587. break;
  588. }
  589. atm_charge(vcc, skb->truesize);
  590. vcc->push(vcc, skb);
  591. atomic_inc(&vcc->stats->rx);
  592. break;
  593. case PKT_STATUS:
  594. if (process_status(card, port, skb) &&
  595. net_ratelimit()) {
  596. dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
  597. print_buffer(skb);
  598. }
  599. dev_kfree_skb_any(skb);
  600. break;
  601. case PKT_COMMAND:
  602. default: /* FIXME: Not really, surely? */
  603. if (process_command(card, port, skb))
  604. break;
  605. spin_lock(&card->cli_queue_lock);
  606. if (skb_queue_len(&card->cli_queue[port]) > 10) {
  607. if (net_ratelimit())
  608. dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
  609. port);
  610. dev_kfree_skb_any(skb);
  611. } else
  612. skb_queue_tail(&card->cli_queue[port], skb);
  613. spin_unlock(&card->cli_queue_lock);
  614. break;
  615. }
  616. }
  617. /* Allocate RX skbs for any ports which need them */
  618. if (card->using_dma && card->atmdev[port] &&
  619. !card->rx_skb[port]) {
  620. struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
  621. if (skb) {
  622. SKB_CB(skb)->dma_addr =
  623. pci_map_single(card->dev, skb->data,
  624. RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
  625. iowrite32(SKB_CB(skb)->dma_addr,
  626. card->config_regs + RX_DMA_ADDR(port));
  627. card->rx_skb[port] = skb;
  628. } else {
  629. if (net_ratelimit())
  630. dev_warn(&card->dev->dev, "Failed to allocate RX skb");
  631. /* We'll have to try again later */
  632. tasklet_schedule(&card->tlet);
  633. }
  634. }
  635. }
  636. if (rx_done)
  637. iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
  638. return;
  639. }
  640. static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
  641. {
  642. struct hlist_head *head;
  643. struct atm_vcc *vcc = NULL;
  644. struct hlist_node *node;
  645. struct sock *s;
  646. read_lock(&vcc_sklist_lock);
  647. head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
  648. sk_for_each(s, node, head) {
  649. vcc = atm_sk(s);
  650. if (vcc->dev == dev && vcc->vci == vci &&
  651. vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
  652. test_bit(ATM_VF_READY, &vcc->flags))
  653. goto out;
  654. }
  655. vcc = NULL;
  656. out:
  657. read_unlock(&vcc_sklist_lock);
  658. return vcc;
  659. }
  660. static int popen(struct atm_vcc *vcc)
  661. {
  662. struct solos_card *card = vcc->dev->dev_data;
  663. struct sk_buff *skb;
  664. struct pkt_hdr *header;
  665. if (vcc->qos.aal != ATM_AAL5) {
  666. dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
  667. vcc->qos.aal);
  668. return -EINVAL;
  669. }
  670. skb = alloc_skb(sizeof(*header), GFP_KERNEL);
  671. if (!skb) {
  672. if (net_ratelimit())
  673. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
  674. return -ENOMEM;
  675. }
  676. header = (void *)skb_put(skb, sizeof(*header));
  677. header->size = cpu_to_le16(0);
  678. header->vpi = cpu_to_le16(vcc->vpi);
  679. header->vci = cpu_to_le16(vcc->vci);
  680. header->type = cpu_to_le16(PKT_POPEN);
  681. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
  682. set_bit(ATM_VF_ADDR, &vcc->flags);
  683. set_bit(ATM_VF_READY, &vcc->flags);
  684. return 0;
  685. }
  686. static void pclose(struct atm_vcc *vcc)
  687. {
  688. struct solos_card *card = vcc->dev->dev_data;
  689. unsigned char port = SOLOS_CHAN(vcc->dev);
  690. struct sk_buff *skb, *tmpskb;
  691. struct pkt_hdr *header;
  692. /* Remove any yet-to-be-transmitted packets from the pending queue */
  693. spin_lock(&card->tx_queue_lock);
  694. skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
  695. if (SKB_CB(skb)->vcc == vcc) {
  696. skb_unlink(skb, &card->tx_queue[port]);
  697. solos_pop(vcc, skb);
  698. }
  699. }
  700. spin_unlock(&card->tx_queue_lock);
  701. skb = alloc_skb(sizeof(*header), GFP_KERNEL);
  702. if (!skb) {
  703. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
  704. return;
  705. }
  706. header = (void *)skb_put(skb, sizeof(*header));
  707. header->size = cpu_to_le16(0);
  708. header->vpi = cpu_to_le16(vcc->vpi);
  709. header->vci = cpu_to_le16(vcc->vci);
  710. header->type = cpu_to_le16(PKT_PCLOSE);
  711. skb_get(skb);
  712. fpga_queue(card, port, skb, NULL);
  713. if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
  714. dev_warn(&card->dev->dev,
  715. "Timeout waiting for VCC close on port %d\n", port);
  716. dev_kfree_skb(skb);
  717. /* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
  718. tasklet has finished processing any incoming packets (and, more to
  719. the point, using the vcc pointer). */
  720. tasklet_unlock_wait(&card->tlet);
  721. clear_bit(ATM_VF_ADDR, &vcc->flags);
  722. return;
  723. }
  724. static int print_buffer(struct sk_buff *buf)
  725. {
  726. int len,i;
  727. char msg[500];
  728. char item[10];
  729. len = buf->len;
  730. for (i = 0; i < len; i++){
  731. if(i % 8 == 0)
  732. sprintf(msg, "%02X: ", i);
  733. sprintf(item,"%02X ",*(buf->data + i));
  734. strcat(msg, item);
  735. if(i % 8 == 7) {
  736. sprintf(item, "\n");
  737. strcat(msg, item);
  738. printk(KERN_DEBUG "%s", msg);
  739. }
  740. }
  741. if (i % 8 != 0) {
  742. sprintf(item, "\n");
  743. strcat(msg, item);
  744. printk(KERN_DEBUG "%s", msg);
  745. }
  746. printk(KERN_DEBUG "\n");
  747. return 0;
  748. }
  749. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  750. struct atm_vcc *vcc)
  751. {
  752. int old_len;
  753. unsigned long flags;
  754. SKB_CB(skb)->vcc = vcc;
  755. spin_lock_irqsave(&card->tx_queue_lock, flags);
  756. old_len = skb_queue_len(&card->tx_queue[port]);
  757. skb_queue_tail(&card->tx_queue[port], skb);
  758. if (!old_len)
  759. card->tx_mask |= (1 << port);
  760. spin_unlock_irqrestore(&card->tx_queue_lock, flags);
  761. /* Theoretically we could just schedule the tasklet here, but
  762. that introduces latency we don't want -- it's noticeable */
  763. if (!old_len)
  764. fpga_tx(card);
  765. }
  766. static uint32_t fpga_tx(struct solos_card *card)
  767. {
  768. uint32_t tx_pending, card_flags;
  769. uint32_t tx_started = 0;
  770. struct sk_buff *skb;
  771. struct atm_vcc *vcc;
  772. unsigned char port;
  773. unsigned long flags;
  774. spin_lock_irqsave(&card->tx_lock, flags);
  775. card_flags = ioread32(card->config_regs + FLAGS_ADDR);
  776. /*
  777. * The queue lock is required for _writing_ to tx_mask, but we're
  778. * OK to read it here without locking. The only potential update
  779. * that we could race with is in fpga_queue() where it sets a bit
  780. * for a new port... but it's going to call this function again if
  781. * it's doing that, anyway.
  782. */
  783. tx_pending = card->tx_mask & ~card_flags;
  784. for (port = 0; tx_pending; tx_pending >>= 1, port++) {
  785. if (tx_pending & 1) {
  786. struct sk_buff *oldskb = card->tx_skb[port];
  787. if (oldskb)
  788. pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
  789. oldskb->len, PCI_DMA_TODEVICE);
  790. spin_lock(&card->tx_queue_lock);
  791. skb = skb_dequeue(&card->tx_queue[port]);
  792. if (!skb)
  793. card->tx_mask &= ~(1 << port);
  794. spin_unlock(&card->tx_queue_lock);
  795. if (skb && !card->using_dma) {
  796. memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
  797. tx_started |= 1 << port;
  798. oldskb = skb; /* We're done with this skb already */
  799. } else if (skb && card->using_dma) {
  800. SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
  801. skb->len, PCI_DMA_TODEVICE);
  802. card->tx_skb[port] = skb;
  803. iowrite32(SKB_CB(skb)->dma_addr,
  804. card->config_regs + TX_DMA_ADDR(port));
  805. }
  806. if (!oldskb)
  807. continue;
  808. /* Clean up and free oldskb now it's gone */
  809. if (atmdebug) {
  810. struct pkt_hdr *header = (void *)oldskb->data;
  811. int size = le16_to_cpu(header->size);
  812. skb_pull(oldskb, sizeof(*header));
  813. dev_info(&card->dev->dev, "Transmitted: port %d\n",
  814. port);
  815. dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
  816. size, le16_to_cpu(header->vpi),
  817. le16_to_cpu(header->vci));
  818. print_buffer(oldskb);
  819. }
  820. vcc = SKB_CB(oldskb)->vcc;
  821. if (vcc) {
  822. atomic_inc(&vcc->stats->tx);
  823. solos_pop(vcc, oldskb);
  824. } else {
  825. dev_kfree_skb_irq(oldskb);
  826. wake_up(&card->param_wq);
  827. }
  828. }
  829. }
  830. /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
  831. if (tx_started)
  832. iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
  833. spin_unlock_irqrestore(&card->tx_lock, flags);
  834. return card_flags;
  835. }
  836. static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
  837. {
  838. struct solos_card *card = vcc->dev->dev_data;
  839. struct pkt_hdr *header;
  840. int pktlen;
  841. pktlen = skb->len;
  842. if (pktlen > (BUF_SIZE - sizeof(*header))) {
  843. dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
  844. solos_pop(vcc, skb);
  845. return 0;
  846. }
  847. if (!skb_clone_writable(skb, sizeof(*header))) {
  848. int expand_by = 0;
  849. int ret;
  850. if (skb_headroom(skb) < sizeof(*header))
  851. expand_by = sizeof(*header) - skb_headroom(skb);
  852. ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
  853. if (ret) {
  854. dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
  855. solos_pop(vcc, skb);
  856. return ret;
  857. }
  858. }
  859. header = (void *)skb_push(skb, sizeof(*header));
  860. /* This does _not_ include the size of the header */
  861. header->size = cpu_to_le16(pktlen);
  862. header->vpi = cpu_to_le16(vcc->vpi);
  863. header->vci = cpu_to_le16(vcc->vci);
  864. header->type = cpu_to_le16(PKT_DATA);
  865. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
  866. return 0;
  867. }
  868. static struct atmdev_ops fpga_ops = {
  869. .open = popen,
  870. .close = pclose,
  871. .ioctl = NULL,
  872. .getsockopt = NULL,
  873. .setsockopt = NULL,
  874. .send = psend,
  875. .send_oam = NULL,
  876. .phy_put = NULL,
  877. .phy_get = NULL,
  878. .change_qos = NULL,
  879. .proc_read = NULL,
  880. .owner = THIS_MODULE
  881. };
  882. static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
  883. {
  884. int err;
  885. uint16_t fpga_ver;
  886. uint8_t major_ver, minor_ver;
  887. uint32_t data32;
  888. struct solos_card *card;
  889. card = kzalloc(sizeof(*card), GFP_KERNEL);
  890. if (!card)
  891. return -ENOMEM;
  892. card->dev = dev;
  893. init_waitqueue_head(&card->fw_wq);
  894. init_waitqueue_head(&card->param_wq);
  895. err = pci_enable_device(dev);
  896. if (err) {
  897. dev_warn(&dev->dev, "Failed to enable PCI device\n");
  898. goto out;
  899. }
  900. err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
  901. if (err) {
  902. dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
  903. goto out;
  904. }
  905. err = pci_request_regions(dev, "solos");
  906. if (err) {
  907. dev_warn(&dev->dev, "Failed to request regions\n");
  908. goto out;
  909. }
  910. card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
  911. if (!card->config_regs) {
  912. dev_warn(&dev->dev, "Failed to ioremap config registers\n");
  913. goto out_release_regions;
  914. }
  915. card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
  916. if (!card->buffers) {
  917. dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
  918. goto out_unmap_config;
  919. }
  920. if (reset) {
  921. iowrite32(1, card->config_regs + FPGA_MODE);
  922. data32 = ioread32(card->config_regs + FPGA_MODE);
  923. iowrite32(0, card->config_regs + FPGA_MODE);
  924. data32 = ioread32(card->config_regs + FPGA_MODE);
  925. }
  926. data32 = ioread32(card->config_regs + FPGA_VER);
  927. fpga_ver = (data32 & 0x0000FFFF);
  928. major_ver = ((data32 & 0xFF000000) >> 24);
  929. minor_ver = ((data32 & 0x00FF0000) >> 16);
  930. card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
  931. if (card->fpga_version > LEGACY_BUFFERS)
  932. card->buffer_size = BUF_SIZE;
  933. else
  934. card->buffer_size = OLD_BUF_SIZE;
  935. dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
  936. major_ver, minor_ver, fpga_ver);
  937. if (fpga_ver < 37 && (fpga_upgrade || firmware_upgrade ||
  938. db_fpga_upgrade || db_firmware_upgrade)) {
  939. dev_warn(&dev->dev,
  940. "FPGA too old; cannot upgrade flash. Use JTAG.\n");
  941. fpga_upgrade = firmware_upgrade = 0;
  942. db_fpga_upgrade = db_firmware_upgrade = 0;
  943. }
  944. if (card->fpga_version >= DMA_SUPPORTED) {
  945. pci_set_master(dev);
  946. card->using_dma = 1;
  947. } else {
  948. card->using_dma = 0;
  949. /* Set RX empty flag for all ports */
  950. iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
  951. }
  952. data32 = ioread32(card->config_regs + PORTS);
  953. card->nr_ports = (data32 & 0x000000FF);
  954. pci_set_drvdata(dev, card);
  955. tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
  956. spin_lock_init(&card->tx_lock);
  957. spin_lock_init(&card->tx_queue_lock);
  958. spin_lock_init(&card->cli_queue_lock);
  959. spin_lock_init(&card->param_queue_lock);
  960. INIT_LIST_HEAD(&card->param_queue);
  961. err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
  962. "solos-pci", card);
  963. if (err) {
  964. dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
  965. goto out_unmap_both;
  966. }
  967. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  968. if (fpga_upgrade)
  969. flash_upgrade(card, 0);
  970. if (firmware_upgrade)
  971. flash_upgrade(card, 1);
  972. if (db_fpga_upgrade)
  973. flash_upgrade(card, 2);
  974. if (db_firmware_upgrade)
  975. flash_upgrade(card, 3);
  976. err = atm_init(card, &dev->dev);
  977. if (err)
  978. goto out_free_irq;
  979. return 0;
  980. out_free_irq:
  981. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  982. free_irq(dev->irq, card);
  983. tasklet_kill(&card->tlet);
  984. out_unmap_both:
  985. pci_set_drvdata(dev, NULL);
  986. pci_iounmap(dev, card->buffers);
  987. out_unmap_config:
  988. pci_iounmap(dev, card->config_regs);
  989. out_release_regions:
  990. pci_release_regions(dev);
  991. out:
  992. kfree(card);
  993. return err;
  994. }
  995. static int atm_init(struct solos_card *card, struct device *parent)
  996. {
  997. int i;
  998. for (i = 0; i < card->nr_ports; i++) {
  999. struct sk_buff *skb;
  1000. struct pkt_hdr *header;
  1001. skb_queue_head_init(&card->tx_queue[i]);
  1002. skb_queue_head_init(&card->cli_queue[i]);
  1003. card->atmdev[i] = atm_dev_register("solos-pci", parent, &fpga_ops, -1, NULL);
  1004. if (!card->atmdev[i]) {
  1005. dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
  1006. atm_remove(card);
  1007. return -ENODEV;
  1008. }
  1009. if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
  1010. dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
  1011. if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
  1012. dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
  1013. dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
  1014. card->atmdev[i]->ci_range.vpi_bits = 8;
  1015. card->atmdev[i]->ci_range.vci_bits = 16;
  1016. card->atmdev[i]->dev_data = card;
  1017. card->atmdev[i]->phy_data = (void *)(unsigned long)i;
  1018. atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_FOUND);
  1019. skb = alloc_skb(sizeof(*header), GFP_KERNEL);
  1020. if (!skb) {
  1021. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
  1022. continue;
  1023. }
  1024. header = (void *)skb_put(skb, sizeof(*header));
  1025. header->size = cpu_to_le16(0);
  1026. header->vpi = cpu_to_le16(0);
  1027. header->vci = cpu_to_le16(0);
  1028. header->type = cpu_to_le16(PKT_STATUS);
  1029. fpga_queue(card, i, skb, NULL);
  1030. }
  1031. return 0;
  1032. }
  1033. static void atm_remove(struct solos_card *card)
  1034. {
  1035. int i;
  1036. for (i = 0; i < card->nr_ports; i++) {
  1037. if (card->atmdev[i]) {
  1038. struct sk_buff *skb;
  1039. dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
  1040. sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
  1041. atm_dev_deregister(card->atmdev[i]);
  1042. skb = card->rx_skb[i];
  1043. if (skb) {
  1044. pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
  1045. RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
  1046. dev_kfree_skb(skb);
  1047. }
  1048. skb = card->tx_skb[i];
  1049. if (skb) {
  1050. pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
  1051. skb->len, PCI_DMA_TODEVICE);
  1052. dev_kfree_skb(skb);
  1053. }
  1054. while ((skb = skb_dequeue(&card->tx_queue[i])))
  1055. dev_kfree_skb(skb);
  1056. }
  1057. }
  1058. }
  1059. static void fpga_remove(struct pci_dev *dev)
  1060. {
  1061. struct solos_card *card = pci_get_drvdata(dev);
  1062. /* Disable IRQs */
  1063. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  1064. /* Reset FPGA */
  1065. iowrite32(1, card->config_regs + FPGA_MODE);
  1066. (void)ioread32(card->config_regs + FPGA_MODE);
  1067. atm_remove(card);
  1068. free_irq(dev->irq, card);
  1069. tasklet_kill(&card->tlet);
  1070. /* Release device from reset */
  1071. iowrite32(0, card->config_regs + FPGA_MODE);
  1072. (void)ioread32(card->config_regs + FPGA_MODE);
  1073. pci_iounmap(dev, card->buffers);
  1074. pci_iounmap(dev, card->config_regs);
  1075. pci_release_regions(dev);
  1076. pci_disable_device(dev);
  1077. pci_set_drvdata(dev, NULL);
  1078. kfree(card);
  1079. }
  1080. static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
  1081. { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  1082. { 0, }
  1083. };
  1084. MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
  1085. static struct pci_driver fpga_driver = {
  1086. .name = "solos",
  1087. .id_table = fpga_pci_tbl,
  1088. .probe = fpga_probe,
  1089. .remove = fpga_remove,
  1090. };
  1091. static int __init solos_pci_init(void)
  1092. {
  1093. BUILD_BUG_ON(sizeof(struct solos_skb_cb) > sizeof(((struct sk_buff *)0)->cb));
  1094. printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
  1095. return pci_register_driver(&fpga_driver);
  1096. }
  1097. static void __exit solos_pci_exit(void)
  1098. {
  1099. pci_unregister_driver(&fpga_driver);
  1100. printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
  1101. }
  1102. module_init(solos_pci_init);
  1103. module_exit(solos_pci_exit);