mwl8k.c 87 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/list.h>
  16. #include <linux/pci.h>
  17. #include <linux/delay.h>
  18. #include <linux/completion.h>
  19. #include <linux/etherdevice.h>
  20. #include <net/mac80211.h>
  21. #include <linux/moduleparam.h>
  22. #include <linux/firmware.h>
  23. #include <linux/workqueue.h>
  24. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  25. #define MWL8K_NAME KBUILD_MODNAME
  26. #define MWL8K_VERSION "0.9.1"
  27. MODULE_DESCRIPTION(MWL8K_DESC);
  28. MODULE_VERSION(MWL8K_VERSION);
  29. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  30. MODULE_LICENSE("GPL");
  31. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  32. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  33. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  34. { }
  35. };
  36. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  37. /* Register definitions */
  38. #define MWL8K_HIU_GEN_PTR 0x00000c10
  39. #define MWL8K_MODE_STA 0x0000005a
  40. #define MWL8K_MODE_AP 0x000000a5
  41. #define MWL8K_HIU_INT_CODE 0x00000c14
  42. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  43. #define MWL8K_FWAP_READY 0xf1f2f4a5
  44. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  45. #define MWL8K_HIU_SCRATCH 0x00000c40
  46. /* Host->device communications */
  47. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  49. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  50. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  51. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  52. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  53. #define MWL8K_H2A_INT_RESET (1 << 15)
  54. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  55. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  56. /* Device->host communications */
  57. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  59. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  60. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  61. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  62. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  63. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  64. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  65. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  66. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  67. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  68. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  69. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  70. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  71. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  72. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  73. MWL8K_A2H_INT_CHNL_SWITCHED | \
  74. MWL8K_A2H_INT_QUEUE_EMPTY | \
  75. MWL8K_A2H_INT_RADAR_DETECT | \
  76. MWL8K_A2H_INT_RADIO_ON | \
  77. MWL8K_A2H_INT_RADIO_OFF | \
  78. MWL8K_A2H_INT_MAC_EVENT | \
  79. MWL8K_A2H_INT_OPC_DONE | \
  80. MWL8K_A2H_INT_RX_READY | \
  81. MWL8K_A2H_INT_TX_DONE)
  82. /* WME stream classes */
  83. #define WME_AC_BE 0 /* best effort */
  84. #define WME_AC_BK 1 /* background */
  85. #define WME_AC_VI 2 /* video */
  86. #define WME_AC_VO 3 /* voice */
  87. #define MWL8K_RX_QUEUES 1
  88. #define MWL8K_TX_QUEUES 4
  89. struct mwl8k_rx_queue {
  90. int rx_desc_count;
  91. /* hw receives here */
  92. int rx_head;
  93. /* refill descs here */
  94. int rx_tail;
  95. struct mwl8k_rx_desc *rx_desc_area;
  96. dma_addr_t rx_desc_dma;
  97. struct sk_buff **rx_skb;
  98. };
  99. struct mwl8k_skb {
  100. /*
  101. * The DMA engine requires a modification to the payload.
  102. * If the skbuff is shared/cloned, it needs to be unshared.
  103. * This method is used to ensure the stack always gets back
  104. * the skbuff it sent for transmission.
  105. */
  106. struct sk_buff *clone;
  107. struct sk_buff *skb;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int tx_head;
  112. /* sw appends here */
  113. int tx_tail;
  114. struct ieee80211_tx_queue_stats tx_stats;
  115. struct mwl8k_tx_desc *tx_desc_area;
  116. dma_addr_t tx_desc_dma;
  117. struct mwl8k_skb *tx_skb;
  118. };
  119. /* Pointers to the firmware data and meta information about it. */
  120. struct mwl8k_firmware {
  121. /* Microcode */
  122. struct firmware *ucode;
  123. /* Boot helper code */
  124. struct firmware *helper;
  125. };
  126. struct mwl8k_priv {
  127. void __iomem *regs;
  128. struct ieee80211_hw *hw;
  129. struct pci_dev *pdev;
  130. u8 name[16];
  131. /* firmware access lock */
  132. spinlock_t fw_lock;
  133. /* firmware files and meta data */
  134. struct mwl8k_firmware fw;
  135. u32 part_num;
  136. /* lock held over TX and TX reap */
  137. spinlock_t tx_lock;
  138. struct ieee80211_vif *vif;
  139. struct ieee80211_channel *current_channel;
  140. /* power management status cookie from firmware */
  141. u32 *cookie;
  142. dma_addr_t cookie_dma;
  143. u16 num_mcaddrs;
  144. u8 hw_rev;
  145. __le32 fw_rev;
  146. /*
  147. * Running count of TX packets in flight, to avoid
  148. * iterating over the transmit rings each time.
  149. */
  150. int pending_tx_pkts;
  151. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  152. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  153. /* PHY parameters */
  154. struct ieee80211_supported_band band;
  155. struct ieee80211_channel channels[14];
  156. struct ieee80211_rate rates[12];
  157. bool radio_on;
  158. /* RF preamble: Short, Long or Auto */
  159. u8 radio_preamble;
  160. /* WMM MODE 1 for enabled; 0 for disabled */
  161. bool wmm_mode;
  162. /* Set if PHY config is in progress */
  163. bool inconfig;
  164. /* XXX need to convert this to handle multiple interfaces */
  165. bool capture_beacon;
  166. u8 capture_bssid[ETH_ALEN];
  167. struct sk_buff *beacon_skb;
  168. /*
  169. * This FJ worker has to be global as it is scheduled from the
  170. * RX handler. At this point we don't know which interface it
  171. * belongs to until the list of bssids waiting to complete join
  172. * is checked.
  173. */
  174. struct work_struct finalize_join_worker;
  175. /* Tasklet to reclaim TX descriptors and buffers after tx */
  176. struct tasklet_struct tx_reclaim_task;
  177. /* Work thread to serialize configuration requests */
  178. struct workqueue_struct *config_wq;
  179. struct completion *hostcmd_wait;
  180. struct completion *tx_wait;
  181. };
  182. /* Per interface specific private data */
  183. struct mwl8k_vif {
  184. /* backpointer to parent config block */
  185. struct mwl8k_priv *priv;
  186. /* BSS config of AP or IBSS from mac80211*/
  187. struct ieee80211_bss_conf bss_info;
  188. /* BSSID of AP or IBSS */
  189. u8 bssid[ETH_ALEN];
  190. u8 mac_addr[ETH_ALEN];
  191. /*
  192. * Subset of supported legacy rates.
  193. * Intersection of AP and STA supported rates.
  194. */
  195. struct ieee80211_rate legacy_rates[12];
  196. /* number of supported legacy rates */
  197. u8 legacy_nrates;
  198. /* Index into station database.Returned by update_sta_db call */
  199. u8 peer_id;
  200. /* Non AMPDU sequence number assigned by driver */
  201. u16 seqno;
  202. };
  203. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  204. static const struct ieee80211_channel mwl8k_channels[] = {
  205. { .center_freq = 2412, .hw_value = 1, },
  206. { .center_freq = 2417, .hw_value = 2, },
  207. { .center_freq = 2422, .hw_value = 3, },
  208. { .center_freq = 2427, .hw_value = 4, },
  209. { .center_freq = 2432, .hw_value = 5, },
  210. { .center_freq = 2437, .hw_value = 6, },
  211. { .center_freq = 2442, .hw_value = 7, },
  212. { .center_freq = 2447, .hw_value = 8, },
  213. { .center_freq = 2452, .hw_value = 9, },
  214. { .center_freq = 2457, .hw_value = 10, },
  215. { .center_freq = 2462, .hw_value = 11, },
  216. };
  217. static const struct ieee80211_rate mwl8k_rates[] = {
  218. { .bitrate = 10, .hw_value = 2, },
  219. { .bitrate = 20, .hw_value = 4, },
  220. { .bitrate = 55, .hw_value = 11, },
  221. { .bitrate = 60, .hw_value = 12, },
  222. { .bitrate = 90, .hw_value = 18, },
  223. { .bitrate = 110, .hw_value = 22, },
  224. { .bitrate = 120, .hw_value = 24, },
  225. { .bitrate = 180, .hw_value = 36, },
  226. { .bitrate = 240, .hw_value = 48, },
  227. { .bitrate = 360, .hw_value = 72, },
  228. { .bitrate = 480, .hw_value = 96, },
  229. { .bitrate = 540, .hw_value = 108, },
  230. };
  231. /* Radio settings */
  232. #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
  233. #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
  234. #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
  235. /* WMM */
  236. #define MWL8K_WMM_ENABLE 1
  237. #define MWL8K_WMM_DISABLE 0
  238. #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
  239. /* Slot time */
  240. /* Short Slot: 9us slot time */
  241. #define MWL8K_SHORT_SLOTTIME 1
  242. /* Long slot: 20us slot time */
  243. #define MWL8K_LONG_SLOTTIME 0
  244. /* Set or get info from Firmware */
  245. #define MWL8K_CMD_SET 0x0001
  246. #define MWL8K_CMD_GET 0x0000
  247. /* Firmware command codes */
  248. #define MWL8K_CMD_CODE_DNLD 0x0001
  249. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  250. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  251. #define MWL8K_CMD_GET_STAT 0x0014
  252. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  253. #define MWL8K_CMD_RF_TX_POWER 0x001e
  254. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  255. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  256. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  257. #define MWL8K_CMD_SET_AID 0x010d
  258. #define MWL8K_CMD_SET_RATE 0x0110
  259. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  260. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  261. #define MWL8K_CMD_SET_SLOT 0x0114
  262. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  263. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  264. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  265. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  266. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  267. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  268. #define MWL8K_CMD_UPDATE_STADB 0x1123
  269. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  270. {
  271. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  272. snprintf(buf, bufsize, "%s", #x);\
  273. return buf;\
  274. } while (0)
  275. switch (cmd & ~0x8000) {
  276. MWL8K_CMDNAME(CODE_DNLD);
  277. MWL8K_CMDNAME(GET_HW_SPEC);
  278. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  279. MWL8K_CMDNAME(GET_STAT);
  280. MWL8K_CMDNAME(RADIO_CONTROL);
  281. MWL8K_CMDNAME(RF_TX_POWER);
  282. MWL8K_CMDNAME(SET_PRE_SCAN);
  283. MWL8K_CMDNAME(SET_POST_SCAN);
  284. MWL8K_CMDNAME(SET_RF_CHANNEL);
  285. MWL8K_CMDNAME(SET_AID);
  286. MWL8K_CMDNAME(SET_RATE);
  287. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  288. MWL8K_CMDNAME(RTS_THRESHOLD);
  289. MWL8K_CMDNAME(SET_SLOT);
  290. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  291. MWL8K_CMDNAME(SET_WMM_MODE);
  292. MWL8K_CMDNAME(MIMO_CONFIG);
  293. MWL8K_CMDNAME(USE_FIXED_RATE);
  294. MWL8K_CMDNAME(ENABLE_SNIFFER);
  295. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  296. MWL8K_CMDNAME(UPDATE_STADB);
  297. default:
  298. snprintf(buf, bufsize, "0x%x", cmd);
  299. }
  300. #undef MWL8K_CMDNAME
  301. return buf;
  302. }
  303. /* Hardware and firmware reset */
  304. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  305. {
  306. iowrite32(MWL8K_H2A_INT_RESET,
  307. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  308. iowrite32(MWL8K_H2A_INT_RESET,
  309. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  310. msleep(20);
  311. }
  312. /* Release fw image */
  313. static void mwl8k_release_fw(struct firmware **fw)
  314. {
  315. if (*fw == NULL)
  316. return;
  317. release_firmware(*fw);
  318. *fw = NULL;
  319. }
  320. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  321. {
  322. mwl8k_release_fw(&priv->fw.ucode);
  323. mwl8k_release_fw(&priv->fw.helper);
  324. }
  325. /* Request fw image */
  326. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  327. const char *fname, struct firmware **fw)
  328. {
  329. /* release current image */
  330. if (*fw != NULL)
  331. mwl8k_release_fw(fw);
  332. return request_firmware((const struct firmware **)fw,
  333. fname, &priv->pdev->dev);
  334. }
  335. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  336. {
  337. u8 filename[64];
  338. int rc;
  339. priv->part_num = part_num;
  340. snprintf(filename, sizeof(filename),
  341. "mwl8k/helper_%u.fw", priv->part_num);
  342. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  343. if (rc) {
  344. printk(KERN_ERR
  345. "%s Error requesting helper firmware file %s\n",
  346. pci_name(priv->pdev), filename);
  347. return rc;
  348. }
  349. snprintf(filename, sizeof(filename),
  350. "mwl8k/fmimage_%u.fw", priv->part_num);
  351. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  352. if (rc) {
  353. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  354. pci_name(priv->pdev), filename);
  355. mwl8k_release_fw(&priv->fw.helper);
  356. return rc;
  357. }
  358. return 0;
  359. }
  360. struct mwl8k_cmd_pkt {
  361. __le16 code;
  362. __le16 length;
  363. __le16 seq_num;
  364. __le16 result;
  365. char payload[0];
  366. } __attribute__((packed));
  367. /*
  368. * Firmware loading.
  369. */
  370. static int
  371. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  372. {
  373. void __iomem *regs = priv->regs;
  374. dma_addr_t dma_addr;
  375. int rc;
  376. int loops;
  377. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  378. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  379. return -ENOMEM;
  380. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  381. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  382. iowrite32(MWL8K_H2A_INT_DOORBELL,
  383. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  384. iowrite32(MWL8K_H2A_INT_DUMMY,
  385. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  386. rc = -ETIMEDOUT;
  387. loops = 1000;
  388. do {
  389. u32 int_code;
  390. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  391. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  392. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  393. rc = 0;
  394. break;
  395. }
  396. udelay(1);
  397. } while (--loops);
  398. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  399. /*
  400. * Clear 'command done' interrupt bit.
  401. */
  402. loops = 1000;
  403. do {
  404. u32 status;
  405. status = ioread32(priv->regs +
  406. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  407. if (status & MWL8K_A2H_INT_OPC_DONE) {
  408. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  409. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  410. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  411. break;
  412. }
  413. udelay(1);
  414. } while (--loops);
  415. return rc;
  416. }
  417. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  418. const u8 *data, size_t length)
  419. {
  420. struct mwl8k_cmd_pkt *cmd;
  421. int done;
  422. int rc = 0;
  423. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  424. if (cmd == NULL)
  425. return -ENOMEM;
  426. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  427. cmd->seq_num = 0;
  428. cmd->result = 0;
  429. done = 0;
  430. while (length) {
  431. int block_size = length > 256 ? 256 : length;
  432. memcpy(cmd->payload, data + done, block_size);
  433. cmd->length = cpu_to_le16(block_size);
  434. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  435. sizeof(*cmd) + block_size);
  436. if (rc)
  437. break;
  438. done += block_size;
  439. length -= block_size;
  440. }
  441. if (!rc) {
  442. cmd->length = 0;
  443. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  444. }
  445. kfree(cmd);
  446. return rc;
  447. }
  448. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  449. const u8 *data, size_t length)
  450. {
  451. unsigned char *buffer;
  452. int may_continue, rc = 0;
  453. u32 done, prev_block_size;
  454. buffer = kmalloc(1024, GFP_KERNEL);
  455. if (buffer == NULL)
  456. return -ENOMEM;
  457. done = 0;
  458. prev_block_size = 0;
  459. may_continue = 1000;
  460. while (may_continue > 0) {
  461. u32 block_size;
  462. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  463. if (block_size & 1) {
  464. block_size &= ~1;
  465. may_continue--;
  466. } else {
  467. done += prev_block_size;
  468. length -= prev_block_size;
  469. }
  470. if (block_size > 1024 || block_size > length) {
  471. rc = -EOVERFLOW;
  472. break;
  473. }
  474. if (length == 0) {
  475. rc = 0;
  476. break;
  477. }
  478. if (block_size == 0) {
  479. rc = -EPROTO;
  480. may_continue--;
  481. udelay(1);
  482. continue;
  483. }
  484. prev_block_size = block_size;
  485. memcpy(buffer, data + done, block_size);
  486. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  487. if (rc)
  488. break;
  489. }
  490. if (!rc && length != 0)
  491. rc = -EREMOTEIO;
  492. kfree(buffer);
  493. return rc;
  494. }
  495. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  496. {
  497. int loops, rc;
  498. const u8 *ucode = priv->fw.ucode->data;
  499. size_t ucode_len = priv->fw.ucode->size;
  500. const u8 *helper = priv->fw.helper->data;
  501. size_t helper_len = priv->fw.helper->size;
  502. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  503. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  504. if (rc) {
  505. printk(KERN_ERR "%s: unable to load firmware "
  506. "helper image\n", pci_name(priv->pdev));
  507. return rc;
  508. }
  509. msleep(1);
  510. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  511. } else {
  512. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  513. }
  514. if (rc) {
  515. printk(KERN_ERR "%s: unable to load firmware data\n",
  516. pci_name(priv->pdev));
  517. return rc;
  518. }
  519. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  520. msleep(1);
  521. loops = 200000;
  522. do {
  523. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  524. == MWL8K_FWSTA_READY)
  525. break;
  526. udelay(1);
  527. } while (--loops);
  528. return loops ? 0 : -ETIMEDOUT;
  529. }
  530. /*
  531. * Defines shared between transmission and reception.
  532. */
  533. /* HT control fields for firmware */
  534. struct ewc_ht_info {
  535. __le16 control1;
  536. __le16 control2;
  537. __le16 control3;
  538. } __attribute__((packed));
  539. /* Firmware Station database operations */
  540. #define MWL8K_STA_DB_ADD_ENTRY 0
  541. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  542. #define MWL8K_STA_DB_DEL_ENTRY 2
  543. #define MWL8K_STA_DB_FLUSH 3
  544. /* Peer Entry flags - used to define the type of the peer node */
  545. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  546. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  547. #define MWL8K_MCS_BITMAP_SIZE 16
  548. struct peer_capability_info {
  549. /* Peer type - AP vs. STA. */
  550. __u8 peer_type;
  551. /* Basic 802.11 capabilities from assoc resp. */
  552. __le16 basic_caps;
  553. /* Set if peer supports 802.11n high throughput (HT). */
  554. __u8 ht_support;
  555. /* Valid if HT is supported. */
  556. __le16 ht_caps;
  557. __u8 extended_ht_caps;
  558. struct ewc_ht_info ewc_info;
  559. /* Legacy rate table. Intersection of our rates and peer rates. */
  560. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  561. /* HT rate table. Intersection of our rates and peer rates. */
  562. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  563. __u8 pad[16];
  564. /* If set, interoperability mode, no proprietary extensions. */
  565. __u8 interop;
  566. __u8 pad2;
  567. __u8 station_id;
  568. __le16 amsdu_enabled;
  569. } __attribute__((packed));
  570. /* Inline functions to manipulate QoS field in data descriptor. */
  571. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  572. {
  573. u16 val_mask = 1 << 4;
  574. /* End of Service Period Bit 4 */
  575. return qos | val_mask;
  576. }
  577. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  578. {
  579. u16 val_mask = 0x3;
  580. u8 shift = 5;
  581. u16 qos_mask = ~(val_mask << shift);
  582. /* Ack Policy Bit 5-6 */
  583. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  584. }
  585. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  586. {
  587. u16 val_mask = 1 << 7;
  588. /* AMSDU present Bit 7 */
  589. return qos | val_mask;
  590. }
  591. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  592. {
  593. u16 val_mask = 0xff;
  594. u8 shift = 8;
  595. u16 qos_mask = ~(val_mask << shift);
  596. /* Queue Length Bits 8-15 */
  597. return (qos & qos_mask) | ((len & val_mask) << shift);
  598. }
  599. /* DMA header used by firmware and hardware. */
  600. struct mwl8k_dma_data {
  601. __le16 fwlen;
  602. struct ieee80211_hdr wh;
  603. } __attribute__((packed));
  604. /* Routines to add/remove DMA header from skb. */
  605. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  606. {
  607. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  608. void *dst, *src = &tr->wh;
  609. __le16 fc = tr->wh.frame_control;
  610. int hdrlen = ieee80211_hdrlen(fc);
  611. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  612. dst = (void *)tr + space;
  613. if (dst != src) {
  614. memmove(dst, src, hdrlen);
  615. skb_pull(skb, space);
  616. }
  617. return 0;
  618. }
  619. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  620. {
  621. struct ieee80211_hdr *wh;
  622. u32 hdrlen, pktlen;
  623. struct mwl8k_dma_data *tr;
  624. wh = (struct ieee80211_hdr *)skb->data;
  625. hdrlen = ieee80211_hdrlen(wh->frame_control);
  626. pktlen = skb->len;
  627. /*
  628. * Copy up/down the 802.11 header; the firmware requires
  629. * we present a 2-byte payload length followed by a
  630. * 4-address header (w/o QoS), followed (optionally) by
  631. * any WEP/ExtIV header (but only filled in for CCMP).
  632. */
  633. if (hdrlen != sizeof(struct mwl8k_dma_data))
  634. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  635. tr = (struct mwl8k_dma_data *)skb->data;
  636. if (wh != &tr->wh)
  637. memmove(&tr->wh, wh, hdrlen);
  638. /* Clear addr4 */
  639. memset(tr->wh.addr4, 0, ETH_ALEN);
  640. /*
  641. * Firmware length is the length of the fully formed "802.11
  642. * payload". That is, everything except for the 802.11 header.
  643. * This includes all crypto material including the MIC.
  644. */
  645. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  646. return skb;
  647. }
  648. /*
  649. * Packet reception.
  650. */
  651. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  652. struct mwl8k_rx_desc {
  653. __le16 pkt_len;
  654. __u8 link_quality;
  655. __u8 noise_level;
  656. __le32 pkt_phys_addr;
  657. __le32 next_rx_desc_phys_addr;
  658. __le16 qos_control;
  659. __le16 rate_info;
  660. __le32 pad0[4];
  661. __u8 rssi;
  662. __u8 channel;
  663. __le16 pad1;
  664. __u8 rx_ctrl;
  665. __u8 rx_status;
  666. __u8 pad2[2];
  667. } __attribute__((packed));
  668. #define MWL8K_RX_DESCS 256
  669. #define MWL8K_RX_MAXSZ 3800
  670. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  671. {
  672. struct mwl8k_priv *priv = hw->priv;
  673. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  674. int size;
  675. int i;
  676. rxq->rx_desc_count = 0;
  677. rxq->rx_head = 0;
  678. rxq->rx_tail = 0;
  679. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  680. rxq->rx_desc_area =
  681. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  682. if (rxq->rx_desc_area == NULL) {
  683. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  684. priv->name);
  685. return -ENOMEM;
  686. }
  687. memset(rxq->rx_desc_area, 0, size);
  688. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  689. sizeof(*rxq->rx_skb), GFP_KERNEL);
  690. if (rxq->rx_skb == NULL) {
  691. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  692. priv->name);
  693. pci_free_consistent(priv->pdev, size,
  694. rxq->rx_desc_area, rxq->rx_desc_dma);
  695. return -ENOMEM;
  696. }
  697. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  698. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  699. struct mwl8k_rx_desc *rx_desc;
  700. int nexti;
  701. rx_desc = rxq->rx_desc_area + i;
  702. nexti = (i + 1) % MWL8K_RX_DESCS;
  703. rx_desc->next_rx_desc_phys_addr =
  704. cpu_to_le32(rxq->rx_desc_dma
  705. + nexti * sizeof(*rx_desc));
  706. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  707. }
  708. return 0;
  709. }
  710. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  711. {
  712. struct mwl8k_priv *priv = hw->priv;
  713. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  714. int refilled;
  715. refilled = 0;
  716. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  717. struct sk_buff *skb;
  718. int rx;
  719. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  720. if (skb == NULL)
  721. break;
  722. rxq->rx_desc_count++;
  723. rx = rxq->rx_tail;
  724. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  725. rxq->rx_desc_area[rx].pkt_phys_addr =
  726. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  727. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  728. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  729. rxq->rx_skb[rx] = skb;
  730. wmb();
  731. rxq->rx_desc_area[rx].rx_ctrl = 0;
  732. refilled++;
  733. }
  734. return refilled;
  735. }
  736. /* Must be called only when the card's reception is completely halted */
  737. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  738. {
  739. struct mwl8k_priv *priv = hw->priv;
  740. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  741. int i;
  742. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  743. if (rxq->rx_skb[i] != NULL) {
  744. unsigned long addr;
  745. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  746. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  747. PCI_DMA_FROMDEVICE);
  748. kfree_skb(rxq->rx_skb[i]);
  749. rxq->rx_skb[i] = NULL;
  750. }
  751. }
  752. kfree(rxq->rx_skb);
  753. rxq->rx_skb = NULL;
  754. pci_free_consistent(priv->pdev,
  755. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  756. rxq->rx_desc_area, rxq->rx_desc_dma);
  757. rxq->rx_desc_area = NULL;
  758. }
  759. /*
  760. * Scan a list of BSSIDs to process for finalize join.
  761. * Allows for extension to process multiple BSSIDs.
  762. */
  763. static inline int
  764. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  765. {
  766. return priv->capture_beacon &&
  767. ieee80211_is_beacon(wh->frame_control) &&
  768. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  769. }
  770. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  771. struct sk_buff *skb)
  772. {
  773. priv->capture_beacon = false;
  774. memset(priv->capture_bssid, 0, ETH_ALEN);
  775. /*
  776. * Use GFP_ATOMIC as rxq_process is called from
  777. * the primary interrupt handler, memory allocation call
  778. * must not sleep.
  779. */
  780. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  781. if (priv->beacon_skb != NULL)
  782. queue_work(priv->config_wq,
  783. &priv->finalize_join_worker);
  784. }
  785. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  786. {
  787. struct mwl8k_priv *priv = hw->priv;
  788. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  789. int processed;
  790. processed = 0;
  791. while (rxq->rx_desc_count && limit--) {
  792. struct mwl8k_rx_desc *rx_desc;
  793. struct sk_buff *skb;
  794. struct ieee80211_rx_status status;
  795. unsigned long addr;
  796. struct ieee80211_hdr *wh;
  797. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  798. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  799. break;
  800. rmb();
  801. skb = rxq->rx_skb[rxq->rx_head];
  802. if (skb == NULL)
  803. break;
  804. rxq->rx_skb[rxq->rx_head] = NULL;
  805. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  806. rxq->rx_desc_count--;
  807. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  808. pci_unmap_single(priv->pdev, addr,
  809. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  810. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  811. if (mwl8k_remove_dma_header(skb)) {
  812. dev_kfree_skb(skb);
  813. continue;
  814. }
  815. wh = (struct ieee80211_hdr *)skb->data;
  816. /*
  817. * Check for pending join operation. save a copy of
  818. * the beacon and schedule a tasklet to send finalize
  819. * join command to the firmware.
  820. */
  821. if (mwl8k_capture_bssid(priv, wh))
  822. mwl8k_save_beacon(priv, skb);
  823. memset(&status, 0, sizeof(status));
  824. status.mactime = 0;
  825. status.signal = -rx_desc->rssi;
  826. status.noise = -rx_desc->noise_level;
  827. status.qual = rx_desc->link_quality;
  828. status.antenna = 1;
  829. status.rate_idx = 1;
  830. status.flag = 0;
  831. status.band = IEEE80211_BAND_2GHZ;
  832. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  833. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  834. ieee80211_rx_irqsafe(hw, skb);
  835. processed++;
  836. }
  837. return processed;
  838. }
  839. /*
  840. * Packet transmission.
  841. */
  842. /* Transmit queue assignment. */
  843. enum {
  844. MWL8K_WME_AC_BK = 0, /* background access */
  845. MWL8K_WME_AC_BE = 1, /* best effort access */
  846. MWL8K_WME_AC_VI = 2, /* video access */
  847. MWL8K_WME_AC_VO = 3, /* voice access */
  848. };
  849. /* Transmit packet ACK policy */
  850. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  851. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  852. #define GET_TXQ(_ac) (\
  853. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  854. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  855. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  856. MWL8K_WME_AC_BE)
  857. #define MWL8K_TXD_STATUS_OK 0x00000001
  858. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  859. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  860. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  861. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  862. struct mwl8k_tx_desc {
  863. __le32 status;
  864. __u8 data_rate;
  865. __u8 tx_priority;
  866. __le16 qos_control;
  867. __le32 pkt_phys_addr;
  868. __le16 pkt_len;
  869. __u8 dest_MAC_addr[ETH_ALEN];
  870. __le32 next_tx_desc_phys_addr;
  871. __le32 reserved;
  872. __le16 rate_info;
  873. __u8 peer_id;
  874. __u8 tx_frag_cnt;
  875. } __attribute__((packed));
  876. #define MWL8K_TX_DESCS 128
  877. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  878. {
  879. struct mwl8k_priv *priv = hw->priv;
  880. struct mwl8k_tx_queue *txq = priv->txq + index;
  881. int size;
  882. int i;
  883. memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  884. txq->tx_stats.limit = MWL8K_TX_DESCS;
  885. txq->tx_head = 0;
  886. txq->tx_tail = 0;
  887. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  888. txq->tx_desc_area =
  889. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  890. if (txq->tx_desc_area == NULL) {
  891. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  892. priv->name);
  893. return -ENOMEM;
  894. }
  895. memset(txq->tx_desc_area, 0, size);
  896. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  897. GFP_KERNEL);
  898. if (txq->tx_skb == NULL) {
  899. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  900. priv->name);
  901. pci_free_consistent(priv->pdev, size,
  902. txq->tx_desc_area, txq->tx_desc_dma);
  903. return -ENOMEM;
  904. }
  905. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  906. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  907. struct mwl8k_tx_desc *tx_desc;
  908. int nexti;
  909. tx_desc = txq->tx_desc_area + i;
  910. nexti = (i + 1) % MWL8K_TX_DESCS;
  911. tx_desc->status = 0;
  912. tx_desc->next_tx_desc_phys_addr =
  913. cpu_to_le32(txq->tx_desc_dma +
  914. nexti * sizeof(*tx_desc));
  915. }
  916. return 0;
  917. }
  918. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  919. {
  920. iowrite32(MWL8K_H2A_INT_PPA_READY,
  921. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  922. iowrite32(MWL8K_H2A_INT_DUMMY,
  923. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  924. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  925. }
  926. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  927. {
  928. return priv->pending_tx_pkts;
  929. }
  930. struct mwl8k_txq_info {
  931. u32 fw_owned;
  932. u32 drv_owned;
  933. u32 unused;
  934. u32 len;
  935. u32 head;
  936. u32 tail;
  937. };
  938. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  939. struct mwl8k_txq_info txinfo[],
  940. u32 num_queues)
  941. {
  942. int count, desc, status;
  943. struct mwl8k_tx_queue *txq;
  944. struct mwl8k_tx_desc *tx_desc;
  945. int ndescs = 0;
  946. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  947. spin_lock_bh(&priv->tx_lock);
  948. for (count = 0; count < num_queues; count++) {
  949. txq = priv->txq + count;
  950. txinfo[count].len = txq->tx_stats.len;
  951. txinfo[count].head = txq->tx_head;
  952. txinfo[count].tail = txq->tx_tail;
  953. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  954. tx_desc = txq->tx_desc_area + desc;
  955. status = le32_to_cpu(tx_desc->status);
  956. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  957. txinfo[count].fw_owned++;
  958. else
  959. txinfo[count].drv_owned++;
  960. if (tx_desc->pkt_len == 0)
  961. txinfo[count].unused++;
  962. }
  963. }
  964. spin_unlock_bh(&priv->tx_lock);
  965. return ndescs;
  966. }
  967. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  968. {
  969. struct mwl8k_priv *priv = hw->priv;
  970. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  971. u32 count;
  972. unsigned long timeout;
  973. might_sleep();
  974. if (priv->tx_wait != NULL)
  975. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  976. spin_lock_bh(&priv->tx_lock);
  977. count = mwl8k_txq_busy(priv);
  978. if (count) {
  979. priv->tx_wait = &cmd_wait;
  980. if (priv->radio_on)
  981. mwl8k_tx_start(priv);
  982. }
  983. spin_unlock_bh(&priv->tx_lock);
  984. if (count) {
  985. struct mwl8k_txq_info txinfo[4];
  986. int index;
  987. int newcount;
  988. timeout = wait_for_completion_timeout(&cmd_wait,
  989. msecs_to_jiffies(delay_ms));
  990. if (timeout)
  991. return 0;
  992. spin_lock_bh(&priv->tx_lock);
  993. priv->tx_wait = NULL;
  994. newcount = mwl8k_txq_busy(priv);
  995. spin_unlock_bh(&priv->tx_lock);
  996. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  997. __func__, __LINE__, delay_ms, count, newcount);
  998. mwl8k_scan_tx_ring(priv, txinfo, 4);
  999. for (index = 0; index < 4; index++)
  1000. printk(KERN_ERR
  1001. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  1002. index,
  1003. txinfo[index].len,
  1004. txinfo[index].head,
  1005. txinfo[index].tail,
  1006. txinfo[index].fw_owned,
  1007. txinfo[index].drv_owned,
  1008. txinfo[index].unused);
  1009. return -ETIMEDOUT;
  1010. }
  1011. return 0;
  1012. }
  1013. #define MWL8K_TXD_SUCCESS(status) \
  1014. ((status) & (MWL8K_TXD_STATUS_OK | \
  1015. MWL8K_TXD_STATUS_OK_RETRY | \
  1016. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1017. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1018. {
  1019. struct mwl8k_priv *priv = hw->priv;
  1020. struct mwl8k_tx_queue *txq = priv->txq + index;
  1021. int wake = 0;
  1022. while (txq->tx_stats.len > 0) {
  1023. int tx;
  1024. int rc;
  1025. struct mwl8k_tx_desc *tx_desc;
  1026. unsigned long addr;
  1027. int size;
  1028. struct sk_buff *skb;
  1029. struct ieee80211_tx_info *info;
  1030. u32 status;
  1031. rc = 0;
  1032. tx = txq->tx_head;
  1033. tx_desc = txq->tx_desc_area + tx;
  1034. status = le32_to_cpu(tx_desc->status);
  1035. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1036. if (!force)
  1037. break;
  1038. tx_desc->status &=
  1039. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1040. }
  1041. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1042. BUG_ON(txq->tx_stats.len == 0);
  1043. txq->tx_stats.len--;
  1044. priv->pending_tx_pkts--;
  1045. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1046. size = le16_to_cpu(tx_desc->pkt_len);
  1047. skb = txq->tx_skb[tx].skb;
  1048. txq->tx_skb[tx].skb = NULL;
  1049. BUG_ON(skb == NULL);
  1050. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1051. rc = mwl8k_remove_dma_header(skb);
  1052. /* Mark descriptor as unused */
  1053. tx_desc->pkt_phys_addr = 0;
  1054. tx_desc->pkt_len = 0;
  1055. if (txq->tx_skb[tx].clone) {
  1056. /* Replace with original skb
  1057. * before returning to stack
  1058. * as buffer has been cloned
  1059. */
  1060. dev_kfree_skb(skb);
  1061. skb = txq->tx_skb[tx].clone;
  1062. txq->tx_skb[tx].clone = NULL;
  1063. }
  1064. if (rc) {
  1065. /* Something has gone wrong here.
  1066. * Failed to remove DMA header.
  1067. * Print error message and drop packet.
  1068. */
  1069. printk(KERN_ERR "%s: Error removing DMA header from "
  1070. "tx skb 0x%p.\n", priv->name, skb);
  1071. dev_kfree_skb(skb);
  1072. continue;
  1073. }
  1074. info = IEEE80211_SKB_CB(skb);
  1075. ieee80211_tx_info_clear_status(info);
  1076. if (MWL8K_TXD_SUCCESS(status))
  1077. info->flags |= IEEE80211_TX_STAT_ACK;
  1078. ieee80211_tx_status_irqsafe(hw, skb);
  1079. wake = !priv->inconfig && priv->radio_on;
  1080. }
  1081. if (wake)
  1082. ieee80211_wake_queue(hw, index);
  1083. }
  1084. /* must be called only when the card's transmit is completely halted */
  1085. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1086. {
  1087. struct mwl8k_priv *priv = hw->priv;
  1088. struct mwl8k_tx_queue *txq = priv->txq + index;
  1089. mwl8k_txq_reclaim(hw, index, 1);
  1090. kfree(txq->tx_skb);
  1091. txq->tx_skb = NULL;
  1092. pci_free_consistent(priv->pdev,
  1093. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1094. txq->tx_desc_area, txq->tx_desc_dma);
  1095. txq->tx_desc_area = NULL;
  1096. }
  1097. static int
  1098. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1099. {
  1100. struct mwl8k_priv *priv = hw->priv;
  1101. struct ieee80211_tx_info *tx_info;
  1102. struct ieee80211_hdr *wh;
  1103. struct mwl8k_tx_queue *txq;
  1104. struct mwl8k_tx_desc *tx;
  1105. struct mwl8k_dma_data *tr;
  1106. struct mwl8k_vif *mwl8k_vif;
  1107. struct sk_buff *org_skb = skb;
  1108. dma_addr_t dma;
  1109. u16 qos = 0;
  1110. bool qosframe = false, ampduframe = false;
  1111. bool mcframe = false, eapolframe = false;
  1112. bool amsduframe = false;
  1113. __le16 fc;
  1114. txq = priv->txq + index;
  1115. tx = txq->tx_desc_area + txq->tx_tail;
  1116. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1117. /*
  1118. * Append HW DMA header to start of packet. Drop packet if
  1119. * there is not enough space or a failure to unshare/unclone
  1120. * the skb.
  1121. */
  1122. skb = mwl8k_add_dma_header(skb);
  1123. if (skb == NULL) {
  1124. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1125. "header, dropping TX frame.\n", priv->name);
  1126. dev_kfree_skb(org_skb);
  1127. return NETDEV_TX_OK;
  1128. }
  1129. tx_info = IEEE80211_SKB_CB(skb);
  1130. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1131. tr = (struct mwl8k_dma_data *)skb->data;
  1132. wh = &tr->wh;
  1133. fc = wh->frame_control;
  1134. qosframe = ieee80211_is_data_qos(fc);
  1135. mcframe = is_multicast_ether_addr(wh->addr1);
  1136. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1137. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1138. u16 seqno = mwl8k_vif->seqno;
  1139. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1140. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1141. mwl8k_vif->seqno = seqno++ % 4096;
  1142. }
  1143. if (qosframe)
  1144. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1145. dma = pci_map_single(priv->pdev, skb->data,
  1146. skb->len, PCI_DMA_TODEVICE);
  1147. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1148. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1149. "dropping TX frame.\n", priv->name);
  1150. if (org_skb != NULL)
  1151. dev_kfree_skb(org_skb);
  1152. if (skb != NULL)
  1153. dev_kfree_skb(skb);
  1154. return NETDEV_TX_OK;
  1155. }
  1156. /* Set desc header, cpu bit order. */
  1157. tx->status = 0;
  1158. tx->data_rate = 0;
  1159. tx->tx_priority = index;
  1160. tx->qos_control = 0;
  1161. tx->rate_info = 0;
  1162. tx->peer_id = mwl8k_vif->peer_id;
  1163. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1164. /* Setup firmware control bit fields for each frame type. */
  1165. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1166. tx->data_rate = 0;
  1167. qos = mwl8k_qos_setbit_eosp(qos);
  1168. /* Set Queue size to unspecified */
  1169. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1170. } else if (ieee80211_is_data(fc)) {
  1171. tx->data_rate = 1;
  1172. if (mcframe)
  1173. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1174. /*
  1175. * Tell firmware to not send EAPOL pkts in an
  1176. * aggregate. Verify against mac80211 tx path. If
  1177. * stack turns off AMPDU for an EAPOL frame this
  1178. * check will be removed.
  1179. */
  1180. if (eapolframe) {
  1181. qos = mwl8k_qos_setbit_ack(qos,
  1182. MWL8K_TXD_ACK_POLICY_NORMAL);
  1183. } else {
  1184. /* Send pkt in an aggregate if AMPDU frame. */
  1185. if (ampduframe)
  1186. qos = mwl8k_qos_setbit_ack(qos,
  1187. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1188. else
  1189. qos = mwl8k_qos_setbit_ack(qos,
  1190. MWL8K_TXD_ACK_POLICY_NORMAL);
  1191. if (amsduframe)
  1192. qos = mwl8k_qos_setbit_amsdu(qos);
  1193. }
  1194. }
  1195. /* Convert to little endian */
  1196. tx->qos_control = cpu_to_le16(qos);
  1197. tx->status = cpu_to_le32(tx->status);
  1198. tx->pkt_phys_addr = cpu_to_le32(dma);
  1199. tx->pkt_len = cpu_to_le16(skb->len);
  1200. txq->tx_skb[txq->tx_tail].skb = skb;
  1201. txq->tx_skb[txq->tx_tail].clone =
  1202. skb == org_skb ? NULL : org_skb;
  1203. spin_lock_bh(&priv->tx_lock);
  1204. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1205. MWL8K_TXD_STATUS_FW_OWNED);
  1206. wmb();
  1207. txq->tx_stats.len++;
  1208. priv->pending_tx_pkts++;
  1209. txq->tx_stats.count++;
  1210. txq->tx_tail++;
  1211. if (txq->tx_tail == MWL8K_TX_DESCS)
  1212. txq->tx_tail = 0;
  1213. if (txq->tx_head == txq->tx_tail)
  1214. ieee80211_stop_queue(hw, index);
  1215. if (priv->inconfig) {
  1216. /*
  1217. * Silently queue packet when we are in the middle of
  1218. * a config cycle. Notify firmware only if we are
  1219. * waiting for TXQs to empty. If a packet is sent
  1220. * before .config() is complete, perhaps it is better
  1221. * to drop the packet, as the channel is being changed
  1222. * and the packet will end up on the wrong channel.
  1223. */
  1224. printk(KERN_ERR "%s(): WARNING TX activity while "
  1225. "in config\n", __func__);
  1226. if (priv->tx_wait != NULL)
  1227. mwl8k_tx_start(priv);
  1228. } else
  1229. mwl8k_tx_start(priv);
  1230. spin_unlock_bh(&priv->tx_lock);
  1231. return NETDEV_TX_OK;
  1232. }
  1233. /*
  1234. * Command processing.
  1235. */
  1236. /* Timeout firmware commands after 2000ms */
  1237. #define MWL8K_CMD_TIMEOUT_MS 2000
  1238. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1239. {
  1240. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1241. struct mwl8k_priv *priv = hw->priv;
  1242. void __iomem *regs = priv->regs;
  1243. dma_addr_t dma_addr;
  1244. unsigned int dma_size;
  1245. int rc;
  1246. unsigned long timeout = 0;
  1247. u8 buf[32];
  1248. cmd->result = 0xFFFF;
  1249. dma_size = le16_to_cpu(cmd->length);
  1250. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1251. PCI_DMA_BIDIRECTIONAL);
  1252. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1253. return -ENOMEM;
  1254. if (priv->hostcmd_wait != NULL)
  1255. printk(KERN_ERR "WARNING host command in progress\n");
  1256. spin_lock_irq(&priv->fw_lock);
  1257. priv->hostcmd_wait = &cmd_wait;
  1258. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1259. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1260. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1261. iowrite32(MWL8K_H2A_INT_DUMMY,
  1262. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1263. spin_unlock_irq(&priv->fw_lock);
  1264. timeout = wait_for_completion_timeout(&cmd_wait,
  1265. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1266. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1267. PCI_DMA_BIDIRECTIONAL);
  1268. if (!timeout) {
  1269. spin_lock_irq(&priv->fw_lock);
  1270. priv->hostcmd_wait = NULL;
  1271. spin_unlock_irq(&priv->fw_lock);
  1272. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1273. priv->name,
  1274. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1275. MWL8K_CMD_TIMEOUT_MS);
  1276. rc = -ETIMEDOUT;
  1277. } else {
  1278. rc = cmd->result ? -EINVAL : 0;
  1279. if (rc)
  1280. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1281. priv->name,
  1282. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1283. cmd->result);
  1284. }
  1285. return rc;
  1286. }
  1287. /*
  1288. * GET_HW_SPEC.
  1289. */
  1290. struct mwl8k_cmd_get_hw_spec {
  1291. struct mwl8k_cmd_pkt header;
  1292. __u8 hw_rev;
  1293. __u8 host_interface;
  1294. __le16 num_mcaddrs;
  1295. __u8 perm_addr[ETH_ALEN];
  1296. __le16 region_code;
  1297. __le32 fw_rev;
  1298. __le32 ps_cookie;
  1299. __le32 caps;
  1300. __u8 mcs_bitmap[16];
  1301. __le32 rx_queue_ptr;
  1302. __le32 num_tx_queues;
  1303. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1304. __le32 caps2;
  1305. __le32 num_tx_desc_per_queue;
  1306. __le32 total_rx_desc;
  1307. } __attribute__((packed));
  1308. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1309. {
  1310. struct mwl8k_priv *priv = hw->priv;
  1311. struct mwl8k_cmd_get_hw_spec *cmd;
  1312. int rc;
  1313. int i;
  1314. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1315. if (cmd == NULL)
  1316. return -ENOMEM;
  1317. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1318. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1319. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1320. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1321. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1322. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1323. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1324. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1325. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1326. cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
  1327. rc = mwl8k_post_cmd(hw, &cmd->header);
  1328. if (!rc) {
  1329. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1330. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1331. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1332. priv->hw_rev = cmd->hw_rev;
  1333. }
  1334. kfree(cmd);
  1335. return rc;
  1336. }
  1337. /*
  1338. * CMD_MAC_MULTICAST_ADR.
  1339. */
  1340. struct mwl8k_cmd_mac_multicast_adr {
  1341. struct mwl8k_cmd_pkt header;
  1342. __le16 action;
  1343. __le16 numaddr;
  1344. __u8 addr[0][ETH_ALEN];
  1345. };
  1346. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1347. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1348. int mc_count,
  1349. struct dev_addr_list *mclist)
  1350. {
  1351. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1352. int index = 0;
  1353. int rc;
  1354. int size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1355. cmd = kzalloc(size, GFP_KERNEL);
  1356. if (cmd == NULL)
  1357. return -ENOMEM;
  1358. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1359. cmd->header.length = cpu_to_le16(size);
  1360. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1361. cmd->numaddr = cpu_to_le16(mc_count);
  1362. while (index < mc_count && mclist) {
  1363. if (mclist->da_addrlen != ETH_ALEN) {
  1364. rc = -EINVAL;
  1365. goto mwl8k_cmd_mac_multicast_adr_exit;
  1366. }
  1367. memcpy(cmd->addr[index++], mclist->da_addr, ETH_ALEN);
  1368. mclist = mclist->next;
  1369. }
  1370. rc = mwl8k_post_cmd(hw, &cmd->header);
  1371. mwl8k_cmd_mac_multicast_adr_exit:
  1372. kfree(cmd);
  1373. return rc;
  1374. }
  1375. /*
  1376. * CMD_802_11_GET_STAT.
  1377. */
  1378. struct mwl8k_cmd_802_11_get_stat {
  1379. struct mwl8k_cmd_pkt header;
  1380. __le16 action;
  1381. __le32 stats[64];
  1382. } __attribute__((packed));
  1383. #define MWL8K_STAT_ACK_FAILURE 9
  1384. #define MWL8K_STAT_RTS_FAILURE 12
  1385. #define MWL8K_STAT_FCS_ERROR 24
  1386. #define MWL8K_STAT_RTS_SUCCESS 11
  1387. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1388. struct ieee80211_low_level_stats *stats)
  1389. {
  1390. struct mwl8k_cmd_802_11_get_stat *cmd;
  1391. int rc;
  1392. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1393. if (cmd == NULL)
  1394. return -ENOMEM;
  1395. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1396. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1397. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1398. rc = mwl8k_post_cmd(hw, &cmd->header);
  1399. if (!rc) {
  1400. stats->dot11ACKFailureCount =
  1401. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1402. stats->dot11RTSFailureCount =
  1403. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1404. stats->dot11FCSErrorCount =
  1405. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1406. stats->dot11RTSSuccessCount =
  1407. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1408. }
  1409. kfree(cmd);
  1410. return rc;
  1411. }
  1412. /*
  1413. * CMD_802_11_RADIO_CONTROL.
  1414. */
  1415. struct mwl8k_cmd_802_11_radio_control {
  1416. struct mwl8k_cmd_pkt header;
  1417. __le16 action;
  1418. __le16 control;
  1419. __le16 radio_on;
  1420. } __attribute__((packed));
  1421. static int
  1422. mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1423. {
  1424. struct mwl8k_priv *priv = hw->priv;
  1425. struct mwl8k_cmd_802_11_radio_control *cmd;
  1426. int rc;
  1427. if (enable == priv->radio_on && !force)
  1428. return 0;
  1429. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1430. if (cmd == NULL)
  1431. return -ENOMEM;
  1432. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1433. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1434. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1435. cmd->control = cpu_to_le16(priv->radio_preamble);
  1436. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1437. rc = mwl8k_post_cmd(hw, &cmd->header);
  1438. kfree(cmd);
  1439. if (!rc)
  1440. priv->radio_on = enable;
  1441. return rc;
  1442. }
  1443. static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
  1444. {
  1445. return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
  1446. }
  1447. static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
  1448. {
  1449. return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
  1450. }
  1451. static int
  1452. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1453. {
  1454. struct mwl8k_priv *priv;
  1455. if (hw == NULL || hw->priv == NULL)
  1456. return -EINVAL;
  1457. priv = hw->priv;
  1458. priv->radio_preamble = (short_preamble ?
  1459. MWL8K_RADIO_SHORT_PREAMBLE :
  1460. MWL8K_RADIO_LONG_PREAMBLE);
  1461. return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
  1462. }
  1463. /*
  1464. * CMD_802_11_RF_TX_POWER.
  1465. */
  1466. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1467. struct mwl8k_cmd_802_11_rf_tx_power {
  1468. struct mwl8k_cmd_pkt header;
  1469. __le16 action;
  1470. __le16 support_level;
  1471. __le16 current_level;
  1472. __le16 reserved;
  1473. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1474. } __attribute__((packed));
  1475. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1476. {
  1477. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1478. int rc;
  1479. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1480. if (cmd == NULL)
  1481. return -ENOMEM;
  1482. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1483. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1484. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1485. cmd->support_level = cpu_to_le16(dBm);
  1486. rc = mwl8k_post_cmd(hw, &cmd->header);
  1487. kfree(cmd);
  1488. return rc;
  1489. }
  1490. /*
  1491. * CMD_SET_PRE_SCAN.
  1492. */
  1493. struct mwl8k_cmd_set_pre_scan {
  1494. struct mwl8k_cmd_pkt header;
  1495. } __attribute__((packed));
  1496. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1497. {
  1498. struct mwl8k_cmd_set_pre_scan *cmd;
  1499. int rc;
  1500. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1501. if (cmd == NULL)
  1502. return -ENOMEM;
  1503. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1504. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1505. rc = mwl8k_post_cmd(hw, &cmd->header);
  1506. kfree(cmd);
  1507. return rc;
  1508. }
  1509. /*
  1510. * CMD_SET_POST_SCAN.
  1511. */
  1512. struct mwl8k_cmd_set_post_scan {
  1513. struct mwl8k_cmd_pkt header;
  1514. __le32 isibss;
  1515. __u8 bssid[ETH_ALEN];
  1516. } __attribute__((packed));
  1517. static int
  1518. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
  1519. {
  1520. struct mwl8k_cmd_set_post_scan *cmd;
  1521. int rc;
  1522. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1523. if (cmd == NULL)
  1524. return -ENOMEM;
  1525. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1526. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1527. cmd->isibss = 0;
  1528. memcpy(cmd->bssid, mac, ETH_ALEN);
  1529. rc = mwl8k_post_cmd(hw, &cmd->header);
  1530. kfree(cmd);
  1531. return rc;
  1532. }
  1533. /*
  1534. * CMD_SET_RF_CHANNEL.
  1535. */
  1536. struct mwl8k_cmd_set_rf_channel {
  1537. struct mwl8k_cmd_pkt header;
  1538. __le16 action;
  1539. __u8 current_channel;
  1540. __le32 channel_flags;
  1541. } __attribute__((packed));
  1542. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1543. struct ieee80211_channel *channel)
  1544. {
  1545. struct mwl8k_cmd_set_rf_channel *cmd;
  1546. int rc;
  1547. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1548. if (cmd == NULL)
  1549. return -ENOMEM;
  1550. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1551. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1552. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1553. cmd->current_channel = channel->hw_value;
  1554. if (channel->band == IEEE80211_BAND_2GHZ)
  1555. cmd->channel_flags = cpu_to_le32(0x00000081);
  1556. else
  1557. cmd->channel_flags = cpu_to_le32(0x00000000);
  1558. rc = mwl8k_post_cmd(hw, &cmd->header);
  1559. kfree(cmd);
  1560. return rc;
  1561. }
  1562. /*
  1563. * CMD_SET_SLOT.
  1564. */
  1565. struct mwl8k_cmd_set_slot {
  1566. struct mwl8k_cmd_pkt header;
  1567. __le16 action;
  1568. __u8 short_slot;
  1569. } __attribute__((packed));
  1570. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1571. {
  1572. struct mwl8k_cmd_set_slot *cmd;
  1573. int rc;
  1574. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1575. if (cmd == NULL)
  1576. return -ENOMEM;
  1577. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1578. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1579. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1580. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1581. rc = mwl8k_post_cmd(hw, &cmd->header);
  1582. kfree(cmd);
  1583. return rc;
  1584. }
  1585. /*
  1586. * CMD_MIMO_CONFIG.
  1587. */
  1588. struct mwl8k_cmd_mimo_config {
  1589. struct mwl8k_cmd_pkt header;
  1590. __le32 action;
  1591. __u8 rx_antenna_map;
  1592. __u8 tx_antenna_map;
  1593. } __attribute__((packed));
  1594. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1595. {
  1596. struct mwl8k_cmd_mimo_config *cmd;
  1597. int rc;
  1598. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1599. if (cmd == NULL)
  1600. return -ENOMEM;
  1601. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1602. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1603. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1604. cmd->rx_antenna_map = rx;
  1605. cmd->tx_antenna_map = tx;
  1606. rc = mwl8k_post_cmd(hw, &cmd->header);
  1607. kfree(cmd);
  1608. return rc;
  1609. }
  1610. /*
  1611. * CMD_ENABLE_SNIFFER.
  1612. */
  1613. struct mwl8k_cmd_enable_sniffer {
  1614. struct mwl8k_cmd_pkt header;
  1615. __le32 action;
  1616. } __attribute__((packed));
  1617. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1618. {
  1619. struct mwl8k_cmd_enable_sniffer *cmd;
  1620. int rc;
  1621. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1622. if (cmd == NULL)
  1623. return -ENOMEM;
  1624. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1625. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1626. cmd->action = cpu_to_le32(!!enable);
  1627. rc = mwl8k_post_cmd(hw, &cmd->header);
  1628. kfree(cmd);
  1629. return rc;
  1630. }
  1631. /*
  1632. * CMD_SET_RATEADAPT_MODE.
  1633. */
  1634. struct mwl8k_cmd_set_rate_adapt_mode {
  1635. struct mwl8k_cmd_pkt header;
  1636. __le16 action;
  1637. __le16 mode;
  1638. } __attribute__((packed));
  1639. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1640. {
  1641. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1642. int rc;
  1643. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1644. if (cmd == NULL)
  1645. return -ENOMEM;
  1646. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1647. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1648. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1649. cmd->mode = cpu_to_le16(mode);
  1650. rc = mwl8k_post_cmd(hw, &cmd->header);
  1651. kfree(cmd);
  1652. return rc;
  1653. }
  1654. /*
  1655. * CMD_SET_WMM_MODE.
  1656. */
  1657. struct mwl8k_cmd_set_wmm {
  1658. struct mwl8k_cmd_pkt header;
  1659. __le16 action;
  1660. } __attribute__((packed));
  1661. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1662. {
  1663. struct mwl8k_priv *priv = hw->priv;
  1664. struct mwl8k_cmd_set_wmm *cmd;
  1665. int rc;
  1666. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1667. if (cmd == NULL)
  1668. return -ENOMEM;
  1669. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1670. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1671. cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
  1672. rc = mwl8k_post_cmd(hw, &cmd->header);
  1673. kfree(cmd);
  1674. if (!rc)
  1675. priv->wmm_mode = enable;
  1676. return rc;
  1677. }
  1678. /*
  1679. * CMD_SET_RTS_THRESHOLD.
  1680. */
  1681. struct mwl8k_cmd_rts_threshold {
  1682. struct mwl8k_cmd_pkt header;
  1683. __le16 action;
  1684. __le16 threshold;
  1685. } __attribute__((packed));
  1686. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1687. u16 action, u16 *threshold)
  1688. {
  1689. struct mwl8k_cmd_rts_threshold *cmd;
  1690. int rc;
  1691. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1692. if (cmd == NULL)
  1693. return -ENOMEM;
  1694. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1695. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1696. cmd->action = cpu_to_le16(action);
  1697. cmd->threshold = cpu_to_le16(*threshold);
  1698. rc = mwl8k_post_cmd(hw, &cmd->header);
  1699. kfree(cmd);
  1700. return rc;
  1701. }
  1702. /*
  1703. * CMD_SET_EDCA_PARAMS.
  1704. */
  1705. struct mwl8k_cmd_set_edca_params {
  1706. struct mwl8k_cmd_pkt header;
  1707. /* See MWL8K_SET_EDCA_XXX below */
  1708. __le16 action;
  1709. /* TX opportunity in units of 32 us */
  1710. __le16 txop;
  1711. /* Log exponent of max contention period: 0...15*/
  1712. __u8 log_cw_max;
  1713. /* Log exponent of min contention period: 0...15 */
  1714. __u8 log_cw_min;
  1715. /* Adaptive interframe spacing in units of 32us */
  1716. __u8 aifs;
  1717. /* TX queue to configure */
  1718. __u8 txq;
  1719. } __attribute__((packed));
  1720. #define MWL8K_SET_EDCA_CW 0x01
  1721. #define MWL8K_SET_EDCA_TXOP 0x02
  1722. #define MWL8K_SET_EDCA_AIFS 0x04
  1723. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1724. MWL8K_SET_EDCA_TXOP | \
  1725. MWL8K_SET_EDCA_AIFS)
  1726. static int
  1727. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1728. __u16 cw_min, __u16 cw_max,
  1729. __u8 aifs, __u16 txop)
  1730. {
  1731. struct mwl8k_cmd_set_edca_params *cmd;
  1732. int rc;
  1733. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1734. if (cmd == NULL)
  1735. return -ENOMEM;
  1736. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1737. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1738. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1739. cmd->txop = cpu_to_le16(txop);
  1740. cmd->log_cw_max = (u8)ilog2(cw_max + 1);
  1741. cmd->log_cw_min = (u8)ilog2(cw_min + 1);
  1742. cmd->aifs = aifs;
  1743. cmd->txq = qnum;
  1744. rc = mwl8k_post_cmd(hw, &cmd->header);
  1745. kfree(cmd);
  1746. return rc;
  1747. }
  1748. /*
  1749. * CMD_FINALIZE_JOIN.
  1750. */
  1751. /* FJ beacon buffer size is compiled into the firmware. */
  1752. #define MWL8K_FJ_BEACON_MAXLEN 128
  1753. struct mwl8k_cmd_finalize_join {
  1754. struct mwl8k_cmd_pkt header;
  1755. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1756. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1757. } __attribute__((packed));
  1758. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1759. __u16 framelen, __u16 dtim)
  1760. {
  1761. struct mwl8k_cmd_finalize_join *cmd;
  1762. struct ieee80211_mgmt *payload = frame;
  1763. u16 hdrlen;
  1764. u32 payload_len;
  1765. int rc;
  1766. if (frame == NULL)
  1767. return -EINVAL;
  1768. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1769. if (cmd == NULL)
  1770. return -ENOMEM;
  1771. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1772. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1773. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1774. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1775. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1776. /* XXX TBD Might just have to abort and return an error */
  1777. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1778. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1779. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1780. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1781. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1782. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1783. if (payload && payload_len)
  1784. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1785. rc = mwl8k_post_cmd(hw, &cmd->header);
  1786. kfree(cmd);
  1787. return rc;
  1788. }
  1789. /*
  1790. * CMD_UPDATE_STADB.
  1791. */
  1792. struct mwl8k_cmd_update_sta_db {
  1793. struct mwl8k_cmd_pkt header;
  1794. /* See STADB_ACTION_TYPE */
  1795. __le32 action;
  1796. /* Peer MAC address */
  1797. __u8 peer_addr[ETH_ALEN];
  1798. __le32 reserved;
  1799. /* Peer info - valid during add/update. */
  1800. struct peer_capability_info peer_info;
  1801. } __attribute__((packed));
  1802. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1803. struct ieee80211_vif *vif, __u32 action)
  1804. {
  1805. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1806. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1807. struct mwl8k_cmd_update_sta_db *cmd;
  1808. struct peer_capability_info *peer_info;
  1809. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1810. int rc;
  1811. __u8 count, *rates;
  1812. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1813. if (cmd == NULL)
  1814. return -ENOMEM;
  1815. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1816. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1817. cmd->action = cpu_to_le32(action);
  1818. peer_info = &cmd->peer_info;
  1819. memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
  1820. switch (action) {
  1821. case MWL8K_STA_DB_ADD_ENTRY:
  1822. case MWL8K_STA_DB_MODIFY_ENTRY:
  1823. /* Build peer_info block */
  1824. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1825. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1826. peer_info->interop = 1;
  1827. peer_info->amsdu_enabled = 0;
  1828. rates = peer_info->legacy_rates;
  1829. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1830. rates[count] = bitrates[count].hw_value;
  1831. rc = mwl8k_post_cmd(hw, &cmd->header);
  1832. if (rc == 0)
  1833. mv_vif->peer_id = peer_info->station_id;
  1834. break;
  1835. case MWL8K_STA_DB_DEL_ENTRY:
  1836. case MWL8K_STA_DB_FLUSH:
  1837. default:
  1838. rc = mwl8k_post_cmd(hw, &cmd->header);
  1839. if (rc == 0)
  1840. mv_vif->peer_id = 0;
  1841. break;
  1842. }
  1843. kfree(cmd);
  1844. return rc;
  1845. }
  1846. /*
  1847. * CMD_SET_AID.
  1848. */
  1849. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1850. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1851. #define MWL8K_FRAME_PROT_11G 0x07
  1852. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1853. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1854. struct mwl8k_cmd_update_set_aid {
  1855. struct mwl8k_cmd_pkt header;
  1856. __le16 aid;
  1857. /* AP's MAC address (BSSID) */
  1858. __u8 bssid[ETH_ALEN];
  1859. __le16 protection_mode;
  1860. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1861. } __attribute__((packed));
  1862. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1863. struct ieee80211_vif *vif)
  1864. {
  1865. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1866. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1867. struct mwl8k_cmd_update_set_aid *cmd;
  1868. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1869. int count;
  1870. u16 prot_mode;
  1871. int rc;
  1872. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1873. if (cmd == NULL)
  1874. return -ENOMEM;
  1875. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1876. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1877. cmd->aid = cpu_to_le16(info->aid);
  1878. memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
  1879. if (info->use_cts_prot) {
  1880. prot_mode = MWL8K_FRAME_PROT_11G;
  1881. } else {
  1882. switch (info->ht_operation_mode &
  1883. IEEE80211_HT_OP_MODE_PROTECTION) {
  1884. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1885. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1886. break;
  1887. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1888. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1889. break;
  1890. default:
  1891. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1892. break;
  1893. }
  1894. }
  1895. cmd->protection_mode = cpu_to_le16(prot_mode);
  1896. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1897. cmd->supp_rates[count] = bitrates[count].hw_value;
  1898. rc = mwl8k_post_cmd(hw, &cmd->header);
  1899. kfree(cmd);
  1900. return rc;
  1901. }
  1902. /*
  1903. * CMD_SET_RATE.
  1904. */
  1905. struct mwl8k_cmd_update_rateset {
  1906. struct mwl8k_cmd_pkt header;
  1907. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1908. /* Bitmap for supported MCS codes. */
  1909. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1910. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1911. } __attribute__((packed));
  1912. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1913. struct ieee80211_vif *vif)
  1914. {
  1915. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1916. struct mwl8k_cmd_update_rateset *cmd;
  1917. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1918. int count;
  1919. int rc;
  1920. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1921. if (cmd == NULL)
  1922. return -ENOMEM;
  1923. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1924. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1925. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1926. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1927. rc = mwl8k_post_cmd(hw, &cmd->header);
  1928. kfree(cmd);
  1929. return rc;
  1930. }
  1931. /*
  1932. * CMD_USE_FIXED_RATE.
  1933. */
  1934. #define MWL8K_RATE_TABLE_SIZE 8
  1935. #define MWL8K_UCAST_RATE 0
  1936. #define MWL8K_USE_AUTO_RATE 0x0002
  1937. struct mwl8k_rate_entry {
  1938. /* Set to 1 if HT rate, 0 if legacy. */
  1939. __le32 is_ht_rate;
  1940. /* Set to 1 to use retry_count field. */
  1941. __le32 enable_retry;
  1942. /* Specified legacy rate or MCS. */
  1943. __le32 rate;
  1944. /* Number of allowed retries. */
  1945. __le32 retry_count;
  1946. } __attribute__((packed));
  1947. struct mwl8k_rate_table {
  1948. /* 1 to allow specified rate and below */
  1949. __le32 allow_rate_drop;
  1950. __le32 num_rates;
  1951. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  1952. } __attribute__((packed));
  1953. struct mwl8k_cmd_use_fixed_rate {
  1954. struct mwl8k_cmd_pkt header;
  1955. __le32 action;
  1956. struct mwl8k_rate_table rate_table;
  1957. /* Unicast, Broadcast or Multicast */
  1958. __le32 rate_type;
  1959. __le32 reserved1;
  1960. __le32 reserved2;
  1961. } __attribute__((packed));
  1962. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  1963. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  1964. {
  1965. struct mwl8k_cmd_use_fixed_rate *cmd;
  1966. int count;
  1967. int rc;
  1968. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1969. if (cmd == NULL)
  1970. return -ENOMEM;
  1971. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  1972. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1973. cmd->action = cpu_to_le32(action);
  1974. cmd->rate_type = cpu_to_le32(rate_type);
  1975. if (rate_table != NULL) {
  1976. /* Copy over each field manually so
  1977. * that bitflipping can be done
  1978. */
  1979. cmd->rate_table.allow_rate_drop =
  1980. cpu_to_le32(rate_table->allow_rate_drop);
  1981. cmd->rate_table.num_rates =
  1982. cpu_to_le32(rate_table->num_rates);
  1983. for (count = 0; count < rate_table->num_rates; count++) {
  1984. struct mwl8k_rate_entry *dst =
  1985. &cmd->rate_table.rate_entry[count];
  1986. struct mwl8k_rate_entry *src =
  1987. &rate_table->rate_entry[count];
  1988. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  1989. dst->enable_retry = cpu_to_le32(src->enable_retry);
  1990. dst->rate = cpu_to_le32(src->rate);
  1991. dst->retry_count = cpu_to_le32(src->retry_count);
  1992. }
  1993. }
  1994. rc = mwl8k_post_cmd(hw, &cmd->header);
  1995. kfree(cmd);
  1996. return rc;
  1997. }
  1998. /*
  1999. * Interrupt handling.
  2000. */
  2001. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2002. {
  2003. struct ieee80211_hw *hw = dev_id;
  2004. struct mwl8k_priv *priv = hw->priv;
  2005. u32 status;
  2006. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2007. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2008. if (!status)
  2009. return IRQ_NONE;
  2010. if (status & MWL8K_A2H_INT_TX_DONE)
  2011. tasklet_schedule(&priv->tx_reclaim_task);
  2012. if (status & MWL8K_A2H_INT_RX_READY) {
  2013. while (rxq_process(hw, 0, 1))
  2014. rxq_refill(hw, 0, 1);
  2015. }
  2016. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2017. if (priv->hostcmd_wait != NULL) {
  2018. complete(priv->hostcmd_wait);
  2019. priv->hostcmd_wait = NULL;
  2020. }
  2021. }
  2022. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2023. if (!priv->inconfig &&
  2024. priv->radio_on &&
  2025. mwl8k_txq_busy(priv))
  2026. mwl8k_tx_start(priv);
  2027. }
  2028. return IRQ_HANDLED;
  2029. }
  2030. /*
  2031. * Core driver operations.
  2032. */
  2033. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2034. {
  2035. struct mwl8k_priv *priv = hw->priv;
  2036. int index = skb_get_queue_mapping(skb);
  2037. int rc;
  2038. if (priv->current_channel == NULL) {
  2039. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2040. "disabled\n", priv->name);
  2041. dev_kfree_skb(skb);
  2042. return NETDEV_TX_OK;
  2043. }
  2044. rc = mwl8k_txq_xmit(hw, index, skb);
  2045. return rc;
  2046. }
  2047. struct mwl8k_work_struct {
  2048. /* Initialized by mwl8k_queue_work(). */
  2049. struct work_struct wt;
  2050. /* Required field passed in to mwl8k_queue_work(). */
  2051. struct ieee80211_hw *hw;
  2052. /* Required field passed in to mwl8k_queue_work(). */
  2053. int (*wfunc)(struct work_struct *w);
  2054. /* Initialized by mwl8k_queue_work(). */
  2055. struct completion *cmd_wait;
  2056. /* Result code. */
  2057. int rc;
  2058. /*
  2059. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2060. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2061. */
  2062. u32 options;
  2063. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2064. unsigned long timeout_ms;
  2065. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2066. u32 txwait_attempts;
  2067. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2068. u32 tx_timeout_ms;
  2069. u32 step;
  2070. };
  2071. /* Flags controlling behavior of config queue requests */
  2072. /* Caller spins while waiting for completion. */
  2073. #define MWL8K_WQ_SPIN 0x00000001
  2074. /* Wait for TX queues to empty before proceeding with configuration. */
  2075. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2076. /* Queue request and return immediately. */
  2077. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2078. /*
  2079. * Caller sleeps and waits for task complete notification.
  2080. * Do not use in atomic context.
  2081. */
  2082. #define MWL8K_WQ_SLEEP 0x00000008
  2083. /* Free work struct when task is done. */
  2084. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2085. /*
  2086. * Config request is queued and returns to caller imediately. Use
  2087. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2088. * when this flag is set.
  2089. */
  2090. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2091. MWL8K_WQ_FREE_WORKSTRUCT)
  2092. /* Default work queue behavior is to sleep and wait for tx completion. */
  2093. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2094. /*
  2095. * Default config request timeout. Add adjustments to make sure the
  2096. * config thread waits long enough for both tx wait and cmd wait before
  2097. * timing out.
  2098. */
  2099. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2100. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2101. /* Default number of TX wait attempts. */
  2102. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2103. /* Total time to wait for TXQ to drain. */
  2104. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2105. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2106. /* Scheduling slop. */
  2107. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2108. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2109. MWL8K_TXWAIT_MS + \
  2110. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2111. static void mwl8k_config_thread(struct work_struct *wt)
  2112. {
  2113. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2114. struct ieee80211_hw *hw = worker->hw;
  2115. struct mwl8k_priv *priv = hw->priv;
  2116. int rc = 0;
  2117. spin_lock_irq(&priv->tx_lock);
  2118. priv->inconfig = true;
  2119. spin_unlock_irq(&priv->tx_lock);
  2120. ieee80211_stop_queues(hw);
  2121. /*
  2122. * Wait for host queues to drain before doing PHY
  2123. * reconfiguration. This avoids interrupting any in-flight
  2124. * DMA transfers to the hardware.
  2125. */
  2126. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2127. u32 timeout;
  2128. u32 time_remaining;
  2129. u32 iter;
  2130. u32 tx_wait_attempts = worker->txwait_attempts;
  2131. time_remaining = worker->tx_timeout_ms;
  2132. if (!tx_wait_attempts)
  2133. tx_wait_attempts = 1;
  2134. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2135. if (!timeout)
  2136. timeout = 1;
  2137. iter = tx_wait_attempts;
  2138. do {
  2139. int wait_time;
  2140. if (time_remaining > timeout) {
  2141. time_remaining -= timeout;
  2142. wait_time = timeout;
  2143. } else
  2144. wait_time = time_remaining;
  2145. if (!wait_time)
  2146. wait_time = 1;
  2147. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2148. if (rc)
  2149. printk(KERN_ERR "%s() txwait timeout=%ums "
  2150. "Retry:%u/%u\n", __func__, timeout,
  2151. tx_wait_attempts - iter + 1,
  2152. tx_wait_attempts);
  2153. } while (rc && --iter);
  2154. rc = iter ? 0 : -ETIMEDOUT;
  2155. }
  2156. if (!rc)
  2157. rc = worker->wfunc(wt);
  2158. spin_lock_irq(&priv->tx_lock);
  2159. priv->inconfig = false;
  2160. if (priv->pending_tx_pkts && priv->radio_on)
  2161. mwl8k_tx_start(priv);
  2162. spin_unlock_irq(&priv->tx_lock);
  2163. ieee80211_wake_queues(hw);
  2164. worker->rc = rc;
  2165. if (worker->options & MWL8K_WQ_SLEEP)
  2166. complete(worker->cmd_wait);
  2167. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2168. kfree(wt);
  2169. }
  2170. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2171. struct mwl8k_work_struct *worker,
  2172. struct workqueue_struct *wqueue,
  2173. int (*wfunc)(struct work_struct *w))
  2174. {
  2175. unsigned long timeout = 0;
  2176. int rc = 0;
  2177. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2178. if (!worker->timeout_ms)
  2179. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2180. if (!worker->options)
  2181. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2182. if (!worker->txwait_attempts)
  2183. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2184. if (!worker->tx_timeout_ms)
  2185. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2186. worker->hw = hw;
  2187. worker->cmd_wait = &cmd_wait;
  2188. worker->rc = 1;
  2189. worker->wfunc = wfunc;
  2190. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2191. queue_work(wqueue, &worker->wt);
  2192. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2193. rc = 0;
  2194. } else {
  2195. if (worker->options & MWL8K_WQ_SPIN) {
  2196. timeout = worker->timeout_ms;
  2197. while (timeout && (worker->rc > 0)) {
  2198. mdelay(1);
  2199. timeout--;
  2200. }
  2201. } else if (worker->options & MWL8K_WQ_SLEEP)
  2202. timeout = wait_for_completion_timeout(&cmd_wait,
  2203. msecs_to_jiffies(worker->timeout_ms));
  2204. if (timeout)
  2205. rc = worker->rc;
  2206. else {
  2207. cancel_work_sync(&worker->wt);
  2208. rc = -ETIMEDOUT;
  2209. }
  2210. }
  2211. return rc;
  2212. }
  2213. struct mwl8k_start_worker {
  2214. struct mwl8k_work_struct header;
  2215. };
  2216. static int mwl8k_start_wt(struct work_struct *wt)
  2217. {
  2218. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2219. struct ieee80211_hw *hw = worker->header.hw;
  2220. struct mwl8k_priv *priv = hw->priv;
  2221. int rc = 0;
  2222. if (priv->vif != NULL) {
  2223. rc = -EIO;
  2224. goto mwl8k_start_exit;
  2225. }
  2226. /* Turn on radio */
  2227. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2228. rc = -EIO;
  2229. goto mwl8k_start_exit;
  2230. }
  2231. /* Purge TX/RX HW queues */
  2232. if (mwl8k_cmd_set_pre_scan(hw)) {
  2233. rc = -EIO;
  2234. goto mwl8k_start_exit;
  2235. }
  2236. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2237. rc = -EIO;
  2238. goto mwl8k_start_exit;
  2239. }
  2240. /* Enable firmware rate adaptation */
  2241. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2242. rc = -EIO;
  2243. goto mwl8k_start_exit;
  2244. }
  2245. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2246. if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
  2247. rc = -EIO;
  2248. goto mwl8k_start_exit;
  2249. }
  2250. /* Disable sniffer mode */
  2251. if (mwl8k_enable_sniffer(hw, 0))
  2252. rc = -EIO;
  2253. mwl8k_start_exit:
  2254. return rc;
  2255. }
  2256. static int mwl8k_start(struct ieee80211_hw *hw)
  2257. {
  2258. struct mwl8k_start_worker *worker;
  2259. struct mwl8k_priv *priv = hw->priv;
  2260. int rc;
  2261. /* Enable tx reclaim tasklet */
  2262. tasklet_enable(&priv->tx_reclaim_task);
  2263. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2264. IRQF_SHARED, MWL8K_NAME, hw);
  2265. if (rc) {
  2266. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2267. priv->name);
  2268. rc = -EIO;
  2269. goto mwl8k_start_disable_tasklet;
  2270. }
  2271. /* Enable interrupts */
  2272. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2273. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2274. if (worker == NULL) {
  2275. rc = -ENOMEM;
  2276. goto mwl8k_start_disable_irq;
  2277. }
  2278. rc = mwl8k_queue_work(hw, &worker->header,
  2279. priv->config_wq, mwl8k_start_wt);
  2280. kfree(worker);
  2281. if (!rc)
  2282. return rc;
  2283. if (rc == -ETIMEDOUT)
  2284. printk(KERN_ERR "%s() timed out\n", __func__);
  2285. rc = -EIO;
  2286. mwl8k_start_disable_irq:
  2287. spin_lock_irq(&priv->tx_lock);
  2288. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2289. spin_unlock_irq(&priv->tx_lock);
  2290. free_irq(priv->pdev->irq, hw);
  2291. mwl8k_start_disable_tasklet:
  2292. tasklet_disable(&priv->tx_reclaim_task);
  2293. return rc;
  2294. }
  2295. struct mwl8k_stop_worker {
  2296. struct mwl8k_work_struct header;
  2297. };
  2298. static int mwl8k_stop_wt(struct work_struct *wt)
  2299. {
  2300. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2301. struct ieee80211_hw *hw = worker->header.hw;
  2302. return mwl8k_cmd_802_11_radio_disable(hw);
  2303. }
  2304. static void mwl8k_stop(struct ieee80211_hw *hw)
  2305. {
  2306. int rc;
  2307. struct mwl8k_stop_worker *worker;
  2308. struct mwl8k_priv *priv = hw->priv;
  2309. int i;
  2310. if (priv->vif != NULL)
  2311. return;
  2312. ieee80211_stop_queues(hw);
  2313. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2314. if (worker == NULL)
  2315. return;
  2316. rc = mwl8k_queue_work(hw, &worker->header,
  2317. priv->config_wq, mwl8k_stop_wt);
  2318. kfree(worker);
  2319. if (rc == -ETIMEDOUT)
  2320. printk(KERN_ERR "%s() timed out\n", __func__);
  2321. /* Disable interrupts */
  2322. spin_lock_irq(&priv->tx_lock);
  2323. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2324. spin_unlock_irq(&priv->tx_lock);
  2325. free_irq(priv->pdev->irq, hw);
  2326. /* Stop finalize join worker */
  2327. cancel_work_sync(&priv->finalize_join_worker);
  2328. if (priv->beacon_skb != NULL)
  2329. dev_kfree_skb(priv->beacon_skb);
  2330. /* Stop tx reclaim tasklet */
  2331. tasklet_disable(&priv->tx_reclaim_task);
  2332. /* Stop config thread */
  2333. flush_workqueue(priv->config_wq);
  2334. /* Return all skbs to mac80211 */
  2335. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2336. mwl8k_txq_reclaim(hw, i, 1);
  2337. }
  2338. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2339. struct ieee80211_if_init_conf *conf)
  2340. {
  2341. struct mwl8k_priv *priv = hw->priv;
  2342. struct mwl8k_vif *mwl8k_vif;
  2343. /*
  2344. * We only support one active interface at a time.
  2345. */
  2346. if (priv->vif != NULL)
  2347. return -EBUSY;
  2348. /*
  2349. * We only support managed interfaces for now.
  2350. */
  2351. if (conf->type != NL80211_IFTYPE_STATION &&
  2352. conf->type != NL80211_IFTYPE_MONITOR)
  2353. return -EINVAL;
  2354. /* Clean out driver private area */
  2355. mwl8k_vif = MWL8K_VIF(conf->vif);
  2356. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2357. /* Save the mac address */
  2358. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
  2359. /* Back pointer to parent config block */
  2360. mwl8k_vif->priv = priv;
  2361. /* Setup initial PHY parameters */
  2362. memcpy(mwl8k_vif->legacy_rates,
  2363. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2364. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2365. /* Set Initial sequence number to zero */
  2366. mwl8k_vif->seqno = 0;
  2367. priv->vif = conf->vif;
  2368. priv->current_channel = NULL;
  2369. return 0;
  2370. }
  2371. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2372. struct ieee80211_if_init_conf *conf)
  2373. {
  2374. struct mwl8k_priv *priv = hw->priv;
  2375. if (priv->vif == NULL)
  2376. return;
  2377. priv->vif = NULL;
  2378. }
  2379. struct mwl8k_config_worker {
  2380. struct mwl8k_work_struct header;
  2381. u32 changed;
  2382. };
  2383. static int mwl8k_config_wt(struct work_struct *wt)
  2384. {
  2385. struct mwl8k_config_worker *worker =
  2386. (struct mwl8k_config_worker *)wt;
  2387. struct ieee80211_hw *hw = worker->header.hw;
  2388. struct ieee80211_conf *conf = &hw->conf;
  2389. struct mwl8k_priv *priv = hw->priv;
  2390. int rc = 0;
  2391. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2392. rc = -EINVAL;
  2393. goto mwl8k_config_exit;
  2394. }
  2395. priv->current_channel = conf->channel;
  2396. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2397. rc = -EINVAL;
  2398. goto mwl8k_config_exit;
  2399. }
  2400. if (conf->power_level > 18)
  2401. conf->power_level = 18;
  2402. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2403. rc = -EINVAL;
  2404. goto mwl8k_config_exit;
  2405. }
  2406. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2407. rc = -EINVAL;
  2408. mwl8k_config_exit:
  2409. return rc;
  2410. }
  2411. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2412. {
  2413. int rc = 0;
  2414. struct mwl8k_config_worker *worker;
  2415. struct mwl8k_priv *priv = hw->priv;
  2416. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2417. if (worker == NULL)
  2418. return -ENOMEM;
  2419. worker->changed = changed;
  2420. rc = mwl8k_queue_work(hw, &worker->header,
  2421. priv->config_wq, mwl8k_config_wt);
  2422. if (rc == -ETIMEDOUT) {
  2423. printk(KERN_ERR "%s() timed out.\n", __func__);
  2424. rc = -EINVAL;
  2425. }
  2426. kfree(worker);
  2427. /*
  2428. * mac80211 will crash on anything other than -EINVAL on
  2429. * error. Looks like wireless extensions which calls mac80211
  2430. * may be the actual culprit...
  2431. */
  2432. return rc ? -EINVAL : 0;
  2433. }
  2434. struct mwl8k_bss_info_changed_worker {
  2435. struct mwl8k_work_struct header;
  2436. struct ieee80211_vif *vif;
  2437. struct ieee80211_bss_conf *info;
  2438. u32 changed;
  2439. };
  2440. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2441. {
  2442. struct mwl8k_bss_info_changed_worker *worker =
  2443. (struct mwl8k_bss_info_changed_worker *)wt;
  2444. struct ieee80211_hw *hw = worker->header.hw;
  2445. struct ieee80211_vif *vif = worker->vif;
  2446. struct ieee80211_bss_conf *info = worker->info;
  2447. u32 changed;
  2448. int rc;
  2449. struct mwl8k_priv *priv = hw->priv;
  2450. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2451. changed = worker->changed;
  2452. priv->capture_beacon = false;
  2453. if (info->assoc) {
  2454. memcpy(&mwl8k_vif->bss_info, info,
  2455. sizeof(struct ieee80211_bss_conf));
  2456. /* Install rates */
  2457. if (mwl8k_update_rateset(hw, vif))
  2458. goto mwl8k_bss_info_changed_exit;
  2459. /* Turn on rate adaptation */
  2460. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2461. MWL8K_UCAST_RATE, NULL))
  2462. goto mwl8k_bss_info_changed_exit;
  2463. /* Set radio preamble */
  2464. if (mwl8k_set_radio_preamble(hw,
  2465. info->use_short_preamble))
  2466. goto mwl8k_bss_info_changed_exit;
  2467. /* Set slot time */
  2468. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2469. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2470. goto mwl8k_bss_info_changed_exit;
  2471. /* Update peer rate info */
  2472. if (mwl8k_cmd_update_sta_db(hw, vif,
  2473. MWL8K_STA_DB_MODIFY_ENTRY))
  2474. goto mwl8k_bss_info_changed_exit;
  2475. /* Set AID */
  2476. if (mwl8k_cmd_set_aid(hw, vif))
  2477. goto mwl8k_bss_info_changed_exit;
  2478. /*
  2479. * Finalize the join. Tell rx handler to process
  2480. * next beacon from our BSSID.
  2481. */
  2482. memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
  2483. priv->capture_beacon = true;
  2484. } else {
  2485. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2486. memset(&mwl8k_vif->bss_info, 0,
  2487. sizeof(struct ieee80211_bss_conf));
  2488. memset(mwl8k_vif->bssid, 0, ETH_ALEN);
  2489. }
  2490. mwl8k_bss_info_changed_exit:
  2491. rc = 0;
  2492. return rc;
  2493. }
  2494. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2495. struct ieee80211_vif *vif,
  2496. struct ieee80211_bss_conf *info,
  2497. u32 changed)
  2498. {
  2499. struct mwl8k_bss_info_changed_worker *worker;
  2500. struct mwl8k_priv *priv = hw->priv;
  2501. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2502. int rc;
  2503. if (changed & BSS_CHANGED_BSSID)
  2504. memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
  2505. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2506. return;
  2507. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2508. if (worker == NULL)
  2509. return;
  2510. worker->vif = vif;
  2511. worker->info = info;
  2512. worker->changed = changed;
  2513. rc = mwl8k_queue_work(hw, &worker->header,
  2514. priv->config_wq,
  2515. mwl8k_bss_info_changed_wt);
  2516. kfree(worker);
  2517. if (rc == -ETIMEDOUT)
  2518. printk(KERN_ERR "%s() timed out\n", __func__);
  2519. }
  2520. struct mwl8k_configure_filter_worker {
  2521. struct mwl8k_work_struct header;
  2522. unsigned int changed_flags;
  2523. unsigned int *total_flags;
  2524. int mc_count;
  2525. struct dev_addr_list *mclist;
  2526. };
  2527. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2528. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2529. {
  2530. struct mwl8k_configure_filter_worker *worker =
  2531. (struct mwl8k_configure_filter_worker *)wt;
  2532. struct ieee80211_hw *hw = worker->header.hw;
  2533. unsigned int changed_flags = worker->changed_flags;
  2534. unsigned int *total_flags = worker->total_flags;
  2535. int mc_count = worker->mc_count;
  2536. struct dev_addr_list *mclist = worker->mclist;
  2537. struct mwl8k_priv *priv = hw->priv;
  2538. int rc = 0;
  2539. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2540. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2541. rc = mwl8k_cmd_set_pre_scan(hw);
  2542. else {
  2543. u8 *bssid;
  2544. bssid = "\x00\x00\x00\x00\x00\x00";
  2545. if (priv->vif != NULL)
  2546. bssid = MWL8K_VIF(priv->vif)->bssid;
  2547. rc = mwl8k_cmd_set_post_scan(hw, bssid);
  2548. }
  2549. }
  2550. if (rc)
  2551. goto mwl8k_configure_filter_exit;
  2552. if (mc_count) {
  2553. if (mc_count > priv->num_mcaddrs)
  2554. mc_count = priv->num_mcaddrs;
  2555. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2556. if (rc)
  2557. printk(KERN_ERR
  2558. "%s()Error setting multicast addresses\n",
  2559. __func__);
  2560. }
  2561. mwl8k_configure_filter_exit:
  2562. return rc;
  2563. }
  2564. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2565. int mc_count, struct dev_addr_list *mclist)
  2566. {
  2567. struct mwl8k_configure_filter_worker *worker;
  2568. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2569. if (!worker)
  2570. return 0;
  2571. /*
  2572. * XXX: This is _HORRIBLY_ broken!!
  2573. *
  2574. * No locking, the mclist pointer might be invalid as soon as this
  2575. * function returns, something in the list might be invalidated
  2576. * once we get to the worker, etc...
  2577. */
  2578. worker->mc_count = mc_count;
  2579. worker->mclist = mclist;
  2580. return (u64)worker;
  2581. }
  2582. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2583. unsigned int changed_flags,
  2584. unsigned int *total_flags,
  2585. u64 multicast)
  2586. {
  2587. struct mwl8k_configure_filter_worker *worker = (void *)multicast;
  2588. struct mwl8k_priv *priv = hw->priv;
  2589. /* Clear unsupported feature flags */
  2590. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2591. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
  2592. return;
  2593. if (worker == NULL)
  2594. return;
  2595. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2596. worker->changed_flags = changed_flags;
  2597. worker->total_flags = total_flags;
  2598. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2599. mwl8k_configure_filter_wt);
  2600. }
  2601. struct mwl8k_set_rts_threshold_worker {
  2602. struct mwl8k_work_struct header;
  2603. u32 value;
  2604. };
  2605. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2606. {
  2607. struct mwl8k_set_rts_threshold_worker *worker =
  2608. (struct mwl8k_set_rts_threshold_worker *)wt;
  2609. struct ieee80211_hw *hw = worker->header.hw;
  2610. u16 threshold = (u16)(worker->value);
  2611. int rc;
  2612. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2613. return rc;
  2614. }
  2615. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2616. {
  2617. int rc;
  2618. struct mwl8k_set_rts_threshold_worker *worker;
  2619. struct mwl8k_priv *priv = hw->priv;
  2620. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2621. if (worker == NULL)
  2622. return -ENOMEM;
  2623. worker->value = value;
  2624. rc = mwl8k_queue_work(hw, &worker->header,
  2625. priv->config_wq,
  2626. mwl8k_set_rts_threshold_wt);
  2627. kfree(worker);
  2628. if (rc == -ETIMEDOUT) {
  2629. printk(KERN_ERR "%s() timed out\n", __func__);
  2630. rc = -EINVAL;
  2631. }
  2632. return rc;
  2633. }
  2634. struct mwl8k_conf_tx_worker {
  2635. struct mwl8k_work_struct header;
  2636. u16 queue;
  2637. const struct ieee80211_tx_queue_params *params;
  2638. };
  2639. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2640. {
  2641. struct mwl8k_conf_tx_worker *worker =
  2642. (struct mwl8k_conf_tx_worker *)wt;
  2643. struct ieee80211_hw *hw = worker->header.hw;
  2644. u16 queue = worker->queue;
  2645. const struct ieee80211_tx_queue_params *params = worker->params;
  2646. struct mwl8k_priv *priv = hw->priv;
  2647. int rc = 0;
  2648. if (priv->wmm_mode == MWL8K_WMM_DISABLE)
  2649. if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
  2650. rc = -EINVAL;
  2651. goto mwl8k_conf_tx_exit;
  2652. }
  2653. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2654. params->cw_max, params->aifs, params->txop))
  2655. rc = -EINVAL;
  2656. mwl8k_conf_tx_exit:
  2657. return rc;
  2658. }
  2659. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2660. const struct ieee80211_tx_queue_params *params)
  2661. {
  2662. int rc;
  2663. struct mwl8k_conf_tx_worker *worker;
  2664. struct mwl8k_priv *priv = hw->priv;
  2665. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2666. if (worker == NULL)
  2667. return -ENOMEM;
  2668. worker->queue = queue;
  2669. worker->params = params;
  2670. rc = mwl8k_queue_work(hw, &worker->header,
  2671. priv->config_wq, mwl8k_conf_tx_wt);
  2672. kfree(worker);
  2673. if (rc == -ETIMEDOUT) {
  2674. printk(KERN_ERR "%s() timed out\n", __func__);
  2675. rc = -EINVAL;
  2676. }
  2677. return rc;
  2678. }
  2679. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2680. struct ieee80211_tx_queue_stats *stats)
  2681. {
  2682. struct mwl8k_priv *priv = hw->priv;
  2683. struct mwl8k_tx_queue *txq;
  2684. int index;
  2685. spin_lock_bh(&priv->tx_lock);
  2686. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2687. txq = priv->txq + index;
  2688. memcpy(&stats[index], &txq->tx_stats,
  2689. sizeof(struct ieee80211_tx_queue_stats));
  2690. }
  2691. spin_unlock_bh(&priv->tx_lock);
  2692. return 0;
  2693. }
  2694. struct mwl8k_get_stats_worker {
  2695. struct mwl8k_work_struct header;
  2696. struct ieee80211_low_level_stats *stats;
  2697. };
  2698. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2699. {
  2700. struct mwl8k_get_stats_worker *worker =
  2701. (struct mwl8k_get_stats_worker *)wt;
  2702. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2703. }
  2704. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2705. struct ieee80211_low_level_stats *stats)
  2706. {
  2707. int rc;
  2708. struct mwl8k_get_stats_worker *worker;
  2709. struct mwl8k_priv *priv = hw->priv;
  2710. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2711. if (worker == NULL)
  2712. return -ENOMEM;
  2713. worker->stats = stats;
  2714. rc = mwl8k_queue_work(hw, &worker->header,
  2715. priv->config_wq, mwl8k_get_stats_wt);
  2716. kfree(worker);
  2717. if (rc == -ETIMEDOUT) {
  2718. printk(KERN_ERR "%s() timed out\n", __func__);
  2719. rc = -EINVAL;
  2720. }
  2721. return rc;
  2722. }
  2723. static const struct ieee80211_ops mwl8k_ops = {
  2724. .tx = mwl8k_tx,
  2725. .start = mwl8k_start,
  2726. .stop = mwl8k_stop,
  2727. .add_interface = mwl8k_add_interface,
  2728. .remove_interface = mwl8k_remove_interface,
  2729. .config = mwl8k_config,
  2730. .bss_info_changed = mwl8k_bss_info_changed,
  2731. .prepare_multicast = mwl8k_prepare_multicast,
  2732. .configure_filter = mwl8k_configure_filter,
  2733. .set_rts_threshold = mwl8k_set_rts_threshold,
  2734. .conf_tx = mwl8k_conf_tx,
  2735. .get_tx_stats = mwl8k_get_tx_stats,
  2736. .get_stats = mwl8k_get_stats,
  2737. };
  2738. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2739. {
  2740. int i;
  2741. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2742. struct mwl8k_priv *priv = hw->priv;
  2743. spin_lock_bh(&priv->tx_lock);
  2744. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2745. mwl8k_txq_reclaim(hw, i, 0);
  2746. if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
  2747. complete(priv->tx_wait);
  2748. priv->tx_wait = NULL;
  2749. }
  2750. spin_unlock_bh(&priv->tx_lock);
  2751. }
  2752. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2753. {
  2754. struct mwl8k_priv *priv =
  2755. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2756. struct sk_buff *skb = priv->beacon_skb;
  2757. u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
  2758. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2759. dev_kfree_skb(skb);
  2760. priv->beacon_skb = NULL;
  2761. }
  2762. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2763. const struct pci_device_id *id)
  2764. {
  2765. struct ieee80211_hw *hw;
  2766. struct mwl8k_priv *priv;
  2767. int rc;
  2768. int i;
  2769. u8 *fw;
  2770. rc = pci_enable_device(pdev);
  2771. if (rc) {
  2772. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2773. MWL8K_NAME);
  2774. return rc;
  2775. }
  2776. rc = pci_request_regions(pdev, MWL8K_NAME);
  2777. if (rc) {
  2778. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2779. MWL8K_NAME);
  2780. return rc;
  2781. }
  2782. pci_set_master(pdev);
  2783. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2784. if (hw == NULL) {
  2785. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2786. rc = -ENOMEM;
  2787. goto err_free_reg;
  2788. }
  2789. priv = hw->priv;
  2790. priv->hw = hw;
  2791. priv->pdev = pdev;
  2792. priv->hostcmd_wait = NULL;
  2793. priv->tx_wait = NULL;
  2794. priv->inconfig = false;
  2795. priv->wmm_mode = false;
  2796. priv->pending_tx_pkts = 0;
  2797. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2798. spin_lock_init(&priv->fw_lock);
  2799. SET_IEEE80211_DEV(hw, &pdev->dev);
  2800. pci_set_drvdata(pdev, hw);
  2801. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2802. if (priv->regs == NULL) {
  2803. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2804. goto err_iounmap;
  2805. }
  2806. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2807. priv->band.band = IEEE80211_BAND_2GHZ;
  2808. priv->band.channels = priv->channels;
  2809. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2810. priv->band.bitrates = priv->rates;
  2811. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2812. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2813. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2814. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2815. /*
  2816. * Extra headroom is the size of the required DMA header
  2817. * minus the size of the smallest 802.11 frame (CTS frame).
  2818. */
  2819. hw->extra_tx_headroom =
  2820. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2821. hw->channel_change_time = 10;
  2822. hw->queues = MWL8K_TX_QUEUES;
  2823. hw->wiphy->interface_modes =
  2824. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2825. /* Set rssi and noise values to dBm */
  2826. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  2827. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2828. priv->vif = NULL;
  2829. /* Set default radio state and preamble */
  2830. priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
  2831. priv->radio_on = 0;
  2832. /* Finalize join worker */
  2833. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2834. /* TX reclaim tasklet */
  2835. tasklet_init(&priv->tx_reclaim_task,
  2836. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2837. tasklet_disable(&priv->tx_reclaim_task);
  2838. /* Config workthread */
  2839. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2840. if (priv->config_wq == NULL)
  2841. goto err_iounmap;
  2842. /* Power management cookie */
  2843. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2844. if (priv->cookie == NULL)
  2845. goto err_iounmap;
  2846. rc = mwl8k_rxq_init(hw, 0);
  2847. if (rc)
  2848. goto err_iounmap;
  2849. rxq_refill(hw, 0, INT_MAX);
  2850. spin_lock_init(&priv->tx_lock);
  2851. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2852. rc = mwl8k_txq_init(hw, i);
  2853. if (rc)
  2854. goto err_free_queues;
  2855. }
  2856. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2857. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2858. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2859. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2860. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2861. IRQF_SHARED, MWL8K_NAME, hw);
  2862. if (rc) {
  2863. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2864. priv->name);
  2865. goto err_free_queues;
  2866. }
  2867. /* Reset firmware and hardware */
  2868. mwl8k_hw_reset(priv);
  2869. /* Ask userland hotplug daemon for the device firmware */
  2870. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2871. if (rc) {
  2872. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2873. goto err_free_irq;
  2874. }
  2875. /* Load firmware into hardware */
  2876. rc = mwl8k_load_firmware(priv);
  2877. if (rc) {
  2878. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2879. goto err_stop_firmware;
  2880. }
  2881. /* Reclaim memory once firmware is successfully loaded */
  2882. mwl8k_release_firmware(priv);
  2883. /*
  2884. * Temporarily enable interrupts. Initial firmware host
  2885. * commands use interrupts and avoids polling. Disable
  2886. * interrupts when done.
  2887. */
  2888. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2889. /* Get config data, mac addrs etc */
  2890. rc = mwl8k_cmd_get_hw_spec(hw);
  2891. if (rc) {
  2892. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2893. goto err_stop_firmware;
  2894. }
  2895. /* Turn radio off */
  2896. rc = mwl8k_cmd_802_11_radio_disable(hw);
  2897. if (rc) {
  2898. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2899. goto err_stop_firmware;
  2900. }
  2901. /* Disable interrupts */
  2902. spin_lock_irq(&priv->tx_lock);
  2903. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2904. spin_unlock_irq(&priv->tx_lock);
  2905. free_irq(priv->pdev->irq, hw);
  2906. rc = ieee80211_register_hw(hw);
  2907. if (rc) {
  2908. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2909. goto err_stop_firmware;
  2910. }
  2911. fw = (u8 *)&priv->fw_rev;
  2912. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2913. MWL8K_DESC);
  2914. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2915. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2916. printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
  2917. hw->wiphy->perm_addr);
  2918. return 0;
  2919. err_stop_firmware:
  2920. mwl8k_hw_reset(priv);
  2921. mwl8k_release_firmware(priv);
  2922. err_free_irq:
  2923. spin_lock_irq(&priv->tx_lock);
  2924. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2925. spin_unlock_irq(&priv->tx_lock);
  2926. free_irq(priv->pdev->irq, hw);
  2927. err_free_queues:
  2928. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2929. mwl8k_txq_deinit(hw, i);
  2930. mwl8k_rxq_deinit(hw, 0);
  2931. err_iounmap:
  2932. if (priv->cookie != NULL)
  2933. pci_free_consistent(priv->pdev, 4,
  2934. priv->cookie, priv->cookie_dma);
  2935. if (priv->regs != NULL)
  2936. pci_iounmap(pdev, priv->regs);
  2937. if (priv->config_wq != NULL)
  2938. destroy_workqueue(priv->config_wq);
  2939. pci_set_drvdata(pdev, NULL);
  2940. ieee80211_free_hw(hw);
  2941. err_free_reg:
  2942. pci_release_regions(pdev);
  2943. pci_disable_device(pdev);
  2944. return rc;
  2945. }
  2946. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  2947. {
  2948. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  2949. }
  2950. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  2951. {
  2952. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  2953. struct mwl8k_priv *priv;
  2954. int i;
  2955. if (hw == NULL)
  2956. return;
  2957. priv = hw->priv;
  2958. ieee80211_stop_queues(hw);
  2959. ieee80211_unregister_hw(hw);
  2960. /* Remove tx reclaim tasklet */
  2961. tasklet_kill(&priv->tx_reclaim_task);
  2962. /* Stop config thread */
  2963. destroy_workqueue(priv->config_wq);
  2964. /* Stop hardware */
  2965. mwl8k_hw_reset(priv);
  2966. /* Return all skbs to mac80211 */
  2967. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2968. mwl8k_txq_reclaim(hw, i, 1);
  2969. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2970. mwl8k_txq_deinit(hw, i);
  2971. mwl8k_rxq_deinit(hw, 0);
  2972. pci_free_consistent(priv->pdev, 4,
  2973. priv->cookie, priv->cookie_dma);
  2974. pci_iounmap(pdev, priv->regs);
  2975. pci_set_drvdata(pdev, NULL);
  2976. ieee80211_free_hw(hw);
  2977. pci_release_regions(pdev);
  2978. pci_disable_device(pdev);
  2979. }
  2980. static struct pci_driver mwl8k_driver = {
  2981. .name = MWL8K_NAME,
  2982. .id_table = mwl8k_table,
  2983. .probe = mwl8k_probe,
  2984. .remove = __devexit_p(mwl8k_remove),
  2985. .shutdown = __devexit_p(mwl8k_shutdown),
  2986. };
  2987. static int __init mwl8k_init(void)
  2988. {
  2989. return pci_register_driver(&mwl8k_driver);
  2990. }
  2991. static void __exit mwl8k_exit(void)
  2992. {
  2993. pci_unregister_driver(&mwl8k_driver);
  2994. }
  2995. module_init(mwl8k_init);
  2996. module_exit(mwl8k_exit);