ice1724.c 65 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/moduleparam.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "juli.h"
  47. #include "phase.h"
  48. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  49. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  50. MODULE_LICENSE("GPL");
  51. MODULE_SUPPORTED_DEVICE("{"
  52. REVO_DEVICE_DESC
  53. AMP_AUDIO2000_DEVICE_DESC
  54. AUREON_DEVICE_DESC
  55. VT1720_MOBO_DEVICE_DESC
  56. PONTIS_DEVICE_DESC
  57. PRODIGY192_DEVICE_DESC
  58. JULI_DEVICE_DESC
  59. PHASE_DEVICE_DESC
  60. "{VIA,VT1720},"
  61. "{VIA,VT1724},"
  62. "{ICEnsemble,Generic ICE1724},"
  63. "{ICEnsemble,Generic Envy24HT}"
  64. "{ICEnsemble,Generic Envy24PT}}");
  65. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  66. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  67. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  68. static char *model[SNDRV_CARDS];
  69. module_param_array(index, int, NULL, 0444);
  70. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  71. module_param_array(id, charp, NULL, 0444);
  72. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  73. module_param_array(enable, bool, NULL, 0444);
  74. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  75. module_param_array(model, charp, NULL, 0444);
  76. MODULE_PARM_DESC(model, "Use the given board model.");
  77. /* Both VT1720 and VT1724 have the same PCI IDs */
  78. static struct pci_device_id snd_vt1724_ids[] = {
  79. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  80. { 0, }
  81. };
  82. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  83. static int PRO_RATE_LOCKED;
  84. static int PRO_RATE_RESET = 1;
  85. static unsigned int PRO_RATE_DEFAULT = 44100;
  86. /*
  87. * Basic I/O
  88. */
  89. /* check whether the clock mode is spdif-in */
  90. static inline int is_spdif_master(ice1712_t *ice)
  91. {
  92. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  93. }
  94. static inline int is_pro_rate_locked(ice1712_t *ice)
  95. {
  96. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  97. }
  98. /*
  99. * ac97 section
  100. */
  101. static unsigned char snd_vt1724_ac97_ready(ice1712_t *ice)
  102. {
  103. unsigned char old_cmd;
  104. int tm;
  105. for (tm = 0; tm < 0x10000; tm++) {
  106. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  107. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  108. continue;
  109. if (!(old_cmd & VT1724_AC97_READY))
  110. continue;
  111. return old_cmd;
  112. }
  113. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  114. return old_cmd;
  115. }
  116. static int snd_vt1724_ac97_wait_bit(ice1712_t *ice, unsigned char bit)
  117. {
  118. int tm;
  119. for (tm = 0; tm < 0x10000; tm++)
  120. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  121. return 0;
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  123. return -EIO;
  124. }
  125. static void snd_vt1724_ac97_write(ac97_t *ac97,
  126. unsigned short reg,
  127. unsigned short val)
  128. {
  129. ice1712_t *ice = (ice1712_t *)ac97->private_data;
  130. unsigned char old_cmd;
  131. old_cmd = snd_vt1724_ac97_ready(ice);
  132. old_cmd &= ~VT1724_AC97_ID_MASK;
  133. old_cmd |= ac97->num;
  134. outb(reg, ICEMT1724(ice, AC97_INDEX));
  135. outw(val, ICEMT1724(ice, AC97_DATA));
  136. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  137. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  138. }
  139. static unsigned short snd_vt1724_ac97_read(ac97_t *ac97, unsigned short reg)
  140. {
  141. ice1712_t *ice = (ice1712_t *)ac97->private_data;
  142. unsigned char old_cmd;
  143. old_cmd = snd_vt1724_ac97_ready(ice);
  144. old_cmd &= ~VT1724_AC97_ID_MASK;
  145. old_cmd |= ac97->num;
  146. outb(reg, ICEMT1724(ice, AC97_INDEX));
  147. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  148. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  149. return ~0;
  150. return inw(ICEMT1724(ice, AC97_DATA));
  151. }
  152. /*
  153. * GPIO operations
  154. */
  155. /* set gpio direction 0 = read, 1 = write */
  156. static void snd_vt1724_set_gpio_dir(ice1712_t *ice, unsigned int data)
  157. {
  158. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  159. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  160. }
  161. /* set the gpio mask (0 = writable) */
  162. static void snd_vt1724_set_gpio_mask(ice1712_t *ice, unsigned int data)
  163. {
  164. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  165. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  166. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  167. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  168. }
  169. static void snd_vt1724_set_gpio_data(ice1712_t *ice, unsigned int data)
  170. {
  171. outw(data, ICEREG1724(ice, GPIO_DATA));
  172. if (! ice->vt1720)
  173. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  174. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  175. }
  176. static unsigned int snd_vt1724_get_gpio_data(ice1712_t *ice)
  177. {
  178. unsigned int data;
  179. if (! ice->vt1720)
  180. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  181. else
  182. data = 0;
  183. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  184. return data;
  185. }
  186. /*
  187. * Interrupt handler
  188. */
  189. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  190. {
  191. ice1712_t *ice = dev_id;
  192. unsigned char status;
  193. int handled = 0;
  194. while (1) {
  195. status = inb(ICEREG1724(ice, IRQSTAT));
  196. if (status == 0)
  197. break;
  198. handled = 1;
  199. /* these should probably be separated at some point,
  200. but as we don't currently have MPU support on the board I will leave it */
  201. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  202. if (ice->rmidi[0])
  203. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  204. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  205. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  206. }
  207. if (status & VT1724_IRQ_MTPCM) {
  208. /*
  209. * Multi-track PCM
  210. * PCM assignment are:
  211. * Playback DMA0 (M/C) = playback_pro_substream
  212. * Playback DMA1 = playback_con_substream_ds[0]
  213. * Playback DMA2 = playback_con_substream_ds[1]
  214. * Playback DMA3 = playback_con_substream_ds[2]
  215. * Playback DMA4 (SPDIF) = playback_con_substream
  216. * Record DMA0 = capture_pro_substream
  217. * Record DMA1 = capture_con_substream
  218. */
  219. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  220. if (mtstat & VT1724_MULTI_PDMA0) {
  221. if (ice->playback_pro_substream)
  222. snd_pcm_period_elapsed(ice->playback_pro_substream);
  223. }
  224. if (mtstat & VT1724_MULTI_RDMA0) {
  225. if (ice->capture_pro_substream)
  226. snd_pcm_period_elapsed(ice->capture_pro_substream);
  227. }
  228. if (mtstat & VT1724_MULTI_PDMA1) {
  229. if (ice->playback_con_substream_ds[0])
  230. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  231. }
  232. if (mtstat & VT1724_MULTI_PDMA2) {
  233. if (ice->playback_con_substream_ds[1])
  234. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  235. }
  236. if (mtstat & VT1724_MULTI_PDMA3) {
  237. if (ice->playback_con_substream_ds[2])
  238. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  239. }
  240. if (mtstat & VT1724_MULTI_PDMA4) {
  241. if (ice->playback_con_substream)
  242. snd_pcm_period_elapsed(ice->playback_con_substream);
  243. }
  244. if (mtstat & VT1724_MULTI_RDMA1) {
  245. if (ice->capture_con_substream)
  246. snd_pcm_period_elapsed(ice->capture_con_substream);
  247. }
  248. /* ack anyway to avoid freeze */
  249. outb(mtstat, ICEMT1724(ice, IRQ));
  250. /* ought to really handle this properly */
  251. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  252. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  253. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  254. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  255. /* If I don't do this, I get machine lockup due to continual interrupts */
  256. }
  257. }
  258. }
  259. return IRQ_RETVAL(handled);
  260. }
  261. /*
  262. * PCM code - professional part (multitrack)
  263. */
  264. static unsigned int rates[] = {
  265. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  266. 32000, 44100, 48000, 64000, 88200, 96000,
  267. 176400, 192000,
  268. };
  269. static snd_pcm_hw_constraint_list_t hw_constraints_rates_96 = {
  270. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  271. .list = rates,
  272. .mask = 0,
  273. };
  274. static snd_pcm_hw_constraint_list_t hw_constraints_rates_48 = {
  275. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  276. .list = rates,
  277. .mask = 0,
  278. };
  279. static snd_pcm_hw_constraint_list_t hw_constraints_rates_192 = {
  280. .count = ARRAY_SIZE(rates),
  281. .list = rates,
  282. .mask = 0,
  283. };
  284. struct vt1724_pcm_reg {
  285. unsigned int addr; /* ADDR register offset */
  286. unsigned int size; /* SIZE register offset */
  287. unsigned int count; /* COUNT register offset */
  288. unsigned int start; /* start & pause bit */
  289. };
  290. static int snd_vt1724_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
  291. {
  292. ice1712_t *ice = snd_pcm_substream_chip(substream);
  293. unsigned char what;
  294. unsigned char old;
  295. struct list_head *pos;
  296. snd_pcm_substream_t *s;
  297. what = 0;
  298. snd_pcm_group_for_each(pos, substream) {
  299. struct vt1724_pcm_reg *reg;
  300. s = snd_pcm_group_substream_entry(pos);
  301. reg = s->runtime->private_data;
  302. what |= reg->start;
  303. snd_pcm_trigger_done(s, substream);
  304. }
  305. switch (cmd) {
  306. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  307. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  308. spin_lock(&ice->reg_lock);
  309. old = inb(ICEMT1724(ice, DMA_PAUSE));
  310. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  311. old |= what;
  312. else
  313. old &= ~what;
  314. outb(old, ICEMT1724(ice, DMA_PAUSE));
  315. spin_unlock(&ice->reg_lock);
  316. break;
  317. case SNDRV_PCM_TRIGGER_START:
  318. case SNDRV_PCM_TRIGGER_STOP:
  319. spin_lock(&ice->reg_lock);
  320. old = inb(ICEMT1724(ice, DMA_CONTROL));
  321. if (cmd == SNDRV_PCM_TRIGGER_START)
  322. old |= what;
  323. else
  324. old &= ~what;
  325. outb(old, ICEMT1724(ice, DMA_CONTROL));
  326. spin_unlock(&ice->reg_lock);
  327. break;
  328. default:
  329. return -EINVAL;
  330. }
  331. return 0;
  332. }
  333. /*
  334. */
  335. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  336. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  337. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  338. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  339. static int get_max_rate(ice1712_t *ice)
  340. {
  341. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  342. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  343. return 192000;
  344. else
  345. return 96000;
  346. } else
  347. return 48000;
  348. }
  349. static void snd_vt1724_set_pro_rate(ice1712_t *ice, unsigned int rate, int force)
  350. {
  351. unsigned long flags;
  352. unsigned char val, old;
  353. unsigned int i, mclk_change;
  354. if (rate > get_max_rate(ice))
  355. return;
  356. switch (rate) {
  357. case 8000: val = 6; break;
  358. case 9600: val = 3; break;
  359. case 11025: val = 10; break;
  360. case 12000: val = 2; break;
  361. case 16000: val = 5; break;
  362. case 22050: val = 9; break;
  363. case 24000: val = 1; break;
  364. case 32000: val = 4; break;
  365. case 44100: val = 8; break;
  366. case 48000: val = 0; break;
  367. case 64000: val = 15; break;
  368. case 88200: val = 11; break;
  369. case 96000: val = 7; break;
  370. case 176400: val = 12; break;
  371. case 192000: val = 14; break;
  372. default:
  373. snd_BUG();
  374. val = 0;
  375. break;
  376. }
  377. spin_lock_irqsave(&ice->reg_lock, flags);
  378. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  379. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  380. /* running? we cannot change the rate now... */
  381. spin_unlock_irqrestore(&ice->reg_lock, flags);
  382. return;
  383. }
  384. if (!force && is_pro_rate_locked(ice)) {
  385. spin_unlock_irqrestore(&ice->reg_lock, flags);
  386. return;
  387. }
  388. old = inb(ICEMT1724(ice, RATE));
  389. if (force || old != val)
  390. outb(val, ICEMT1724(ice, RATE));
  391. else if (rate == ice->cur_rate) {
  392. spin_unlock_irqrestore(&ice->reg_lock, flags);
  393. return;
  394. }
  395. ice->cur_rate = rate;
  396. /* check MT02 */
  397. mclk_change = 0;
  398. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  399. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  400. if (rate > 96000)
  401. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  402. else
  403. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  404. if (val != old) {
  405. outb(val, ICEMT1724(ice, I2S_FORMAT));
  406. mclk_change = 1;
  407. }
  408. }
  409. spin_unlock_irqrestore(&ice->reg_lock, flags);
  410. if (mclk_change && ice->gpio.i2s_mclk_changed)
  411. ice->gpio.i2s_mclk_changed(ice);
  412. if (ice->gpio.set_pro_rate)
  413. ice->gpio.set_pro_rate(ice, rate);
  414. /* set up codecs */
  415. for (i = 0; i < ice->akm_codecs; i++) {
  416. if (ice->akm[i].ops.set_rate_val)
  417. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  418. }
  419. if (ice->spdif.ops.setup_rate)
  420. ice->spdif.ops.setup_rate(ice, rate);
  421. }
  422. static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
  423. snd_pcm_hw_params_t * hw_params)
  424. {
  425. ice1712_t *ice = snd_pcm_substream_chip(substream);
  426. int i, chs;
  427. chs = params_channels(hw_params);
  428. down(&ice->open_mutex);
  429. /* mark surround channels */
  430. if (substream == ice->playback_pro_substream) {
  431. /* PDMA0 can be multi-channel up to 8 */
  432. chs = chs / 2 - 1;
  433. for (i = 0; i < chs; i++) {
  434. if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
  435. up(&ice->open_mutex);
  436. return -EBUSY;
  437. }
  438. ice->pcm_reserved[i] = substream;
  439. }
  440. for (; i < 3; i++) {
  441. if (ice->pcm_reserved[i] == substream)
  442. ice->pcm_reserved[i] = NULL;
  443. }
  444. } else {
  445. for (i = 0; i < 3; i++) {
  446. /* check individual playback stream */
  447. if (ice->playback_con_substream_ds[i] == substream) {
  448. if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
  449. up(&ice->open_mutex);
  450. return -EBUSY;
  451. }
  452. ice->pcm_reserved[i] = substream;
  453. break;
  454. }
  455. }
  456. }
  457. up(&ice->open_mutex);
  458. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  459. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  460. }
  461. static int snd_vt1724_pcm_hw_free(snd_pcm_substream_t * substream)
  462. {
  463. ice1712_t *ice = snd_pcm_substream_chip(substream);
  464. int i;
  465. down(&ice->open_mutex);
  466. /* unmark surround channels */
  467. for (i = 0; i < 3; i++)
  468. if (ice->pcm_reserved[i] == substream)
  469. ice->pcm_reserved[i] = NULL;
  470. up(&ice->open_mutex);
  471. return snd_pcm_lib_free_pages(substream);
  472. }
  473. static int snd_vt1724_playback_pro_prepare(snd_pcm_substream_t * substream)
  474. {
  475. ice1712_t *ice = snd_pcm_substream_chip(substream);
  476. unsigned char val;
  477. unsigned int size;
  478. spin_lock_irq(&ice->reg_lock);
  479. val = (8 - substream->runtime->channels) >> 1;
  480. outb(val, ICEMT1724(ice, BURST));
  481. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  482. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  483. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  484. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  485. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  486. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  487. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  488. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  489. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  490. spin_unlock_irq(&ice->reg_lock);
  491. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  492. return 0;
  493. }
  494. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(snd_pcm_substream_t * substream)
  495. {
  496. ice1712_t *ice = snd_pcm_substream_chip(substream);
  497. size_t ptr;
  498. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  499. return 0;
  500. #if 0 /* read PLAYBACK_ADDR */
  501. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  502. if (ptr < substream->runtime->dma_addr) {
  503. snd_printd("ice1724: invalid negative ptr\n");
  504. return 0;
  505. }
  506. ptr -= substream->runtime->dma_addr;
  507. ptr = bytes_to_frames(substream->runtime, ptr);
  508. if (ptr >= substream->runtime->buffer_size) {
  509. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->period_size);
  510. return 0;
  511. }
  512. #else /* read PLAYBACK_SIZE */
  513. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  514. ptr = (ptr + 1) << 2;
  515. ptr = bytes_to_frames(substream->runtime, ptr);
  516. if (! ptr)
  517. ;
  518. else if (ptr <= substream->runtime->buffer_size)
  519. ptr = substream->runtime->buffer_size - ptr;
  520. else {
  521. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
  522. ptr = 0;
  523. }
  524. #endif
  525. return ptr;
  526. }
  527. static int snd_vt1724_pcm_prepare(snd_pcm_substream_t *substream)
  528. {
  529. ice1712_t *ice = snd_pcm_substream_chip(substream);
  530. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  531. spin_lock_irq(&ice->reg_lock);
  532. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  533. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, ice->profi_port + reg->size);
  534. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ice->profi_port + reg->count);
  535. spin_unlock_irq(&ice->reg_lock);
  536. return 0;
  537. }
  538. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(snd_pcm_substream_t *substream)
  539. {
  540. ice1712_t *ice = snd_pcm_substream_chip(substream);
  541. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  542. size_t ptr;
  543. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  544. return 0;
  545. #if 0 /* use ADDR register */
  546. ptr = inl(ice->profi_port + reg->addr);
  547. ptr -= substream->runtime->dma_addr;
  548. return bytes_to_frames(substream->runtime, ptr);
  549. #else /* use SIZE register */
  550. ptr = inw(ice->profi_port + reg->size);
  551. ptr = (ptr + 1) << 2;
  552. ptr = bytes_to_frames(substream->runtime, ptr);
  553. if (! ptr)
  554. ;
  555. else if (ptr <= substream->runtime->buffer_size)
  556. ptr = substream->runtime->buffer_size - ptr;
  557. else {
  558. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
  559. ptr = 0;
  560. }
  561. return ptr;
  562. #endif
  563. }
  564. static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  565. .addr = VT1724_MT_PLAYBACK_ADDR,
  566. .size = VT1724_MT_PLAYBACK_SIZE,
  567. .count = VT1724_MT_PLAYBACK_COUNT,
  568. .start = VT1724_PDMA0_START,
  569. };
  570. static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  571. .addr = VT1724_MT_CAPTURE_ADDR,
  572. .size = VT1724_MT_CAPTURE_SIZE,
  573. .count = VT1724_MT_CAPTURE_COUNT,
  574. .start = VT1724_RDMA0_START,
  575. };
  576. static snd_pcm_hardware_t snd_vt1724_playback_pro =
  577. {
  578. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  579. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  580. SNDRV_PCM_INFO_MMAP_VALID |
  581. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  582. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  583. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  584. .rate_min = 8000,
  585. .rate_max = 192000,
  586. .channels_min = 2,
  587. .channels_max = 8,
  588. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  589. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  590. .period_bytes_max = (1UL << 21),
  591. .periods_min = 2,
  592. .periods_max = 1024,
  593. };
  594. static snd_pcm_hardware_t snd_vt1724_spdif =
  595. {
  596. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  597. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  598. SNDRV_PCM_INFO_MMAP_VALID |
  599. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  600. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  601. .rates = SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000,
  602. .rate_min = 32000,
  603. .rate_max = 48000,
  604. .channels_min = 2,
  605. .channels_max = 2,
  606. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  607. .period_bytes_min = 2 * 4 * 2,
  608. .period_bytes_max = (1UL << 18),
  609. .periods_min = 2,
  610. .periods_max = 1024,
  611. };
  612. static snd_pcm_hardware_t snd_vt1724_2ch_stereo =
  613. {
  614. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  615. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  616. SNDRV_PCM_INFO_MMAP_VALID |
  617. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  618. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  619. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  620. .rate_min = 8000,
  621. .rate_max = 192000,
  622. .channels_min = 2,
  623. .channels_max = 2,
  624. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  625. .period_bytes_min = 2 * 4 * 2,
  626. .period_bytes_max = (1UL << 18),
  627. .periods_min = 2,
  628. .periods_max = 1024,
  629. };
  630. /*
  631. * set rate constraints
  632. */
  633. static int set_rate_constraints(ice1712_t *ice, snd_pcm_substream_t *substream)
  634. {
  635. snd_pcm_runtime_t *runtime = substream->runtime;
  636. if (ice->hw_rates) {
  637. /* hardware specific */
  638. runtime->hw.rate_min = ice->hw_rates->list[0];
  639. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  640. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  641. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, ice->hw_rates);
  642. }
  643. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  644. /* I2S */
  645. /* VT1720 doesn't support more than 96kHz */
  646. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  647. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_192);
  648. else {
  649. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000;
  650. runtime->hw.rate_max = 96000;
  651. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_96);
  652. }
  653. } else if (ice->ac97) {
  654. /* ACLINK */
  655. runtime->hw.rate_max = 48000;
  656. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  657. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
  658. }
  659. return 0;
  660. }
  661. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  662. * actually used
  663. */
  664. #define VT1724_BUFFER_ALIGN 0x20
  665. static int snd_vt1724_playback_pro_open(snd_pcm_substream_t * substream)
  666. {
  667. snd_pcm_runtime_t *runtime = substream->runtime;
  668. ice1712_t *ice = snd_pcm_substream_chip(substream);
  669. int chs;
  670. runtime->private_data = &vt1724_playback_pro_reg;
  671. ice->playback_pro_substream = substream;
  672. runtime->hw = snd_vt1724_playback_pro;
  673. snd_pcm_set_sync(substream);
  674. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  675. set_rate_constraints(ice, substream);
  676. down(&ice->open_mutex);
  677. /* calculate the currently available channels */
  678. for (chs = 0; chs < 3; chs++) {
  679. if (ice->pcm_reserved[chs])
  680. break;
  681. }
  682. chs = (chs + 1) * 2;
  683. runtime->hw.channels_max = chs;
  684. if (chs > 2) /* channels must be even */
  685. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  686. up(&ice->open_mutex);
  687. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  688. VT1724_BUFFER_ALIGN);
  689. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  690. VT1724_BUFFER_ALIGN);
  691. return 0;
  692. }
  693. static int snd_vt1724_capture_pro_open(snd_pcm_substream_t * substream)
  694. {
  695. ice1712_t *ice = snd_pcm_substream_chip(substream);
  696. snd_pcm_runtime_t *runtime = substream->runtime;
  697. runtime->private_data = &vt1724_capture_pro_reg;
  698. ice->capture_pro_substream = substream;
  699. runtime->hw = snd_vt1724_2ch_stereo;
  700. snd_pcm_set_sync(substream);
  701. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  702. set_rate_constraints(ice, substream);
  703. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  704. VT1724_BUFFER_ALIGN);
  705. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  706. VT1724_BUFFER_ALIGN);
  707. return 0;
  708. }
  709. static int snd_vt1724_playback_pro_close(snd_pcm_substream_t * substream)
  710. {
  711. ice1712_t *ice = snd_pcm_substream_chip(substream);
  712. if (PRO_RATE_RESET)
  713. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  714. ice->playback_pro_substream = NULL;
  715. return 0;
  716. }
  717. static int snd_vt1724_capture_pro_close(snd_pcm_substream_t * substream)
  718. {
  719. ice1712_t *ice = snd_pcm_substream_chip(substream);
  720. if (PRO_RATE_RESET)
  721. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  722. ice->capture_pro_substream = NULL;
  723. return 0;
  724. }
  725. static snd_pcm_ops_t snd_vt1724_playback_pro_ops = {
  726. .open = snd_vt1724_playback_pro_open,
  727. .close = snd_vt1724_playback_pro_close,
  728. .ioctl = snd_pcm_lib_ioctl,
  729. .hw_params = snd_vt1724_pcm_hw_params,
  730. .hw_free = snd_vt1724_pcm_hw_free,
  731. .prepare = snd_vt1724_playback_pro_prepare,
  732. .trigger = snd_vt1724_pcm_trigger,
  733. .pointer = snd_vt1724_playback_pro_pointer,
  734. };
  735. static snd_pcm_ops_t snd_vt1724_capture_pro_ops = {
  736. .open = snd_vt1724_capture_pro_open,
  737. .close = snd_vt1724_capture_pro_close,
  738. .ioctl = snd_pcm_lib_ioctl,
  739. .hw_params = snd_vt1724_pcm_hw_params,
  740. .hw_free = snd_vt1724_pcm_hw_free,
  741. .prepare = snd_vt1724_pcm_prepare,
  742. .trigger = snd_vt1724_pcm_trigger,
  743. .pointer = snd_vt1724_pcm_pointer,
  744. };
  745. static int __devinit snd_vt1724_pcm_profi(ice1712_t * ice, int device)
  746. {
  747. snd_pcm_t *pcm;
  748. int err;
  749. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  750. if (err < 0)
  751. return err;
  752. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  753. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  754. pcm->private_data = ice;
  755. pcm->info_flags = 0;
  756. strcpy(pcm->name, "ICE1724");
  757. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  758. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  759. ice->pcm_pro = pcm;
  760. return 0;
  761. }
  762. /*
  763. * SPDIF PCM
  764. */
  765. static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  766. .addr = VT1724_MT_PDMA4_ADDR,
  767. .size = VT1724_MT_PDMA4_SIZE,
  768. .count = VT1724_MT_PDMA4_COUNT,
  769. .start = VT1724_PDMA4_START,
  770. };
  771. static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  772. .addr = VT1724_MT_RDMA1_ADDR,
  773. .size = VT1724_MT_RDMA1_SIZE,
  774. .count = VT1724_MT_RDMA1_COUNT,
  775. .start = VT1724_RDMA1_START,
  776. };
  777. /* update spdif control bits; call with reg_lock */
  778. static void update_spdif_bits(ice1712_t *ice, unsigned int val)
  779. {
  780. unsigned char cbit, disabled;
  781. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  782. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  783. if (cbit != disabled)
  784. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  785. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  786. if (cbit != disabled)
  787. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  788. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  789. }
  790. /* update SPDIF control bits according to the given rate */
  791. static void update_spdif_rate(ice1712_t *ice, unsigned int rate)
  792. {
  793. unsigned int val, nval;
  794. unsigned long flags;
  795. spin_lock_irqsave(&ice->reg_lock, flags);
  796. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  797. nval &= ~(7 << 12);
  798. switch (rate) {
  799. case 44100: break;
  800. case 48000: nval |= 2 << 12; break;
  801. case 32000: nval |= 3 << 12; break;
  802. }
  803. if (val != nval)
  804. update_spdif_bits(ice, nval);
  805. spin_unlock_irqrestore(&ice->reg_lock, flags);
  806. }
  807. static int snd_vt1724_playback_spdif_prepare(snd_pcm_substream_t * substream)
  808. {
  809. ice1712_t *ice = snd_pcm_substream_chip(substream);
  810. if (! ice->force_pdma4)
  811. update_spdif_rate(ice, substream->runtime->rate);
  812. return snd_vt1724_pcm_prepare(substream);
  813. }
  814. static int snd_vt1724_playback_spdif_open(snd_pcm_substream_t *substream)
  815. {
  816. ice1712_t *ice = snd_pcm_substream_chip(substream);
  817. snd_pcm_runtime_t *runtime = substream->runtime;
  818. runtime->private_data = &vt1724_playback_spdif_reg;
  819. ice->playback_con_substream = substream;
  820. if (ice->force_pdma4) {
  821. runtime->hw = snd_vt1724_2ch_stereo;
  822. set_rate_constraints(ice, substream);
  823. } else
  824. runtime->hw = snd_vt1724_spdif;
  825. snd_pcm_set_sync(substream);
  826. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  827. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  828. VT1724_BUFFER_ALIGN);
  829. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  830. VT1724_BUFFER_ALIGN);
  831. return 0;
  832. }
  833. static int snd_vt1724_playback_spdif_close(snd_pcm_substream_t * substream)
  834. {
  835. ice1712_t *ice = snd_pcm_substream_chip(substream);
  836. if (PRO_RATE_RESET)
  837. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  838. ice->playback_con_substream = NULL;
  839. return 0;
  840. }
  841. static int snd_vt1724_capture_spdif_open(snd_pcm_substream_t *substream)
  842. {
  843. ice1712_t *ice = snd_pcm_substream_chip(substream);
  844. snd_pcm_runtime_t *runtime = substream->runtime;
  845. runtime->private_data = &vt1724_capture_spdif_reg;
  846. ice->capture_con_substream = substream;
  847. if (ice->force_rdma1) {
  848. runtime->hw = snd_vt1724_2ch_stereo;
  849. set_rate_constraints(ice, substream);
  850. } else
  851. runtime->hw = snd_vt1724_spdif;
  852. snd_pcm_set_sync(substream);
  853. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  854. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  855. VT1724_BUFFER_ALIGN);
  856. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  857. VT1724_BUFFER_ALIGN);
  858. return 0;
  859. }
  860. static int snd_vt1724_capture_spdif_close(snd_pcm_substream_t * substream)
  861. {
  862. ice1712_t *ice = snd_pcm_substream_chip(substream);
  863. if (PRO_RATE_RESET)
  864. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  865. ice->capture_con_substream = NULL;
  866. return 0;
  867. }
  868. static snd_pcm_ops_t snd_vt1724_playback_spdif_ops = {
  869. .open = snd_vt1724_playback_spdif_open,
  870. .close = snd_vt1724_playback_spdif_close,
  871. .ioctl = snd_pcm_lib_ioctl,
  872. .hw_params = snd_vt1724_pcm_hw_params,
  873. .hw_free = snd_vt1724_pcm_hw_free,
  874. .prepare = snd_vt1724_playback_spdif_prepare,
  875. .trigger = snd_vt1724_pcm_trigger,
  876. .pointer = snd_vt1724_pcm_pointer,
  877. };
  878. static snd_pcm_ops_t snd_vt1724_capture_spdif_ops = {
  879. .open = snd_vt1724_capture_spdif_open,
  880. .close = snd_vt1724_capture_spdif_close,
  881. .ioctl = snd_pcm_lib_ioctl,
  882. .hw_params = snd_vt1724_pcm_hw_params,
  883. .hw_free = snd_vt1724_pcm_hw_free,
  884. .prepare = snd_vt1724_pcm_prepare,
  885. .trigger = snd_vt1724_pcm_trigger,
  886. .pointer = snd_vt1724_pcm_pointer,
  887. };
  888. static int __devinit snd_vt1724_pcm_spdif(ice1712_t * ice, int device)
  889. {
  890. char *name;
  891. snd_pcm_t *pcm;
  892. int play, capt;
  893. int err;
  894. if (ice->force_pdma4 ||
  895. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  896. play = 1;
  897. ice->has_spdif = 1;
  898. } else
  899. play = 0;
  900. if (ice->force_rdma1 ||
  901. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  902. capt = 1;
  903. ice->has_spdif = 1;
  904. } else
  905. capt = 0;
  906. if (! play && ! capt)
  907. return 0; /* no spdif device */
  908. if (ice->force_pdma4 || ice->force_rdma1)
  909. name = "ICE1724 Secondary";
  910. else
  911. name = "IEC1724 IEC958";
  912. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  913. if (err < 0)
  914. return err;
  915. if (play)
  916. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  917. &snd_vt1724_playback_spdif_ops);
  918. if (capt)
  919. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  920. &snd_vt1724_capture_spdif_ops);
  921. pcm->private_data = ice;
  922. pcm->info_flags = 0;
  923. strcpy(pcm->name, name);
  924. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  925. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  926. ice->pcm = pcm;
  927. return 0;
  928. }
  929. /*
  930. * independent surround PCMs
  931. */
  932. static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  933. {
  934. .addr = VT1724_MT_PDMA1_ADDR,
  935. .size = VT1724_MT_PDMA1_SIZE,
  936. .count = VT1724_MT_PDMA1_COUNT,
  937. .start = VT1724_PDMA1_START,
  938. },
  939. {
  940. .addr = VT1724_MT_PDMA2_ADDR,
  941. .size = VT1724_MT_PDMA2_SIZE,
  942. .count = VT1724_MT_PDMA2_COUNT,
  943. .start = VT1724_PDMA2_START,
  944. },
  945. {
  946. .addr = VT1724_MT_PDMA3_ADDR,
  947. .size = VT1724_MT_PDMA3_SIZE,
  948. .count = VT1724_MT_PDMA3_COUNT,
  949. .start = VT1724_PDMA3_START,
  950. },
  951. };
  952. static int snd_vt1724_playback_indep_prepare(snd_pcm_substream_t * substream)
  953. {
  954. ice1712_t *ice = snd_pcm_substream_chip(substream);
  955. unsigned char val;
  956. spin_lock_irq(&ice->reg_lock);
  957. val = 3 - substream->number;
  958. if (inb(ICEMT1724(ice, BURST)) < val)
  959. outb(val, ICEMT1724(ice, BURST));
  960. spin_unlock_irq(&ice->reg_lock);
  961. return snd_vt1724_pcm_prepare(substream);
  962. }
  963. static int snd_vt1724_playback_indep_open(snd_pcm_substream_t *substream)
  964. {
  965. ice1712_t *ice = snd_pcm_substream_chip(substream);
  966. snd_pcm_runtime_t *runtime = substream->runtime;
  967. down(&ice->open_mutex);
  968. /* already used by PDMA0? */
  969. if (ice->pcm_reserved[substream->number]) {
  970. up(&ice->open_mutex);
  971. return -EBUSY; /* FIXME: should handle blocking mode properly */
  972. }
  973. up(&ice->open_mutex);
  974. runtime->private_data = &vt1724_playback_dma_regs[substream->number];
  975. ice->playback_con_substream_ds[substream->number] = substream;
  976. runtime->hw = snd_vt1724_2ch_stereo;
  977. snd_pcm_set_sync(substream);
  978. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  979. set_rate_constraints(ice, substream);
  980. return 0;
  981. }
  982. static int snd_vt1724_playback_indep_close(snd_pcm_substream_t * substream)
  983. {
  984. ice1712_t *ice = snd_pcm_substream_chip(substream);
  985. if (PRO_RATE_RESET)
  986. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  987. ice->playback_con_substream_ds[substream->number] = NULL;
  988. ice->pcm_reserved[substream->number] = NULL;
  989. return 0;
  990. }
  991. static snd_pcm_ops_t snd_vt1724_playback_indep_ops = {
  992. .open = snd_vt1724_playback_indep_open,
  993. .close = snd_vt1724_playback_indep_close,
  994. .ioctl = snd_pcm_lib_ioctl,
  995. .hw_params = snd_vt1724_pcm_hw_params,
  996. .hw_free = snd_vt1724_pcm_hw_free,
  997. .prepare = snd_vt1724_playback_indep_prepare,
  998. .trigger = snd_vt1724_pcm_trigger,
  999. .pointer = snd_vt1724_pcm_pointer,
  1000. };
  1001. static int __devinit snd_vt1724_pcm_indep(ice1712_t * ice, int device)
  1002. {
  1003. snd_pcm_t *pcm;
  1004. int play;
  1005. int err;
  1006. play = ice->num_total_dacs / 2 - 1;
  1007. if (play <= 0)
  1008. return 0;
  1009. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1010. if (err < 0)
  1011. return err;
  1012. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1013. &snd_vt1724_playback_indep_ops);
  1014. pcm->private_data = ice;
  1015. pcm->info_flags = 0;
  1016. strcpy(pcm->name, "ICE1724 Surround PCM");
  1017. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1018. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  1019. ice->pcm_ds = pcm;
  1020. return 0;
  1021. }
  1022. /*
  1023. * Mixer section
  1024. */
  1025. static int __devinit snd_vt1724_ac97_mixer(ice1712_t * ice)
  1026. {
  1027. int err;
  1028. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1029. ac97_bus_t *pbus;
  1030. ac97_template_t ac97;
  1031. static ac97_bus_ops_t ops = {
  1032. .write = snd_vt1724_ac97_write,
  1033. .read = snd_vt1724_ac97_read,
  1034. };
  1035. /* cold reset */
  1036. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1037. mdelay(5); /* FIXME */
  1038. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1039. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1040. return err;
  1041. memset(&ac97, 0, sizeof(ac97));
  1042. ac97.private_data = ice;
  1043. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1044. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1045. else
  1046. return 0;
  1047. }
  1048. /* I2S mixer only */
  1049. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1050. return 0;
  1051. }
  1052. /*
  1053. *
  1054. */
  1055. static inline unsigned int eeprom_triple(ice1712_t *ice, int idx)
  1056. {
  1057. return (unsigned int)ice->eeprom.data[idx] | \
  1058. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1059. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1060. }
  1061. static void snd_vt1724_proc_read(snd_info_entry_t *entry,
  1062. snd_info_buffer_t * buffer)
  1063. {
  1064. ice1712_t *ice = entry->private_data;
  1065. unsigned int idx;
  1066. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1067. snd_iprintf(buffer, "EEPROM:\n");
  1068. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1069. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1070. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1071. snd_iprintf(buffer, " System Config : 0x%x\n", ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1072. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP2_ACLINK]);
  1073. snd_iprintf(buffer, " I2S : 0x%x\n", ice->eeprom.data[ICE_EEP2_I2S]);
  1074. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP2_SPDIF]);
  1075. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1076. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1077. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1078. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1079. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1080. snd_iprintf(buffer, "\nRegisters:\n");
  1081. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1082. for (idx = 0x0; idx < 0x20 ; idx++)
  1083. snd_iprintf(buffer, " CCS%02x : 0x%02x\n", idx, inb(ice->port+idx));
  1084. for (idx = 0x0; idx < 0x30 ; idx++)
  1085. snd_iprintf(buffer, " MT%02x : 0x%02x\n", idx, inb(ice->profi_port+idx));
  1086. }
  1087. static void __devinit snd_vt1724_proc_init(ice1712_t * ice)
  1088. {
  1089. snd_info_entry_t *entry;
  1090. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1091. snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
  1092. }
  1093. /*
  1094. *
  1095. */
  1096. static int snd_vt1724_eeprom_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1097. {
  1098. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1099. uinfo->count = sizeof(ice1712_eeprom_t);
  1100. return 0;
  1101. }
  1102. static int snd_vt1724_eeprom_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1103. {
  1104. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1105. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1106. return 0;
  1107. }
  1108. static snd_kcontrol_new_t snd_vt1724_eeprom __devinitdata = {
  1109. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1110. .name = "ICE1724 EEPROM",
  1111. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1112. .info = snd_vt1724_eeprom_info,
  1113. .get = snd_vt1724_eeprom_get
  1114. };
  1115. /*
  1116. */
  1117. static int snd_vt1724_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1118. {
  1119. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1120. uinfo->count = 1;
  1121. return 0;
  1122. }
  1123. static unsigned int encode_spdif_bits(snd_aes_iec958_t *diga)
  1124. {
  1125. unsigned int val;
  1126. val = diga->status[0] & 0x03; /* professional, non-audio */
  1127. if (val & 0x01) {
  1128. /* professional */
  1129. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
  1130. val |= 1U << 3;
  1131. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1132. case IEC958_AES0_PRO_FS_44100:
  1133. break;
  1134. case IEC958_AES0_PRO_FS_32000:
  1135. val |= 3U << 12;
  1136. break;
  1137. default:
  1138. val |= 2U << 12;
  1139. break;
  1140. }
  1141. } else {
  1142. /* consumer */
  1143. val |= diga->status[1] & 0x04; /* copyright */
  1144. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS)== IEC958_AES0_CON_EMPHASIS_5015)
  1145. val |= 1U << 3;
  1146. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1147. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1148. }
  1149. return val;
  1150. }
  1151. static void decode_spdif_bits(snd_aes_iec958_t *diga, unsigned int val)
  1152. {
  1153. memset(diga->status, 0, sizeof(diga->status));
  1154. diga->status[0] = val & 0x03; /* professional, non-audio */
  1155. if (val & 0x01) {
  1156. /* professional */
  1157. if (val & (1U << 3))
  1158. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1159. switch ((val >> 12) & 0x7) {
  1160. case 0:
  1161. break;
  1162. case 2:
  1163. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1164. break;
  1165. default:
  1166. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1167. break;
  1168. }
  1169. } else {
  1170. /* consumer */
  1171. diga->status[0] |= val & (1U << 2); /* copyright */
  1172. if (val & (1U << 3))
  1173. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1174. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1175. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1176. }
  1177. }
  1178. static int snd_vt1724_spdif_default_get(snd_kcontrol_t * kcontrol,
  1179. snd_ctl_elem_value_t * ucontrol)
  1180. {
  1181. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1182. unsigned int val;
  1183. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1184. decode_spdif_bits(&ucontrol->value.iec958, val);
  1185. return 0;
  1186. }
  1187. static int snd_vt1724_spdif_default_put(snd_kcontrol_t * kcontrol,
  1188. snd_ctl_elem_value_t * ucontrol)
  1189. {
  1190. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1191. unsigned int val, old;
  1192. val = encode_spdif_bits(&ucontrol->value.iec958);
  1193. spin_lock_irq(&ice->reg_lock);
  1194. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1195. if (val != old)
  1196. update_spdif_bits(ice, val);
  1197. spin_unlock_irq(&ice->reg_lock);
  1198. return (val != old);
  1199. }
  1200. static snd_kcontrol_new_t snd_vt1724_spdif_default __devinitdata =
  1201. {
  1202. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1203. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1204. .info = snd_vt1724_spdif_info,
  1205. .get = snd_vt1724_spdif_default_get,
  1206. .put = snd_vt1724_spdif_default_put
  1207. };
  1208. static int snd_vt1724_spdif_maskc_get(snd_kcontrol_t * kcontrol,
  1209. snd_ctl_elem_value_t * ucontrol)
  1210. {
  1211. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1212. IEC958_AES0_PROFESSIONAL |
  1213. IEC958_AES0_CON_NOT_COPYRIGHT |
  1214. IEC958_AES0_CON_EMPHASIS;
  1215. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1216. IEC958_AES1_CON_CATEGORY;
  1217. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1218. return 0;
  1219. }
  1220. static int snd_vt1724_spdif_maskp_get(snd_kcontrol_t * kcontrol,
  1221. snd_ctl_elem_value_t * ucontrol)
  1222. {
  1223. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1224. IEC958_AES0_PROFESSIONAL |
  1225. IEC958_AES0_PRO_FS |
  1226. IEC958_AES0_PRO_EMPHASIS;
  1227. return 0;
  1228. }
  1229. static snd_kcontrol_new_t snd_vt1724_spdif_maskc __devinitdata =
  1230. {
  1231. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1232. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1233. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1234. .info = snd_vt1724_spdif_info,
  1235. .get = snd_vt1724_spdif_maskc_get,
  1236. };
  1237. static snd_kcontrol_new_t snd_vt1724_spdif_maskp __devinitdata =
  1238. {
  1239. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1240. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1241. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1242. .info = snd_vt1724_spdif_info,
  1243. .get = snd_vt1724_spdif_maskp_get,
  1244. };
  1245. static int snd_vt1724_spdif_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1246. {
  1247. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1248. uinfo->count = 1;
  1249. uinfo->value.integer.min = 0;
  1250. uinfo->value.integer.max = 1;
  1251. return 0;
  1252. }
  1253. static int snd_vt1724_spdif_sw_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1254. {
  1255. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1256. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1257. return 0;
  1258. }
  1259. static int snd_vt1724_spdif_sw_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1260. {
  1261. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1262. unsigned char old, val;
  1263. spin_lock_irq(&ice->reg_lock);
  1264. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1265. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1266. if (ucontrol->value.integer.value[0])
  1267. val |= VT1724_CFG_SPDIF_OUT_EN;
  1268. if (old != val)
  1269. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1270. spin_unlock_irq(&ice->reg_lock);
  1271. return old != val;
  1272. }
  1273. static snd_kcontrol_new_t snd_vt1724_spdif_switch __devinitdata =
  1274. {
  1275. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1276. /* FIXME: the following conflict with IEC958 Playback Route */
  1277. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1278. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1279. .info = snd_vt1724_spdif_sw_info,
  1280. .get = snd_vt1724_spdif_sw_get,
  1281. .put = snd_vt1724_spdif_sw_put
  1282. };
  1283. #if 0 /* NOT USED YET */
  1284. /*
  1285. * GPIO access from extern
  1286. */
  1287. int snd_vt1724_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1288. {
  1289. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1290. uinfo->count = 1;
  1291. uinfo->value.integer.min = 0;
  1292. uinfo->value.integer.max = 1;
  1293. return 0;
  1294. }
  1295. int snd_vt1724_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1296. {
  1297. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1298. int shift = kcontrol->private_value & 0xff;
  1299. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1300. snd_ice1712_save_gpio_status(ice);
  1301. ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1302. snd_ice1712_restore_gpio_status(ice);
  1303. return 0;
  1304. }
  1305. int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1306. {
  1307. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1308. int shift = kcontrol->private_value & 0xff;
  1309. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1310. unsigned int val, nval;
  1311. if (kcontrol->private_value & (1 << 31))
  1312. return -EPERM;
  1313. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1314. snd_ice1712_save_gpio_status(ice);
  1315. val = snd_ice1712_gpio_read(ice);
  1316. nval |= val & ~(1 << shift);
  1317. if (val != nval)
  1318. snd_ice1712_gpio_write(ice, nval);
  1319. snd_ice1712_restore_gpio_status(ice);
  1320. return val != nval;
  1321. }
  1322. #endif /* NOT USED YET */
  1323. /*
  1324. * rate
  1325. */
  1326. static int snd_vt1724_pro_internal_clock_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1327. {
  1328. static char *texts_1724[] = {
  1329. "8000", /* 0: 6 */
  1330. "9600", /* 1: 3 */
  1331. "11025", /* 2: 10 */
  1332. "12000", /* 3: 2 */
  1333. "16000", /* 4: 5 */
  1334. "22050", /* 5: 9 */
  1335. "24000", /* 6: 1 */
  1336. "32000", /* 7: 4 */
  1337. "44100", /* 8: 8 */
  1338. "48000", /* 9: 0 */
  1339. "64000", /* 10: 15 */
  1340. "88200", /* 11: 11 */
  1341. "96000", /* 12: 7 */
  1342. "176400", /* 13: 12 */
  1343. "192000", /* 14: 14 */
  1344. "IEC958 Input", /* 15: -- */
  1345. };
  1346. static char *texts_1720[] = {
  1347. "8000", /* 0: 6 */
  1348. "9600", /* 1: 3 */
  1349. "11025", /* 2: 10 */
  1350. "12000", /* 3: 2 */
  1351. "16000", /* 4: 5 */
  1352. "22050", /* 5: 9 */
  1353. "24000", /* 6: 1 */
  1354. "32000", /* 7: 4 */
  1355. "44100", /* 8: 8 */
  1356. "48000", /* 9: 0 */
  1357. "64000", /* 10: 15 */
  1358. "88200", /* 11: 11 */
  1359. "96000", /* 12: 7 */
  1360. "IEC958 Input", /* 13: -- */
  1361. };
  1362. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1363. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1364. uinfo->count = 1;
  1365. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1366. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1367. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1368. strcpy(uinfo->value.enumerated.name,
  1369. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1370. texts_1724[uinfo->value.enumerated.item]);
  1371. return 0;
  1372. }
  1373. static int snd_vt1724_pro_internal_clock_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1374. {
  1375. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1376. static unsigned char xlate[16] = {
  1377. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1378. };
  1379. unsigned char val;
  1380. spin_lock_irq(&ice->reg_lock);
  1381. if (is_spdif_master(ice)) {
  1382. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1383. } else {
  1384. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1385. if (val == 255) {
  1386. snd_BUG();
  1387. val = 0;
  1388. }
  1389. ucontrol->value.enumerated.item[0] = val;
  1390. }
  1391. spin_unlock_irq(&ice->reg_lock);
  1392. return 0;
  1393. }
  1394. static int snd_vt1724_pro_internal_clock_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1395. {
  1396. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1397. unsigned char oval;
  1398. int rate;
  1399. int change = 0;
  1400. int spdif = ice->vt1720 ? 13 : 15;
  1401. spin_lock_irq(&ice->reg_lock);
  1402. oval = inb(ICEMT1724(ice, RATE));
  1403. if (ucontrol->value.enumerated.item[0] == spdif) {
  1404. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1405. } else {
  1406. rate = rates[ucontrol->value.integer.value[0] % 15];
  1407. if (rate <= get_max_rate(ice)) {
  1408. PRO_RATE_DEFAULT = rate;
  1409. spin_unlock_irq(&ice->reg_lock);
  1410. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1411. spin_lock_irq(&ice->reg_lock);
  1412. }
  1413. }
  1414. change = inb(ICEMT1724(ice, RATE)) != oval;
  1415. spin_unlock_irq(&ice->reg_lock);
  1416. if ((oval & VT1724_SPDIF_MASTER) != (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1417. /* notify akm chips as well */
  1418. if (is_spdif_master(ice)) {
  1419. unsigned int i;
  1420. for (i = 0; i < ice->akm_codecs; i++) {
  1421. if (ice->akm[i].ops.set_rate_val)
  1422. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1423. }
  1424. }
  1425. }
  1426. return change;
  1427. }
  1428. static snd_kcontrol_new_t snd_vt1724_pro_internal_clock __devinitdata = {
  1429. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1430. .name = "Multi Track Internal Clock",
  1431. .info = snd_vt1724_pro_internal_clock_info,
  1432. .get = snd_vt1724_pro_internal_clock_get,
  1433. .put = snd_vt1724_pro_internal_clock_put
  1434. };
  1435. static int snd_vt1724_pro_rate_locking_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1436. {
  1437. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1438. uinfo->count = 1;
  1439. uinfo->value.integer.min = 0;
  1440. uinfo->value.integer.max = 1;
  1441. return 0;
  1442. }
  1443. static int snd_vt1724_pro_rate_locking_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1444. {
  1445. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1446. return 0;
  1447. }
  1448. static int snd_vt1724_pro_rate_locking_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1449. {
  1450. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1451. int change = 0, nval;
  1452. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1453. spin_lock_irq(&ice->reg_lock);
  1454. change = PRO_RATE_LOCKED != nval;
  1455. PRO_RATE_LOCKED = nval;
  1456. spin_unlock_irq(&ice->reg_lock);
  1457. return change;
  1458. }
  1459. static snd_kcontrol_new_t snd_vt1724_pro_rate_locking __devinitdata = {
  1460. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1461. .name = "Multi Track Rate Locking",
  1462. .info = snd_vt1724_pro_rate_locking_info,
  1463. .get = snd_vt1724_pro_rate_locking_get,
  1464. .put = snd_vt1724_pro_rate_locking_put
  1465. };
  1466. static int snd_vt1724_pro_rate_reset_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1467. {
  1468. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1469. uinfo->count = 1;
  1470. uinfo->value.integer.min = 0;
  1471. uinfo->value.integer.max = 1;
  1472. return 0;
  1473. }
  1474. static int snd_vt1724_pro_rate_reset_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1475. {
  1476. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1477. return 0;
  1478. }
  1479. static int snd_vt1724_pro_rate_reset_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1480. {
  1481. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1482. int change = 0, nval;
  1483. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1484. spin_lock_irq(&ice->reg_lock);
  1485. change = PRO_RATE_RESET != nval;
  1486. PRO_RATE_RESET = nval;
  1487. spin_unlock_irq(&ice->reg_lock);
  1488. return change;
  1489. }
  1490. static snd_kcontrol_new_t snd_vt1724_pro_rate_reset __devinitdata = {
  1491. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1492. .name = "Multi Track Rate Reset",
  1493. .info = snd_vt1724_pro_rate_reset_info,
  1494. .get = snd_vt1724_pro_rate_reset_get,
  1495. .put = snd_vt1724_pro_rate_reset_put
  1496. };
  1497. /*
  1498. * routing
  1499. */
  1500. static int snd_vt1724_pro_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1501. {
  1502. static char *texts[] = {
  1503. "PCM Out", /* 0 */
  1504. "H/W In 0", "H/W In 1", /* 1-2 */
  1505. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1506. };
  1507. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1508. uinfo->count = 1;
  1509. uinfo->value.enumerated.items = 5;
  1510. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1511. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1512. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1513. return 0;
  1514. }
  1515. static inline int analog_route_shift(int idx)
  1516. {
  1517. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1518. }
  1519. static inline int digital_route_shift(int idx)
  1520. {
  1521. return idx * 3;
  1522. }
  1523. static int get_route_val(ice1712_t *ice, int shift)
  1524. {
  1525. unsigned long val;
  1526. unsigned char eitem;
  1527. static unsigned char xlate[8] = {
  1528. 0, 255, 1, 2, 255, 255, 3, 4,
  1529. };
  1530. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1531. val >>= shift;
  1532. val &= 7; //we now have 3 bits per output
  1533. eitem = xlate[val];
  1534. if (eitem == 255) {
  1535. snd_BUG();
  1536. return 0;
  1537. }
  1538. return eitem;
  1539. }
  1540. static int put_route_val(ice1712_t *ice, unsigned int val, int shift)
  1541. {
  1542. unsigned int old_val, nval;
  1543. int change;
  1544. static unsigned char xroute[8] = {
  1545. 0, /* PCM */
  1546. 2, /* PSDIN0 Left */
  1547. 3, /* PSDIN0 Right */
  1548. 6, /* SPDIN Left */
  1549. 7, /* SPDIN Right */
  1550. };
  1551. nval = xroute[val % 5];
  1552. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1553. val &= ~(0x07 << shift);
  1554. val |= nval << shift;
  1555. change = val != old_val;
  1556. if (change)
  1557. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1558. return change;
  1559. }
  1560. static int snd_vt1724_pro_route_analog_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1561. {
  1562. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1563. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1564. ucontrol->value.enumerated.item[0] = get_route_val(ice, analog_route_shift(idx));
  1565. return 0;
  1566. }
  1567. static int snd_vt1724_pro_route_analog_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1568. {
  1569. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1570. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1571. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1572. analog_route_shift(idx));
  1573. }
  1574. static int snd_vt1724_pro_route_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1575. {
  1576. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1577. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1578. ucontrol->value.enumerated.item[0] = get_route_val(ice, digital_route_shift(idx));
  1579. return 0;
  1580. }
  1581. static int snd_vt1724_pro_route_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1582. {
  1583. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1584. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1585. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1586. digital_route_shift(idx));
  1587. }
  1588. static snd_kcontrol_new_t snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1589. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1590. .name = "H/W Playback Route",
  1591. .info = snd_vt1724_pro_route_info,
  1592. .get = snd_vt1724_pro_route_analog_get,
  1593. .put = snd_vt1724_pro_route_analog_put,
  1594. };
  1595. static snd_kcontrol_new_t snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1596. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1597. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1598. .info = snd_vt1724_pro_route_info,
  1599. .get = snd_vt1724_pro_route_spdif_get,
  1600. .put = snd_vt1724_pro_route_spdif_put,
  1601. .count = 2,
  1602. };
  1603. static int snd_vt1724_pro_peak_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1604. {
  1605. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1606. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1607. uinfo->value.integer.min = 0;
  1608. uinfo->value.integer.max = 255;
  1609. return 0;
  1610. }
  1611. static int snd_vt1724_pro_peak_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1612. {
  1613. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1614. int idx;
  1615. spin_lock_irq(&ice->reg_lock);
  1616. for (idx = 0; idx < 22; idx++) {
  1617. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1618. ucontrol->value.integer.value[idx] = inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1619. }
  1620. spin_unlock_irq(&ice->reg_lock);
  1621. return 0;
  1622. }
  1623. static snd_kcontrol_new_t snd_vt1724_mixer_pro_peak __devinitdata = {
  1624. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1625. .name = "Multi Track Peak",
  1626. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1627. .info = snd_vt1724_pro_peak_info,
  1628. .get = snd_vt1724_pro_peak_get
  1629. };
  1630. /*
  1631. *
  1632. */
  1633. static struct snd_ice1712_card_info no_matched __devinitdata;
  1634. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1635. snd_vt1724_revo_cards,
  1636. snd_vt1724_amp_cards,
  1637. snd_vt1724_aureon_cards,
  1638. snd_vt1720_mobo_cards,
  1639. snd_vt1720_pontis_cards,
  1640. snd_vt1724_prodigy192_cards,
  1641. snd_vt1724_juli_cards,
  1642. snd_vt1724_phase_cards,
  1643. NULL,
  1644. };
  1645. /*
  1646. */
  1647. static void wait_i2c_busy(ice1712_t *ice)
  1648. {
  1649. int t = 0x10000;
  1650. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1651. ;
  1652. if (t == -1)
  1653. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1654. }
  1655. unsigned char snd_vt1724_read_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr)
  1656. {
  1657. unsigned char val;
  1658. down(&ice->i2c_mutex);
  1659. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1660. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1661. wait_i2c_busy(ice);
  1662. val = inb(ICEREG1724(ice, I2C_DATA));
  1663. up(&ice->i2c_mutex);
  1664. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1665. return val;
  1666. }
  1667. void snd_vt1724_write_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr, unsigned char data)
  1668. {
  1669. down(&ice->i2c_mutex);
  1670. wait_i2c_busy(ice);
  1671. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1672. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1673. outb(data, ICEREG1724(ice, I2C_DATA));
  1674. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1675. wait_i2c_busy(ice);
  1676. up(&ice->i2c_mutex);
  1677. }
  1678. static int __devinit snd_vt1724_read_eeprom(ice1712_t *ice, const char *modelname)
  1679. {
  1680. const int dev = 0xa0; /* EEPROM device address */
  1681. unsigned int i, size;
  1682. struct snd_ice1712_card_info **tbl, *c;
  1683. if (! modelname || ! *modelname) {
  1684. ice->eeprom.subvendor = 0;
  1685. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1686. ice->eeprom.subvendor =
  1687. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1688. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1689. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1690. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1691. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  1692. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  1693. u16 vendor, device;
  1694. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  1695. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1696. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1697. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  1698. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1699. return -ENXIO;
  1700. }
  1701. }
  1702. }
  1703. for (tbl = card_tables; *tbl; tbl++) {
  1704. for (c = *tbl; c->subvendor; c++) {
  1705. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  1706. printk(KERN_INFO "ice1724: Using board model %s\n", c->name);
  1707. ice->eeprom.subvendor = c->subvendor;
  1708. } else if (c->subvendor != ice->eeprom.subvendor)
  1709. continue;
  1710. if (! c->eeprom_size || ! c->eeprom_data)
  1711. goto found;
  1712. /* if the EEPROM is given by the driver, use it */
  1713. snd_printdd("using the defined eeprom..\n");
  1714. ice->eeprom.version = 2;
  1715. ice->eeprom.size = c->eeprom_size + 6;
  1716. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1717. goto read_skipped;
  1718. }
  1719. }
  1720. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", ice->eeprom.subvendor);
  1721. found:
  1722. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1723. if (ice->eeprom.size < 6)
  1724. ice->eeprom.size = 32;
  1725. else if (ice->eeprom.size > 32) {
  1726. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", ice->eeprom.size);
  1727. return -EIO;
  1728. }
  1729. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1730. if (ice->eeprom.version != 2)
  1731. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", ice->eeprom.version);
  1732. size = ice->eeprom.size - 6;
  1733. for (i = 0; i < size; i++)
  1734. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1735. read_skipped:
  1736. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1737. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1738. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1739. return 0;
  1740. }
  1741. static int __devinit snd_vt1724_chip_init(ice1712_t *ice)
  1742. {
  1743. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1744. udelay(200);
  1745. outb(0, ICEREG1724(ice, CONTROL));
  1746. udelay(200);
  1747. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1748. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1749. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1750. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1751. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1752. ice->gpio.direction = ice->eeprom.gpiodir;
  1753. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1754. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1755. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1756. outb(0, ICEREG1724(ice, POWERDOWN));
  1757. return 0;
  1758. }
  1759. static int __devinit snd_vt1724_spdif_build_controls(ice1712_t *ice)
  1760. {
  1761. int err;
  1762. snd_kcontrol_t *kctl;
  1763. snd_assert(ice->pcm != NULL, return -EIO);
  1764. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1765. if (err < 0)
  1766. return err;
  1767. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1768. if (err < 0)
  1769. return err;
  1770. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1771. if (err < 0)
  1772. return err;
  1773. kctl->id.device = ice->pcm->device;
  1774. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1775. if (err < 0)
  1776. return err;
  1777. kctl->id.device = ice->pcm->device;
  1778. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1779. if (err < 0)
  1780. return err;
  1781. kctl->id.device = ice->pcm->device;
  1782. #if 0 /* use default only */
  1783. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1784. if (err < 0)
  1785. return err;
  1786. kctl->id.device = ice->pcm->device;
  1787. ice->spdif.stream_ctl = kctl;
  1788. #endif
  1789. return 0;
  1790. }
  1791. static int __devinit snd_vt1724_build_controls(ice1712_t *ice)
  1792. {
  1793. int err;
  1794. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1795. if (err < 0)
  1796. return err;
  1797. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1798. if (err < 0)
  1799. return err;
  1800. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1801. if (err < 0)
  1802. return err;
  1803. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1804. if (err < 0)
  1805. return err;
  1806. if (ice->num_total_dacs > 0) {
  1807. snd_kcontrol_new_t tmp = snd_vt1724_mixer_pro_analog_route;
  1808. tmp.count = ice->num_total_dacs;
  1809. if (ice->vt1720 && tmp.count > 2)
  1810. tmp.count = 2;
  1811. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1812. if (err < 0)
  1813. return err;
  1814. }
  1815. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1816. if (err < 0)
  1817. return err;
  1818. return 0;
  1819. }
  1820. static int snd_vt1724_free(ice1712_t *ice)
  1821. {
  1822. if (! ice->port)
  1823. goto __hw_end;
  1824. /* mask all interrupts */
  1825. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1826. outb(0xff, ICEREG1724(ice, IRQMASK));
  1827. /* --- */
  1828. __hw_end:
  1829. if (ice->irq >= 0) {
  1830. synchronize_irq(ice->irq);
  1831. free_irq(ice->irq, (void *) ice);
  1832. }
  1833. pci_release_regions(ice->pci);
  1834. snd_ice1712_akm4xxx_free(ice);
  1835. pci_disable_device(ice->pci);
  1836. kfree(ice);
  1837. return 0;
  1838. }
  1839. static int snd_vt1724_dev_free(snd_device_t *device)
  1840. {
  1841. ice1712_t *ice = device->device_data;
  1842. return snd_vt1724_free(ice);
  1843. }
  1844. static int __devinit snd_vt1724_create(snd_card_t * card,
  1845. struct pci_dev *pci,
  1846. const char *modelname,
  1847. ice1712_t ** r_ice1712)
  1848. {
  1849. ice1712_t *ice;
  1850. int err;
  1851. unsigned char mask;
  1852. static snd_device_ops_t ops = {
  1853. .dev_free = snd_vt1724_dev_free,
  1854. };
  1855. *r_ice1712 = NULL;
  1856. /* enable PCI device */
  1857. if ((err = pci_enable_device(pci)) < 0)
  1858. return err;
  1859. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1860. if (ice == NULL) {
  1861. pci_disable_device(pci);
  1862. return -ENOMEM;
  1863. }
  1864. ice->vt1724 = 1;
  1865. spin_lock_init(&ice->reg_lock);
  1866. init_MUTEX(&ice->gpio_mutex);
  1867. init_MUTEX(&ice->open_mutex);
  1868. init_MUTEX(&ice->i2c_mutex);
  1869. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1870. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1871. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1872. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1873. ice->card = card;
  1874. ice->pci = pci;
  1875. ice->irq = -1;
  1876. pci_set_master(pci);
  1877. snd_vt1724_proc_init(ice);
  1878. synchronize_irq(pci->irq);
  1879. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1880. kfree(ice);
  1881. pci_disable_device(pci);
  1882. return err;
  1883. }
  1884. ice->port = pci_resource_start(pci, 0);
  1885. ice->profi_port = pci_resource_start(pci, 1);
  1886. if (request_irq(pci->irq, snd_vt1724_interrupt, SA_INTERRUPT|SA_SHIRQ, "ICE1724", (void *) ice)) {
  1887. snd_printk("unable to grab IRQ %d\n", pci->irq);
  1888. snd_vt1724_free(ice);
  1889. return -EIO;
  1890. }
  1891. ice->irq = pci->irq;
  1892. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1893. snd_vt1724_free(ice);
  1894. return -EIO;
  1895. }
  1896. if (snd_vt1724_chip_init(ice) < 0) {
  1897. snd_vt1724_free(ice);
  1898. return -EIO;
  1899. }
  1900. /* unmask used interrupts */
  1901. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  1902. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  1903. else
  1904. mask = 0;
  1905. outb(mask, ICEREG1724(ice, IRQMASK));
  1906. /* don't handle FIFO overrun/underruns (just yet), since they cause machine lockups */
  1907. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  1908. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  1909. snd_vt1724_free(ice);
  1910. return err;
  1911. }
  1912. snd_card_set_dev(card, &pci->dev);
  1913. *r_ice1712 = ice;
  1914. return 0;
  1915. }
  1916. /*
  1917. *
  1918. * Registration
  1919. *
  1920. */
  1921. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  1922. const struct pci_device_id *pci_id)
  1923. {
  1924. static int dev;
  1925. snd_card_t *card;
  1926. ice1712_t *ice;
  1927. int pcm_dev = 0, err;
  1928. struct snd_ice1712_card_info **tbl, *c;
  1929. if (dev >= SNDRV_CARDS)
  1930. return -ENODEV;
  1931. if (!enable[dev]) {
  1932. dev++;
  1933. return -ENOENT;
  1934. }
  1935. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1936. if (card == NULL)
  1937. return -ENOMEM;
  1938. strcpy(card->driver, "ICE1724");
  1939. strcpy(card->shortname, "ICEnsemble ICE1724");
  1940. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  1941. snd_card_free(card);
  1942. return err;
  1943. }
  1944. for (tbl = card_tables; *tbl; tbl++) {
  1945. for (c = *tbl; c->subvendor; c++) {
  1946. if (c->subvendor == ice->eeprom.subvendor) {
  1947. strcpy(card->shortname, c->name);
  1948. if (c->driver) /* specific driver? */
  1949. strcpy(card->driver, c->driver);
  1950. if (c->chip_init) {
  1951. if ((err = c->chip_init(ice)) < 0) {
  1952. snd_card_free(card);
  1953. return err;
  1954. }
  1955. }
  1956. goto __found;
  1957. }
  1958. }
  1959. }
  1960. c = &no_matched;
  1961. __found:
  1962. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  1963. snd_card_free(card);
  1964. return err;
  1965. }
  1966. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  1967. snd_card_free(card);
  1968. return err;
  1969. }
  1970. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  1971. snd_card_free(card);
  1972. return err;
  1973. }
  1974. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  1975. snd_card_free(card);
  1976. return err;
  1977. }
  1978. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  1979. snd_card_free(card);
  1980. return err;
  1981. }
  1982. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  1983. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  1984. snd_card_free(card);
  1985. return err;
  1986. }
  1987. }
  1988. if (c->build_controls) {
  1989. if ((err = c->build_controls(ice)) < 0) {
  1990. snd_card_free(card);
  1991. return err;
  1992. }
  1993. }
  1994. if (! c->no_mpu401) {
  1995. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  1996. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  1997. ICEREG1724(ice, MPU_CTRL), 1,
  1998. ice->irq, 0,
  1999. &ice->rmidi[0])) < 0) {
  2000. snd_card_free(card);
  2001. return err;
  2002. }
  2003. }
  2004. }
  2005. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2006. card->shortname, ice->port, ice->irq);
  2007. if ((err = snd_card_register(card)) < 0) {
  2008. snd_card_free(card);
  2009. return err;
  2010. }
  2011. pci_set_drvdata(pci, card);
  2012. dev++;
  2013. return 0;
  2014. }
  2015. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2016. {
  2017. snd_card_free(pci_get_drvdata(pci));
  2018. pci_set_drvdata(pci, NULL);
  2019. }
  2020. static struct pci_driver driver = {
  2021. .name = "ICE1724",
  2022. .owner = THIS_MODULE,
  2023. .id_table = snd_vt1724_ids,
  2024. .probe = snd_vt1724_probe,
  2025. .remove = __devexit_p(snd_vt1724_remove),
  2026. };
  2027. static int __init alsa_card_ice1724_init(void)
  2028. {
  2029. return pci_register_driver(&driver);
  2030. }
  2031. static void __exit alsa_card_ice1724_exit(void)
  2032. {
  2033. pci_unregister_driver(&driver);
  2034. }
  2035. module_init(alsa_card_ice1724_init)
  2036. module_exit(alsa_card_ice1724_exit)