bt87x.c 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923
  1. /*
  2. * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
  7. *
  8. *
  9. * This driver is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This driver is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <sound/driver.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/pci.h>
  27. #include <linux/slab.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/bitops.h>
  30. #include <asm/io.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/control.h>
  35. #include <sound/initval.h>
  36. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  37. MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
  38. MODULE_LICENSE("GPL");
  39. MODULE_SUPPORTED_DEVICE("{{Brooktree,Bt878},"
  40. "{Brooktree,Bt879}}");
  41. static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
  42. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  43. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  44. static int digital_rate[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 }; /* digital input rate */
  45. static int load_all; /* allow to load the non-whitelisted cards */
  46. module_param_array(index, int, NULL, 0444);
  47. MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
  48. module_param_array(id, charp, NULL, 0444);
  49. MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
  50. module_param_array(enable, bool, NULL, 0444);
  51. MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
  52. module_param_array(digital_rate, int, NULL, 0444);
  53. MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
  54. module_param(load_all, bool, 0444);
  55. MODULE_PARM_DESC(load_all, "Allow to load the non-whitelisted cards");
  56. /* register offsets */
  57. #define REG_INT_STAT 0x100 /* interrupt status */
  58. #define REG_INT_MASK 0x104 /* interrupt mask */
  59. #define REG_GPIO_DMA_CTL 0x10c /* audio control */
  60. #define REG_PACKET_LEN 0x110 /* audio packet lengths */
  61. #define REG_RISC_STRT_ADD 0x114 /* RISC program start address */
  62. #define REG_RISC_COUNT 0x120 /* RISC program counter */
  63. /* interrupt bits */
  64. #define INT_OFLOW (1 << 3) /* audio A/D overflow */
  65. #define INT_RISCI (1 << 11) /* RISC instruction IRQ bit set */
  66. #define INT_FBUS (1 << 12) /* FIFO overrun due to bus access latency */
  67. #define INT_FTRGT (1 << 13) /* FIFO overrun due to target latency */
  68. #define INT_FDSR (1 << 14) /* FIFO data stream resynchronization */
  69. #define INT_PPERR (1 << 15) /* PCI parity error */
  70. #define INT_RIPERR (1 << 16) /* RISC instruction parity error */
  71. #define INT_PABORT (1 << 17) /* PCI master or target abort */
  72. #define INT_OCERR (1 << 18) /* invalid opcode */
  73. #define INT_SCERR (1 << 19) /* sync counter overflow */
  74. #define INT_RISC_EN (1 << 27) /* DMA controller running */
  75. #define INT_RISCS_SHIFT 28 /* RISC status bits */
  76. /* audio control bits */
  77. #define CTL_FIFO_ENABLE (1 << 0) /* enable audio data FIFO */
  78. #define CTL_RISC_ENABLE (1 << 1) /* enable audio DMA controller */
  79. #define CTL_PKTP_4 (0 << 2) /* packet mode FIFO trigger point - 4 DWORDs */
  80. #define CTL_PKTP_8 (1 << 2) /* 8 DWORDs */
  81. #define CTL_PKTP_16 (2 << 2) /* 16 DWORDs */
  82. #define CTL_ACAP_EN (1 << 4) /* enable audio capture */
  83. #define CTL_DA_APP (1 << 5) /* GPIO input */
  84. #define CTL_DA_IOM_AFE (0 << 6) /* audio A/D input */
  85. #define CTL_DA_IOM_DA (1 << 6) /* digital audio input */
  86. #define CTL_DA_SDR_SHIFT 8 /* DDF first stage decimation rate */
  87. #define CTL_DA_SDR_MASK (0xf<< 8)
  88. #define CTL_DA_LMT (1 << 12) /* limit audio data values */
  89. #define CTL_DA_ES2 (1 << 13) /* enable DDF stage 2 */
  90. #define CTL_DA_SBR (1 << 14) /* samples rounded to 8 bits */
  91. #define CTL_DA_DPM (1 << 15) /* data packet mode */
  92. #define CTL_DA_LRD_SHIFT 16 /* ALRCK delay */
  93. #define CTL_DA_MLB (1 << 21) /* MSB/LSB format */
  94. #define CTL_DA_LRI (1 << 22) /* left/right indication */
  95. #define CTL_DA_SCE (1 << 23) /* sample clock edge */
  96. #define CTL_A_SEL_STV (0 << 24) /* TV tuner audio input */
  97. #define CTL_A_SEL_SFM (1 << 24) /* FM audio input */
  98. #define CTL_A_SEL_SML (2 << 24) /* mic/line audio input */
  99. #define CTL_A_SEL_SMXC (3 << 24) /* MUX bypass */
  100. #define CTL_A_SEL_SHIFT 24
  101. #define CTL_A_SEL_MASK (3 << 24)
  102. #define CTL_A_PWRDN (1 << 26) /* analog audio power-down */
  103. #define CTL_A_G2X (1 << 27) /* audio gain boost */
  104. #define CTL_A_GAIN_SHIFT 28 /* audio input gain */
  105. #define CTL_A_GAIN_MASK (0xf<<28)
  106. /* RISC instruction opcodes */
  107. #define RISC_WRITE (0x1 << 28) /* write FIFO data to memory at address */
  108. #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
  109. #define RISC_SKIP (0x2 << 28) /* skip FIFO data */
  110. #define RISC_JUMP (0x7 << 28) /* jump to address */
  111. #define RISC_SYNC (0x8 << 28) /* synchronize with FIFO */
  112. /* RISC instruction bits */
  113. #define RISC_BYTES_ENABLE (0xf << 12) /* byte enable bits */
  114. #define RISC_RESYNC ( 1 << 15) /* disable FDSR errors */
  115. #define RISC_SET_STATUS_SHIFT 16 /* set status bits */
  116. #define RISC_RESET_STATUS_SHIFT 20 /* clear status bits */
  117. #define RISC_IRQ ( 1 << 24) /* interrupt */
  118. #define RISC_EOL ( 1 << 26) /* end of line */
  119. #define RISC_SOL ( 1 << 27) /* start of line */
  120. /* SYNC status bits values */
  121. #define RISC_SYNC_FM1 0x6
  122. #define RISC_SYNC_VRO 0xc
  123. #define ANALOG_CLOCK 1792000
  124. #ifdef CONFIG_SND_BT87X_OVERCLOCK
  125. #define CLOCK_DIV_MIN 1
  126. #else
  127. #define CLOCK_DIV_MIN 4
  128. #endif
  129. #define CLOCK_DIV_MAX 15
  130. #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
  131. INT_RIPERR | INT_PABORT | INT_OCERR)
  132. #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
  133. /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
  134. #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
  135. typedef struct snd_bt87x bt87x_t;
  136. struct snd_bt87x {
  137. snd_card_t *card;
  138. struct pci_dev *pci;
  139. void __iomem *mmio;
  140. int irq;
  141. int dig_rate;
  142. spinlock_t reg_lock;
  143. long opened;
  144. snd_pcm_substream_t *substream;
  145. struct snd_dma_buffer dma_risc;
  146. unsigned int line_bytes;
  147. unsigned int lines;
  148. u32 reg_control;
  149. u32 interrupt_mask;
  150. int current_line;
  151. int pci_parity_errors;
  152. };
  153. enum { DEVICE_DIGITAL, DEVICE_ANALOG };
  154. static inline u32 snd_bt87x_readl(bt87x_t *chip, u32 reg)
  155. {
  156. return readl(chip->mmio + reg);
  157. }
  158. static inline void snd_bt87x_writel(bt87x_t *chip, u32 reg, u32 value)
  159. {
  160. writel(value, chip->mmio + reg);
  161. }
  162. static int snd_bt87x_create_risc(bt87x_t *chip, snd_pcm_substream_t *substream,
  163. unsigned int periods, unsigned int period_bytes)
  164. {
  165. struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream);
  166. unsigned int i, offset;
  167. u32 *risc;
  168. if (chip->dma_risc.area == NULL) {
  169. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  170. PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
  171. return -ENOMEM;
  172. }
  173. risc = (u32 *)chip->dma_risc.area;
  174. offset = 0;
  175. *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
  176. *risc++ = cpu_to_le32(0);
  177. for (i = 0; i < periods; ++i) {
  178. u32 rest;
  179. rest = period_bytes;
  180. do {
  181. u32 cmd, len;
  182. len = PAGE_SIZE - (offset % PAGE_SIZE);
  183. if (len > rest)
  184. len = rest;
  185. cmd = RISC_WRITE | len;
  186. if (rest == period_bytes) {
  187. u32 block = i * 16 / periods;
  188. cmd |= RISC_SOL;
  189. cmd |= block << RISC_SET_STATUS_SHIFT;
  190. cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
  191. }
  192. if (len == rest)
  193. cmd |= RISC_EOL | RISC_IRQ;
  194. *risc++ = cpu_to_le32(cmd);
  195. *risc++ = cpu_to_le32((u32)snd_pcm_sgbuf_get_addr(sgbuf, offset));
  196. offset += len;
  197. rest -= len;
  198. } while (rest > 0);
  199. }
  200. *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
  201. *risc++ = cpu_to_le32(0);
  202. *risc++ = cpu_to_le32(RISC_JUMP);
  203. *risc++ = cpu_to_le32(chip->dma_risc.addr);
  204. chip->line_bytes = period_bytes;
  205. chip->lines = periods;
  206. return 0;
  207. }
  208. static void snd_bt87x_free_risc(bt87x_t *chip)
  209. {
  210. if (chip->dma_risc.area) {
  211. snd_dma_free_pages(&chip->dma_risc);
  212. chip->dma_risc.area = NULL;
  213. }
  214. }
  215. static void snd_bt87x_pci_error(bt87x_t *chip, unsigned int status)
  216. {
  217. u16 pci_status;
  218. pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
  219. pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
  220. PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
  221. PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY;
  222. pci_write_config_word(chip->pci, PCI_STATUS, pci_status);
  223. if (pci_status != PCI_STATUS_DETECTED_PARITY)
  224. snd_printk(KERN_ERR "Aieee - PCI error! status %#08x, PCI status %#04x\n",
  225. status & ERROR_INTERRUPTS, pci_status);
  226. else {
  227. snd_printk(KERN_ERR "Aieee - PCI parity error detected!\n");
  228. /* error 'handling' similar to aic7xxx_pci.c: */
  229. chip->pci_parity_errors++;
  230. if (chip->pci_parity_errors > 20) {
  231. snd_printk(KERN_ERR "Too many PCI parity errors observed.\n");
  232. snd_printk(KERN_ERR "Some device on this bus is generating bad parity.\n");
  233. snd_printk(KERN_ERR "This is an error *observed by*, not *generated by*, this card.\n");
  234. snd_printk(KERN_ERR "PCI parity error checking has been disabled.\n");
  235. chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
  236. snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
  237. }
  238. }
  239. }
  240. static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  241. {
  242. bt87x_t *chip = dev_id;
  243. unsigned int status, irq_status;
  244. status = snd_bt87x_readl(chip, REG_INT_STAT);
  245. irq_status = status & chip->interrupt_mask;
  246. if (!irq_status)
  247. return IRQ_NONE;
  248. snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
  249. if (irq_status & ERROR_INTERRUPTS) {
  250. if (irq_status & (INT_FBUS | INT_FTRGT))
  251. snd_printk(KERN_WARNING "FIFO overrun, status %#08x\n", status);
  252. if (irq_status & INT_OCERR)
  253. snd_printk(KERN_ERR "internal RISC error, status %#08x\n", status);
  254. if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
  255. snd_bt87x_pci_error(chip, irq_status);
  256. }
  257. if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
  258. int current_block, irq_block;
  259. /* assume that exactly one line has been recorded */
  260. chip->current_line = (chip->current_line + 1) % chip->lines;
  261. /* but check if some interrupts have been skipped */
  262. current_block = chip->current_line * 16 / chip->lines;
  263. irq_block = status >> INT_RISCS_SHIFT;
  264. if (current_block != irq_block)
  265. chip->current_line = (irq_block * chip->lines + 15) / 16;
  266. snd_pcm_period_elapsed(chip->substream);
  267. }
  268. return IRQ_HANDLED;
  269. }
  270. static snd_pcm_hardware_t snd_bt87x_digital_hw = {
  271. .info = SNDRV_PCM_INFO_MMAP |
  272. SNDRV_PCM_INFO_INTERLEAVED |
  273. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  274. SNDRV_PCM_INFO_MMAP_VALID,
  275. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  276. .rates = 0, /* set at runtime */
  277. .channels_min = 2,
  278. .channels_max = 2,
  279. .buffer_bytes_max = 255 * 4092,
  280. .period_bytes_min = 32,
  281. .period_bytes_max = 4092,
  282. .periods_min = 2,
  283. .periods_max = 255,
  284. };
  285. static snd_pcm_hardware_t snd_bt87x_analog_hw = {
  286. .info = SNDRV_PCM_INFO_MMAP |
  287. SNDRV_PCM_INFO_INTERLEAVED |
  288. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  289. SNDRV_PCM_INFO_MMAP_VALID,
  290. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
  291. .rates = SNDRV_PCM_RATE_KNOT,
  292. .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
  293. .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
  294. .channels_min = 1,
  295. .channels_max = 1,
  296. .buffer_bytes_max = 255 * 4092,
  297. .period_bytes_min = 32,
  298. .period_bytes_max = 4092,
  299. .periods_min = 2,
  300. .periods_max = 255,
  301. };
  302. static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
  303. {
  304. static struct {
  305. int rate;
  306. unsigned int bit;
  307. } ratebits[] = {
  308. {8000, SNDRV_PCM_RATE_8000},
  309. {11025, SNDRV_PCM_RATE_11025},
  310. {16000, SNDRV_PCM_RATE_16000},
  311. {22050, SNDRV_PCM_RATE_22050},
  312. {32000, SNDRV_PCM_RATE_32000},
  313. {44100, SNDRV_PCM_RATE_44100},
  314. {48000, SNDRV_PCM_RATE_48000}
  315. };
  316. int i;
  317. chip->reg_control |= CTL_DA_IOM_DA;
  318. runtime->hw = snd_bt87x_digital_hw;
  319. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  320. for (i = 0; i < ARRAY_SIZE(ratebits); ++i)
  321. if (chip->dig_rate == ratebits[i].rate) {
  322. runtime->hw.rates = ratebits[i].bit;
  323. break;
  324. }
  325. runtime->hw.rate_min = chip->dig_rate;
  326. runtime->hw.rate_max = chip->dig_rate;
  327. return 0;
  328. }
  329. static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
  330. {
  331. static ratnum_t analog_clock = {
  332. .num = ANALOG_CLOCK,
  333. .den_min = CLOCK_DIV_MIN,
  334. .den_max = CLOCK_DIV_MAX,
  335. .den_step = 1
  336. };
  337. static snd_pcm_hw_constraint_ratnums_t constraint_rates = {
  338. .nrats = 1,
  339. .rats = &analog_clock
  340. };
  341. chip->reg_control &= ~CTL_DA_IOM_DA;
  342. runtime->hw = snd_bt87x_analog_hw;
  343. return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  344. &constraint_rates);
  345. }
  346. static int snd_bt87x_pcm_open(snd_pcm_substream_t *substream)
  347. {
  348. bt87x_t *chip = snd_pcm_substream_chip(substream);
  349. snd_pcm_runtime_t *runtime = substream->runtime;
  350. int err;
  351. if (test_and_set_bit(0, &chip->opened))
  352. return -EBUSY;
  353. if (substream->pcm->device == DEVICE_DIGITAL)
  354. err = snd_bt87x_set_digital_hw(chip, runtime);
  355. else
  356. err = snd_bt87x_set_analog_hw(chip, runtime);
  357. if (err < 0)
  358. goto _error;
  359. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  360. if (err < 0)
  361. goto _error;
  362. chip->substream = substream;
  363. return 0;
  364. _error:
  365. clear_bit(0, &chip->opened);
  366. smp_mb__after_clear_bit();
  367. return err;
  368. }
  369. static int snd_bt87x_close(snd_pcm_substream_t *substream)
  370. {
  371. bt87x_t *chip = snd_pcm_substream_chip(substream);
  372. chip->substream = NULL;
  373. clear_bit(0, &chip->opened);
  374. smp_mb__after_clear_bit();
  375. return 0;
  376. }
  377. static int snd_bt87x_hw_params(snd_pcm_substream_t *substream,
  378. snd_pcm_hw_params_t *hw_params)
  379. {
  380. bt87x_t *chip = snd_pcm_substream_chip(substream);
  381. int err;
  382. err = snd_pcm_lib_malloc_pages(substream,
  383. params_buffer_bytes(hw_params));
  384. if (err < 0)
  385. return err;
  386. return snd_bt87x_create_risc(chip, substream,
  387. params_periods(hw_params),
  388. params_period_bytes(hw_params));
  389. }
  390. static int snd_bt87x_hw_free(snd_pcm_substream_t *substream)
  391. {
  392. bt87x_t *chip = snd_pcm_substream_chip(substream);
  393. snd_bt87x_free_risc(chip);
  394. snd_pcm_lib_free_pages(substream);
  395. return 0;
  396. }
  397. static int snd_bt87x_prepare(snd_pcm_substream_t *substream)
  398. {
  399. bt87x_t *chip = snd_pcm_substream_chip(substream);
  400. snd_pcm_runtime_t *runtime = substream->runtime;
  401. int decimation;
  402. spin_lock_irq(&chip->reg_lock);
  403. chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
  404. decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
  405. chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
  406. if (runtime->format == SNDRV_PCM_FORMAT_S8)
  407. chip->reg_control |= CTL_DA_SBR;
  408. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  409. spin_unlock_irq(&chip->reg_lock);
  410. return 0;
  411. }
  412. static int snd_bt87x_start(bt87x_t *chip)
  413. {
  414. spin_lock(&chip->reg_lock);
  415. chip->current_line = 0;
  416. chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
  417. snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
  418. snd_bt87x_writel(chip, REG_PACKET_LEN,
  419. chip->line_bytes | (chip->lines << 16));
  420. snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
  421. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  422. spin_unlock(&chip->reg_lock);
  423. return 0;
  424. }
  425. static int snd_bt87x_stop(bt87x_t *chip)
  426. {
  427. spin_lock(&chip->reg_lock);
  428. chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
  429. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  430. snd_bt87x_writel(chip, REG_INT_MASK, 0);
  431. snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
  432. spin_unlock(&chip->reg_lock);
  433. return 0;
  434. }
  435. static int snd_bt87x_trigger(snd_pcm_substream_t *substream, int cmd)
  436. {
  437. bt87x_t *chip = snd_pcm_substream_chip(substream);
  438. switch (cmd) {
  439. case SNDRV_PCM_TRIGGER_START:
  440. return snd_bt87x_start(chip);
  441. case SNDRV_PCM_TRIGGER_STOP:
  442. return snd_bt87x_stop(chip);
  443. default:
  444. return -EINVAL;
  445. }
  446. }
  447. static snd_pcm_uframes_t snd_bt87x_pointer(snd_pcm_substream_t *substream)
  448. {
  449. bt87x_t *chip = snd_pcm_substream_chip(substream);
  450. snd_pcm_runtime_t *runtime = substream->runtime;
  451. return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
  452. }
  453. static snd_pcm_ops_t snd_bt87x_pcm_ops = {
  454. .open = snd_bt87x_pcm_open,
  455. .close = snd_bt87x_close,
  456. .ioctl = snd_pcm_lib_ioctl,
  457. .hw_params = snd_bt87x_hw_params,
  458. .hw_free = snd_bt87x_hw_free,
  459. .prepare = snd_bt87x_prepare,
  460. .trigger = snd_bt87x_trigger,
  461. .pointer = snd_bt87x_pointer,
  462. .page = snd_pcm_sgbuf_ops_page,
  463. };
  464. static int snd_bt87x_capture_volume_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
  465. {
  466. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  467. info->count = 1;
  468. info->value.integer.min = 0;
  469. info->value.integer.max = 15;
  470. return 0;
  471. }
  472. static int snd_bt87x_capture_volume_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  473. {
  474. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  475. value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
  476. return 0;
  477. }
  478. static int snd_bt87x_capture_volume_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  479. {
  480. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  481. u32 old_control;
  482. int changed;
  483. spin_lock_irq(&chip->reg_lock);
  484. old_control = chip->reg_control;
  485. chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
  486. | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
  487. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  488. changed = old_control != chip->reg_control;
  489. spin_unlock_irq(&chip->reg_lock);
  490. return changed;
  491. }
  492. static snd_kcontrol_new_t snd_bt87x_capture_volume = {
  493. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  494. .name = "Capture Volume",
  495. .info = snd_bt87x_capture_volume_info,
  496. .get = snd_bt87x_capture_volume_get,
  497. .put = snd_bt87x_capture_volume_put,
  498. };
  499. static int snd_bt87x_capture_boost_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
  500. {
  501. info->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  502. info->count = 1;
  503. info->value.integer.min = 0;
  504. info->value.integer.max = 1;
  505. return 0;
  506. }
  507. static int snd_bt87x_capture_boost_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  508. {
  509. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  510. value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
  511. return 0;
  512. }
  513. static int snd_bt87x_capture_boost_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  514. {
  515. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  516. u32 old_control;
  517. int changed;
  518. spin_lock_irq(&chip->reg_lock);
  519. old_control = chip->reg_control;
  520. chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
  521. | (value->value.integer.value[0] ? CTL_A_G2X : 0);
  522. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  523. changed = chip->reg_control != old_control;
  524. spin_unlock_irq(&chip->reg_lock);
  525. return changed;
  526. }
  527. static snd_kcontrol_new_t snd_bt87x_capture_boost = {
  528. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  529. .name = "Capture Boost",
  530. .info = snd_bt87x_capture_boost_info,
  531. .get = snd_bt87x_capture_boost_get,
  532. .put = snd_bt87x_capture_boost_put,
  533. };
  534. static int snd_bt87x_capture_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *info)
  535. {
  536. static char *texts[3] = {"TV Tuner", "FM", "Mic/Line"};
  537. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  538. info->count = 1;
  539. info->value.enumerated.items = 3;
  540. if (info->value.enumerated.item > 2)
  541. info->value.enumerated.item = 2;
  542. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  543. return 0;
  544. }
  545. static int snd_bt87x_capture_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  546. {
  547. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  548. value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
  549. return 0;
  550. }
  551. static int snd_bt87x_capture_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *value)
  552. {
  553. bt87x_t *chip = snd_kcontrol_chip(kcontrol);
  554. u32 old_control;
  555. int changed;
  556. spin_lock_irq(&chip->reg_lock);
  557. old_control = chip->reg_control;
  558. chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
  559. | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
  560. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  561. changed = chip->reg_control != old_control;
  562. spin_unlock_irq(&chip->reg_lock);
  563. return changed;
  564. }
  565. static snd_kcontrol_new_t snd_bt87x_capture_source = {
  566. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  567. .name = "Capture Source",
  568. .info = snd_bt87x_capture_source_info,
  569. .get = snd_bt87x_capture_source_get,
  570. .put = snd_bt87x_capture_source_put,
  571. };
  572. static int snd_bt87x_free(bt87x_t *chip)
  573. {
  574. if (chip->mmio) {
  575. snd_bt87x_stop(chip);
  576. if (chip->irq >= 0)
  577. synchronize_irq(chip->irq);
  578. iounmap(chip->mmio);
  579. }
  580. if (chip->irq >= 0)
  581. free_irq(chip->irq, chip);
  582. pci_release_regions(chip->pci);
  583. pci_disable_device(chip->pci);
  584. kfree(chip);
  585. return 0;
  586. }
  587. static int snd_bt87x_dev_free(snd_device_t *device)
  588. {
  589. bt87x_t *chip = device->device_data;
  590. return snd_bt87x_free(chip);
  591. }
  592. static int __devinit snd_bt87x_pcm(bt87x_t *chip, int device, char *name)
  593. {
  594. int err;
  595. snd_pcm_t *pcm;
  596. err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
  597. if (err < 0)
  598. return err;
  599. pcm->private_data = chip;
  600. strcpy(pcm->name, name);
  601. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
  602. return snd_pcm_lib_preallocate_pages_for_all(pcm,
  603. SNDRV_DMA_TYPE_DEV_SG,
  604. snd_dma_pci_data(chip->pci),
  605. 128 * 1024,
  606. (255 * 4092 + 1023) & ~1023);
  607. }
  608. static int __devinit snd_bt87x_create(snd_card_t *card,
  609. struct pci_dev *pci,
  610. bt87x_t **rchip)
  611. {
  612. bt87x_t *chip;
  613. int err;
  614. static snd_device_ops_t ops = {
  615. .dev_free = snd_bt87x_dev_free
  616. };
  617. *rchip = NULL;
  618. err = pci_enable_device(pci);
  619. if (err < 0)
  620. return err;
  621. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  622. if (!chip) {
  623. pci_disable_device(pci);
  624. return -ENOMEM;
  625. }
  626. chip->card = card;
  627. chip->pci = pci;
  628. chip->irq = -1;
  629. spin_lock_init(&chip->reg_lock);
  630. if ((err = pci_request_regions(pci, "Bt87x audio")) < 0) {
  631. kfree(chip);
  632. pci_disable_device(pci);
  633. return err;
  634. }
  635. chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
  636. pci_resource_len(pci, 0));
  637. if (!chip->mmio) {
  638. snd_bt87x_free(chip);
  639. snd_printk(KERN_ERR "cannot remap io memory\n");
  640. return -ENOMEM;
  641. }
  642. chip->reg_control = CTL_DA_ES2 | CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
  643. chip->interrupt_mask = MY_INTERRUPTS;
  644. snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
  645. snd_bt87x_writel(chip, REG_INT_MASK, 0);
  646. snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
  647. if (request_irq(pci->irq, snd_bt87x_interrupt, SA_INTERRUPT | SA_SHIRQ,
  648. "Bt87x audio", chip)) {
  649. snd_bt87x_free(chip);
  650. snd_printk(KERN_ERR "cannot grab irq\n");
  651. return -EBUSY;
  652. }
  653. chip->irq = pci->irq;
  654. pci_set_master(pci);
  655. synchronize_irq(chip->irq);
  656. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  657. if (err < 0) {
  658. snd_bt87x_free(chip);
  659. return err;
  660. }
  661. snd_card_set_dev(card, &pci->dev);
  662. *rchip = chip;
  663. return 0;
  664. }
  665. #define BT_DEVICE(chip, subvend, subdev, rate) \
  666. { .vendor = PCI_VENDOR_ID_BROOKTREE, \
  667. .device = PCI_DEVICE_ID_BROOKTREE_##chip, \
  668. .subvendor = subvend, .subdevice = subdev, \
  669. .driver_data = rate }
  670. /* driver_data is the default digital_rate value for that device */
  671. static struct pci_device_id snd_bt87x_ids[] = {
  672. BT_DEVICE(878, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */
  673. BT_DEVICE(879, 0x0070, 0x13eb, 32000), /* Hauppauge WinTV series */
  674. BT_DEVICE(878, 0x0070, 0xff01, 44100), /* Viewcast Osprey 200 */
  675. { }
  676. };
  677. MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
  678. /* cards known not to have audio
  679. * (DVB cards use the audio function to transfer MPEG data) */
  680. static struct {
  681. unsigned short subvendor, subdevice;
  682. } blacklist[] __devinitdata = {
  683. {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
  684. {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
  685. {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
  686. {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
  687. {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
  688. {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
  689. {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
  690. };
  691. static struct pci_driver driver;
  692. /* return the rate of the card, or a negative value if it's blacklisted */
  693. static int __devinit snd_bt87x_detect_card(struct pci_dev *pci)
  694. {
  695. int i;
  696. const struct pci_device_id *supported;
  697. supported = pci_match_device(&driver, pci);
  698. if (supported)
  699. return supported->driver_data;
  700. for (i = 0; i < ARRAY_SIZE(blacklist); ++i)
  701. if (blacklist[i].subvendor == pci->subsystem_vendor &&
  702. blacklist[i].subdevice == pci->subsystem_device) {
  703. snd_printdd(KERN_INFO "card %#04x:%#04x has no audio\n",
  704. pci->subsystem_vendor, pci->subsystem_device);
  705. return -EBUSY;
  706. }
  707. snd_printk(KERN_INFO "unknown card %#04x:%#04x, using default rate 32000\n",
  708. pci->subsystem_vendor, pci->subsystem_device);
  709. snd_printk(KERN_DEBUG "please mail id, board name, and, "
  710. "if it works, the correct digital_rate option to "
  711. "<alsa-devel@lists.sf.net>\n");
  712. return 32000; /* default rate */
  713. }
  714. static int __devinit snd_bt87x_probe(struct pci_dev *pci,
  715. const struct pci_device_id *pci_id)
  716. {
  717. static int dev;
  718. snd_card_t *card;
  719. bt87x_t *chip;
  720. int err, rate;
  721. rate = pci_id->driver_data;
  722. if (! rate)
  723. if ((rate = snd_bt87x_detect_card(pci)) <= 0)
  724. return -ENODEV;
  725. if (dev >= SNDRV_CARDS)
  726. return -ENODEV;
  727. if (!enable[dev]) {
  728. ++dev;
  729. return -ENOENT;
  730. }
  731. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  732. if (!card)
  733. return -ENOMEM;
  734. err = snd_bt87x_create(card, pci, &chip);
  735. if (err < 0)
  736. goto _error;
  737. if (digital_rate[dev] > 0)
  738. chip->dig_rate = digital_rate[dev];
  739. else
  740. chip->dig_rate = rate;
  741. err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
  742. if (err < 0)
  743. goto _error;
  744. err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
  745. if (err < 0)
  746. goto _error;
  747. err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_volume, chip));
  748. if (err < 0)
  749. goto _error;
  750. err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_boost, chip));
  751. if (err < 0)
  752. goto _error;
  753. err = snd_ctl_add(card, snd_ctl_new1(&snd_bt87x_capture_source, chip));
  754. if (err < 0)
  755. goto _error;
  756. strcpy(card->driver, "Bt87x");
  757. sprintf(card->shortname, "Brooktree Bt%x", pci->device);
  758. sprintf(card->longname, "%s at %#lx, irq %i",
  759. card->shortname, pci_resource_start(pci, 0), chip->irq);
  760. strcpy(card->mixername, "Bt87x");
  761. err = snd_card_register(card);
  762. if (err < 0)
  763. goto _error;
  764. pci_set_drvdata(pci, card);
  765. ++dev;
  766. return 0;
  767. _error:
  768. snd_card_free(card);
  769. return err;
  770. }
  771. static void __devexit snd_bt87x_remove(struct pci_dev *pci)
  772. {
  773. snd_card_free(pci_get_drvdata(pci));
  774. pci_set_drvdata(pci, NULL);
  775. }
  776. /* default entries for all Bt87x cards - it's not exported */
  777. /* driver_data is set to 0 to call detection */
  778. static struct pci_device_id snd_bt87x_default_ids[] = {
  779. BT_DEVICE(878, PCI_ANY_ID, PCI_ANY_ID, 0),
  780. BT_DEVICE(879, PCI_ANY_ID, PCI_ANY_ID, 0),
  781. { }
  782. };
  783. static struct pci_driver driver = {
  784. .name = "Bt87x",
  785. .owner = THIS_MODULE,
  786. .id_table = snd_bt87x_ids,
  787. .probe = snd_bt87x_probe,
  788. .remove = __devexit_p(snd_bt87x_remove),
  789. };
  790. static int __init alsa_card_bt87x_init(void)
  791. {
  792. if (load_all)
  793. driver.id_table = snd_bt87x_default_ids;
  794. return pci_register_driver(&driver);
  795. }
  796. static void __exit alsa_card_bt87x_exit(void)
  797. {
  798. pci_unregister_driver(&driver);
  799. }
  800. module_init(alsa_card_bt87x_init)
  801. module_exit(alsa_card_bt87x_exit)