am79c961a.c 17 KB

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  1. /*
  2. * linux/drivers/net/am79c961.c
  3. *
  4. * by Russell King <rmk@arm.linux.org.uk> 1995-2001.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Derived from various things including skeleton.c
  11. *
  12. * This is a special driver for the am79c961A Lance chip used in the
  13. * Intel (formally Digital Equipment Corp) EBSA110 platform. Please
  14. * note that this can not be built as a module (it doesn't make sense).
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/ioport.h>
  20. #include <linux/slab.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/init.h>
  27. #include <linux/crc32.h>
  28. #include <linux/bitops.h>
  29. #include <asm/system.h>
  30. #include <asm/irq.h>
  31. #include <asm/io.h>
  32. #define TX_BUFFERS 15
  33. #define RX_BUFFERS 25
  34. #include "am79c961a.h"
  35. static irqreturn_t
  36. am79c961_interrupt (int irq, void *dev_id, struct pt_regs *regs);
  37. static unsigned int net_debug = NET_DEBUG;
  38. static const char version[] =
  39. "am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";
  40. /* --------------------------------------------------------------------------- */
  41. #ifdef __arm__
  42. static void write_rreg(u_long base, u_int reg, u_int val)
  43. {
  44. __asm__(
  45. "str%?h %1, [%2] @ NET_RAP\n\t"
  46. "str%?h %0, [%2, #-4] @ NET_RDP"
  47. :
  48. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  49. }
  50. static inline unsigned short read_rreg(u_long base_addr, u_int reg)
  51. {
  52. unsigned short v;
  53. __asm__(
  54. "str%?h %1, [%2] @ NET_RAP\n\t"
  55. "ldr%?h %0, [%2, #-4] @ NET_RDP"
  56. : "=r" (v)
  57. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  58. return v;
  59. }
  60. static inline void write_ireg(u_long base, u_int reg, u_int val)
  61. {
  62. __asm__(
  63. "str%?h %1, [%2] @ NET_RAP\n\t"
  64. "str%?h %0, [%2, #8] @ NET_IDP"
  65. :
  66. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  67. }
  68. static inline unsigned short read_ireg(u_long base_addr, u_int reg)
  69. {
  70. u_short v;
  71. __asm__(
  72. "str%?h %1, [%2] @ NAT_RAP\n\t"
  73. "ldr%?h %0, [%2, #8] @ NET_IDP\n\t"
  74. : "=r" (v)
  75. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  76. return v;
  77. }
  78. #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1))
  79. #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
  80. static inline void
  81. am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  82. {
  83. offset = ISAMEM_BASE + (offset << 1);
  84. length = (length + 1) & ~1;
  85. if ((int)buf & 2) {
  86. __asm__ __volatile__("str%?h %2, [%0], #4"
  87. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  88. buf += 2;
  89. length -= 2;
  90. }
  91. while (length > 8) {
  92. unsigned int tmp, tmp2;
  93. __asm__ __volatile__(
  94. "ldm%?ia %1!, {%2, %3}\n\t"
  95. "str%?h %2, [%0], #4\n\t"
  96. "mov%? %2, %2, lsr #16\n\t"
  97. "str%?h %2, [%0], #4\n\t"
  98. "str%?h %3, [%0], #4\n\t"
  99. "mov%? %3, %3, lsr #16\n\t"
  100. "str%?h %3, [%0], #4"
  101. : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2)
  102. : "0" (offset), "1" (buf));
  103. length -= 8;
  104. }
  105. while (length > 0) {
  106. __asm__ __volatile__("str%?h %2, [%0], #4"
  107. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  108. buf += 2;
  109. length -= 2;
  110. }
  111. }
  112. static inline void
  113. am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  114. {
  115. offset = ISAMEM_BASE + (offset << 1);
  116. length = (length + 1) & ~1;
  117. if ((int)buf & 2) {
  118. unsigned int tmp;
  119. __asm__ __volatile__(
  120. "ldr%?h %2, [%0], #4\n\t"
  121. "str%?b %2, [%1], #1\n\t"
  122. "mov%? %2, %2, lsr #8\n\t"
  123. "str%?b %2, [%1], #1"
  124. : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
  125. length -= 2;
  126. }
  127. while (length > 8) {
  128. unsigned int tmp, tmp2, tmp3;
  129. __asm__ __volatile__(
  130. "ldr%?h %2, [%0], #4\n\t"
  131. "ldr%?h %3, [%0], #4\n\t"
  132. "orr%? %2, %2, %3, lsl #16\n\t"
  133. "ldr%?h %3, [%0], #4\n\t"
  134. "ldr%?h %4, [%0], #4\n\t"
  135. "orr%? %3, %3, %4, lsl #16\n\t"
  136. "stm%?ia %1!, {%2, %3}"
  137. : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
  138. : "0" (offset), "1" (buf));
  139. length -= 8;
  140. }
  141. while (length > 0) {
  142. unsigned int tmp;
  143. __asm__ __volatile__(
  144. "ldr%?h %2, [%0], #4\n\t"
  145. "str%?b %2, [%1], #1\n\t"
  146. "mov%? %2, %2, lsr #8\n\t"
  147. "str%?b %2, [%1], #1"
  148. : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
  149. length -= 2;
  150. }
  151. }
  152. #else
  153. #error Not compatible
  154. #endif
  155. static int
  156. am79c961_ramtest(struct net_device *dev, unsigned int val)
  157. {
  158. unsigned char *buffer = kmalloc (65536, GFP_KERNEL);
  159. int i, error = 0, errorcount = 0;
  160. if (!buffer)
  161. return 0;
  162. memset (buffer, val, 65536);
  163. am_writebuffer(dev, 0, buffer, 65536);
  164. memset (buffer, val ^ 255, 65536);
  165. am_readbuffer(dev, 0, buffer, 65536);
  166. for (i = 0; i < 65536; i++) {
  167. if (buffer[i] != val && !error) {
  168. printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i);
  169. error = 1;
  170. errorcount ++;
  171. } else if (error && buffer[i] == val) {
  172. printk ("%05X\n", i);
  173. error = 0;
  174. }
  175. }
  176. if (error)
  177. printk ("10000\n");
  178. kfree (buffer);
  179. return errorcount;
  180. }
  181. static void
  182. am79c961_init_for_open(struct net_device *dev)
  183. {
  184. struct dev_priv *priv = netdev_priv(dev);
  185. unsigned long flags;
  186. unsigned char *p;
  187. u_int hdr_addr, first_free_addr;
  188. int i;
  189. /*
  190. * Stop the chip.
  191. */
  192. spin_lock_irqsave(priv->chip_lock, flags);
  193. write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
  194. spin_unlock_irqrestore(priv->chip_lock, flags);
  195. write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
  196. write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
  197. write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */
  198. write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */
  199. for (i = LADRL; i <= LADRH; i++)
  200. write_rreg (dev->base_addr, i, 0);
  201. for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2)
  202. write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
  203. i = MODE_PORT_10BT;
  204. if (dev->flags & IFF_PROMISC)
  205. i |= MODE_PROMISC;
  206. write_rreg (dev->base_addr, MODE, i);
  207. write_rreg (dev->base_addr, POLLINT, 0);
  208. write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
  209. write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
  210. first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;
  211. hdr_addr = 0;
  212. priv->rxhead = 0;
  213. priv->rxtail = 0;
  214. priv->rxhdr = hdr_addr;
  215. for (i = 0; i < RX_BUFFERS; i++) {
  216. priv->rxbuffer[i] = first_free_addr;
  217. am_writeword (dev, hdr_addr, first_free_addr);
  218. am_writeword (dev, hdr_addr + 2, RMD_OWN);
  219. am_writeword (dev, hdr_addr + 4, (-1600));
  220. am_writeword (dev, hdr_addr + 6, 0);
  221. first_free_addr += 1600;
  222. hdr_addr += 8;
  223. }
  224. priv->txhead = 0;
  225. priv->txtail = 0;
  226. priv->txhdr = hdr_addr;
  227. for (i = 0; i < TX_BUFFERS; i++) {
  228. priv->txbuffer[i] = first_free_addr;
  229. am_writeword (dev, hdr_addr, first_free_addr);
  230. am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);
  231. am_writeword (dev, hdr_addr + 4, 0xf000);
  232. am_writeword (dev, hdr_addr + 6, 0);
  233. first_free_addr += 1600;
  234. hdr_addr += 8;
  235. }
  236. write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
  237. write_rreg (dev->base_addr, BASERXH, 0);
  238. write_rreg (dev->base_addr, BASETXL, priv->txhdr);
  239. write_rreg (dev->base_addr, BASERXH, 0);
  240. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  241. write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
  242. write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
  243. write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
  244. }
  245. static void am79c961_timer(unsigned long data)
  246. {
  247. struct net_device *dev = (struct net_device *)data;
  248. struct dev_priv *priv = netdev_priv(dev);
  249. unsigned int lnkstat, carrier;
  250. lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST;
  251. carrier = netif_carrier_ok(dev);
  252. if (lnkstat && !carrier)
  253. netif_carrier_on(dev);
  254. else if (!lnkstat && carrier)
  255. netif_carrier_off(dev);
  256. mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500));
  257. }
  258. /*
  259. * Open/initialize the board.
  260. */
  261. static int
  262. am79c961_open(struct net_device *dev)
  263. {
  264. struct dev_priv *priv = netdev_priv(dev);
  265. int ret;
  266. memset (&priv->stats, 0, sizeof (priv->stats));
  267. ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev);
  268. if (ret)
  269. return ret;
  270. am79c961_init_for_open(dev);
  271. netif_carrier_off(dev);
  272. priv->timer.expires = jiffies;
  273. add_timer(&priv->timer);
  274. netif_start_queue(dev);
  275. return 0;
  276. }
  277. /*
  278. * The inverse routine to am79c961_open().
  279. */
  280. static int
  281. am79c961_close(struct net_device *dev)
  282. {
  283. struct dev_priv *priv = netdev_priv(dev);
  284. unsigned long flags;
  285. del_timer_sync(&priv->timer);
  286. netif_stop_queue(dev);
  287. netif_carrier_off(dev);
  288. spin_lock_irqsave(priv->chip_lock, flags);
  289. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  290. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  291. spin_unlock_irqrestore(priv->chip_lock, flags);
  292. free_irq (dev->irq, dev);
  293. return 0;
  294. }
  295. /*
  296. * Get the current statistics.
  297. */
  298. static struct net_device_stats *am79c961_getstats (struct net_device *dev)
  299. {
  300. struct dev_priv *priv = netdev_priv(dev);
  301. return &priv->stats;
  302. }
  303. static void am79c961_mc_hash(struct dev_mc_list *dmi, unsigned short *hash)
  304. {
  305. if (dmi->dmi_addrlen == ETH_ALEN && dmi->dmi_addr[0] & 0x01) {
  306. int idx, bit;
  307. u32 crc;
  308. crc = ether_crc_le(ETH_ALEN, dmi->dmi_addr);
  309. idx = crc >> 30;
  310. bit = (crc >> 26) & 15;
  311. hash[idx] |= 1 << bit;
  312. }
  313. }
  314. /*
  315. * Set or clear promiscuous/multicast mode filter for this adapter.
  316. */
  317. static void am79c961_setmulticastlist (struct net_device *dev)
  318. {
  319. struct dev_priv *priv = netdev_priv(dev);
  320. unsigned long flags;
  321. unsigned short multi_hash[4], mode;
  322. int i, stopped;
  323. mode = MODE_PORT_10BT;
  324. if (dev->flags & IFF_PROMISC) {
  325. mode |= MODE_PROMISC;
  326. } else if (dev->flags & IFF_ALLMULTI) {
  327. memset(multi_hash, 0xff, sizeof(multi_hash));
  328. } else {
  329. struct dev_mc_list *dmi;
  330. memset(multi_hash, 0x00, sizeof(multi_hash));
  331. for (dmi = dev->mc_list; dmi; dmi = dmi->next)
  332. am79c961_mc_hash(dmi, multi_hash);
  333. }
  334. spin_lock_irqsave(priv->chip_lock, flags);
  335. stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
  336. if (!stopped) {
  337. /*
  338. * Put the chip into suspend mode
  339. */
  340. write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
  341. /*
  342. * Spin waiting for chip to report suspend mode
  343. */
  344. while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
  345. spin_unlock_irqrestore(priv->chip_lock, flags);
  346. nop();
  347. spin_lock_irqsave(priv->chip_lock, flags);
  348. }
  349. }
  350. /*
  351. * Update the multicast hash table
  352. */
  353. for (i = 0; i < sizeof(multi_hash) / sizeof(multi_hash[0]); i++)
  354. write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
  355. /*
  356. * Write the mode register
  357. */
  358. write_rreg(dev->base_addr, MODE, mode);
  359. if (!stopped) {
  360. /*
  361. * Put the chip back into running mode
  362. */
  363. write_rreg(dev->base_addr, CTRL1, 0);
  364. }
  365. spin_unlock_irqrestore(priv->chip_lock, flags);
  366. }
  367. static void am79c961_timeout(struct net_device *dev)
  368. {
  369. printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",
  370. dev->name);
  371. /*
  372. * ought to do some setup of the tx side here
  373. */
  374. netif_wake_queue(dev);
  375. }
  376. /*
  377. * Transmit a packet
  378. */
  379. static int
  380. am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
  381. {
  382. struct dev_priv *priv = netdev_priv(dev);
  383. unsigned int hdraddr, bufaddr;
  384. unsigned int head;
  385. unsigned long flags;
  386. head = priv->txhead;
  387. hdraddr = priv->txhdr + (head << 3);
  388. bufaddr = priv->txbuffer[head];
  389. head += 1;
  390. if (head >= TX_BUFFERS)
  391. head = 0;
  392. am_writebuffer (dev, bufaddr, skb->data, skb->len);
  393. am_writeword (dev, hdraddr + 4, -skb->len);
  394. am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
  395. priv->txhead = head;
  396. spin_lock_irqsave(priv->chip_lock, flags);
  397. write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
  398. dev->trans_start = jiffies;
  399. spin_unlock_irqrestore(priv->chip_lock, flags);
  400. /*
  401. * If the next packet is owned by the ethernet device,
  402. * then the tx ring is full and we can't add another
  403. * packet.
  404. */
  405. if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN)
  406. netif_stop_queue(dev);
  407. dev_kfree_skb(skb);
  408. return 0;
  409. }
  410. /*
  411. * If we have a good packet(s), get it/them out of the buffers.
  412. */
  413. static void
  414. am79c961_rx(struct net_device *dev, struct dev_priv *priv)
  415. {
  416. do {
  417. struct sk_buff *skb;
  418. u_int hdraddr;
  419. u_int pktaddr;
  420. u_int status;
  421. int len;
  422. hdraddr = priv->rxhdr + (priv->rxtail << 3);
  423. pktaddr = priv->rxbuffer[priv->rxtail];
  424. status = am_readword (dev, hdraddr + 2);
  425. if (status & RMD_OWN) /* do we own it? */
  426. break;
  427. priv->rxtail ++;
  428. if (priv->rxtail >= RX_BUFFERS)
  429. priv->rxtail = 0;
  430. if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {
  431. am_writeword (dev, hdraddr + 2, RMD_OWN);
  432. priv->stats.rx_errors ++;
  433. if (status & RMD_ERR) {
  434. if (status & RMD_FRAM)
  435. priv->stats.rx_frame_errors ++;
  436. if (status & RMD_CRC)
  437. priv->stats.rx_crc_errors ++;
  438. } else if (status & RMD_STP)
  439. priv->stats.rx_length_errors ++;
  440. continue;
  441. }
  442. len = am_readword(dev, hdraddr + 6);
  443. skb = dev_alloc_skb(len + 2);
  444. if (skb) {
  445. skb->dev = dev;
  446. skb_reserve(skb, 2);
  447. am_readbuffer(dev, pktaddr, skb_put(skb, len), len);
  448. am_writeword(dev, hdraddr + 2, RMD_OWN);
  449. skb->protocol = eth_type_trans(skb, dev);
  450. netif_rx(skb);
  451. dev->last_rx = jiffies;
  452. priv->stats.rx_bytes += len;
  453. priv->stats.rx_packets ++;
  454. } else {
  455. am_writeword (dev, hdraddr + 2, RMD_OWN);
  456. printk (KERN_WARNING "%s: memory squeeze, dropping packet.\n", dev->name);
  457. priv->stats.rx_dropped ++;
  458. break;
  459. }
  460. } while (1);
  461. }
  462. /*
  463. * Update stats for the transmitted packet
  464. */
  465. static void
  466. am79c961_tx(struct net_device *dev, struct dev_priv *priv)
  467. {
  468. do {
  469. short len;
  470. u_int hdraddr;
  471. u_int status;
  472. hdraddr = priv->txhdr + (priv->txtail << 3);
  473. status = am_readword (dev, hdraddr + 2);
  474. if (status & TMD_OWN)
  475. break;
  476. priv->txtail ++;
  477. if (priv->txtail >= TX_BUFFERS)
  478. priv->txtail = 0;
  479. if (status & TMD_ERR) {
  480. u_int status2;
  481. priv->stats.tx_errors ++;
  482. status2 = am_readword (dev, hdraddr + 6);
  483. /*
  484. * Clear the error byte
  485. */
  486. am_writeword (dev, hdraddr + 6, 0);
  487. if (status2 & TST_RTRY)
  488. priv->stats.collisions += 16;
  489. if (status2 & TST_LCOL)
  490. priv->stats.tx_window_errors ++;
  491. if (status2 & TST_LCAR)
  492. priv->stats.tx_carrier_errors ++;
  493. if (status2 & TST_UFLO)
  494. priv->stats.tx_fifo_errors ++;
  495. continue;
  496. }
  497. priv->stats.tx_packets ++;
  498. len = am_readword (dev, hdraddr + 4);
  499. priv->stats.tx_bytes += -len;
  500. } while (priv->txtail != priv->txhead);
  501. netif_wake_queue(dev);
  502. }
  503. static irqreturn_t
  504. am79c961_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  505. {
  506. struct net_device *dev = (struct net_device *)dev_id;
  507. struct dev_priv *priv = netdev_priv(dev);
  508. u_int status, n = 100;
  509. int handled = 0;
  510. do {
  511. status = read_rreg(dev->base_addr, CSR0);
  512. write_rreg(dev->base_addr, CSR0, status &
  513. (CSR0_IENA|CSR0_TINT|CSR0_RINT|
  514. CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));
  515. if (status & CSR0_RINT) {
  516. handled = 1;
  517. am79c961_rx(dev, priv);
  518. }
  519. if (status & CSR0_TINT) {
  520. handled = 1;
  521. am79c961_tx(dev, priv);
  522. }
  523. if (status & CSR0_MISS) {
  524. handled = 1;
  525. priv->stats.rx_dropped ++;
  526. }
  527. if (status & CSR0_CERR) {
  528. handled = 1;
  529. mod_timer(&priv->timer, jiffies);
  530. }
  531. } while (--n && status & (CSR0_RINT | CSR0_TINT));
  532. return IRQ_RETVAL(handled);
  533. }
  534. #ifdef CONFIG_NET_POLL_CONTROLLER
  535. static void am79c961_poll_controller(struct net_device *dev)
  536. {
  537. unsigned long flags;
  538. local_irq_save(flags);
  539. am79c961_interrupt(dev->irq, dev, NULL);
  540. local_irq_restore(flags);
  541. }
  542. #endif
  543. /*
  544. * Initialise the chip. Note that we always expect
  545. * to be entered with interrupts enabled.
  546. */
  547. static int
  548. am79c961_hw_init(struct net_device *dev)
  549. {
  550. struct dev_priv *priv = netdev_priv(dev);
  551. spin_lock_irq(&priv->chip_lock);
  552. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  553. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  554. spin_unlock_irq(&priv->chip_lock);
  555. am79c961_ramtest(dev, 0x66);
  556. am79c961_ramtest(dev, 0x99);
  557. return 0;
  558. }
  559. static void __init am79c961_banner(void)
  560. {
  561. static unsigned version_printed;
  562. if (net_debug && version_printed++ == 0)
  563. printk(KERN_INFO "%s", version);
  564. }
  565. static int __init am79c961_init(void)
  566. {
  567. struct net_device *dev;
  568. struct dev_priv *priv;
  569. int i, ret;
  570. dev = alloc_etherdev(sizeof(struct dev_priv));
  571. ret = -ENOMEM;
  572. if (!dev)
  573. goto out;
  574. priv = netdev_priv(dev);
  575. /*
  576. * Fixed address and IRQ lines here.
  577. * The PNP initialisation should have been
  578. * done by the ether bootp loader.
  579. */
  580. dev->base_addr = 0x220;
  581. dev->irq = IRQ_EBSA110_ETHERNET;
  582. ret = -ENODEV;
  583. if (!request_region(dev->base_addr, 0x18, dev->name))
  584. goto nodev;
  585. /*
  586. * Reset the device.
  587. */
  588. inb(dev->base_addr + NET_RESET);
  589. udelay(5);
  590. /*
  591. * Check the manufacturer part of the
  592. * ether address.
  593. */
  594. if (inb(dev->base_addr) != 0x08 ||
  595. inb(dev->base_addr + 2) != 0x00 ||
  596. inb(dev->base_addr + 4) != 0x2b)
  597. goto release;
  598. am79c961_banner();
  599. for (i = 0; i < 6; i++)
  600. dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff;
  601. spin_lock_init(&priv->chip_lock);
  602. init_timer(&priv->timer);
  603. priv->timer.data = (unsigned long)dev;
  604. priv->timer.function = am79c961_timer;
  605. if (am79c961_hw_init(dev))
  606. goto release;
  607. dev->open = am79c961_open;
  608. dev->stop = am79c961_close;
  609. dev->hard_start_xmit = am79c961_sendpacket;
  610. dev->get_stats = am79c961_getstats;
  611. dev->set_multicast_list = am79c961_setmulticastlist;
  612. dev->tx_timeout = am79c961_timeout;
  613. #ifdef CONFIG_NET_POLL_CONTROLLER
  614. dev->poll_controller = am79c961_poll_controller;
  615. #endif
  616. ret = register_netdev(dev);
  617. if (ret == 0) {
  618. printk(KERN_INFO "%s: ether address ", dev->name);
  619. for (i = 0; i < 6; i++)
  620. printk (i == 5 ? "%02x\n" : "%02x:", dev->dev_addr[i]);
  621. return 0;
  622. }
  623. release:
  624. release_region(dev->base_addr, 0x18);
  625. nodev:
  626. free_netdev(dev);
  627. out:
  628. return ret;
  629. }
  630. __initcall(am79c961_init);