mptbase.c 178 KB

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  1. /*
  2. * linux/drivers/message/fusion/mptbase.c
  3. * This is the Fusion MPT base driver which supports multiple
  4. * (SCSI + LAN) specialized protocol drivers.
  5. * For use with LSI Logic PCI chip/adapter(s)
  6. * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
  7. *
  8. * Copyright (c) 1999-2005 LSI Logic Corporation
  9. * (mailto:mpt_linux_developer@lsil.com)
  10. *
  11. */
  12. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  13. /*
  14. This program is free software; you can redistribute it and/or modify
  15. it under the terms of the GNU General Public License as published by
  16. the Free Software Foundation; version 2 of the License.
  17. This program is distributed in the hope that it will be useful,
  18. but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. GNU General Public License for more details.
  21. NO WARRANTY
  22. THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  23. CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  24. LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  25. MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  26. solely responsible for determining the appropriateness of using and
  27. distributing the Program and assumes all risks associated with its
  28. exercise of rights under this Agreement, including but not limited to
  29. the risks and costs of program errors, damage to or loss of data,
  30. programs or equipment, and unavailability or interruption of operations.
  31. DISCLAIMER OF LIABILITY
  32. NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33. DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34. DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35. ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36. TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37. USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38. HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39. You should have received a copy of the GNU General Public License
  40. along with this program; if not, write to the Free Software
  41. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  42. */
  43. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  44. #include <linux/config.h>
  45. #include <linux/version.h>
  46. #include <linux/kernel.h>
  47. #include <linux/module.h>
  48. #include <linux/errno.h>
  49. #include <linux/init.h>
  50. #include <linux/slab.h>
  51. #include <linux/types.h>
  52. #include <linux/pci.h>
  53. #include <linux/kdev_t.h>
  54. #include <linux/blkdev.h>
  55. #include <linux/delay.h>
  56. #include <linux/interrupt.h> /* needed for in_interrupt() proto */
  57. #include <linux/dma-mapping.h>
  58. #include <asm/io.h>
  59. #ifdef CONFIG_MTRR
  60. #include <asm/mtrr.h>
  61. #endif
  62. #ifdef __sparc__
  63. #include <asm/irq.h> /* needed for __irq_itoa() proto */
  64. #endif
  65. #include "mptbase.h"
  66. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  67. #define my_NAME "Fusion MPT base driver"
  68. #define my_VERSION MPT_LINUX_VERSION_COMMON
  69. #define MYNAM "mptbase"
  70. MODULE_AUTHOR(MODULEAUTHOR);
  71. MODULE_DESCRIPTION(my_NAME);
  72. MODULE_LICENSE("GPL");
  73. /*
  74. * cmd line parameters
  75. */
  76. #ifdef MFCNT
  77. static int mfcounter = 0;
  78. #define PRINT_MF_COUNT 20000
  79. #endif
  80. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  81. /*
  82. * Public data...
  83. */
  84. int mpt_lan_index = -1;
  85. int mpt_stm_index = -1;
  86. struct proc_dir_entry *mpt_proc_root_dir;
  87. #define WHOINIT_UNKNOWN 0xAA
  88. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  89. /*
  90. * Private data...
  91. */
  92. /* Adapter link list */
  93. LIST_HEAD(ioc_list);
  94. /* Callback lookup table */
  95. static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
  96. /* Protocol driver class lookup table */
  97. static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
  98. /* Event handler lookup table */
  99. static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  100. /* Reset handler lookup table */
  101. static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  102. static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
  103. static int mpt_base_index = -1;
  104. static int last_drv_idx = -1;
  105. static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
  106. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  107. /*
  108. * Forward protos...
  109. */
  110. static irqreturn_t mpt_interrupt(int irq, void *bus_id, struct pt_regs *r);
  111. static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
  112. static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
  113. u32 *req, int replyBytes, u16 *u16reply, int maxwait,
  114. int sleepFlag);
  115. static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
  116. static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
  117. static void mpt_adapter_disable(MPT_ADAPTER *ioc);
  118. static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
  119. static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
  120. static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
  121. static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
  122. static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  123. static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
  124. static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
  125. static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
  126. static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
  127. static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  128. static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
  129. static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
  130. static int PrimeIocFifos(MPT_ADAPTER *ioc);
  131. static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  132. static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  133. static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
  134. static int GetLanConfigPages(MPT_ADAPTER *ioc);
  135. static int GetFcPortPage0(MPT_ADAPTER *ioc, int portnum);
  136. static int GetIoUnitPage2(MPT_ADAPTER *ioc);
  137. int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
  138. static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
  139. static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
  140. static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
  141. static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
  142. static void mpt_timer_expired(unsigned long data);
  143. static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
  144. static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
  145. static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
  146. static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
  147. #ifdef CONFIG_PROC_FS
  148. static int procmpt_summary_read(char *buf, char **start, off_t offset,
  149. int request, int *eof, void *data);
  150. static int procmpt_version_read(char *buf, char **start, off_t offset,
  151. int request, int *eof, void *data);
  152. static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
  153. int request, int *eof, void *data);
  154. #endif
  155. static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
  156. //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
  157. static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
  158. static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
  159. static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
  160. static void mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info);
  161. static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
  162. /* module entry point */
  163. static int __init fusion_init (void);
  164. static void __exit fusion_exit (void);
  165. #define CHIPREG_READ32(addr) readl_relaxed(addr)
  166. #define CHIPREG_READ32_dmasync(addr) readl(addr)
  167. #define CHIPREG_WRITE32(addr,val) writel(val, addr)
  168. #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
  169. #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
  170. static void
  171. pci_disable_io_access(struct pci_dev *pdev)
  172. {
  173. u16 command_reg;
  174. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  175. command_reg &= ~1;
  176. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  177. }
  178. static void
  179. pci_enable_io_access(struct pci_dev *pdev)
  180. {
  181. u16 command_reg;
  182. pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
  183. command_reg |= 1;
  184. pci_write_config_word(pdev, PCI_COMMAND, command_reg);
  185. }
  186. /*
  187. * Process turbo (context) reply...
  188. */
  189. static void
  190. mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
  191. {
  192. MPT_FRAME_HDR *mf = NULL;
  193. MPT_FRAME_HDR *mr = NULL;
  194. int req_idx = 0;
  195. int cb_idx;
  196. dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
  197. ioc->name, pa));
  198. switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
  199. case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
  200. req_idx = pa & 0x0000FFFF;
  201. cb_idx = (pa & 0x00FF0000) >> 16;
  202. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  203. break;
  204. case MPI_CONTEXT_REPLY_TYPE_LAN:
  205. cb_idx = mpt_lan_index;
  206. /*
  207. * Blind set of mf to NULL here was fatal
  208. * after lan_reply says "freeme"
  209. * Fix sort of combined with an optimization here;
  210. * added explicit check for case where lan_reply
  211. * was just returning 1 and doing nothing else.
  212. * For this case skip the callback, but set up
  213. * proper mf value first here:-)
  214. */
  215. if ((pa & 0x58000000) == 0x58000000) {
  216. req_idx = pa & 0x0000FFFF;
  217. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  218. mpt_free_msg_frame(ioc, mf);
  219. mb();
  220. return;
  221. break;
  222. }
  223. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  224. break;
  225. case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
  226. cb_idx = mpt_stm_index;
  227. mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
  228. break;
  229. default:
  230. cb_idx = 0;
  231. BUG();
  232. }
  233. /* Check for (valid) IO callback! */
  234. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  235. MptCallbacks[cb_idx] == NULL) {
  236. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  237. __FUNCTION__, ioc->name, cb_idx);
  238. goto out;
  239. }
  240. if (MptCallbacks[cb_idx](ioc, mf, mr))
  241. mpt_free_msg_frame(ioc, mf);
  242. out:
  243. mb();
  244. }
  245. static void
  246. mpt_reply(MPT_ADAPTER *ioc, u32 pa)
  247. {
  248. MPT_FRAME_HDR *mf;
  249. MPT_FRAME_HDR *mr;
  250. int req_idx;
  251. int cb_idx;
  252. int freeme;
  253. u32 reply_dma_low;
  254. u16 ioc_stat;
  255. /* non-TURBO reply! Hmmm, something may be up...
  256. * Newest turbo reply mechanism; get address
  257. * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
  258. */
  259. /* Map DMA address of reply header to cpu address.
  260. * pa is 32 bits - but the dma address may be 32 or 64 bits
  261. * get offset based only only the low addresses
  262. */
  263. reply_dma_low = (pa <<= 1);
  264. mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
  265. (reply_dma_low - ioc->reply_frames_low_dma));
  266. req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
  267. cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
  268. mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
  269. dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
  270. ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
  271. DBG_DUMP_REPLY_FRAME(mr)
  272. /* Check/log IOC log info
  273. */
  274. ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
  275. if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
  276. u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
  277. if (ioc->bus_type == FC)
  278. mpt_fc_log_info(ioc, log_info);
  279. else if (ioc->bus_type == SCSI)
  280. mpt_sp_log_info(ioc, log_info);
  281. else if (ioc->bus_type == SAS)
  282. mpt_sas_log_info(ioc, log_info);
  283. }
  284. if (ioc_stat & MPI_IOCSTATUS_MASK) {
  285. if (ioc->bus_type == SCSI &&
  286. cb_idx != mpt_stm_index &&
  287. cb_idx != mpt_lan_index)
  288. mpt_sp_ioc_info(ioc, (u32)ioc_stat, mf);
  289. }
  290. /* Check for (valid) IO callback! */
  291. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
  292. MptCallbacks[cb_idx] == NULL) {
  293. printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
  294. __FUNCTION__, ioc->name, cb_idx);
  295. freeme = 0;
  296. goto out;
  297. }
  298. freeme = MptCallbacks[cb_idx](ioc, mf, mr);
  299. out:
  300. /* Flush (non-TURBO) reply with a WRITE! */
  301. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
  302. if (freeme)
  303. mpt_free_msg_frame(ioc, mf);
  304. mb();
  305. }
  306. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  307. /*
  308. * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
  309. * @irq: irq number (not used)
  310. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  311. * @r: pt_regs pointer (not used)
  312. *
  313. * This routine is registered via the request_irq() kernel API call,
  314. * and handles all interrupts generated from a specific MPT adapter
  315. * (also referred to as a IO Controller or IOC).
  316. * This routine must clear the interrupt from the adapter and does
  317. * so by reading the reply FIFO. Multiple replies may be processed
  318. * per single call to this routine.
  319. *
  320. * This routine handles register-level access of the adapter but
  321. * dispatches (calls) a protocol-specific callback routine to handle
  322. * the protocol-specific details of the MPT request completion.
  323. */
  324. static irqreturn_t
  325. mpt_interrupt(int irq, void *bus_id, struct pt_regs *r)
  326. {
  327. MPT_ADAPTER *ioc = bus_id;
  328. u32 pa;
  329. /*
  330. * Drain the reply FIFO!
  331. */
  332. while (1) {
  333. pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
  334. if (pa == 0xFFFFFFFF)
  335. return IRQ_HANDLED;
  336. else if (pa & MPI_ADDRESS_REPLY_A_BIT)
  337. mpt_reply(ioc, pa);
  338. else
  339. mpt_turbo_reply(ioc, pa);
  340. }
  341. return IRQ_HANDLED;
  342. }
  343. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  344. /*
  345. * mpt_base_reply - MPT base driver's callback routine; all base driver
  346. * "internal" request/reply processing is routed here.
  347. * Currently used for EventNotification and EventAck handling.
  348. * @ioc: Pointer to MPT_ADAPTER structure
  349. * @mf: Pointer to original MPT request frame
  350. * @reply: Pointer to MPT reply frame (NULL if TurboReply)
  351. *
  352. * Returns 1 indicating original alloc'd request frame ptr
  353. * should be freed, or 0 if it shouldn't.
  354. */
  355. static int
  356. mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
  357. {
  358. int freereq = 1;
  359. u8 func;
  360. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
  361. #if defined(MPT_DEBUG_MSG_FRAME)
  362. if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
  363. dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
  364. DBG_DUMP_REQUEST_FRAME_HDR(mf)
  365. }
  366. #endif
  367. func = reply->u.hdr.Function;
  368. dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
  369. ioc->name, func));
  370. if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
  371. EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
  372. int evHandlers = 0;
  373. int results;
  374. results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
  375. if (results != evHandlers) {
  376. /* CHECKME! Any special handling needed here? */
  377. devtprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
  378. ioc->name, evHandlers, results));
  379. }
  380. /*
  381. * Hmmm... It seems that EventNotificationReply is an exception
  382. * to the rule of one reply per request.
  383. */
  384. if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
  385. freereq = 0;
  386. devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p does not return Request frame\n",
  387. ioc->name, pEvReply));
  388. } else {
  389. devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
  390. ioc->name, pEvReply));
  391. }
  392. #ifdef CONFIG_PROC_FS
  393. // LogEvent(ioc, pEvReply);
  394. #endif
  395. } else if (func == MPI_FUNCTION_EVENT_ACK) {
  396. dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
  397. ioc->name));
  398. } else if (func == MPI_FUNCTION_CONFIG ||
  399. func == MPI_FUNCTION_TOOLBOX) {
  400. CONFIGPARMS *pCfg;
  401. unsigned long flags;
  402. dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
  403. ioc->name, mf, reply));
  404. pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
  405. if (pCfg) {
  406. /* disable timer and remove from linked list */
  407. del_timer(&pCfg->timer);
  408. spin_lock_irqsave(&ioc->FreeQlock, flags);
  409. list_del(&pCfg->linkage);
  410. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  411. /*
  412. * If IOC Status is SUCCESS, save the header
  413. * and set the status code to GOOD.
  414. */
  415. pCfg->status = MPT_CONFIG_ERROR;
  416. if (reply) {
  417. ConfigReply_t *pReply = (ConfigReply_t *)reply;
  418. u16 status;
  419. status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
  420. dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
  421. status, le32_to_cpu(pReply->IOCLogInfo)));
  422. pCfg->status = status;
  423. if (status == MPI_IOCSTATUS_SUCCESS) {
  424. if ((pReply->Header.PageType &
  425. MPI_CONFIG_PAGETYPE_MASK) ==
  426. MPI_CONFIG_PAGETYPE_EXTENDED) {
  427. pCfg->cfghdr.ehdr->ExtPageLength =
  428. le16_to_cpu(pReply->ExtPageLength);
  429. pCfg->cfghdr.ehdr->ExtPageType =
  430. pReply->ExtPageType;
  431. }
  432. pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
  433. /* If this is a regular header, save PageLength. */
  434. /* LMP Do this better so not using a reserved field! */
  435. pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
  436. pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
  437. pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
  438. }
  439. }
  440. /*
  441. * Wake up the original calling thread
  442. */
  443. pCfg->wait_done = 1;
  444. wake_up(&mpt_waitq);
  445. }
  446. } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
  447. /* we should be always getting a reply frame */
  448. memcpy(ioc->persist_reply_frame, reply,
  449. min(MPT_DEFAULT_FRAME_SIZE,
  450. 4*reply->u.reply.MsgLength));
  451. del_timer(&ioc->persist_timer);
  452. ioc->persist_wait_done = 1;
  453. wake_up(&mpt_waitq);
  454. } else {
  455. printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
  456. ioc->name, func);
  457. }
  458. /*
  459. * Conditionally tell caller to free the original
  460. * EventNotification/EventAck/unexpected request frame!
  461. */
  462. return freereq;
  463. }
  464. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  465. /**
  466. * mpt_register - Register protocol-specific main callback handler.
  467. * @cbfunc: callback function pointer
  468. * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
  469. *
  470. * This routine is called by a protocol-specific driver (SCSI host,
  471. * LAN, SCSI target) to register it's reply callback routine. Each
  472. * protocol-specific driver must do this before it will be able to
  473. * use any IOC resources, such as obtaining request frames.
  474. *
  475. * NOTES: The SCSI protocol driver currently calls this routine thrice
  476. * in order to register separate callbacks; one for "normal" SCSI IO;
  477. * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
  478. *
  479. * Returns a positive integer valued "handle" in the
  480. * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
  481. * Any non-positive return value (including zero!) should be considered
  482. * an error by the caller.
  483. */
  484. int
  485. mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
  486. {
  487. int i;
  488. last_drv_idx = -1;
  489. /*
  490. * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
  491. * (slot/handle 0 is reserved!)
  492. */
  493. for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
  494. if (MptCallbacks[i] == NULL) {
  495. MptCallbacks[i] = cbfunc;
  496. MptDriverClass[i] = dclass;
  497. MptEvHandlers[i] = NULL;
  498. last_drv_idx = i;
  499. break;
  500. }
  501. }
  502. return last_drv_idx;
  503. }
  504. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  505. /**
  506. * mpt_deregister - Deregister a protocol drivers resources.
  507. * @cb_idx: previously registered callback handle
  508. *
  509. * Each protocol-specific driver should call this routine when it's
  510. * module is unloaded.
  511. */
  512. void
  513. mpt_deregister(int cb_idx)
  514. {
  515. if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
  516. MptCallbacks[cb_idx] = NULL;
  517. MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
  518. MptEvHandlers[cb_idx] = NULL;
  519. last_drv_idx++;
  520. }
  521. }
  522. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  523. /**
  524. * mpt_event_register - Register protocol-specific event callback
  525. * handler.
  526. * @cb_idx: previously registered (via mpt_register) callback handle
  527. * @ev_cbfunc: callback function
  528. *
  529. * This routine can be called by one or more protocol-specific drivers
  530. * if/when they choose to be notified of MPT events.
  531. *
  532. * Returns 0 for success.
  533. */
  534. int
  535. mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
  536. {
  537. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  538. return -1;
  539. MptEvHandlers[cb_idx] = ev_cbfunc;
  540. return 0;
  541. }
  542. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  543. /**
  544. * mpt_event_deregister - Deregister protocol-specific event callback
  545. * handler.
  546. * @cb_idx: previously registered callback handle
  547. *
  548. * Each protocol-specific driver should call this routine
  549. * when it does not (or can no longer) handle events,
  550. * or when it's module is unloaded.
  551. */
  552. void
  553. mpt_event_deregister(int cb_idx)
  554. {
  555. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  556. return;
  557. MptEvHandlers[cb_idx] = NULL;
  558. }
  559. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  560. /**
  561. * mpt_reset_register - Register protocol-specific IOC reset handler.
  562. * @cb_idx: previously registered (via mpt_register) callback handle
  563. * @reset_func: reset function
  564. *
  565. * This routine can be called by one or more protocol-specific drivers
  566. * if/when they choose to be notified of IOC resets.
  567. *
  568. * Returns 0 for success.
  569. */
  570. int
  571. mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
  572. {
  573. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  574. return -1;
  575. MptResetHandlers[cb_idx] = reset_func;
  576. return 0;
  577. }
  578. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  579. /**
  580. * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
  581. * @cb_idx: previously registered callback handle
  582. *
  583. * Each protocol-specific driver should call this routine
  584. * when it does not (or can no longer) handle IOC reset handling,
  585. * or when it's module is unloaded.
  586. */
  587. void
  588. mpt_reset_deregister(int cb_idx)
  589. {
  590. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  591. return;
  592. MptResetHandlers[cb_idx] = NULL;
  593. }
  594. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  595. /**
  596. * mpt_device_driver_register - Register device driver hooks
  597. */
  598. int
  599. mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
  600. {
  601. MPT_ADAPTER *ioc;
  602. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS) {
  603. return -EINVAL;
  604. }
  605. MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
  606. /* call per pci device probe entry point */
  607. list_for_each_entry(ioc, &ioc_list, list) {
  608. if(dd_cbfunc->probe) {
  609. dd_cbfunc->probe(ioc->pcidev,
  610. ioc->pcidev->driver->id_table);
  611. }
  612. }
  613. return 0;
  614. }
  615. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  616. /**
  617. * mpt_device_driver_deregister - DeRegister device driver hooks
  618. */
  619. void
  620. mpt_device_driver_deregister(int cb_idx)
  621. {
  622. struct mpt_pci_driver *dd_cbfunc;
  623. MPT_ADAPTER *ioc;
  624. if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
  625. return;
  626. dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
  627. list_for_each_entry(ioc, &ioc_list, list) {
  628. if (dd_cbfunc->remove)
  629. dd_cbfunc->remove(ioc->pcidev);
  630. }
  631. MptDeviceDriverHandlers[cb_idx] = NULL;
  632. }
  633. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  634. /**
  635. * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
  636. * allocated per MPT adapter.
  637. * @handle: Handle of registered MPT protocol driver
  638. * @ioc: Pointer to MPT adapter structure
  639. *
  640. * Returns pointer to a MPT request frame or %NULL if none are available
  641. * or IOC is not active.
  642. */
  643. MPT_FRAME_HDR*
  644. mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
  645. {
  646. MPT_FRAME_HDR *mf;
  647. unsigned long flags;
  648. u16 req_idx; /* Request index */
  649. /* validate handle and ioc identifier */
  650. #ifdef MFCNT
  651. if (!ioc->active)
  652. printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
  653. #endif
  654. /* If interrupts are not attached, do not return a request frame */
  655. if (!ioc->active)
  656. return NULL;
  657. spin_lock_irqsave(&ioc->FreeQlock, flags);
  658. if (!list_empty(&ioc->FreeQ)) {
  659. int req_offset;
  660. mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
  661. u.frame.linkage.list);
  662. list_del(&mf->u.frame.linkage.list);
  663. mf->u.frame.linkage.arg1 = 0;
  664. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  665. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  666. /* u16! */
  667. req_idx = req_offset / ioc->req_sz;
  668. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  669. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  670. ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
  671. #ifdef MFCNT
  672. ioc->mfcnt++;
  673. #endif
  674. }
  675. else
  676. mf = NULL;
  677. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  678. #ifdef MFCNT
  679. if (mf == NULL)
  680. printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
  681. mfcounter++;
  682. if (mfcounter == PRINT_MF_COUNT)
  683. printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
  684. #endif
  685. dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
  686. ioc->name, handle, ioc->id, mf));
  687. return mf;
  688. }
  689. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  690. /**
  691. * mpt_put_msg_frame - Send a protocol specific MPT request frame
  692. * to a IOC.
  693. * @handle: Handle of registered MPT protocol driver
  694. * @ioc: Pointer to MPT adapter structure
  695. * @mf: Pointer to MPT request frame
  696. *
  697. * This routine posts a MPT request frame to the request post FIFO of a
  698. * specific MPT adapter.
  699. */
  700. void
  701. mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  702. {
  703. u32 mf_dma_addr;
  704. int req_offset;
  705. u16 req_idx; /* Request index */
  706. /* ensure values are reset properly! */
  707. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
  708. req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
  709. /* u16! */
  710. req_idx = req_offset / ioc->req_sz;
  711. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
  712. mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
  713. #ifdef MPT_DEBUG_MSG_FRAME
  714. {
  715. u32 *m = mf->u.frame.hwhdr.__hdr;
  716. int ii, n;
  717. printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
  718. ioc->name, m);
  719. n = ioc->req_sz/4 - 1;
  720. while (m[n] == 0)
  721. n--;
  722. for (ii=0; ii<=n; ii++) {
  723. if (ii && ((ii%8)==0))
  724. printk("\n" KERN_INFO " ");
  725. printk(" %08x", le32_to_cpu(m[ii]));
  726. }
  727. printk("\n");
  728. }
  729. #endif
  730. mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
  731. dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
  732. CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
  733. }
  734. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  735. /**
  736. * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
  737. * @handle: Handle of registered MPT protocol driver
  738. * @ioc: Pointer to MPT adapter structure
  739. * @mf: Pointer to MPT request frame
  740. *
  741. * This routine places a MPT request frame back on the MPT adapter's
  742. * FreeQ.
  743. */
  744. void
  745. mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
  746. {
  747. unsigned long flags;
  748. /* Put Request back on FreeQ! */
  749. spin_lock_irqsave(&ioc->FreeQlock, flags);
  750. mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
  751. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  752. #ifdef MFCNT
  753. ioc->mfcnt--;
  754. #endif
  755. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  756. }
  757. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  758. /**
  759. * mpt_add_sge - Place a simple SGE at address pAddr.
  760. * @pAddr: virtual address for SGE
  761. * @flagslength: SGE flags and data transfer length
  762. * @dma_addr: Physical address
  763. *
  764. * This routine places a MPT request frame back on the MPT adapter's
  765. * FreeQ.
  766. */
  767. void
  768. mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
  769. {
  770. if (sizeof(dma_addr_t) == sizeof(u64)) {
  771. SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
  772. u32 tmp = dma_addr & 0xFFFFFFFF;
  773. pSge->FlagsLength = cpu_to_le32(flagslength);
  774. pSge->Address.Low = cpu_to_le32(tmp);
  775. tmp = (u32) ((u64)dma_addr >> 32);
  776. pSge->Address.High = cpu_to_le32(tmp);
  777. } else {
  778. SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
  779. pSge->FlagsLength = cpu_to_le32(flagslength);
  780. pSge->Address = cpu_to_le32(dma_addr);
  781. }
  782. }
  783. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  784. /**
  785. * mpt_send_handshake_request - Send MPT request via doorbell
  786. * handshake method.
  787. * @handle: Handle of registered MPT protocol driver
  788. * @ioc: Pointer to MPT adapter structure
  789. * @reqBytes: Size of the request in bytes
  790. * @req: Pointer to MPT request frame
  791. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  792. *
  793. * This routine is used exclusively to send MptScsiTaskMgmt
  794. * requests since they are required to be sent via doorbell handshake.
  795. *
  796. * NOTE: It is the callers responsibility to byte-swap fields in the
  797. * request which are greater than 1 byte in size.
  798. *
  799. * Returns 0 for success, non-zero for failure.
  800. */
  801. int
  802. mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
  803. {
  804. int r = 0;
  805. u8 *req_as_bytes;
  806. int ii;
  807. /* State is known to be good upon entering
  808. * this function so issue the bus reset
  809. * request.
  810. */
  811. /*
  812. * Emulate what mpt_put_msg_frame() does /wrt to sanity
  813. * setting cb_idx/req_idx. But ONLY if this request
  814. * is in proper (pre-alloc'd) request buffer range...
  815. */
  816. ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
  817. if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
  818. MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
  819. mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
  820. mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
  821. }
  822. /* Make sure there are no doorbells */
  823. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  824. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  825. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  826. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  827. /* Wait for IOC doorbell int */
  828. if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
  829. return ii;
  830. }
  831. /* Read doorbell and check for active bit */
  832. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  833. return -5;
  834. dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
  835. ioc->name, ii));
  836. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  837. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  838. return -2;
  839. }
  840. /* Send request via doorbell handshake */
  841. req_as_bytes = (u8 *) req;
  842. for (ii = 0; ii < reqBytes/4; ii++) {
  843. u32 word;
  844. word = ((req_as_bytes[(ii*4) + 0] << 0) |
  845. (req_as_bytes[(ii*4) + 1] << 8) |
  846. (req_as_bytes[(ii*4) + 2] << 16) |
  847. (req_as_bytes[(ii*4) + 3] << 24));
  848. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  849. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  850. r = -3;
  851. break;
  852. }
  853. }
  854. if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
  855. r = 0;
  856. else
  857. r = -4;
  858. /* Make sure there are no doorbells */
  859. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  860. return r;
  861. }
  862. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  863. /**
  864. * mpt_host_page_access_control - provides mechanism for the host
  865. * driver to control the IOC's Host Page Buffer access.
  866. * @ioc: Pointer to MPT adapter structure
  867. * @access_control_value: define bits below
  868. *
  869. * Access Control Value - bits[15:12]
  870. * 0h Reserved
  871. * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
  872. * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
  873. * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
  874. *
  875. * Returns 0 for success, non-zero for failure.
  876. */
  877. static int
  878. mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
  879. {
  880. int r = 0;
  881. /* return if in use */
  882. if (CHIPREG_READ32(&ioc->chip->Doorbell)
  883. & MPI_DOORBELL_ACTIVE)
  884. return -1;
  885. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  886. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  887. ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
  888. <<MPI_DOORBELL_FUNCTION_SHIFT) |
  889. (access_control_value<<12)));
  890. /* Wait for IOC to clear Doorbell Status bit */
  891. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
  892. return -2;
  893. }else
  894. return 0;
  895. }
  896. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  897. /**
  898. * mpt_host_page_alloc - allocate system memory for the fw
  899. * If we already allocated memory in past, then resend the same pointer.
  900. * ioc@: Pointer to pointer to IOC adapter
  901. * ioc_init@: Pointer to ioc init config page
  902. *
  903. * Returns 0 for success, non-zero for failure.
  904. */
  905. static int
  906. mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
  907. {
  908. char *psge;
  909. int flags_length;
  910. u32 host_page_buffer_sz=0;
  911. if(!ioc->HostPageBuffer) {
  912. host_page_buffer_sz =
  913. le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
  914. if(!host_page_buffer_sz)
  915. return 0; /* fw doesn't need any host buffers */
  916. /* spin till we get enough memory */
  917. while(host_page_buffer_sz > 0) {
  918. if((ioc->HostPageBuffer = pci_alloc_consistent(
  919. ioc->pcidev,
  920. host_page_buffer_sz,
  921. &ioc->HostPageBuffer_dma)) != NULL) {
  922. dinitprintk((MYIOC_s_INFO_FMT
  923. "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
  924. ioc->name,
  925. ioc->HostPageBuffer,
  926. ioc->HostPageBuffer_dma,
  927. host_page_buffer_sz));
  928. ioc->alloc_total += host_page_buffer_sz;
  929. ioc->HostPageBuffer_sz = host_page_buffer_sz;
  930. break;
  931. }
  932. host_page_buffer_sz -= (4*1024);
  933. }
  934. }
  935. if(!ioc->HostPageBuffer) {
  936. printk(MYIOC_s_ERR_FMT
  937. "Failed to alloc memory for host_page_buffer!\n",
  938. ioc->name);
  939. return -999;
  940. }
  941. psge = (char *)&ioc_init->HostPageBufferSGE;
  942. flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
  943. MPI_SGE_FLAGS_SYSTEM_ADDRESS |
  944. MPI_SGE_FLAGS_32_BIT_ADDRESSING |
  945. MPI_SGE_FLAGS_HOST_TO_IOC |
  946. MPI_SGE_FLAGS_END_OF_BUFFER;
  947. if (sizeof(dma_addr_t) == sizeof(u64)) {
  948. flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
  949. }
  950. flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
  951. flags_length |= ioc->HostPageBuffer_sz;
  952. mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
  953. ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
  954. return 0;
  955. }
  956. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  957. /**
  958. * mpt_verify_adapter - Given a unique IOC identifier, set pointer to
  959. * the associated MPT adapter structure.
  960. * @iocid: IOC unique identifier (integer)
  961. * @iocpp: Pointer to pointer to IOC adapter
  962. *
  963. * Returns iocid and sets iocpp.
  964. */
  965. int
  966. mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
  967. {
  968. MPT_ADAPTER *ioc;
  969. list_for_each_entry(ioc,&ioc_list,list) {
  970. if (ioc->id == iocid) {
  971. *iocpp =ioc;
  972. return iocid;
  973. }
  974. }
  975. *iocpp = NULL;
  976. return -1;
  977. }
  978. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  979. /*
  980. * mpt_attach - Install a PCI intelligent MPT adapter.
  981. * @pdev: Pointer to pci_dev structure
  982. *
  983. * This routine performs all the steps necessary to bring the IOC of
  984. * a MPT adapter to a OPERATIONAL state. This includes registering
  985. * memory regions, registering the interrupt, and allocating request
  986. * and reply memory pools.
  987. *
  988. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  989. * MPT adapter.
  990. *
  991. * Returns 0 for success, non-zero for failure.
  992. *
  993. * TODO: Add support for polled controllers
  994. */
  995. int
  996. mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
  997. {
  998. MPT_ADAPTER *ioc;
  999. u8 __iomem *mem;
  1000. unsigned long mem_phys;
  1001. unsigned long port;
  1002. u32 msize;
  1003. u32 psize;
  1004. int ii;
  1005. int r = -ENODEV;
  1006. u8 revision;
  1007. u8 pcixcmd;
  1008. static int mpt_ids = 0;
  1009. #ifdef CONFIG_PROC_FS
  1010. struct proc_dir_entry *dent, *ent;
  1011. #endif
  1012. if (pci_enable_device(pdev))
  1013. return r;
  1014. dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
  1015. if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
  1016. dprintk((KERN_INFO MYNAM
  1017. ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
  1018. } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
  1019. printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
  1020. return r;
  1021. }
  1022. if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
  1023. dprintk((KERN_INFO MYNAM
  1024. ": Using 64 bit consistent mask\n"));
  1025. else
  1026. dprintk((KERN_INFO MYNAM
  1027. ": Not using 64 bit consistent mask\n"));
  1028. ioc = kmalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
  1029. if (ioc == NULL) {
  1030. printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
  1031. return -ENOMEM;
  1032. }
  1033. memset(ioc, 0, sizeof(MPT_ADAPTER));
  1034. ioc->alloc_total = sizeof(MPT_ADAPTER);
  1035. ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
  1036. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  1037. ioc->pcidev = pdev;
  1038. ioc->diagPending = 0;
  1039. spin_lock_init(&ioc->diagLock);
  1040. /* Initialize the event logging.
  1041. */
  1042. ioc->eventTypes = 0; /* None */
  1043. ioc->eventContext = 0;
  1044. ioc->eventLogSize = 0;
  1045. ioc->events = NULL;
  1046. #ifdef MFCNT
  1047. ioc->mfcnt = 0;
  1048. #endif
  1049. ioc->cached_fw = NULL;
  1050. /* Initilize SCSI Config Data structure
  1051. */
  1052. memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
  1053. /* Initialize the running configQ head.
  1054. */
  1055. INIT_LIST_HEAD(&ioc->configQ);
  1056. /* Find lookup slot. */
  1057. INIT_LIST_HEAD(&ioc->list);
  1058. ioc->id = mpt_ids++;
  1059. mem_phys = msize = 0;
  1060. port = psize = 0;
  1061. for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
  1062. if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
  1063. /* Get I/O space! */
  1064. port = pci_resource_start(pdev, ii);
  1065. psize = pci_resource_len(pdev,ii);
  1066. } else {
  1067. /* Get memmap */
  1068. mem_phys = pci_resource_start(pdev, ii);
  1069. msize = pci_resource_len(pdev,ii);
  1070. break;
  1071. }
  1072. }
  1073. ioc->mem_size = msize;
  1074. if (ii == DEVICE_COUNT_RESOURCE) {
  1075. printk(KERN_ERR MYNAM ": ERROR - MPT adapter has no memory regions defined!\n");
  1076. kfree(ioc);
  1077. return -EINVAL;
  1078. }
  1079. dinitprintk((KERN_INFO MYNAM ": MPT adapter @ %lx, msize=%dd bytes\n", mem_phys, msize));
  1080. dinitprintk((KERN_INFO MYNAM ": (port i/o @ %lx, psize=%dd bytes)\n", port, psize));
  1081. mem = NULL;
  1082. /* Get logical ptr for PciMem0 space */
  1083. /*mem = ioremap(mem_phys, msize);*/
  1084. mem = ioremap(mem_phys, 0x100);
  1085. if (mem == NULL) {
  1086. printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
  1087. kfree(ioc);
  1088. return -EINVAL;
  1089. }
  1090. ioc->memmap = mem;
  1091. dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
  1092. dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
  1093. &ioc->facts, &ioc->pfacts[0]));
  1094. ioc->mem_phys = mem_phys;
  1095. ioc->chip = (SYSIF_REGS __iomem *)mem;
  1096. /* Save Port IO values in case we need to do downloadboot */
  1097. {
  1098. u8 *pmem = (u8*)port;
  1099. ioc->pio_mem_phys = port;
  1100. ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
  1101. }
  1102. if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
  1103. ioc->prod_name = "LSIFC909";
  1104. ioc->bus_type = FC;
  1105. }
  1106. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
  1107. ioc->prod_name = "LSIFC929";
  1108. ioc->bus_type = FC;
  1109. }
  1110. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
  1111. ioc->prod_name = "LSIFC919";
  1112. ioc->bus_type = FC;
  1113. }
  1114. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
  1115. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1116. ioc->bus_type = FC;
  1117. if (revision < XL_929) {
  1118. ioc->prod_name = "LSIFC929X";
  1119. /* 929X Chip Fix. Set Split transactions level
  1120. * for PCIX. Set MOST bits to zero.
  1121. */
  1122. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1123. pcixcmd &= 0x8F;
  1124. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1125. } else {
  1126. ioc->prod_name = "LSIFC929XL";
  1127. /* 929XL Chip Fix. Set MMRBC to 0x08.
  1128. */
  1129. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1130. pcixcmd |= 0x08;
  1131. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1132. }
  1133. }
  1134. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
  1135. ioc->prod_name = "LSIFC919X";
  1136. ioc->bus_type = FC;
  1137. /* 919X Chip Fix. Set Split transactions level
  1138. * for PCIX. Set MOST bits to zero.
  1139. */
  1140. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1141. pcixcmd &= 0x8F;
  1142. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1143. }
  1144. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
  1145. ioc->prod_name = "LSIFC939X";
  1146. ioc->bus_type = FC;
  1147. ioc->errata_flag_1064 = 1;
  1148. }
  1149. else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
  1150. ioc->prod_name = "LSIFC949X";
  1151. ioc->bus_type = FC;
  1152. ioc->errata_flag_1064 = 1;
  1153. }
  1154. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
  1155. ioc->prod_name = "LSI53C1030";
  1156. ioc->bus_type = SCSI;
  1157. /* 1030 Chip Fix. Disable Split transactions
  1158. * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
  1159. */
  1160. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
  1161. if (revision < C0_1030) {
  1162. pci_read_config_byte(pdev, 0x6a, &pcixcmd);
  1163. pcixcmd &= 0x8F;
  1164. pci_write_config_byte(pdev, 0x6a, pcixcmd);
  1165. }
  1166. }
  1167. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
  1168. ioc->prod_name = "LSI53C1035";
  1169. ioc->bus_type = SCSI;
  1170. }
  1171. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
  1172. ioc->prod_name = "LSISAS1064";
  1173. ioc->bus_type = SAS;
  1174. ioc->errata_flag_1064 = 1;
  1175. }
  1176. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066) {
  1177. ioc->prod_name = "LSISAS1066";
  1178. ioc->bus_type = SAS;
  1179. ioc->errata_flag_1064 = 1;
  1180. }
  1181. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
  1182. ioc->prod_name = "LSISAS1068";
  1183. ioc->bus_type = SAS;
  1184. ioc->errata_flag_1064 = 1;
  1185. }
  1186. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
  1187. ioc->prod_name = "LSISAS1064E";
  1188. ioc->bus_type = SAS;
  1189. }
  1190. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066E) {
  1191. ioc->prod_name = "LSISAS1066E";
  1192. ioc->bus_type = SAS;
  1193. }
  1194. else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
  1195. ioc->prod_name = "LSISAS1068E";
  1196. ioc->bus_type = SAS;
  1197. }
  1198. if (ioc->errata_flag_1064)
  1199. pci_disable_io_access(pdev);
  1200. sprintf(ioc->name, "ioc%d", ioc->id);
  1201. spin_lock_init(&ioc->FreeQlock);
  1202. /* Disable all! */
  1203. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1204. ioc->active = 0;
  1205. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1206. /* Set lookup ptr. */
  1207. list_add_tail(&ioc->list, &ioc_list);
  1208. ioc->pci_irq = -1;
  1209. if (pdev->irq) {
  1210. r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc);
  1211. if (r < 0) {
  1212. #ifndef __sparc__
  1213. printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %d!\n",
  1214. ioc->name, pdev->irq);
  1215. #else
  1216. printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %s!\n",
  1217. ioc->name, __irq_itoa(pdev->irq));
  1218. #endif
  1219. list_del(&ioc->list);
  1220. iounmap(mem);
  1221. kfree(ioc);
  1222. return -EBUSY;
  1223. }
  1224. ioc->pci_irq = pdev->irq;
  1225. pci_set_master(pdev); /* ?? */
  1226. pci_set_drvdata(pdev, ioc);
  1227. #ifndef __sparc__
  1228. dprintk((KERN_INFO MYNAM ": %s installed at interrupt %d\n", ioc->name, pdev->irq));
  1229. #else
  1230. dprintk((KERN_INFO MYNAM ": %s installed at interrupt %s\n", ioc->name, __irq_itoa(pdev->irq)));
  1231. #endif
  1232. }
  1233. /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
  1234. */
  1235. mpt_detect_bound_ports(ioc, pdev);
  1236. if ((r = mpt_do_ioc_recovery(ioc,
  1237. MPT_HOSTEVENT_IOC_BRINGUP, CAN_SLEEP)) != 0) {
  1238. printk(KERN_WARNING MYNAM
  1239. ": WARNING - %s did not initialize properly! (%d)\n",
  1240. ioc->name, r);
  1241. list_del(&ioc->list);
  1242. free_irq(ioc->pci_irq, ioc);
  1243. iounmap(mem);
  1244. kfree(ioc);
  1245. pci_set_drvdata(pdev, NULL);
  1246. return r;
  1247. }
  1248. /* call per device driver probe entry point */
  1249. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1250. if(MptDeviceDriverHandlers[ii] &&
  1251. MptDeviceDriverHandlers[ii]->probe) {
  1252. MptDeviceDriverHandlers[ii]->probe(pdev,id);
  1253. }
  1254. }
  1255. #ifdef CONFIG_PROC_FS
  1256. /*
  1257. * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
  1258. */
  1259. dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
  1260. if (dent) {
  1261. ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
  1262. if (ent) {
  1263. ent->read_proc = procmpt_iocinfo_read;
  1264. ent->data = ioc;
  1265. }
  1266. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
  1267. if (ent) {
  1268. ent->read_proc = procmpt_summary_read;
  1269. ent->data = ioc;
  1270. }
  1271. }
  1272. #endif
  1273. return 0;
  1274. }
  1275. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1276. /*
  1277. * mpt_detach - Remove a PCI intelligent MPT adapter.
  1278. * @pdev: Pointer to pci_dev structure
  1279. *
  1280. */
  1281. void
  1282. mpt_detach(struct pci_dev *pdev)
  1283. {
  1284. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1285. char pname[32];
  1286. int ii;
  1287. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
  1288. remove_proc_entry(pname, NULL);
  1289. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
  1290. remove_proc_entry(pname, NULL);
  1291. sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
  1292. remove_proc_entry(pname, NULL);
  1293. /* call per device driver remove entry point */
  1294. for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
  1295. if(MptDeviceDriverHandlers[ii] &&
  1296. MptDeviceDriverHandlers[ii]->remove) {
  1297. MptDeviceDriverHandlers[ii]->remove(pdev);
  1298. }
  1299. }
  1300. /* Disable interrupts! */
  1301. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1302. ioc->active = 0;
  1303. synchronize_irq(pdev->irq);
  1304. /* Clear any lingering interrupt */
  1305. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1306. CHIPREG_READ32(&ioc->chip->IntStatus);
  1307. mpt_adapter_dispose(ioc);
  1308. pci_set_drvdata(pdev, NULL);
  1309. }
  1310. /**************************************************************************
  1311. * Power Management
  1312. */
  1313. #ifdef CONFIG_PM
  1314. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1315. /*
  1316. * mpt_suspend - Fusion MPT base driver suspend routine.
  1317. *
  1318. *
  1319. */
  1320. int
  1321. mpt_suspend(struct pci_dev *pdev, pm_message_t state)
  1322. {
  1323. u32 device_state;
  1324. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1325. device_state=pci_choose_state(pdev, state);
  1326. printk(MYIOC_s_INFO_FMT
  1327. "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
  1328. ioc->name, pdev, pci_name(pdev), device_state);
  1329. pci_save_state(pdev);
  1330. /* put ioc into READY_STATE */
  1331. if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
  1332. printk(MYIOC_s_ERR_FMT
  1333. "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
  1334. }
  1335. /* disable interrupts */
  1336. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1337. ioc->active = 0;
  1338. /* Clear any lingering interrupt */
  1339. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1340. pci_disable_device(pdev);
  1341. pci_set_power_state(pdev, device_state);
  1342. return 0;
  1343. }
  1344. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1345. /*
  1346. * mpt_resume - Fusion MPT base driver resume routine.
  1347. *
  1348. *
  1349. */
  1350. int
  1351. mpt_resume(struct pci_dev *pdev)
  1352. {
  1353. MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
  1354. u32 device_state = pdev->current_state;
  1355. int recovery_state;
  1356. int ii;
  1357. printk(MYIOC_s_INFO_FMT
  1358. "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
  1359. ioc->name, pdev, pci_name(pdev), device_state);
  1360. pci_set_power_state(pdev, 0);
  1361. pci_restore_state(pdev);
  1362. pci_enable_device(pdev);
  1363. /* enable interrupts */
  1364. CHIPREG_WRITE32(&ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1365. ioc->active = 1;
  1366. /* F/W not running */
  1367. if(!CHIPREG_READ32(&ioc->chip->Doorbell)) {
  1368. /* enable domain validation flags */
  1369. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  1370. ioc->spi_data.dvStatus[ii] |= MPT_SCSICFG_NEED_DV;
  1371. }
  1372. }
  1373. printk(MYIOC_s_INFO_FMT
  1374. "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
  1375. ioc->name,
  1376. (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
  1377. CHIPREG_READ32(&ioc->chip->Doorbell));
  1378. /* bring ioc to operational state */
  1379. if ((recovery_state = mpt_do_ioc_recovery(ioc,
  1380. MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
  1381. printk(MYIOC_s_INFO_FMT
  1382. "pci-resume: Cannot recover, error:[%x]\n",
  1383. ioc->name, recovery_state);
  1384. } else {
  1385. printk(MYIOC_s_INFO_FMT
  1386. "pci-resume: success\n", ioc->name);
  1387. }
  1388. return 0;
  1389. }
  1390. #endif
  1391. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1392. /*
  1393. * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
  1394. * @ioc: Pointer to MPT adapter structure
  1395. * @reason: Event word / reason
  1396. * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
  1397. *
  1398. * This routine performs all the steps necessary to bring the IOC
  1399. * to a OPERATIONAL state.
  1400. *
  1401. * This routine also pre-fetches the LAN MAC address of a Fibre Channel
  1402. * MPT adapter.
  1403. *
  1404. * Returns:
  1405. * 0 for success
  1406. * -1 if failed to get board READY
  1407. * -2 if READY but IOCFacts Failed
  1408. * -3 if READY but PrimeIOCFifos Failed
  1409. * -4 if READY but IOCInit Failed
  1410. */
  1411. static int
  1412. mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
  1413. {
  1414. int hard_reset_done = 0;
  1415. int alt_ioc_ready = 0;
  1416. int hard;
  1417. int rc=0;
  1418. int ii;
  1419. int handlers;
  1420. int ret = 0;
  1421. int reset_alt_ioc_active = 0;
  1422. printk(KERN_INFO MYNAM ": Initiating %s %s\n",
  1423. ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
  1424. /* Disable reply interrupts (also blocks FreeQ) */
  1425. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1426. ioc->active = 0;
  1427. if (ioc->alt_ioc) {
  1428. if (ioc->alt_ioc->active)
  1429. reset_alt_ioc_active = 1;
  1430. /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
  1431. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
  1432. ioc->alt_ioc->active = 0;
  1433. }
  1434. hard = 1;
  1435. if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
  1436. hard = 0;
  1437. if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
  1438. if (hard_reset_done == -4) {
  1439. printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
  1440. ioc->name);
  1441. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1442. /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
  1443. dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1444. ioc->alt_ioc->name));
  1445. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1446. ioc->alt_ioc->active = 1;
  1447. }
  1448. } else {
  1449. printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
  1450. ioc->name);
  1451. }
  1452. return -1;
  1453. }
  1454. /* hard_reset_done = 0 if a soft reset was performed
  1455. * and 1 if a hard reset was performed.
  1456. */
  1457. if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
  1458. if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
  1459. alt_ioc_ready = 1;
  1460. else
  1461. printk(KERN_WARNING MYNAM
  1462. ": alt-%s: Not ready WARNING!\n",
  1463. ioc->alt_ioc->name);
  1464. }
  1465. for (ii=0; ii<5; ii++) {
  1466. /* Get IOC facts! Allow 5 retries */
  1467. if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
  1468. break;
  1469. }
  1470. if (ii == 5) {
  1471. dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
  1472. ret = -2;
  1473. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1474. MptDisplayIocCapabilities(ioc);
  1475. }
  1476. if (alt_ioc_ready) {
  1477. if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
  1478. dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1479. /* Retry - alt IOC was initialized once
  1480. */
  1481. rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
  1482. }
  1483. if (rc) {
  1484. dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
  1485. alt_ioc_ready = 0;
  1486. reset_alt_ioc_active = 0;
  1487. } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  1488. MptDisplayIocCapabilities(ioc->alt_ioc);
  1489. }
  1490. }
  1491. /* Prime reply & request queues!
  1492. * (mucho alloc's) Must be done prior to
  1493. * init as upper addresses are needed for init.
  1494. * If fails, continue with alt-ioc processing
  1495. */
  1496. if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
  1497. ret = -3;
  1498. /* May need to check/upload firmware & data here!
  1499. * If fails, continue with alt-ioc processing
  1500. */
  1501. if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
  1502. ret = -4;
  1503. // NEW!
  1504. if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
  1505. printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
  1506. ioc->alt_ioc->name, rc);
  1507. alt_ioc_ready = 0;
  1508. reset_alt_ioc_active = 0;
  1509. }
  1510. if (alt_ioc_ready) {
  1511. if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
  1512. alt_ioc_ready = 0;
  1513. reset_alt_ioc_active = 0;
  1514. printk(KERN_WARNING MYNAM
  1515. ": alt-%s: (%d) init failure WARNING!\n",
  1516. ioc->alt_ioc->name, rc);
  1517. }
  1518. }
  1519. if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
  1520. if (ioc->upload_fw) {
  1521. ddlprintk((MYIOC_s_INFO_FMT
  1522. "firmware upload required!\n", ioc->name));
  1523. /* Controller is not operational, cannot do upload
  1524. */
  1525. if (ret == 0) {
  1526. rc = mpt_do_upload(ioc, sleepFlag);
  1527. if (rc == 0) {
  1528. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  1529. /*
  1530. * Maintain only one pointer to FW memory
  1531. * so there will not be two attempt to
  1532. * downloadboot onboard dual function
  1533. * chips (mpt_adapter_disable,
  1534. * mpt_diag_reset)
  1535. */
  1536. ioc->cached_fw = NULL;
  1537. ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
  1538. ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
  1539. }
  1540. } else {
  1541. printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
  1542. ret = -5;
  1543. }
  1544. }
  1545. }
  1546. }
  1547. if (ret == 0) {
  1548. /* Enable! (reply interrupt) */
  1549. CHIPREG_WRITE32(&ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1550. ioc->active = 1;
  1551. }
  1552. if (reset_alt_ioc_active && ioc->alt_ioc) {
  1553. /* (re)Enable alt-IOC! (reply interrupt) */
  1554. dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
  1555. ioc->alt_ioc->name));
  1556. CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, ~(MPI_HIM_RIM));
  1557. ioc->alt_ioc->active = 1;
  1558. }
  1559. /* Enable MPT base driver management of EventNotification
  1560. * and EventAck handling.
  1561. */
  1562. if ((ret == 0) && (!ioc->facts.EventState))
  1563. (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
  1564. if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
  1565. (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
  1566. /* Add additional "reason" check before call to GetLanConfigPages
  1567. * (combined with GetIoUnitPage2 call). This prevents a somewhat
  1568. * recursive scenario; GetLanConfigPages times out, timer expired
  1569. * routine calls HardResetHandler, which calls into here again,
  1570. * and we try GetLanConfigPages again...
  1571. */
  1572. if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
  1573. if (ioc->bus_type == SAS) {
  1574. /* clear persistency table */
  1575. if(ioc->facts.IOCExceptions &
  1576. MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
  1577. ret = mptbase_sas_persist_operation(ioc,
  1578. MPI_SAS_OP_CLEAR_NOT_PRESENT);
  1579. if(ret != 0)
  1580. return -1;
  1581. }
  1582. /* Find IM volumes
  1583. */
  1584. mpt_findImVolumes(ioc);
  1585. } else if (ioc->bus_type == FC) {
  1586. /*
  1587. * Pre-fetch FC port WWN and stuff...
  1588. * (FCPortPage0_t stuff)
  1589. */
  1590. for (ii=0; ii < ioc->facts.NumberOfPorts; ii++) {
  1591. (void) GetFcPortPage0(ioc, ii);
  1592. }
  1593. if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
  1594. (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
  1595. /*
  1596. * Pre-fetch the ports LAN MAC address!
  1597. * (LANPage1_t stuff)
  1598. */
  1599. (void) GetLanConfigPages(ioc);
  1600. #ifdef MPT_DEBUG
  1601. {
  1602. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  1603. dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  1604. ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
  1605. }
  1606. #endif
  1607. }
  1608. } else {
  1609. /* Get NVRAM and adapter maximums from SPP 0 and 2
  1610. */
  1611. mpt_GetScsiPortSettings(ioc, 0);
  1612. /* Get version and length of SDP 1
  1613. */
  1614. mpt_readScsiDevicePageHeaders(ioc, 0);
  1615. /* Find IM volumes
  1616. */
  1617. if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
  1618. mpt_findImVolumes(ioc);
  1619. /* Check, and possibly reset, the coalescing value
  1620. */
  1621. mpt_read_ioc_pg_1(ioc);
  1622. mpt_read_ioc_pg_4(ioc);
  1623. }
  1624. GetIoUnitPage2(ioc);
  1625. }
  1626. /*
  1627. * Call each currently registered protocol IOC reset handler
  1628. * with post-reset indication.
  1629. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  1630. * MptResetHandlers[] registered yet.
  1631. */
  1632. if (hard_reset_done) {
  1633. rc = handlers = 0;
  1634. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  1635. if ((ret == 0) && MptResetHandlers[ii]) {
  1636. dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
  1637. ioc->name, ii));
  1638. rc += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_POST_RESET);
  1639. handlers++;
  1640. }
  1641. if (alt_ioc_ready && MptResetHandlers[ii]) {
  1642. drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
  1643. ioc->name, ioc->alt_ioc->name, ii));
  1644. rc += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_POST_RESET);
  1645. handlers++;
  1646. }
  1647. }
  1648. /* FIXME? Examine results here? */
  1649. }
  1650. return ret;
  1651. }
  1652. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1653. /*
  1654. * mpt_detect_bound_ports - Search for PCI bus/dev_function
  1655. * which matches PCI bus/dev_function (+/-1) for newly discovered 929,
  1656. * 929X, 1030 or 1035.
  1657. * @ioc: Pointer to MPT adapter structure
  1658. * @pdev: Pointer to (struct pci_dev) structure
  1659. *
  1660. * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
  1661. * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
  1662. */
  1663. static void
  1664. mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
  1665. {
  1666. struct pci_dev *peer=NULL;
  1667. unsigned int slot = PCI_SLOT(pdev->devfn);
  1668. unsigned int func = PCI_FUNC(pdev->devfn);
  1669. MPT_ADAPTER *ioc_srch;
  1670. dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
  1671. " searching for devfn match on %x or %x\n",
  1672. ioc->name, pci_name(pdev), pdev->bus->number,
  1673. pdev->devfn, func-1, func+1));
  1674. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
  1675. if (!peer) {
  1676. peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
  1677. if (!peer)
  1678. return;
  1679. }
  1680. list_for_each_entry(ioc_srch, &ioc_list, list) {
  1681. struct pci_dev *_pcidev = ioc_srch->pcidev;
  1682. if (_pcidev == peer) {
  1683. /* Paranoia checks */
  1684. if (ioc->alt_ioc != NULL) {
  1685. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1686. ioc->name, ioc->alt_ioc->name);
  1687. break;
  1688. } else if (ioc_srch->alt_ioc != NULL) {
  1689. printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
  1690. ioc_srch->name, ioc_srch->alt_ioc->name);
  1691. break;
  1692. }
  1693. dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
  1694. ioc->name, ioc_srch->name));
  1695. ioc_srch->alt_ioc = ioc;
  1696. ioc->alt_ioc = ioc_srch;
  1697. }
  1698. }
  1699. pci_dev_put(peer);
  1700. }
  1701. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1702. /*
  1703. * mpt_adapter_disable - Disable misbehaving MPT adapter.
  1704. * @this: Pointer to MPT adapter structure
  1705. */
  1706. static void
  1707. mpt_adapter_disable(MPT_ADAPTER *ioc)
  1708. {
  1709. int sz;
  1710. int ret;
  1711. if (ioc->cached_fw != NULL) {
  1712. ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
  1713. if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
  1714. printk(KERN_WARNING MYNAM
  1715. ": firmware downloadboot failure (%d)!\n", ret);
  1716. }
  1717. }
  1718. /* Disable adapter interrupts! */
  1719. CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
  1720. ioc->active = 0;
  1721. /* Clear any lingering interrupt */
  1722. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  1723. if (ioc->alloc != NULL) {
  1724. sz = ioc->alloc_sz;
  1725. dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
  1726. ioc->name, ioc->alloc, ioc->alloc_sz));
  1727. pci_free_consistent(ioc->pcidev, sz,
  1728. ioc->alloc, ioc->alloc_dma);
  1729. ioc->reply_frames = NULL;
  1730. ioc->req_frames = NULL;
  1731. ioc->alloc = NULL;
  1732. ioc->alloc_total -= sz;
  1733. }
  1734. if (ioc->sense_buf_pool != NULL) {
  1735. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  1736. pci_free_consistent(ioc->pcidev, sz,
  1737. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  1738. ioc->sense_buf_pool = NULL;
  1739. ioc->alloc_total -= sz;
  1740. }
  1741. if (ioc->events != NULL){
  1742. sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
  1743. kfree(ioc->events);
  1744. ioc->events = NULL;
  1745. ioc->alloc_total -= sz;
  1746. }
  1747. if (ioc->cached_fw != NULL) {
  1748. sz = ioc->facts.FWImageSize;
  1749. pci_free_consistent(ioc->pcidev, sz,
  1750. ioc->cached_fw, ioc->cached_fw_dma);
  1751. ioc->cached_fw = NULL;
  1752. ioc->alloc_total -= sz;
  1753. }
  1754. kfree(ioc->spi_data.nvram);
  1755. kfree(ioc->raid_data.pIocPg3);
  1756. ioc->spi_data.nvram = NULL;
  1757. ioc->raid_data.pIocPg3 = NULL;
  1758. if (ioc->spi_data.pIocPg4 != NULL) {
  1759. sz = ioc->spi_data.IocPg4Sz;
  1760. pci_free_consistent(ioc->pcidev, sz,
  1761. ioc->spi_data.pIocPg4,
  1762. ioc->spi_data.IocPg4_dma);
  1763. ioc->spi_data.pIocPg4 = NULL;
  1764. ioc->alloc_total -= sz;
  1765. }
  1766. if (ioc->ReqToChain != NULL) {
  1767. kfree(ioc->ReqToChain);
  1768. kfree(ioc->RequestNB);
  1769. ioc->ReqToChain = NULL;
  1770. }
  1771. kfree(ioc->ChainToChain);
  1772. ioc->ChainToChain = NULL;
  1773. if (ioc->HostPageBuffer != NULL) {
  1774. if((ret = mpt_host_page_access_control(ioc,
  1775. MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
  1776. printk(KERN_ERR MYNAM
  1777. ": %s: host page buffers free failed (%d)!\n",
  1778. __FUNCTION__, ret);
  1779. }
  1780. dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
  1781. ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
  1782. pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
  1783. ioc->HostPageBuffer,
  1784. ioc->HostPageBuffer_dma);
  1785. ioc->HostPageBuffer = NULL;
  1786. ioc->HostPageBuffer_sz = 0;
  1787. ioc->alloc_total -= ioc->HostPageBuffer_sz;
  1788. }
  1789. }
  1790. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1791. /*
  1792. * mpt_adapter_dispose - Free all resources associated with a MPT
  1793. * adapter.
  1794. * @ioc: Pointer to MPT adapter structure
  1795. *
  1796. * This routine unregisters h/w resources and frees all alloc'd memory
  1797. * associated with a MPT adapter structure.
  1798. */
  1799. static void
  1800. mpt_adapter_dispose(MPT_ADAPTER *ioc)
  1801. {
  1802. int sz_first, sz_last;
  1803. if (ioc == NULL)
  1804. return;
  1805. sz_first = ioc->alloc_total;
  1806. mpt_adapter_disable(ioc);
  1807. if (ioc->pci_irq != -1) {
  1808. free_irq(ioc->pci_irq, ioc);
  1809. ioc->pci_irq = -1;
  1810. }
  1811. if (ioc->memmap != NULL) {
  1812. iounmap(ioc->memmap);
  1813. ioc->memmap = NULL;
  1814. }
  1815. #if defined(CONFIG_MTRR) && 0
  1816. if (ioc->mtrr_reg > 0) {
  1817. mtrr_del(ioc->mtrr_reg, 0, 0);
  1818. dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
  1819. }
  1820. #endif
  1821. /* Zap the adapter lookup ptr! */
  1822. list_del(&ioc->list);
  1823. sz_last = ioc->alloc_total;
  1824. dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
  1825. ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
  1826. kfree(ioc);
  1827. }
  1828. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1829. /*
  1830. * MptDisplayIocCapabilities - Disply IOC's capacilities.
  1831. * @ioc: Pointer to MPT adapter structure
  1832. */
  1833. static void
  1834. MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
  1835. {
  1836. int i = 0;
  1837. printk(KERN_INFO "%s: ", ioc->name);
  1838. if (ioc->prod_name && strlen(ioc->prod_name) > 3)
  1839. printk("%s: ", ioc->prod_name+3);
  1840. printk("Capabilities={");
  1841. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
  1842. printk("Initiator");
  1843. i++;
  1844. }
  1845. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1846. printk("%sTarget", i ? "," : "");
  1847. i++;
  1848. }
  1849. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  1850. printk("%sLAN", i ? "," : "");
  1851. i++;
  1852. }
  1853. #if 0
  1854. /*
  1855. * This would probably evoke more questions than it's worth
  1856. */
  1857. if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
  1858. printk("%sLogBusAddr", i ? "," : "");
  1859. i++;
  1860. }
  1861. #endif
  1862. printk("}\n");
  1863. }
  1864. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1865. /*
  1866. * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
  1867. * @ioc: Pointer to MPT_ADAPTER structure
  1868. * @force: Force hard KickStart of IOC
  1869. * @sleepFlag: Specifies whether the process can sleep
  1870. *
  1871. * Returns:
  1872. * 1 - DIAG reset and READY
  1873. * 0 - READY initially OR soft reset and READY
  1874. * -1 - Any failure on KickStart
  1875. * -2 - Msg Unit Reset Failed
  1876. * -3 - IO Unit Reset Failed
  1877. * -4 - IOC owned by a PEER
  1878. */
  1879. static int
  1880. MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
  1881. {
  1882. u32 ioc_state;
  1883. int statefault = 0;
  1884. int cntdn;
  1885. int hard_reset_done = 0;
  1886. int r;
  1887. int ii;
  1888. int whoinit;
  1889. /* Get current [raw] IOC state */
  1890. ioc_state = mpt_GetIocState(ioc, 0);
  1891. dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
  1892. /*
  1893. * Check to see if IOC got left/stuck in doorbell handshake
  1894. * grip of death. If so, hard reset the IOC.
  1895. */
  1896. if (ioc_state & MPI_DOORBELL_ACTIVE) {
  1897. statefault = 1;
  1898. printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
  1899. ioc->name);
  1900. }
  1901. /* Is it already READY? */
  1902. if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
  1903. return 0;
  1904. /*
  1905. * Check to see if IOC is in FAULT state.
  1906. */
  1907. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
  1908. statefault = 2;
  1909. printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
  1910. ioc->name);
  1911. printk(KERN_WARNING " FAULT code = %04xh\n",
  1912. ioc_state & MPI_DOORBELL_DATA_MASK);
  1913. }
  1914. /*
  1915. * Hmmm... Did it get left operational?
  1916. */
  1917. if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
  1918. dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
  1919. ioc->name));
  1920. /* Check WhoInit.
  1921. * If PCI Peer, exit.
  1922. * Else, if no fault conditions are present, issue a MessageUnitReset
  1923. * Else, fall through to KickStart case
  1924. */
  1925. whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
  1926. dinitprintk((KERN_INFO MYNAM
  1927. ": whoinit 0x%x statefault %d force %d\n",
  1928. whoinit, statefault, force));
  1929. if (whoinit == MPI_WHOINIT_PCI_PEER)
  1930. return -4;
  1931. else {
  1932. if ((statefault == 0 ) && (force == 0)) {
  1933. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
  1934. return 0;
  1935. }
  1936. statefault = 3;
  1937. }
  1938. }
  1939. hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
  1940. if (hard_reset_done < 0)
  1941. return -1;
  1942. /*
  1943. * Loop here waiting for IOC to come READY.
  1944. */
  1945. ii = 0;
  1946. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
  1947. while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  1948. if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
  1949. /*
  1950. * BIOS or previous driver load left IOC in OP state.
  1951. * Reset messaging FIFOs.
  1952. */
  1953. if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
  1954. printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
  1955. return -2;
  1956. }
  1957. } else if (ioc_state == MPI_IOC_STATE_RESET) {
  1958. /*
  1959. * Something is wrong. Try to get IOC back
  1960. * to a known state.
  1961. */
  1962. if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
  1963. printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
  1964. return -3;
  1965. }
  1966. }
  1967. ii++; cntdn--;
  1968. if (!cntdn) {
  1969. printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
  1970. ioc->name, (int)((ii+5)/HZ));
  1971. return -ETIME;
  1972. }
  1973. if (sleepFlag == CAN_SLEEP) {
  1974. msleep_interruptible(1);
  1975. } else {
  1976. mdelay (1); /* 1 msec delay */
  1977. }
  1978. }
  1979. if (statefault < 3) {
  1980. printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
  1981. ioc->name,
  1982. statefault==1 ? "stuck handshake" : "IOC FAULT");
  1983. }
  1984. return hard_reset_done;
  1985. }
  1986. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  1987. /*
  1988. * mpt_GetIocState - Get the current state of a MPT adapter.
  1989. * @ioc: Pointer to MPT_ADAPTER structure
  1990. * @cooked: Request raw or cooked IOC state
  1991. *
  1992. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1993. * Doorbell bits in MPI_IOC_STATE_MASK.
  1994. */
  1995. u32
  1996. mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
  1997. {
  1998. u32 s, sc;
  1999. /* Get! */
  2000. s = CHIPREG_READ32(&ioc->chip->Doorbell);
  2001. // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
  2002. sc = s & MPI_IOC_STATE_MASK;
  2003. /* Save! */
  2004. ioc->last_state = sc;
  2005. return cooked ? sc : s;
  2006. }
  2007. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2008. /*
  2009. * GetIocFacts - Send IOCFacts request to MPT adapter.
  2010. * @ioc: Pointer to MPT_ADAPTER structure
  2011. * @sleepFlag: Specifies whether the process can sleep
  2012. * @reason: If recovery, only update facts.
  2013. *
  2014. * Returns 0 for success, non-zero for failure.
  2015. */
  2016. static int
  2017. GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
  2018. {
  2019. IOCFacts_t get_facts;
  2020. IOCFactsReply_t *facts;
  2021. int r;
  2022. int req_sz;
  2023. int reply_sz;
  2024. int sz;
  2025. u32 status, vv;
  2026. u8 shiftFactor=1;
  2027. /* IOC *must* NOT be in RESET state! */
  2028. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2029. printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
  2030. ioc->name,
  2031. ioc->last_state );
  2032. return -44;
  2033. }
  2034. facts = &ioc->facts;
  2035. /* Destination (reply area)... */
  2036. reply_sz = sizeof(*facts);
  2037. memset(facts, 0, reply_sz);
  2038. /* Request area (get_facts on the stack right now!) */
  2039. req_sz = sizeof(get_facts);
  2040. memset(&get_facts, 0, req_sz);
  2041. get_facts.Function = MPI_FUNCTION_IOC_FACTS;
  2042. /* Assert: All other get_facts fields are zero! */
  2043. dinitprintk((MYIOC_s_INFO_FMT
  2044. "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
  2045. ioc->name, req_sz, reply_sz));
  2046. /* No non-zero fields in the get_facts request are greater than
  2047. * 1 byte in size, so we can just fire it off as is.
  2048. */
  2049. r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
  2050. reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
  2051. if (r != 0)
  2052. return r;
  2053. /*
  2054. * Now byte swap (GRRR) the necessary fields before any further
  2055. * inspection of reply contents.
  2056. *
  2057. * But need to do some sanity checks on MsgLength (byte) field
  2058. * to make sure we don't zero IOC's req_sz!
  2059. */
  2060. /* Did we get a valid reply? */
  2061. if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
  2062. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2063. /*
  2064. * If not been here, done that, save off first WhoInit value
  2065. */
  2066. if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
  2067. ioc->FirstWhoInit = facts->WhoInit;
  2068. }
  2069. facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
  2070. facts->MsgContext = le32_to_cpu(facts->MsgContext);
  2071. facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
  2072. facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
  2073. facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
  2074. status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
  2075. /* CHECKME! IOCStatus, IOCLogInfo */
  2076. facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
  2077. facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
  2078. /*
  2079. * FC f/w version changed between 1.1 and 1.2
  2080. * Old: u16{Major(4),Minor(4),SubMinor(8)}
  2081. * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
  2082. */
  2083. if (facts->MsgVersion < 0x0102) {
  2084. /*
  2085. * Handle old FC f/w style, convert to new...
  2086. */
  2087. u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
  2088. facts->FWVersion.Word =
  2089. ((oldv<<12) & 0xFF000000) |
  2090. ((oldv<<8) & 0x000FFF00);
  2091. } else
  2092. facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
  2093. facts->ProductID = le16_to_cpu(facts->ProductID);
  2094. facts->CurrentHostMfaHighAddr =
  2095. le32_to_cpu(facts->CurrentHostMfaHighAddr);
  2096. facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
  2097. facts->CurrentSenseBufferHighAddr =
  2098. le32_to_cpu(facts->CurrentSenseBufferHighAddr);
  2099. facts->CurReplyFrameSize =
  2100. le16_to_cpu(facts->CurReplyFrameSize);
  2101. facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
  2102. /*
  2103. * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
  2104. * Older MPI-1.00.xx struct had 13 dwords, and enlarged
  2105. * to 14 in MPI-1.01.0x.
  2106. */
  2107. if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
  2108. facts->MsgVersion > 0x0100) {
  2109. facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
  2110. }
  2111. sz = facts->FWImageSize;
  2112. if ( sz & 0x01 )
  2113. sz += 1;
  2114. if ( sz & 0x02 )
  2115. sz += 2;
  2116. facts->FWImageSize = sz;
  2117. if (!facts->RequestFrameSize) {
  2118. /* Something is wrong! */
  2119. printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
  2120. ioc->name);
  2121. return -55;
  2122. }
  2123. r = sz = facts->BlockSize;
  2124. vv = ((63 / (sz * 4)) + 1) & 0x03;
  2125. ioc->NB_for_64_byte_frame = vv;
  2126. while ( sz )
  2127. {
  2128. shiftFactor++;
  2129. sz = sz >> 1;
  2130. }
  2131. ioc->NBShiftFactor = shiftFactor;
  2132. dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
  2133. ioc->name, vv, shiftFactor, r));
  2134. if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
  2135. /*
  2136. * Set values for this IOC's request & reply frame sizes,
  2137. * and request & reply queue depths...
  2138. */
  2139. ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
  2140. ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
  2141. ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
  2142. ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
  2143. dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
  2144. ioc->name, ioc->reply_sz, ioc->reply_depth));
  2145. dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
  2146. ioc->name, ioc->req_sz, ioc->req_depth));
  2147. /* Get port facts! */
  2148. if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
  2149. return r;
  2150. }
  2151. } else {
  2152. printk(MYIOC_s_ERR_FMT
  2153. "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
  2154. ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
  2155. RequestFrameSize)/sizeof(u32)));
  2156. return -66;
  2157. }
  2158. return 0;
  2159. }
  2160. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2161. /*
  2162. * GetPortFacts - Send PortFacts request to MPT adapter.
  2163. * @ioc: Pointer to MPT_ADAPTER structure
  2164. * @portnum: Port number
  2165. * @sleepFlag: Specifies whether the process can sleep
  2166. *
  2167. * Returns 0 for success, non-zero for failure.
  2168. */
  2169. static int
  2170. GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2171. {
  2172. PortFacts_t get_pfacts;
  2173. PortFactsReply_t *pfacts;
  2174. int ii;
  2175. int req_sz;
  2176. int reply_sz;
  2177. /* IOC *must* NOT be in RESET state! */
  2178. if (ioc->last_state == MPI_IOC_STATE_RESET) {
  2179. printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
  2180. ioc->name,
  2181. ioc->last_state );
  2182. return -4;
  2183. }
  2184. pfacts = &ioc->pfacts[portnum];
  2185. /* Destination (reply area)... */
  2186. reply_sz = sizeof(*pfacts);
  2187. memset(pfacts, 0, reply_sz);
  2188. /* Request area (get_pfacts on the stack right now!) */
  2189. req_sz = sizeof(get_pfacts);
  2190. memset(&get_pfacts, 0, req_sz);
  2191. get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
  2192. get_pfacts.PortNumber = portnum;
  2193. /* Assert: All other get_pfacts fields are zero! */
  2194. dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
  2195. ioc->name, portnum));
  2196. /* No non-zero fields in the get_pfacts request are greater than
  2197. * 1 byte in size, so we can just fire it off as is.
  2198. */
  2199. ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
  2200. reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
  2201. if (ii != 0)
  2202. return ii;
  2203. /* Did we get a valid reply? */
  2204. /* Now byte swap the necessary fields in the response. */
  2205. pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
  2206. pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
  2207. pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
  2208. pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
  2209. pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
  2210. pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
  2211. pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
  2212. pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
  2213. pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
  2214. return 0;
  2215. }
  2216. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2217. /*
  2218. * SendIocInit - Send IOCInit request to MPT adapter.
  2219. * @ioc: Pointer to MPT_ADAPTER structure
  2220. * @sleepFlag: Specifies whether the process can sleep
  2221. *
  2222. * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
  2223. *
  2224. * Returns 0 for success, non-zero for failure.
  2225. */
  2226. static int
  2227. SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
  2228. {
  2229. IOCInit_t ioc_init;
  2230. MPIDefaultReply_t init_reply;
  2231. u32 state;
  2232. int r;
  2233. int count;
  2234. int cntdn;
  2235. memset(&ioc_init, 0, sizeof(ioc_init));
  2236. memset(&init_reply, 0, sizeof(init_reply));
  2237. ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
  2238. ioc_init.Function = MPI_FUNCTION_IOC_INIT;
  2239. /* If we are in a recovery mode and we uploaded the FW image,
  2240. * then this pointer is not NULL. Skip the upload a second time.
  2241. * Set this flag if cached_fw set for either IOC.
  2242. */
  2243. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  2244. ioc->upload_fw = 1;
  2245. else
  2246. ioc->upload_fw = 0;
  2247. ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
  2248. ioc->name, ioc->upload_fw, ioc->facts.Flags));
  2249. if(ioc->bus_type == SAS)
  2250. ioc_init.MaxDevices = ioc->facts.MaxDevices;
  2251. else if(ioc->bus_type == FC)
  2252. ioc_init.MaxDevices = MPT_MAX_FC_DEVICES;
  2253. else
  2254. ioc_init.MaxDevices = MPT_MAX_SCSI_DEVICES;
  2255. ioc_init.MaxBuses = MPT_MAX_BUS;
  2256. dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
  2257. ioc->name, ioc->facts.MsgVersion));
  2258. if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
  2259. // set MsgVersion and HeaderVersion host driver was built with
  2260. ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
  2261. ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
  2262. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
  2263. ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
  2264. } else if(mpt_host_page_alloc(ioc, &ioc_init))
  2265. return -99;
  2266. }
  2267. ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
  2268. if (sizeof(dma_addr_t) == sizeof(u64)) {
  2269. /* Save the upper 32-bits of the request
  2270. * (reply) and sense buffers.
  2271. */
  2272. ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
  2273. ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
  2274. } else {
  2275. /* Force 32-bit addressing */
  2276. ioc_init.HostMfaHighAddr = cpu_to_le32(0);
  2277. ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
  2278. }
  2279. ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
  2280. ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
  2281. ioc->facts.MaxDevices = ioc_init.MaxDevices;
  2282. ioc->facts.MaxBuses = ioc_init.MaxBuses;
  2283. dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
  2284. ioc->name, &ioc_init));
  2285. r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
  2286. sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
  2287. if (r != 0) {
  2288. printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
  2289. return r;
  2290. }
  2291. /* No need to byte swap the multibyte fields in the reply
  2292. * since we don't even look at it's contents.
  2293. */
  2294. dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
  2295. ioc->name, &ioc_init));
  2296. if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
  2297. printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
  2298. return r;
  2299. }
  2300. /* YIKES! SUPER IMPORTANT!!!
  2301. * Poll IocState until _OPERATIONAL while IOC is doing
  2302. * LoopInit and TargetDiscovery!
  2303. */
  2304. count = 0;
  2305. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
  2306. state = mpt_GetIocState(ioc, 1);
  2307. while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
  2308. if (sleepFlag == CAN_SLEEP) {
  2309. msleep_interruptible(1);
  2310. } else {
  2311. mdelay(1);
  2312. }
  2313. if (!cntdn) {
  2314. printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
  2315. ioc->name, (int)((count+5)/HZ));
  2316. return -9;
  2317. }
  2318. state = mpt_GetIocState(ioc, 1);
  2319. count++;
  2320. }
  2321. dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
  2322. ioc->name, count));
  2323. return r;
  2324. }
  2325. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2326. /*
  2327. * SendPortEnable - Send PortEnable request to MPT adapter port.
  2328. * @ioc: Pointer to MPT_ADAPTER structure
  2329. * @portnum: Port number to enable
  2330. * @sleepFlag: Specifies whether the process can sleep
  2331. *
  2332. * Send PortEnable to bring IOC to OPERATIONAL state.
  2333. *
  2334. * Returns 0 for success, non-zero for failure.
  2335. */
  2336. static int
  2337. SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
  2338. {
  2339. PortEnable_t port_enable;
  2340. MPIDefaultReply_t reply_buf;
  2341. int rc;
  2342. int req_sz;
  2343. int reply_sz;
  2344. /* Destination... */
  2345. reply_sz = sizeof(MPIDefaultReply_t);
  2346. memset(&reply_buf, 0, reply_sz);
  2347. req_sz = sizeof(PortEnable_t);
  2348. memset(&port_enable, 0, req_sz);
  2349. port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
  2350. port_enable.PortNumber = portnum;
  2351. /* port_enable.ChainOffset = 0; */
  2352. /* port_enable.MsgFlags = 0; */
  2353. /* port_enable.MsgContext = 0; */
  2354. dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
  2355. ioc->name, portnum, &port_enable));
  2356. /* RAID FW may take a long time to enable
  2357. */
  2358. if ( (ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
  2359. > MPI_FW_HEADER_PID_PROD_TARGET_SCSI ) {
  2360. rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
  2361. reply_sz, (u16*)&reply_buf, 300 /*seconds*/, sleepFlag);
  2362. } else {
  2363. rc = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&port_enable,
  2364. reply_sz, (u16*)&reply_buf, 30 /*seconds*/, sleepFlag);
  2365. }
  2366. return rc;
  2367. }
  2368. /*
  2369. * ioc: Pointer to MPT_ADAPTER structure
  2370. * size - total FW bytes
  2371. */
  2372. void
  2373. mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
  2374. {
  2375. if (ioc->cached_fw)
  2376. return; /* use already allocated memory */
  2377. if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
  2378. ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
  2379. ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
  2380. } else {
  2381. if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
  2382. ioc->alloc_total += size;
  2383. }
  2384. }
  2385. /*
  2386. * If alt_img is NULL, delete from ioc structure.
  2387. * Else, delete a secondary image in same format.
  2388. */
  2389. void
  2390. mpt_free_fw_memory(MPT_ADAPTER *ioc)
  2391. {
  2392. int sz;
  2393. sz = ioc->facts.FWImageSize;
  2394. dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2395. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2396. pci_free_consistent(ioc->pcidev, sz,
  2397. ioc->cached_fw, ioc->cached_fw_dma);
  2398. ioc->cached_fw = NULL;
  2399. return;
  2400. }
  2401. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2402. /*
  2403. * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
  2404. * @ioc: Pointer to MPT_ADAPTER structure
  2405. * @sleepFlag: Specifies whether the process can sleep
  2406. *
  2407. * Returns 0 for success, >0 for handshake failure
  2408. * <0 for fw upload failure.
  2409. *
  2410. * Remark: If bound IOC and a successful FWUpload was performed
  2411. * on the bound IOC, the second image is discarded
  2412. * and memory is free'd. Both channels must upload to prevent
  2413. * IOC from running in degraded mode.
  2414. */
  2415. static int
  2416. mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
  2417. {
  2418. u8 request[ioc->req_sz];
  2419. u8 reply[sizeof(FWUploadReply_t)];
  2420. FWUpload_t *prequest;
  2421. FWUploadReply_t *preply;
  2422. FWUploadTCSGE_t *ptcsge;
  2423. int sgeoffset;
  2424. u32 flagsLength;
  2425. int ii, sz, reply_sz;
  2426. int cmdStatus;
  2427. /* If the image size is 0, we are done.
  2428. */
  2429. if ((sz = ioc->facts.FWImageSize) == 0)
  2430. return 0;
  2431. mpt_alloc_fw_memory(ioc, sz);
  2432. dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
  2433. ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
  2434. if (ioc->cached_fw == NULL) {
  2435. /* Major Failure.
  2436. */
  2437. return -ENOMEM;
  2438. }
  2439. prequest = (FWUpload_t *)&request;
  2440. preply = (FWUploadReply_t *)&reply;
  2441. /* Destination... */
  2442. memset(prequest, 0, ioc->req_sz);
  2443. reply_sz = sizeof(reply);
  2444. memset(preply, 0, reply_sz);
  2445. prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
  2446. prequest->Function = MPI_FUNCTION_FW_UPLOAD;
  2447. ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
  2448. ptcsge->DetailsLength = 12;
  2449. ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
  2450. ptcsge->ImageSize = cpu_to_le32(sz);
  2451. sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
  2452. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
  2453. mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
  2454. sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
  2455. dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
  2456. prequest, sgeoffset));
  2457. DBG_DUMP_FW_REQUEST_FRAME(prequest)
  2458. ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
  2459. reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
  2460. dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
  2461. cmdStatus = -EFAULT;
  2462. if (ii == 0) {
  2463. /* Handshake transfer was complete and successful.
  2464. * Check the Reply Frame.
  2465. */
  2466. int status, transfer_sz;
  2467. status = le16_to_cpu(preply->IOCStatus);
  2468. if (status == MPI_IOCSTATUS_SUCCESS) {
  2469. transfer_sz = le32_to_cpu(preply->ActualImageSize);
  2470. if (transfer_sz == sz)
  2471. cmdStatus = 0;
  2472. }
  2473. }
  2474. dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
  2475. ioc->name, cmdStatus));
  2476. if (cmdStatus) {
  2477. ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
  2478. ioc->name));
  2479. mpt_free_fw_memory(ioc);
  2480. }
  2481. return cmdStatus;
  2482. }
  2483. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2484. /*
  2485. * mpt_downloadboot - DownloadBoot code
  2486. * @ioc: Pointer to MPT_ADAPTER structure
  2487. * @flag: Specify which part of IOC memory is to be uploaded.
  2488. * @sleepFlag: Specifies whether the process can sleep
  2489. *
  2490. * FwDownloadBoot requires Programmed IO access.
  2491. *
  2492. * Returns 0 for success
  2493. * -1 FW Image size is 0
  2494. * -2 No valid cached_fw Pointer
  2495. * <0 for fw upload failure.
  2496. */
  2497. static int
  2498. mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
  2499. {
  2500. MpiExtImageHeader_t *pExtImage;
  2501. u32 fwSize;
  2502. u32 diag0val;
  2503. int count;
  2504. u32 *ptrFw;
  2505. u32 diagRwData;
  2506. u32 nextImage;
  2507. u32 load_addr;
  2508. u32 ioc_state=0;
  2509. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
  2510. ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
  2511. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2512. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2513. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2514. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2515. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2516. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2517. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
  2518. /* wait 1 msec */
  2519. if (sleepFlag == CAN_SLEEP) {
  2520. msleep_interruptible(1);
  2521. } else {
  2522. mdelay (1);
  2523. }
  2524. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2525. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2526. for (count = 0; count < 30; count ++) {
  2527. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2528. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2529. ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
  2530. ioc->name, count));
  2531. break;
  2532. }
  2533. /* wait .1 sec */
  2534. if (sleepFlag == CAN_SLEEP) {
  2535. msleep_interruptible (100);
  2536. } else {
  2537. mdelay (100);
  2538. }
  2539. }
  2540. if ( count == 30 ) {
  2541. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
  2542. "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
  2543. ioc->name, diag0val));
  2544. return -3;
  2545. }
  2546. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2547. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2548. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2549. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2550. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2551. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2552. /* Set the DiagRwEn and Disable ARM bits */
  2553. CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
  2554. fwSize = (pFwHeader->ImageSize + 3)/4;
  2555. ptrFw = (u32 *) pFwHeader;
  2556. /* Write the LoadStartAddress to the DiagRw Address Register
  2557. * using Programmed IO
  2558. */
  2559. if (ioc->errata_flag_1064)
  2560. pci_enable_io_access(ioc->pcidev);
  2561. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
  2562. ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
  2563. ioc->name, pFwHeader->LoadStartAddress));
  2564. ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
  2565. ioc->name, fwSize*4, ptrFw));
  2566. while (fwSize--) {
  2567. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2568. }
  2569. nextImage = pFwHeader->NextImageHeaderOffset;
  2570. while (nextImage) {
  2571. pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
  2572. load_addr = pExtImage->LoadStartAddress;
  2573. fwSize = (pExtImage->ImageSize + 3) >> 2;
  2574. ptrFw = (u32 *)pExtImage;
  2575. ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
  2576. ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
  2577. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
  2578. while (fwSize--) {
  2579. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
  2580. }
  2581. nextImage = pExtImage->NextImageHeaderOffset;
  2582. }
  2583. /* Write the IopResetVectorRegAddr */
  2584. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
  2585. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
  2586. /* Write the IopResetVectorValue */
  2587. ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
  2588. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
  2589. /* Clear the internal flash bad bit - autoincrementing register,
  2590. * so must do two writes.
  2591. */
  2592. if (ioc->bus_type == SCSI) {
  2593. /*
  2594. * 1030 and 1035 H/W errata, workaround to access
  2595. * the ClearFlashBadSignatureBit
  2596. */
  2597. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2598. diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
  2599. diagRwData |= 0x40000000;
  2600. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
  2601. CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
  2602. } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
  2603. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2604. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
  2605. MPI_DIAG_CLEAR_FLASH_BAD_SIG);
  2606. /* wait 1 msec */
  2607. if (sleepFlag == CAN_SLEEP) {
  2608. msleep_interruptible (1);
  2609. } else {
  2610. mdelay (1);
  2611. }
  2612. }
  2613. if (ioc->errata_flag_1064)
  2614. pci_disable_io_access(ioc->pcidev);
  2615. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2616. ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
  2617. "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
  2618. ioc->name, diag0val));
  2619. diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
  2620. ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
  2621. ioc->name, diag0val));
  2622. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  2623. /* Write 0xFF to reset the sequencer */
  2624. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2625. if (ioc->bus_type == SAS) {
  2626. ioc_state = mpt_GetIocState(ioc, 0);
  2627. if ( (GetIocFacts(ioc, sleepFlag,
  2628. MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
  2629. ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
  2630. ioc->name, ioc_state));
  2631. return -EFAULT;
  2632. }
  2633. }
  2634. for (count=0; count<HZ*20; count++) {
  2635. if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
  2636. ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
  2637. ioc->name, count, ioc_state));
  2638. if (ioc->bus_type == SAS) {
  2639. return 0;
  2640. }
  2641. if ((SendIocInit(ioc, sleepFlag)) != 0) {
  2642. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
  2643. ioc->name));
  2644. return -EFAULT;
  2645. }
  2646. ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
  2647. ioc->name));
  2648. return 0;
  2649. }
  2650. if (sleepFlag == CAN_SLEEP) {
  2651. msleep_interruptible (10);
  2652. } else {
  2653. mdelay (10);
  2654. }
  2655. }
  2656. ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
  2657. ioc->name, ioc_state));
  2658. return -EFAULT;
  2659. }
  2660. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2661. /*
  2662. * KickStart - Perform hard reset of MPT adapter.
  2663. * @ioc: Pointer to MPT_ADAPTER structure
  2664. * @force: Force hard reset
  2665. * @sleepFlag: Specifies whether the process can sleep
  2666. *
  2667. * This routine places MPT adapter in diagnostic mode via the
  2668. * WriteSequence register, and then performs a hard reset of adapter
  2669. * via the Diagnostic register.
  2670. *
  2671. * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
  2672. * or NO_SLEEP (interrupt thread, use mdelay)
  2673. * force - 1 if doorbell active, board fault state
  2674. * board operational, IOC_RECOVERY or
  2675. * IOC_BRINGUP and there is an alt_ioc.
  2676. * 0 else
  2677. *
  2678. * Returns:
  2679. * 1 - hard reset, READY
  2680. * 0 - no reset due to History bit, READY
  2681. * -1 - no reset due to History bit but not READY
  2682. * OR reset but failed to come READY
  2683. * -2 - no reset, could not enter DIAG mode
  2684. * -3 - reset but bad FW bit
  2685. */
  2686. static int
  2687. KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
  2688. {
  2689. int hard_reset_done = 0;
  2690. u32 ioc_state=0;
  2691. int cnt,cntdn;
  2692. dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
  2693. if (ioc->bus_type == SCSI) {
  2694. /* Always issue a Msg Unit Reset first. This will clear some
  2695. * SCSI bus hang conditions.
  2696. */
  2697. SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
  2698. if (sleepFlag == CAN_SLEEP) {
  2699. msleep_interruptible (1000);
  2700. } else {
  2701. mdelay (1000);
  2702. }
  2703. }
  2704. hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
  2705. if (hard_reset_done < 0)
  2706. return hard_reset_done;
  2707. dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n",
  2708. ioc->name));
  2709. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */
  2710. for (cnt=0; cnt<cntdn; cnt++) {
  2711. ioc_state = mpt_GetIocState(ioc, 1);
  2712. if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
  2713. dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n",
  2714. ioc->name, cnt));
  2715. return hard_reset_done;
  2716. }
  2717. if (sleepFlag == CAN_SLEEP) {
  2718. msleep_interruptible (10);
  2719. } else {
  2720. mdelay (10);
  2721. }
  2722. }
  2723. printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
  2724. ioc->name, ioc_state);
  2725. return -1;
  2726. }
  2727. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2728. /*
  2729. * mpt_diag_reset - Perform hard reset of the adapter.
  2730. * @ioc: Pointer to MPT_ADAPTER structure
  2731. * @ignore: Set if to honor and clear to ignore
  2732. * the reset history bit
  2733. * @sleepflag: CAN_SLEEP if called in a non-interrupt thread,
  2734. * else set to NO_SLEEP (use mdelay instead)
  2735. *
  2736. * This routine places the adapter in diagnostic mode via the
  2737. * WriteSequence register and then performs a hard reset of adapter
  2738. * via the Diagnostic register. Adapter should be in ready state
  2739. * upon successful completion.
  2740. *
  2741. * Returns: 1 hard reset successful
  2742. * 0 no reset performed because reset history bit set
  2743. * -2 enabling diagnostic mode failed
  2744. * -3 diagnostic reset failed
  2745. */
  2746. static int
  2747. mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
  2748. {
  2749. u32 diag0val;
  2750. u32 doorbell;
  2751. int hard_reset_done = 0;
  2752. int count = 0;
  2753. #ifdef MPT_DEBUG
  2754. u32 diag1val = 0;
  2755. #endif
  2756. /* Clear any existing interrupts */
  2757. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  2758. /* Use "Diagnostic reset" method! (only thing available!) */
  2759. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2760. #ifdef MPT_DEBUG
  2761. if (ioc->alt_ioc)
  2762. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2763. dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n",
  2764. ioc->name, diag0val, diag1val));
  2765. #endif
  2766. /* Do the reset if we are told to ignore the reset history
  2767. * or if the reset history is 0
  2768. */
  2769. if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
  2770. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2771. /* Write magic sequence to WriteSequence register
  2772. * Loop until in diagnostic mode
  2773. */
  2774. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2775. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2776. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2777. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2778. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2779. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2780. /* wait 100 msec */
  2781. if (sleepFlag == CAN_SLEEP) {
  2782. msleep_interruptible (100);
  2783. } else {
  2784. mdelay (100);
  2785. }
  2786. count++;
  2787. if (count > 20) {
  2788. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  2789. ioc->name, diag0val);
  2790. return -2;
  2791. }
  2792. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2793. dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
  2794. ioc->name, diag0val));
  2795. }
  2796. #ifdef MPT_DEBUG
  2797. if (ioc->alt_ioc)
  2798. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2799. dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n",
  2800. ioc->name, diag0val, diag1val));
  2801. #endif
  2802. /*
  2803. * Disable the ARM (Bug fix)
  2804. *
  2805. */
  2806. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
  2807. mdelay(1);
  2808. /*
  2809. * Now hit the reset bit in the Diagnostic register
  2810. * (THE BIG HAMMER!) (Clears DRWE bit).
  2811. */
  2812. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
  2813. hard_reset_done = 1;
  2814. dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n",
  2815. ioc->name));
  2816. /*
  2817. * Call each currently registered protocol IOC reset handler
  2818. * with pre-reset indication.
  2819. * NOTE: If we're doing _IOC_BRINGUP, there can be no
  2820. * MptResetHandlers[] registered yet.
  2821. */
  2822. {
  2823. int ii;
  2824. int r = 0;
  2825. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  2826. if (MptResetHandlers[ii]) {
  2827. dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
  2828. ioc->name, ii));
  2829. r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_PRE_RESET);
  2830. if (ioc->alt_ioc) {
  2831. dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
  2832. ioc->name, ioc->alt_ioc->name, ii));
  2833. r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_PRE_RESET);
  2834. }
  2835. }
  2836. }
  2837. /* FIXME? Examine results here? */
  2838. }
  2839. if (ioc->cached_fw) {
  2840. /* If the DownloadBoot operation fails, the
  2841. * IOC will be left unusable. This is a fatal error
  2842. * case. _diag_reset will return < 0
  2843. */
  2844. for (count = 0; count < 30; count ++) {
  2845. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2846. if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
  2847. break;
  2848. }
  2849. /* wait 1 sec */
  2850. if (sleepFlag == CAN_SLEEP) {
  2851. msleep_interruptible (1000);
  2852. } else {
  2853. mdelay (1000);
  2854. }
  2855. }
  2856. if ((count = mpt_downloadboot(ioc,
  2857. (MpiFwHeader_t *)ioc->cached_fw, sleepFlag)) < 0) {
  2858. printk(KERN_WARNING MYNAM
  2859. ": firmware downloadboot failure (%d)!\n", count);
  2860. }
  2861. } else {
  2862. /* Wait for FW to reload and for board
  2863. * to go to the READY state.
  2864. * Maximum wait is 60 seconds.
  2865. * If fail, no error will check again
  2866. * with calling program.
  2867. */
  2868. for (count = 0; count < 60; count ++) {
  2869. doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
  2870. doorbell &= MPI_IOC_STATE_MASK;
  2871. if (doorbell == MPI_IOC_STATE_READY) {
  2872. break;
  2873. }
  2874. /* wait 1 sec */
  2875. if (sleepFlag == CAN_SLEEP) {
  2876. msleep_interruptible (1000);
  2877. } else {
  2878. mdelay (1000);
  2879. }
  2880. }
  2881. }
  2882. }
  2883. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2884. #ifdef MPT_DEBUG
  2885. if (ioc->alt_ioc)
  2886. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2887. dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n",
  2888. ioc->name, diag0val, diag1val));
  2889. #endif
  2890. /* Clear RESET_HISTORY bit! Place board in the
  2891. * diagnostic mode to update the diag register.
  2892. */
  2893. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2894. count = 0;
  2895. while ((diag0val & MPI_DIAG_DRWE) == 0) {
  2896. /* Write magic sequence to WriteSequence register
  2897. * Loop until in diagnostic mode
  2898. */
  2899. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
  2900. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
  2901. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
  2902. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
  2903. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
  2904. CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
  2905. /* wait 100 msec */
  2906. if (sleepFlag == CAN_SLEEP) {
  2907. msleep_interruptible (100);
  2908. } else {
  2909. mdelay (100);
  2910. }
  2911. count++;
  2912. if (count > 20) {
  2913. printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
  2914. ioc->name, diag0val);
  2915. break;
  2916. }
  2917. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2918. }
  2919. diag0val &= ~MPI_DIAG_RESET_HISTORY;
  2920. CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
  2921. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2922. if (diag0val & MPI_DIAG_RESET_HISTORY) {
  2923. printk(MYIOC_s_WARN_FMT "ResetHistory bit failed to clear!\n",
  2924. ioc->name);
  2925. }
  2926. /* Disable Diagnostic Mode
  2927. */
  2928. CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
  2929. /* Check FW reload status flags.
  2930. */
  2931. diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
  2932. if (diag0val & (MPI_DIAG_FLASH_BAD_SIG | MPI_DIAG_RESET_ADAPTER | MPI_DIAG_DISABLE_ARM)) {
  2933. printk(MYIOC_s_ERR_FMT "Diagnostic reset FAILED! (%02xh)\n",
  2934. ioc->name, diag0val);
  2935. return -3;
  2936. }
  2937. #ifdef MPT_DEBUG
  2938. if (ioc->alt_ioc)
  2939. diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
  2940. dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n",
  2941. ioc->name, diag0val, diag1val));
  2942. #endif
  2943. /*
  2944. * Reset flag that says we've enabled event notification
  2945. */
  2946. ioc->facts.EventState = 0;
  2947. if (ioc->alt_ioc)
  2948. ioc->alt_ioc->facts.EventState = 0;
  2949. return hard_reset_done;
  2950. }
  2951. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  2952. /*
  2953. * SendIocReset - Send IOCReset request to MPT adapter.
  2954. * @ioc: Pointer to MPT_ADAPTER structure
  2955. * @reset_type: reset type, expected values are
  2956. * %MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET or %MPI_FUNCTION_IO_UNIT_RESET
  2957. *
  2958. * Send IOCReset request to the MPT adapter.
  2959. *
  2960. * Returns 0 for success, non-zero for failure.
  2961. */
  2962. static int
  2963. SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
  2964. {
  2965. int r;
  2966. u32 state;
  2967. int cntdn, count;
  2968. drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n",
  2969. ioc->name, reset_type));
  2970. CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
  2971. if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  2972. return r;
  2973. /* FW ACK'd request, wait for READY state
  2974. */
  2975. count = 0;
  2976. cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 15; /* 15 seconds */
  2977. while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
  2978. cntdn--;
  2979. count++;
  2980. if (!cntdn) {
  2981. if (sleepFlag != CAN_SLEEP)
  2982. count *= 10;
  2983. printk(KERN_ERR MYNAM ": %s: ERROR - Wait IOC_READY state timeout(%d)!\n",
  2984. ioc->name, (int)((count+5)/HZ));
  2985. return -ETIME;
  2986. }
  2987. if (sleepFlag == CAN_SLEEP) {
  2988. msleep_interruptible(1);
  2989. } else {
  2990. mdelay (1); /* 1 msec delay */
  2991. }
  2992. }
  2993. /* TODO!
  2994. * Cleanup all event stuff for this IOC; re-issue EventNotification
  2995. * request if needed.
  2996. */
  2997. if (ioc->facts.Function)
  2998. ioc->facts.EventState = 0;
  2999. return 0;
  3000. }
  3001. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3002. /*
  3003. * initChainBuffers - Allocate memory for and initialize
  3004. * chain buffers, chain buffer control arrays and spinlock.
  3005. * @hd: Pointer to MPT_SCSI_HOST structure
  3006. * @init: If set, initialize the spin lock.
  3007. */
  3008. static int
  3009. initChainBuffers(MPT_ADAPTER *ioc)
  3010. {
  3011. u8 *mem;
  3012. int sz, ii, num_chain;
  3013. int scale, num_sge, numSGE;
  3014. /* ReqToChain size must equal the req_depth
  3015. * index = req_idx
  3016. */
  3017. if (ioc->ReqToChain == NULL) {
  3018. sz = ioc->req_depth * sizeof(int);
  3019. mem = kmalloc(sz, GFP_ATOMIC);
  3020. if (mem == NULL)
  3021. return -1;
  3022. ioc->ReqToChain = (int *) mem;
  3023. dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n",
  3024. ioc->name, mem, sz));
  3025. mem = kmalloc(sz, GFP_ATOMIC);
  3026. if (mem == NULL)
  3027. return -1;
  3028. ioc->RequestNB = (int *) mem;
  3029. dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n",
  3030. ioc->name, mem, sz));
  3031. }
  3032. for (ii = 0; ii < ioc->req_depth; ii++) {
  3033. ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
  3034. }
  3035. /* ChainToChain size must equal the total number
  3036. * of chain buffers to be allocated.
  3037. * index = chain_idx
  3038. *
  3039. * Calculate the number of chain buffers needed(plus 1) per I/O
  3040. * then multiply the the maximum number of simultaneous cmds
  3041. *
  3042. * num_sge = num sge in request frame + last chain buffer
  3043. * scale = num sge per chain buffer if no chain element
  3044. */
  3045. scale = ioc->req_sz/(sizeof(dma_addr_t) + sizeof(u32));
  3046. if (sizeof(dma_addr_t) == sizeof(u64))
  3047. num_sge = scale + (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3048. else
  3049. num_sge = 1+ scale + (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3050. if (sizeof(dma_addr_t) == sizeof(u64)) {
  3051. numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3052. (ioc->req_sz - 60) / (sizeof(dma_addr_t) + sizeof(u32));
  3053. } else {
  3054. numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
  3055. (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32));
  3056. }
  3057. dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n",
  3058. ioc->name, num_sge, numSGE));
  3059. if ( numSGE > MPT_SCSI_SG_DEPTH )
  3060. numSGE = MPT_SCSI_SG_DEPTH;
  3061. num_chain = 1;
  3062. while (numSGE - num_sge > 0) {
  3063. num_chain++;
  3064. num_sge += (scale - 1);
  3065. }
  3066. num_chain++;
  3067. dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n",
  3068. ioc->name, numSGE, num_sge, num_chain));
  3069. if (ioc->bus_type == SCSI)
  3070. num_chain *= MPT_SCSI_CAN_QUEUE;
  3071. else
  3072. num_chain *= MPT_FC_CAN_QUEUE;
  3073. ioc->num_chain = num_chain;
  3074. sz = num_chain * sizeof(int);
  3075. if (ioc->ChainToChain == NULL) {
  3076. mem = kmalloc(sz, GFP_ATOMIC);
  3077. if (mem == NULL)
  3078. return -1;
  3079. ioc->ChainToChain = (int *) mem;
  3080. dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n",
  3081. ioc->name, mem, sz));
  3082. } else {
  3083. mem = (u8 *) ioc->ChainToChain;
  3084. }
  3085. memset(mem, 0xFF, sz);
  3086. return num_chain;
  3087. }
  3088. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3089. /*
  3090. * PrimeIocFifos - Initialize IOC request and reply FIFOs.
  3091. * @ioc: Pointer to MPT_ADAPTER structure
  3092. *
  3093. * This routine allocates memory for the MPT reply and request frame
  3094. * pools (if necessary), and primes the IOC reply FIFO with
  3095. * reply frames.
  3096. *
  3097. * Returns 0 for success, non-zero for failure.
  3098. */
  3099. static int
  3100. PrimeIocFifos(MPT_ADAPTER *ioc)
  3101. {
  3102. MPT_FRAME_HDR *mf;
  3103. unsigned long flags;
  3104. dma_addr_t alloc_dma;
  3105. u8 *mem;
  3106. int i, reply_sz, sz, total_size, num_chain;
  3107. /* Prime reply FIFO... */
  3108. if (ioc->reply_frames == NULL) {
  3109. if ( (num_chain = initChainBuffers(ioc)) < 0)
  3110. return -1;
  3111. total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
  3112. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
  3113. ioc->name, ioc->reply_sz, ioc->reply_depth));
  3114. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n",
  3115. ioc->name, reply_sz, reply_sz));
  3116. sz = (ioc->req_sz * ioc->req_depth);
  3117. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n",
  3118. ioc->name, ioc->req_sz, ioc->req_depth));
  3119. dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n",
  3120. ioc->name, sz, sz));
  3121. total_size += sz;
  3122. sz = num_chain * ioc->req_sz; /* chain buffer pool size */
  3123. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n",
  3124. ioc->name, ioc->req_sz, num_chain));
  3125. dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
  3126. ioc->name, sz, sz, num_chain));
  3127. total_size += sz;
  3128. mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
  3129. if (mem == NULL) {
  3130. printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n",
  3131. ioc->name);
  3132. goto out_fail;
  3133. }
  3134. dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n",
  3135. ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
  3136. memset(mem, 0, total_size);
  3137. ioc->alloc_total += total_size;
  3138. ioc->alloc = mem;
  3139. ioc->alloc_dma = alloc_dma;
  3140. ioc->alloc_sz = total_size;
  3141. ioc->reply_frames = (MPT_FRAME_HDR *) mem;
  3142. ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3143. dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n",
  3144. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3145. alloc_dma += reply_sz;
  3146. mem += reply_sz;
  3147. /* Request FIFO - WE manage this! */
  3148. ioc->req_frames = (MPT_FRAME_HDR *) mem;
  3149. ioc->req_frames_dma = alloc_dma;
  3150. dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n",
  3151. ioc->name, mem, (void *)(ulong)alloc_dma));
  3152. ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
  3153. #if defined(CONFIG_MTRR) && 0
  3154. /*
  3155. * Enable Write Combining MTRR for IOC's memory region.
  3156. * (at least as much as we can; "size and base must be
  3157. * multiples of 4 kiB"
  3158. */
  3159. ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma,
  3160. sz,
  3161. MTRR_TYPE_WRCOMB, 1);
  3162. dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n",
  3163. ioc->name, ioc->req_frames_dma, sz));
  3164. #endif
  3165. for (i = 0; i < ioc->req_depth; i++) {
  3166. alloc_dma += ioc->req_sz;
  3167. mem += ioc->req_sz;
  3168. }
  3169. ioc->ChainBuffer = mem;
  3170. ioc->ChainBufferDMA = alloc_dma;
  3171. dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n",
  3172. ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
  3173. /* Initialize the free chain Q.
  3174. */
  3175. INIT_LIST_HEAD(&ioc->FreeChainQ);
  3176. /* Post the chain buffers to the FreeChainQ.
  3177. */
  3178. mem = (u8 *)ioc->ChainBuffer;
  3179. for (i=0; i < num_chain; i++) {
  3180. mf = (MPT_FRAME_HDR *) mem;
  3181. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
  3182. mem += ioc->req_sz;
  3183. }
  3184. /* Initialize Request frames linked list
  3185. */
  3186. alloc_dma = ioc->req_frames_dma;
  3187. mem = (u8 *) ioc->req_frames;
  3188. spin_lock_irqsave(&ioc->FreeQlock, flags);
  3189. INIT_LIST_HEAD(&ioc->FreeQ);
  3190. for (i = 0; i < ioc->req_depth; i++) {
  3191. mf = (MPT_FRAME_HDR *) mem;
  3192. /* Queue REQUESTs *internally*! */
  3193. list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
  3194. mem += ioc->req_sz;
  3195. }
  3196. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  3197. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3198. ioc->sense_buf_pool =
  3199. pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
  3200. if (ioc->sense_buf_pool == NULL) {
  3201. printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n",
  3202. ioc->name);
  3203. goto out_fail;
  3204. }
  3205. ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
  3206. ioc->alloc_total += sz;
  3207. dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n",
  3208. ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
  3209. }
  3210. /* Post Reply frames to FIFO
  3211. */
  3212. alloc_dma = ioc->alloc_dma;
  3213. dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n",
  3214. ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
  3215. for (i = 0; i < ioc->reply_depth; i++) {
  3216. /* Write each address to the IOC! */
  3217. CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
  3218. alloc_dma += ioc->reply_sz;
  3219. }
  3220. return 0;
  3221. out_fail:
  3222. if (ioc->alloc != NULL) {
  3223. sz = ioc->alloc_sz;
  3224. pci_free_consistent(ioc->pcidev,
  3225. sz,
  3226. ioc->alloc, ioc->alloc_dma);
  3227. ioc->reply_frames = NULL;
  3228. ioc->req_frames = NULL;
  3229. ioc->alloc_total -= sz;
  3230. }
  3231. if (ioc->sense_buf_pool != NULL) {
  3232. sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
  3233. pci_free_consistent(ioc->pcidev,
  3234. sz,
  3235. ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
  3236. ioc->sense_buf_pool = NULL;
  3237. }
  3238. return -1;
  3239. }
  3240. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3241. /**
  3242. * mpt_handshake_req_reply_wait - Send MPT request to and receive reply
  3243. * from IOC via doorbell handshake method.
  3244. * @ioc: Pointer to MPT_ADAPTER structure
  3245. * @reqBytes: Size of the request in bytes
  3246. * @req: Pointer to MPT request frame
  3247. * @replyBytes: Expected size of the reply in bytes
  3248. * @u16reply: Pointer to area where reply should be written
  3249. * @maxwait: Max wait time for a reply (in seconds)
  3250. * @sleepFlag: Specifies whether the process can sleep
  3251. *
  3252. * NOTES: It is the callers responsibility to byte-swap fields in the
  3253. * request which are greater than 1 byte in size. It is also the
  3254. * callers responsibility to byte-swap response fields which are
  3255. * greater than 1 byte in size.
  3256. *
  3257. * Returns 0 for success, non-zero for failure.
  3258. */
  3259. static int
  3260. mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
  3261. int replyBytes, u16 *u16reply, int maxwait, int sleepFlag)
  3262. {
  3263. MPIDefaultReply_t *mptReply;
  3264. int failcnt = 0;
  3265. int t;
  3266. /*
  3267. * Get ready to cache a handshake reply
  3268. */
  3269. ioc->hs_reply_idx = 0;
  3270. mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3271. mptReply->MsgLength = 0;
  3272. /*
  3273. * Make sure there are no doorbells (WRITE 0 to IntStatus reg),
  3274. * then tell IOC that we want to handshake a request of N words.
  3275. * (WRITE u32val to Doorbell reg).
  3276. */
  3277. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3278. CHIPREG_WRITE32(&ioc->chip->Doorbell,
  3279. ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
  3280. ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
  3281. /*
  3282. * Wait for IOC's doorbell handshake int
  3283. */
  3284. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3285. failcnt++;
  3286. dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
  3287. ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3288. /* Read doorbell and check for active bit */
  3289. if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
  3290. return -1;
  3291. /*
  3292. * Clear doorbell int (WRITE 0 to IntStatus reg),
  3293. * then wait for IOC to ACKnowledge that it's ready for
  3294. * our handshake request.
  3295. */
  3296. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3297. if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3298. failcnt++;
  3299. if (!failcnt) {
  3300. int ii;
  3301. u8 *req_as_bytes = (u8 *) req;
  3302. /*
  3303. * Stuff request words via doorbell handshake,
  3304. * with ACK from IOC for each.
  3305. */
  3306. for (ii = 0; !failcnt && ii < reqBytes/4; ii++) {
  3307. u32 word = ((req_as_bytes[(ii*4) + 0] << 0) |
  3308. (req_as_bytes[(ii*4) + 1] << 8) |
  3309. (req_as_bytes[(ii*4) + 2] << 16) |
  3310. (req_as_bytes[(ii*4) + 3] << 24));
  3311. CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
  3312. if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
  3313. failcnt++;
  3314. }
  3315. dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req));
  3316. DBG_DUMP_REQUEST_FRAME_HDR(req)
  3317. dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n",
  3318. ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
  3319. /*
  3320. * Wait for completion of doorbell handshake reply from the IOC
  3321. */
  3322. if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
  3323. failcnt++;
  3324. dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n",
  3325. ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
  3326. /*
  3327. * Copy out the cached reply...
  3328. */
  3329. for (ii=0; ii < min(replyBytes/2,mptReply->MsgLength*2); ii++)
  3330. u16reply[ii] = ioc->hs_reply[ii];
  3331. } else {
  3332. return -99;
  3333. }
  3334. return -failcnt;
  3335. }
  3336. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3337. /*
  3338. * WaitForDoorbellAck - Wait for IOC to clear the IOP_DOORBELL_STATUS bit
  3339. * in it's IntStatus register.
  3340. * @ioc: Pointer to MPT_ADAPTER structure
  3341. * @howlong: How long to wait (in seconds)
  3342. * @sleepFlag: Specifies whether the process can sleep
  3343. *
  3344. * This routine waits (up to ~2 seconds max) for IOC doorbell
  3345. * handshake ACKnowledge.
  3346. *
  3347. * Returns a negative value on failure, else wait loop count.
  3348. */
  3349. static int
  3350. WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3351. {
  3352. int cntdn;
  3353. int count = 0;
  3354. u32 intstat=0;
  3355. cntdn = 1000 * howlong;
  3356. if (sleepFlag == CAN_SLEEP) {
  3357. while (--cntdn) {
  3358. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3359. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3360. break;
  3361. msleep_interruptible (1);
  3362. count++;
  3363. }
  3364. } else {
  3365. while (--cntdn) {
  3366. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3367. if (! (intstat & MPI_HIS_IOP_DOORBELL_STATUS))
  3368. break;
  3369. mdelay (1);
  3370. count++;
  3371. }
  3372. }
  3373. if (cntdn) {
  3374. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n",
  3375. ioc->name, count));
  3376. return count;
  3377. }
  3378. printk(MYIOC_s_ERR_FMT "Doorbell ACK timeout (count=%d), IntStatus=%x!\n",
  3379. ioc->name, count, intstat);
  3380. return -1;
  3381. }
  3382. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3383. /*
  3384. * WaitForDoorbellInt - Wait for IOC to set the HIS_DOORBELL_INTERRUPT bit
  3385. * in it's IntStatus register.
  3386. * @ioc: Pointer to MPT_ADAPTER structure
  3387. * @howlong: How long to wait (in seconds)
  3388. * @sleepFlag: Specifies whether the process can sleep
  3389. *
  3390. * This routine waits (up to ~2 seconds max) for IOC doorbell interrupt.
  3391. *
  3392. * Returns a negative value on failure, else wait loop count.
  3393. */
  3394. static int
  3395. WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3396. {
  3397. int cntdn;
  3398. int count = 0;
  3399. u32 intstat=0;
  3400. cntdn = 1000 * howlong;
  3401. if (sleepFlag == CAN_SLEEP) {
  3402. while (--cntdn) {
  3403. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3404. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3405. break;
  3406. msleep_interruptible(1);
  3407. count++;
  3408. }
  3409. } else {
  3410. while (--cntdn) {
  3411. intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
  3412. if (intstat & MPI_HIS_DOORBELL_INTERRUPT)
  3413. break;
  3414. mdelay(1);
  3415. count++;
  3416. }
  3417. }
  3418. if (cntdn) {
  3419. dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
  3420. ioc->name, count, howlong));
  3421. return count;
  3422. }
  3423. printk(MYIOC_s_ERR_FMT "Doorbell INT timeout (count=%d), IntStatus=%x!\n",
  3424. ioc->name, count, intstat);
  3425. return -1;
  3426. }
  3427. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3428. /*
  3429. * WaitForDoorbellReply - Wait for and capture a IOC handshake reply.
  3430. * @ioc: Pointer to MPT_ADAPTER structure
  3431. * @howlong: How long to wait (in seconds)
  3432. * @sleepFlag: Specifies whether the process can sleep
  3433. *
  3434. * This routine polls the IOC for a handshake reply, 16 bits at a time.
  3435. * Reply is cached to IOC private area large enough to hold a maximum
  3436. * of 128 bytes of reply data.
  3437. *
  3438. * Returns a negative value on failure, else size of reply in WORDS.
  3439. */
  3440. static int
  3441. WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
  3442. {
  3443. int u16cnt = 0;
  3444. int failcnt = 0;
  3445. int t;
  3446. u16 *hs_reply = ioc->hs_reply;
  3447. volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
  3448. u16 hword;
  3449. hs_reply[0] = hs_reply[1] = hs_reply[7] = 0;
  3450. /*
  3451. * Get first two u16's so we can look at IOC's intended reply MsgLength
  3452. */
  3453. u16cnt=0;
  3454. if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
  3455. failcnt++;
  3456. } else {
  3457. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3458. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3459. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3460. failcnt++;
  3461. else {
  3462. hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3463. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3464. }
  3465. }
  3466. dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
  3467. ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
  3468. failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
  3469. /*
  3470. * If no error (and IOC said MsgLength is > 0), piece together
  3471. * reply 16 bits at a time.
  3472. */
  3473. for (u16cnt=2; !failcnt && u16cnt < (2 * mptReply->MsgLength); u16cnt++) {
  3474. if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3475. failcnt++;
  3476. hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
  3477. /* don't overflow our IOC hs_reply[] buffer! */
  3478. if (u16cnt < sizeof(ioc->hs_reply) / sizeof(ioc->hs_reply[0]))
  3479. hs_reply[u16cnt] = hword;
  3480. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3481. }
  3482. if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
  3483. failcnt++;
  3484. CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
  3485. if (failcnt) {
  3486. printk(MYIOC_s_ERR_FMT "Handshake reply failure!\n",
  3487. ioc->name);
  3488. return -failcnt;
  3489. }
  3490. #if 0
  3491. else if (u16cnt != (2 * mptReply->MsgLength)) {
  3492. return -101;
  3493. }
  3494. else if ((mptReply->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
  3495. return -102;
  3496. }
  3497. #endif
  3498. dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name));
  3499. DBG_DUMP_REPLY_FRAME(mptReply)
  3500. dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
  3501. ioc->name, t, u16cnt/2));
  3502. return u16cnt/2;
  3503. }
  3504. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3505. /*
  3506. * GetLanConfigPages - Fetch LANConfig pages.
  3507. * @ioc: Pointer to MPT_ADAPTER structure
  3508. *
  3509. * Return: 0 for success
  3510. * -ENOMEM if no memory available
  3511. * -EPERM if not allowed due to ISR context
  3512. * -EAGAIN if no msg frames currently available
  3513. * -EFAULT for non-successful reply or no reply (timeout)
  3514. */
  3515. static int
  3516. GetLanConfigPages(MPT_ADAPTER *ioc)
  3517. {
  3518. ConfigPageHeader_t hdr;
  3519. CONFIGPARMS cfg;
  3520. LANPage0_t *ppage0_alloc;
  3521. dma_addr_t page0_dma;
  3522. LANPage1_t *ppage1_alloc;
  3523. dma_addr_t page1_dma;
  3524. int rc = 0;
  3525. int data_sz;
  3526. int copy_sz;
  3527. /* Get LAN Page 0 header */
  3528. hdr.PageVersion = 0;
  3529. hdr.PageLength = 0;
  3530. hdr.PageNumber = 0;
  3531. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3532. cfg.cfghdr.hdr = &hdr;
  3533. cfg.physAddr = -1;
  3534. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3535. cfg.dir = 0;
  3536. cfg.pageAddr = 0;
  3537. cfg.timeout = 0;
  3538. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3539. return rc;
  3540. if (hdr.PageLength > 0) {
  3541. data_sz = hdr.PageLength * 4;
  3542. ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
  3543. rc = -ENOMEM;
  3544. if (ppage0_alloc) {
  3545. memset((u8 *)ppage0_alloc, 0, data_sz);
  3546. cfg.physAddr = page0_dma;
  3547. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3548. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3549. /* save the data */
  3550. copy_sz = min_t(int, sizeof(LANPage0_t), data_sz);
  3551. memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
  3552. }
  3553. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
  3554. /* FIXME!
  3555. * Normalize endianness of structure data,
  3556. * by byte-swapping all > 1 byte fields!
  3557. */
  3558. }
  3559. if (rc)
  3560. return rc;
  3561. }
  3562. /* Get LAN Page 1 header */
  3563. hdr.PageVersion = 0;
  3564. hdr.PageLength = 0;
  3565. hdr.PageNumber = 1;
  3566. hdr.PageType = MPI_CONFIG_PAGETYPE_LAN;
  3567. cfg.cfghdr.hdr = &hdr;
  3568. cfg.physAddr = -1;
  3569. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3570. cfg.dir = 0;
  3571. cfg.pageAddr = 0;
  3572. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3573. return rc;
  3574. if (hdr.PageLength == 0)
  3575. return 0;
  3576. data_sz = hdr.PageLength * 4;
  3577. rc = -ENOMEM;
  3578. ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
  3579. if (ppage1_alloc) {
  3580. memset((u8 *)ppage1_alloc, 0, data_sz);
  3581. cfg.physAddr = page1_dma;
  3582. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3583. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3584. /* save the data */
  3585. copy_sz = min_t(int, sizeof(LANPage1_t), data_sz);
  3586. memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
  3587. }
  3588. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
  3589. /* FIXME!
  3590. * Normalize endianness of structure data,
  3591. * by byte-swapping all > 1 byte fields!
  3592. */
  3593. }
  3594. return rc;
  3595. }
  3596. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3597. /*
  3598. * GetFcPortPage0 - Fetch FCPort config Page0.
  3599. * @ioc: Pointer to MPT_ADAPTER structure
  3600. * @portnum: IOC Port number
  3601. *
  3602. * Return: 0 for success
  3603. * -ENOMEM if no memory available
  3604. * -EPERM if not allowed due to ISR context
  3605. * -EAGAIN if no msg frames currently available
  3606. * -EFAULT for non-successful reply or no reply (timeout)
  3607. */
  3608. static int
  3609. GetFcPortPage0(MPT_ADAPTER *ioc, int portnum)
  3610. {
  3611. ConfigPageHeader_t hdr;
  3612. CONFIGPARMS cfg;
  3613. FCPortPage0_t *ppage0_alloc;
  3614. FCPortPage0_t *pp0dest;
  3615. dma_addr_t page0_dma;
  3616. int data_sz;
  3617. int copy_sz;
  3618. int rc;
  3619. /* Get FCPort Page 0 header */
  3620. hdr.PageVersion = 0;
  3621. hdr.PageLength = 0;
  3622. hdr.PageNumber = 0;
  3623. hdr.PageType = MPI_CONFIG_PAGETYPE_FC_PORT;
  3624. cfg.cfghdr.hdr = &hdr;
  3625. cfg.physAddr = -1;
  3626. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3627. cfg.dir = 0;
  3628. cfg.pageAddr = portnum;
  3629. cfg.timeout = 0;
  3630. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3631. return rc;
  3632. if (hdr.PageLength == 0)
  3633. return 0;
  3634. data_sz = hdr.PageLength * 4;
  3635. rc = -ENOMEM;
  3636. ppage0_alloc = (FCPortPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
  3637. if (ppage0_alloc) {
  3638. memset((u8 *)ppage0_alloc, 0, data_sz);
  3639. cfg.physAddr = page0_dma;
  3640. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3641. if ((rc = mpt_config(ioc, &cfg)) == 0) {
  3642. /* save the data */
  3643. pp0dest = &ioc->fc_port_page0[portnum];
  3644. copy_sz = min_t(int, sizeof(FCPortPage0_t), data_sz);
  3645. memcpy(pp0dest, ppage0_alloc, copy_sz);
  3646. /*
  3647. * Normalize endianness of structure data,
  3648. * by byte-swapping all > 1 byte fields!
  3649. */
  3650. pp0dest->Flags = le32_to_cpu(pp0dest->Flags);
  3651. pp0dest->PortIdentifier = le32_to_cpu(pp0dest->PortIdentifier);
  3652. pp0dest->WWNN.Low = le32_to_cpu(pp0dest->WWNN.Low);
  3653. pp0dest->WWNN.High = le32_to_cpu(pp0dest->WWNN.High);
  3654. pp0dest->WWPN.Low = le32_to_cpu(pp0dest->WWPN.Low);
  3655. pp0dest->WWPN.High = le32_to_cpu(pp0dest->WWPN.High);
  3656. pp0dest->SupportedServiceClass = le32_to_cpu(pp0dest->SupportedServiceClass);
  3657. pp0dest->SupportedSpeeds = le32_to_cpu(pp0dest->SupportedSpeeds);
  3658. pp0dest->CurrentSpeed = le32_to_cpu(pp0dest->CurrentSpeed);
  3659. pp0dest->MaxFrameSize = le32_to_cpu(pp0dest->MaxFrameSize);
  3660. pp0dest->FabricWWNN.Low = le32_to_cpu(pp0dest->FabricWWNN.Low);
  3661. pp0dest->FabricWWNN.High = le32_to_cpu(pp0dest->FabricWWNN.High);
  3662. pp0dest->FabricWWPN.Low = le32_to_cpu(pp0dest->FabricWWPN.Low);
  3663. pp0dest->FabricWWPN.High = le32_to_cpu(pp0dest->FabricWWPN.High);
  3664. pp0dest->DiscoveredPortsCount = le32_to_cpu(pp0dest->DiscoveredPortsCount);
  3665. pp0dest->MaxInitiators = le32_to_cpu(pp0dest->MaxInitiators);
  3666. }
  3667. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
  3668. }
  3669. return rc;
  3670. }
  3671. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3672. /*
  3673. * mptbase_sas_persist_operation - Perform operation on SAS Persitent Table
  3674. * @ioc: Pointer to MPT_ADAPTER structure
  3675. * @sas_address: 64bit SAS Address for operation.
  3676. * @target_id: specified target for operation
  3677. * @bus: specified bus for operation
  3678. * @persist_opcode: see below
  3679. *
  3680. * MPI_SAS_OP_CLEAR_NOT_PRESENT - Free all persist TargetID mappings for
  3681. * devices not currently present.
  3682. * MPI_SAS_OP_CLEAR_ALL_PERSISTENT - Clear al persist TargetID mappings
  3683. *
  3684. * NOTE: Don't use not this function during interrupt time.
  3685. *
  3686. * Returns: 0 for success, non-zero error
  3687. */
  3688. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3689. int
  3690. mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
  3691. {
  3692. SasIoUnitControlRequest_t *sasIoUnitCntrReq;
  3693. SasIoUnitControlReply_t *sasIoUnitCntrReply;
  3694. MPT_FRAME_HDR *mf = NULL;
  3695. MPIHeader_t *mpi_hdr;
  3696. /* insure garbage is not sent to fw */
  3697. switch(persist_opcode) {
  3698. case MPI_SAS_OP_CLEAR_NOT_PRESENT:
  3699. case MPI_SAS_OP_CLEAR_ALL_PERSISTENT:
  3700. break;
  3701. default:
  3702. return -1;
  3703. break;
  3704. }
  3705. printk("%s: persist_opcode=%x\n",__FUNCTION__, persist_opcode);
  3706. /* Get a MF for this command.
  3707. */
  3708. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  3709. printk("%s: no msg frames!\n",__FUNCTION__);
  3710. return -1;
  3711. }
  3712. mpi_hdr = (MPIHeader_t *) mf;
  3713. sasIoUnitCntrReq = (SasIoUnitControlRequest_t *)mf;
  3714. memset(sasIoUnitCntrReq,0,sizeof(SasIoUnitControlRequest_t));
  3715. sasIoUnitCntrReq->Function = MPI_FUNCTION_SAS_IO_UNIT_CONTROL;
  3716. sasIoUnitCntrReq->MsgContext = mpi_hdr->MsgContext;
  3717. sasIoUnitCntrReq->Operation = persist_opcode;
  3718. init_timer(&ioc->persist_timer);
  3719. ioc->persist_timer.data = (unsigned long) ioc;
  3720. ioc->persist_timer.function = mpt_timer_expired;
  3721. ioc->persist_timer.expires = jiffies + HZ*10 /* 10 sec */;
  3722. ioc->persist_wait_done=0;
  3723. add_timer(&ioc->persist_timer);
  3724. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  3725. wait_event(mpt_waitq, ioc->persist_wait_done);
  3726. sasIoUnitCntrReply =
  3727. (SasIoUnitControlReply_t *)ioc->persist_reply_frame;
  3728. if (le16_to_cpu(sasIoUnitCntrReply->IOCStatus) != MPI_IOCSTATUS_SUCCESS) {
  3729. printk("%s: IOCStatus=0x%X IOCLogInfo=0x%X\n",
  3730. __FUNCTION__,
  3731. sasIoUnitCntrReply->IOCStatus,
  3732. sasIoUnitCntrReply->IOCLogInfo);
  3733. return -1;
  3734. }
  3735. printk("%s: success\n",__FUNCTION__);
  3736. return 0;
  3737. }
  3738. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3739. /*
  3740. * GetIoUnitPage2 - Retrieve BIOS version and boot order information.
  3741. * @ioc: Pointer to MPT_ADAPTER structure
  3742. *
  3743. * Returns: 0 for success
  3744. * -ENOMEM if no memory available
  3745. * -EPERM if not allowed due to ISR context
  3746. * -EAGAIN if no msg frames currently available
  3747. * -EFAULT for non-successful reply or no reply (timeout)
  3748. */
  3749. static int
  3750. GetIoUnitPage2(MPT_ADAPTER *ioc)
  3751. {
  3752. ConfigPageHeader_t hdr;
  3753. CONFIGPARMS cfg;
  3754. IOUnitPage2_t *ppage_alloc;
  3755. dma_addr_t page_dma;
  3756. int data_sz;
  3757. int rc;
  3758. /* Get the page header */
  3759. hdr.PageVersion = 0;
  3760. hdr.PageLength = 0;
  3761. hdr.PageNumber = 2;
  3762. hdr.PageType = MPI_CONFIG_PAGETYPE_IO_UNIT;
  3763. cfg.cfghdr.hdr = &hdr;
  3764. cfg.physAddr = -1;
  3765. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3766. cfg.dir = 0;
  3767. cfg.pageAddr = 0;
  3768. cfg.timeout = 0;
  3769. if ((rc = mpt_config(ioc, &cfg)) != 0)
  3770. return rc;
  3771. if (hdr.PageLength == 0)
  3772. return 0;
  3773. /* Read the config page */
  3774. data_sz = hdr.PageLength * 4;
  3775. rc = -ENOMEM;
  3776. ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
  3777. if (ppage_alloc) {
  3778. memset((u8 *)ppage_alloc, 0, data_sz);
  3779. cfg.physAddr = page_dma;
  3780. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3781. /* If Good, save data */
  3782. if ((rc = mpt_config(ioc, &cfg)) == 0)
  3783. ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
  3784. pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
  3785. }
  3786. return rc;
  3787. }
  3788. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3789. /* mpt_GetScsiPortSettings - read SCSI Port Page 0 and 2
  3790. * @ioc: Pointer to a Adapter Strucutre
  3791. * @portnum: IOC port number
  3792. *
  3793. * Return: -EFAULT if read of config page header fails
  3794. * or if no nvram
  3795. * If read of SCSI Port Page 0 fails,
  3796. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3797. * Adapter settings: async, narrow
  3798. * Return 1
  3799. * If read of SCSI Port Page 2 fails,
  3800. * Adapter settings valid
  3801. * NVRAM = MPT_HOST_NVRAM_INVALID (0xFFFFFFFF)
  3802. * Return 1
  3803. * Else
  3804. * Both valid
  3805. * Return 0
  3806. * CHECK - what type of locking mechanisms should be used????
  3807. */
  3808. static int
  3809. mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
  3810. {
  3811. u8 *pbuf;
  3812. dma_addr_t buf_dma;
  3813. CONFIGPARMS cfg;
  3814. ConfigPageHeader_t header;
  3815. int ii;
  3816. int data, rc = 0;
  3817. /* Allocate memory
  3818. */
  3819. if (!ioc->spi_data.nvram) {
  3820. int sz;
  3821. u8 *mem;
  3822. sz = MPT_MAX_SCSI_DEVICES * sizeof(int);
  3823. mem = kmalloc(sz, GFP_ATOMIC);
  3824. if (mem == NULL)
  3825. return -EFAULT;
  3826. ioc->spi_data.nvram = (int *) mem;
  3827. dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
  3828. ioc->name, ioc->spi_data.nvram, sz));
  3829. }
  3830. /* Invalidate NVRAM information
  3831. */
  3832. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  3833. ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
  3834. }
  3835. /* Read SPP0 header, allocate memory, then read page.
  3836. */
  3837. header.PageVersion = 0;
  3838. header.PageLength = 0;
  3839. header.PageNumber = 0;
  3840. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  3841. cfg.cfghdr.hdr = &header;
  3842. cfg.physAddr = -1;
  3843. cfg.pageAddr = portnum;
  3844. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3845. cfg.dir = 0;
  3846. cfg.timeout = 0; /* use default */
  3847. if (mpt_config(ioc, &cfg) != 0)
  3848. return -EFAULT;
  3849. if (header.PageLength > 0) {
  3850. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  3851. if (pbuf) {
  3852. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  3853. cfg.physAddr = buf_dma;
  3854. if (mpt_config(ioc, &cfg) != 0) {
  3855. ioc->spi_data.maxBusWidth = MPT_NARROW;
  3856. ioc->spi_data.maxSyncOffset = 0;
  3857. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  3858. ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
  3859. rc = 1;
  3860. ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n",
  3861. ioc->name, ioc->spi_data.minSyncFactor));
  3862. } else {
  3863. /* Save the Port Page 0 data
  3864. */
  3865. SCSIPortPage0_t *pPP0 = (SCSIPortPage0_t *) pbuf;
  3866. pPP0->Capabilities = le32_to_cpu(pPP0->Capabilities);
  3867. pPP0->PhysicalInterface = le32_to_cpu(pPP0->PhysicalInterface);
  3868. if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) {
  3869. ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
  3870. ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n",
  3871. ioc->name, pPP0->Capabilities));
  3872. }
  3873. ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
  3874. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK;
  3875. if (data) {
  3876. ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
  3877. data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK;
  3878. ioc->spi_data.minSyncFactor = (u8) (data >> 8);
  3879. ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n",
  3880. ioc->name, ioc->spi_data.minSyncFactor));
  3881. } else {
  3882. ioc->spi_data.maxSyncOffset = 0;
  3883. ioc->spi_data.minSyncFactor = MPT_ASYNC;
  3884. }
  3885. ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
  3886. /* Update the minSyncFactor based on bus type.
  3887. */
  3888. if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
  3889. (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
  3890. if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
  3891. ioc->spi_data.minSyncFactor = MPT_ULTRA;
  3892. ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n",
  3893. ioc->name, ioc->spi_data.minSyncFactor));
  3894. }
  3895. }
  3896. }
  3897. if (pbuf) {
  3898. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  3899. }
  3900. }
  3901. }
  3902. /* SCSI Port Page 2 - Read the header then the page.
  3903. */
  3904. header.PageVersion = 0;
  3905. header.PageLength = 0;
  3906. header.PageNumber = 2;
  3907. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_PORT;
  3908. cfg.cfghdr.hdr = &header;
  3909. cfg.physAddr = -1;
  3910. cfg.pageAddr = portnum;
  3911. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3912. cfg.dir = 0;
  3913. if (mpt_config(ioc, &cfg) != 0)
  3914. return -EFAULT;
  3915. if (header.PageLength > 0) {
  3916. /* Allocate memory and read SCSI Port Page 2
  3917. */
  3918. pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
  3919. if (pbuf) {
  3920. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_NVRAM;
  3921. cfg.physAddr = buf_dma;
  3922. if (mpt_config(ioc, &cfg) != 0) {
  3923. /* Nvram data is left with INVALID mark
  3924. */
  3925. rc = 1;
  3926. } else {
  3927. SCSIPortPage2_t *pPP2 = (SCSIPortPage2_t *) pbuf;
  3928. MpiDeviceInfo_t *pdevice = NULL;
  3929. /* Save the Port Page 2 data
  3930. * (reformat into a 32bit quantity)
  3931. */
  3932. data = le32_to_cpu(pPP2->PortFlags) & MPI_SCSIPORTPAGE2_PORT_FLAGS_DV_MASK;
  3933. ioc->spi_data.PortFlags = data;
  3934. for (ii=0; ii < MPT_MAX_SCSI_DEVICES; ii++) {
  3935. pdevice = &pPP2->DeviceSettings[ii];
  3936. data = (le16_to_cpu(pdevice->DeviceFlags) << 16) |
  3937. (pdevice->SyncFactor << 8) | pdevice->Timeout;
  3938. ioc->spi_data.nvram[ii] = data;
  3939. }
  3940. }
  3941. pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
  3942. }
  3943. }
  3944. /* Update Adapter limits with those from NVRAM
  3945. * Comment: Don't need to do this. Target performance
  3946. * parameters will never exceed the adapters limits.
  3947. */
  3948. return rc;
  3949. }
  3950. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3951. /* mpt_readScsiDevicePageHeaders - save version and length of SDP1
  3952. * @ioc: Pointer to a Adapter Strucutre
  3953. * @portnum: IOC port number
  3954. *
  3955. * Return: -EFAULT if read of config page header fails
  3956. * or 0 if success.
  3957. */
  3958. static int
  3959. mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
  3960. {
  3961. CONFIGPARMS cfg;
  3962. ConfigPageHeader_t header;
  3963. /* Read the SCSI Device Page 1 header
  3964. */
  3965. header.PageVersion = 0;
  3966. header.PageLength = 0;
  3967. header.PageNumber = 1;
  3968. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  3969. cfg.cfghdr.hdr = &header;
  3970. cfg.physAddr = -1;
  3971. cfg.pageAddr = portnum;
  3972. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  3973. cfg.dir = 0;
  3974. cfg.timeout = 0;
  3975. if (mpt_config(ioc, &cfg) != 0)
  3976. return -EFAULT;
  3977. ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
  3978. ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
  3979. header.PageVersion = 0;
  3980. header.PageLength = 0;
  3981. header.PageNumber = 0;
  3982. header.PageType = MPI_CONFIG_PAGETYPE_SCSI_DEVICE;
  3983. if (mpt_config(ioc, &cfg) != 0)
  3984. return -EFAULT;
  3985. ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
  3986. ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
  3987. dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n",
  3988. ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
  3989. dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n",
  3990. ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
  3991. return 0;
  3992. }
  3993. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  3994. /**
  3995. * mpt_findImVolumes - Identify IDs of hidden disks and RAID Volumes
  3996. * @ioc: Pointer to a Adapter Strucutre
  3997. * @portnum: IOC port number
  3998. *
  3999. * Return:
  4000. * 0 on success
  4001. * -EFAULT if read of config page header fails or data pointer not NULL
  4002. * -ENOMEM if pci_alloc failed
  4003. */
  4004. int
  4005. mpt_findImVolumes(MPT_ADAPTER *ioc)
  4006. {
  4007. IOCPage2_t *pIoc2;
  4008. u8 *mem;
  4009. ConfigPageIoc2RaidVol_t *pIocRv;
  4010. dma_addr_t ioc2_dma;
  4011. CONFIGPARMS cfg;
  4012. ConfigPageHeader_t header;
  4013. int jj;
  4014. int rc = 0;
  4015. int iocpage2sz;
  4016. u8 nVols, nPhys;
  4017. u8 vid, vbus, vioc;
  4018. /* Read IOCP2 header then the page.
  4019. */
  4020. header.PageVersion = 0;
  4021. header.PageLength = 0;
  4022. header.PageNumber = 2;
  4023. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4024. cfg.cfghdr.hdr = &header;
  4025. cfg.physAddr = -1;
  4026. cfg.pageAddr = 0;
  4027. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4028. cfg.dir = 0;
  4029. cfg.timeout = 0;
  4030. if (mpt_config(ioc, &cfg) != 0)
  4031. return -EFAULT;
  4032. if (header.PageLength == 0)
  4033. return -EFAULT;
  4034. iocpage2sz = header.PageLength * 4;
  4035. pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
  4036. if (!pIoc2)
  4037. return -ENOMEM;
  4038. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4039. cfg.physAddr = ioc2_dma;
  4040. if (mpt_config(ioc, &cfg) != 0)
  4041. goto done_and_free;
  4042. if ( (mem = (u8 *)ioc->raid_data.pIocPg2) == NULL ) {
  4043. mem = kmalloc(iocpage2sz, GFP_ATOMIC);
  4044. if (mem) {
  4045. ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
  4046. } else {
  4047. goto done_and_free;
  4048. }
  4049. }
  4050. memcpy(mem, (u8 *)pIoc2, iocpage2sz);
  4051. /* Identify RAID Volume Id's */
  4052. nVols = pIoc2->NumActiveVolumes;
  4053. if ( nVols == 0) {
  4054. /* No RAID Volume.
  4055. */
  4056. goto done_and_free;
  4057. } else {
  4058. /* At least 1 RAID Volume
  4059. */
  4060. pIocRv = pIoc2->RaidVolume;
  4061. ioc->raid_data.isRaid = 0;
  4062. for (jj = 0; jj < nVols; jj++, pIocRv++) {
  4063. vid = pIocRv->VolumeID;
  4064. vbus = pIocRv->VolumeBus;
  4065. vioc = pIocRv->VolumeIOC;
  4066. /* find the match
  4067. */
  4068. if (vbus == 0) {
  4069. ioc->raid_data.isRaid |= (1 << vid);
  4070. } else {
  4071. /* Error! Always bus 0
  4072. */
  4073. }
  4074. }
  4075. }
  4076. /* Identify Hidden Physical Disk Id's */
  4077. nPhys = pIoc2->NumActivePhysDisks;
  4078. if (nPhys == 0) {
  4079. /* No physical disks.
  4080. */
  4081. } else {
  4082. mpt_read_ioc_pg_3(ioc);
  4083. }
  4084. done_and_free:
  4085. pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
  4086. return rc;
  4087. }
  4088. int
  4089. mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
  4090. {
  4091. IOCPage3_t *pIoc3;
  4092. u8 *mem;
  4093. CONFIGPARMS cfg;
  4094. ConfigPageHeader_t header;
  4095. dma_addr_t ioc3_dma;
  4096. int iocpage3sz = 0;
  4097. /* Free the old page
  4098. */
  4099. kfree(ioc->raid_data.pIocPg3);
  4100. ioc->raid_data.pIocPg3 = NULL;
  4101. /* There is at least one physical disk.
  4102. * Read and save IOC Page 3
  4103. */
  4104. header.PageVersion = 0;
  4105. header.PageLength = 0;
  4106. header.PageNumber = 3;
  4107. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4108. cfg.cfghdr.hdr = &header;
  4109. cfg.physAddr = -1;
  4110. cfg.pageAddr = 0;
  4111. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4112. cfg.dir = 0;
  4113. cfg.timeout = 0;
  4114. if (mpt_config(ioc, &cfg) != 0)
  4115. return 0;
  4116. if (header.PageLength == 0)
  4117. return 0;
  4118. /* Read Header good, alloc memory
  4119. */
  4120. iocpage3sz = header.PageLength * 4;
  4121. pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
  4122. if (!pIoc3)
  4123. return 0;
  4124. /* Read the Page and save the data
  4125. * into malloc'd memory.
  4126. */
  4127. cfg.physAddr = ioc3_dma;
  4128. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4129. if (mpt_config(ioc, &cfg) == 0) {
  4130. mem = kmalloc(iocpage3sz, GFP_ATOMIC);
  4131. if (mem) {
  4132. memcpy(mem, (u8 *)pIoc3, iocpage3sz);
  4133. ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
  4134. }
  4135. }
  4136. pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
  4137. return 0;
  4138. }
  4139. static void
  4140. mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
  4141. {
  4142. IOCPage4_t *pIoc4;
  4143. CONFIGPARMS cfg;
  4144. ConfigPageHeader_t header;
  4145. dma_addr_t ioc4_dma;
  4146. int iocpage4sz;
  4147. /* Read and save IOC Page 4
  4148. */
  4149. header.PageVersion = 0;
  4150. header.PageLength = 0;
  4151. header.PageNumber = 4;
  4152. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4153. cfg.cfghdr.hdr = &header;
  4154. cfg.physAddr = -1;
  4155. cfg.pageAddr = 0;
  4156. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4157. cfg.dir = 0;
  4158. cfg.timeout = 0;
  4159. if (mpt_config(ioc, &cfg) != 0)
  4160. return;
  4161. if (header.PageLength == 0)
  4162. return;
  4163. if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
  4164. iocpage4sz = (header.PageLength + 4) * 4; /* Allow 4 additional SEP's */
  4165. pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
  4166. if (!pIoc4)
  4167. return;
  4168. } else {
  4169. ioc4_dma = ioc->spi_data.IocPg4_dma;
  4170. iocpage4sz = ioc->spi_data.IocPg4Sz;
  4171. }
  4172. /* Read the Page into dma memory.
  4173. */
  4174. cfg.physAddr = ioc4_dma;
  4175. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4176. if (mpt_config(ioc, &cfg) == 0) {
  4177. ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
  4178. ioc->spi_data.IocPg4_dma = ioc4_dma;
  4179. ioc->spi_data.IocPg4Sz = iocpage4sz;
  4180. } else {
  4181. pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
  4182. ioc->spi_data.pIocPg4 = NULL;
  4183. }
  4184. }
  4185. static void
  4186. mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
  4187. {
  4188. IOCPage1_t *pIoc1;
  4189. CONFIGPARMS cfg;
  4190. ConfigPageHeader_t header;
  4191. dma_addr_t ioc1_dma;
  4192. int iocpage1sz = 0;
  4193. u32 tmp;
  4194. /* Check the Coalescing Timeout in IOC Page 1
  4195. */
  4196. header.PageVersion = 0;
  4197. header.PageLength = 0;
  4198. header.PageNumber = 1;
  4199. header.PageType = MPI_CONFIG_PAGETYPE_IOC;
  4200. cfg.cfghdr.hdr = &header;
  4201. cfg.physAddr = -1;
  4202. cfg.pageAddr = 0;
  4203. cfg.action = MPI_CONFIG_ACTION_PAGE_HEADER;
  4204. cfg.dir = 0;
  4205. cfg.timeout = 0;
  4206. if (mpt_config(ioc, &cfg) != 0)
  4207. return;
  4208. if (header.PageLength == 0)
  4209. return;
  4210. /* Read Header good, alloc memory
  4211. */
  4212. iocpage1sz = header.PageLength * 4;
  4213. pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
  4214. if (!pIoc1)
  4215. return;
  4216. /* Read the Page and check coalescing timeout
  4217. */
  4218. cfg.physAddr = ioc1_dma;
  4219. cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT;
  4220. if (mpt_config(ioc, &cfg) == 0) {
  4221. tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING;
  4222. if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) {
  4223. tmp = le32_to_cpu(pIoc1->CoalescingTimeout);
  4224. dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n",
  4225. ioc->name, tmp));
  4226. if (tmp > MPT_COALESCING_TIMEOUT) {
  4227. pIoc1->CoalescingTimeout = cpu_to_le32(MPT_COALESCING_TIMEOUT);
  4228. /* Write NVRAM and current
  4229. */
  4230. cfg.dir = 1;
  4231. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT;
  4232. if (mpt_config(ioc, &cfg) == 0) {
  4233. dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n",
  4234. ioc->name, MPT_COALESCING_TIMEOUT));
  4235. cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM;
  4236. if (mpt_config(ioc, &cfg) == 0) {
  4237. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n",
  4238. ioc->name, MPT_COALESCING_TIMEOUT));
  4239. } else {
  4240. dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n",
  4241. ioc->name));
  4242. }
  4243. } else {
  4244. dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n",
  4245. ioc->name));
  4246. }
  4247. }
  4248. } else {
  4249. dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
  4250. }
  4251. }
  4252. pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
  4253. return;
  4254. }
  4255. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4256. /*
  4257. * SendEventNotification - Send EventNotification (on or off) request
  4258. * to MPT adapter.
  4259. * @ioc: Pointer to MPT_ADAPTER structure
  4260. * @EvSwitch: Event switch flags
  4261. */
  4262. static int
  4263. SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch)
  4264. {
  4265. EventNotification_t *evnp;
  4266. evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc);
  4267. if (evnp == NULL) {
  4268. devtprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n",
  4269. ioc->name));
  4270. return 0;
  4271. }
  4272. memset(evnp, 0, sizeof(*evnp));
  4273. devtprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp));
  4274. evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
  4275. evnp->ChainOffset = 0;
  4276. evnp->MsgFlags = 0;
  4277. evnp->Switch = EvSwitch;
  4278. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)evnp);
  4279. return 0;
  4280. }
  4281. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4282. /**
  4283. * SendEventAck - Send EventAck request to MPT adapter.
  4284. * @ioc: Pointer to MPT_ADAPTER structure
  4285. * @evnp: Pointer to original EventNotification request
  4286. */
  4287. static int
  4288. SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
  4289. {
  4290. EventAck_t *pAck;
  4291. if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4292. printk(MYIOC_s_WARN_FMT "Unable to allocate event ACK "
  4293. "request frame for Event=%x EventContext=%x EventData=%x!\n",
  4294. ioc->name, evnp->Event, le32_to_cpu(evnp->EventContext),
  4295. le32_to_cpu(evnp->Data[0]));
  4296. return -1;
  4297. }
  4298. memset(pAck, 0, sizeof(*pAck));
  4299. dprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name));
  4300. pAck->Function = MPI_FUNCTION_EVENT_ACK;
  4301. pAck->ChainOffset = 0;
  4302. pAck->MsgFlags = 0;
  4303. pAck->Event = evnp->Event;
  4304. pAck->EventContext = evnp->EventContext;
  4305. mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
  4306. return 0;
  4307. }
  4308. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4309. /**
  4310. * mpt_config - Generic function to issue config message
  4311. * @ioc - Pointer to an adapter structure
  4312. * @cfg - Pointer to a configuration structure. Struct contains
  4313. * action, page address, direction, physical address
  4314. * and pointer to a configuration page header
  4315. * Page header is updated.
  4316. *
  4317. * Returns 0 for success
  4318. * -EPERM if not allowed due to ISR context
  4319. * -EAGAIN if no msg frames currently available
  4320. * -EFAULT for non-successful reply or no reply (timeout)
  4321. */
  4322. int
  4323. mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
  4324. {
  4325. Config_t *pReq;
  4326. ConfigExtendedPageHeader_t *pExtHdr = NULL;
  4327. MPT_FRAME_HDR *mf;
  4328. unsigned long flags;
  4329. int ii, rc;
  4330. int flagsLength;
  4331. int in_isr;
  4332. /* Prevent calling wait_event() (below), if caller happens
  4333. * to be in ISR context, because that is fatal!
  4334. */
  4335. in_isr = in_interrupt();
  4336. if (in_isr) {
  4337. dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
  4338. ioc->name));
  4339. return -EPERM;
  4340. }
  4341. /* Get and Populate a free Frame
  4342. */
  4343. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4344. dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n",
  4345. ioc->name));
  4346. return -EAGAIN;
  4347. }
  4348. pReq = (Config_t *)mf;
  4349. pReq->Action = pCfg->action;
  4350. pReq->Reserved = 0;
  4351. pReq->ChainOffset = 0;
  4352. pReq->Function = MPI_FUNCTION_CONFIG;
  4353. /* Assume page type is not extended and clear "reserved" fields. */
  4354. pReq->ExtPageLength = 0;
  4355. pReq->ExtPageType = 0;
  4356. pReq->MsgFlags = 0;
  4357. for (ii=0; ii < 8; ii++)
  4358. pReq->Reserved2[ii] = 0;
  4359. pReq->Header.PageVersion = pCfg->cfghdr.hdr->PageVersion;
  4360. pReq->Header.PageLength = pCfg->cfghdr.hdr->PageLength;
  4361. pReq->Header.PageNumber = pCfg->cfghdr.hdr->PageNumber;
  4362. pReq->Header.PageType = (pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
  4363. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4364. pExtHdr = (ConfigExtendedPageHeader_t *)pCfg->cfghdr.ehdr;
  4365. pReq->ExtPageLength = cpu_to_le16(pExtHdr->ExtPageLength);
  4366. pReq->ExtPageType = pExtHdr->ExtPageType;
  4367. pReq->Header.PageType = MPI_CONFIG_PAGETYPE_EXTENDED;
  4368. /* Page Length must be treated as a reserved field for the extended header. */
  4369. pReq->Header.PageLength = 0;
  4370. }
  4371. pReq->PageAddress = cpu_to_le32(pCfg->pageAddr);
  4372. /* Add a SGE to the config request.
  4373. */
  4374. if (pCfg->dir)
  4375. flagsLength = MPT_SGE_FLAGS_SSIMPLE_WRITE;
  4376. else
  4377. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ;
  4378. if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) {
  4379. flagsLength |= pExtHdr->ExtPageLength * 4;
  4380. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4381. ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action));
  4382. }
  4383. else {
  4384. flagsLength |= pCfg->cfghdr.hdr->PageLength * 4;
  4385. dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n",
  4386. ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action));
  4387. }
  4388. mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
  4389. /* Append pCfg pointer to end of mf
  4390. */
  4391. *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
  4392. /* Initalize the timer
  4393. */
  4394. init_timer(&pCfg->timer);
  4395. pCfg->timer.data = (unsigned long) ioc;
  4396. pCfg->timer.function = mpt_timer_expired;
  4397. pCfg->wait_done = 0;
  4398. /* Set the timer; ensure 10 second minimum */
  4399. if (pCfg->timeout < 10)
  4400. pCfg->timer.expires = jiffies + HZ*10;
  4401. else
  4402. pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
  4403. /* Add to end of Q, set timer and then issue this command */
  4404. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4405. list_add_tail(&pCfg->linkage, &ioc->configQ);
  4406. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4407. add_timer(&pCfg->timer);
  4408. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  4409. wait_event(mpt_waitq, pCfg->wait_done);
  4410. /* mf has been freed - do not access */
  4411. rc = pCfg->status;
  4412. return rc;
  4413. }
  4414. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4415. /**
  4416. * mpt_toolbox - Generic function to issue toolbox message
  4417. * @ioc - Pointer to an adapter structure
  4418. * @cfg - Pointer to a toolbox structure. Struct contains
  4419. * action, page address, direction, physical address
  4420. * and pointer to a configuration page header
  4421. * Page header is updated.
  4422. *
  4423. * Returns 0 for success
  4424. * -EPERM if not allowed due to ISR context
  4425. * -EAGAIN if no msg frames currently available
  4426. * -EFAULT for non-successful reply or no reply (timeout)
  4427. */
  4428. int
  4429. mpt_toolbox(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
  4430. {
  4431. ToolboxIstwiReadWriteRequest_t *pReq;
  4432. MPT_FRAME_HDR *mf;
  4433. struct pci_dev *pdev;
  4434. unsigned long flags;
  4435. int rc;
  4436. u32 flagsLength;
  4437. int in_isr;
  4438. /* Prevent calling wait_event() (below), if caller happens
  4439. * to be in ISR context, because that is fatal!
  4440. */
  4441. in_isr = in_interrupt();
  4442. if (in_isr) {
  4443. dcprintk((MYIOC_s_WARN_FMT "toobox request not allowed in ISR context!\n",
  4444. ioc->name));
  4445. return -EPERM;
  4446. }
  4447. /* Get and Populate a free Frame
  4448. */
  4449. if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
  4450. dcprintk((MYIOC_s_WARN_FMT "mpt_toolbox: no msg frames!\n",
  4451. ioc->name));
  4452. return -EAGAIN;
  4453. }
  4454. pReq = (ToolboxIstwiReadWriteRequest_t *)mf;
  4455. pReq->Tool = pCfg->action;
  4456. pReq->Reserved = 0;
  4457. pReq->ChainOffset = 0;
  4458. pReq->Function = MPI_FUNCTION_TOOLBOX;
  4459. pReq->Reserved1 = 0;
  4460. pReq->Reserved2 = 0;
  4461. pReq->MsgFlags = 0;
  4462. pReq->Flags = pCfg->dir;
  4463. pReq->BusNum = 0;
  4464. pReq->Reserved3 = 0;
  4465. pReq->NumAddressBytes = 0x01;
  4466. pReq->Reserved4 = 0;
  4467. pReq->DataLength = cpu_to_le16(0x04);
  4468. pdev = ioc->pcidev;
  4469. if (pdev->devfn & 1)
  4470. pReq->DeviceAddr = 0xB2;
  4471. else
  4472. pReq->DeviceAddr = 0xB0;
  4473. pReq->Addr1 = 0;
  4474. pReq->Addr2 = 0;
  4475. pReq->Addr3 = 0;
  4476. pReq->Reserved5 = 0;
  4477. /* Add a SGE to the config request.
  4478. */
  4479. flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | 4;
  4480. mpt_add_sge((char *)&pReq->SGL, flagsLength, pCfg->physAddr);
  4481. dcprintk((MYIOC_s_INFO_FMT "Sending Toolbox request, Tool=%x\n",
  4482. ioc->name, pReq->Tool));
  4483. /* Append pCfg pointer to end of mf
  4484. */
  4485. *((void **) (((u8 *) mf) + (ioc->req_sz - sizeof(void *)))) = (void *) pCfg;
  4486. /* Initalize the timer
  4487. */
  4488. init_timer(&pCfg->timer);
  4489. pCfg->timer.data = (unsigned long) ioc;
  4490. pCfg->timer.function = mpt_timer_expired;
  4491. pCfg->wait_done = 0;
  4492. /* Set the timer; ensure 10 second minimum */
  4493. if (pCfg->timeout < 10)
  4494. pCfg->timer.expires = jiffies + HZ*10;
  4495. else
  4496. pCfg->timer.expires = jiffies + HZ*pCfg->timeout;
  4497. /* Add to end of Q, set timer and then issue this command */
  4498. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4499. list_add_tail(&pCfg->linkage, &ioc->configQ);
  4500. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4501. add_timer(&pCfg->timer);
  4502. mpt_put_msg_frame(mpt_base_index, ioc, mf);
  4503. wait_event(mpt_waitq, pCfg->wait_done);
  4504. /* mf has been freed - do not access */
  4505. rc = pCfg->status;
  4506. return rc;
  4507. }
  4508. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4509. /*
  4510. * mpt_timer_expired - Call back for timer process.
  4511. * Used only internal config functionality.
  4512. * @data: Pointer to MPT_SCSI_HOST recast as an unsigned long
  4513. */
  4514. static void
  4515. mpt_timer_expired(unsigned long data)
  4516. {
  4517. MPT_ADAPTER *ioc = (MPT_ADAPTER *) data;
  4518. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name));
  4519. /* Perform a FW reload */
  4520. if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0)
  4521. printk(MYIOC_s_WARN_FMT "Firmware Reload FAILED!\n", ioc->name);
  4522. /* No more processing.
  4523. * Hard reset clean-up will wake up
  4524. * process and free all resources.
  4525. */
  4526. dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name));
  4527. return;
  4528. }
  4529. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4530. /*
  4531. * mpt_ioc_reset - Base cleanup for hard reset
  4532. * @ioc: Pointer to the adapter structure
  4533. * @reset_phase: Indicates pre- or post-reset functionality
  4534. *
  4535. * Remark: Free's resources with internally generated commands.
  4536. */
  4537. static int
  4538. mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
  4539. {
  4540. CONFIGPARMS *pCfg;
  4541. unsigned long flags;
  4542. dprintk((KERN_WARNING MYNAM
  4543. ": IOC %s_reset routed to MPT base driver!\n",
  4544. reset_phase==MPT_IOC_SETUP_RESET ? "setup" : (
  4545. reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post")));
  4546. if (reset_phase == MPT_IOC_SETUP_RESET) {
  4547. ;
  4548. } else if (reset_phase == MPT_IOC_PRE_RESET) {
  4549. /* If the internal config Q is not empty -
  4550. * delete timer. MF resources will be freed when
  4551. * the FIFO's are primed.
  4552. */
  4553. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4554. list_for_each_entry(pCfg, &ioc->configQ, linkage)
  4555. del_timer(&pCfg->timer);
  4556. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4557. } else {
  4558. CONFIGPARMS *pNext;
  4559. /* Search the configQ for internal commands.
  4560. * Flush the Q, and wake up all suspended threads.
  4561. */
  4562. spin_lock_irqsave(&ioc->FreeQlock, flags);
  4563. list_for_each_entry_safe(pCfg, pNext, &ioc->configQ, linkage) {
  4564. list_del(&pCfg->linkage);
  4565. pCfg->status = MPT_CONFIG_ERROR;
  4566. pCfg->wait_done = 1;
  4567. wake_up(&mpt_waitq);
  4568. }
  4569. spin_unlock_irqrestore(&ioc->FreeQlock, flags);
  4570. }
  4571. return 1; /* currently means nothing really */
  4572. }
  4573. #ifdef CONFIG_PROC_FS /* { */
  4574. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4575. /*
  4576. * procfs (%MPT_PROCFS_MPTBASEDIR/...) support stuff...
  4577. */
  4578. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4579. /*
  4580. * procmpt_create - Create %MPT_PROCFS_MPTBASEDIR entries.
  4581. *
  4582. * Returns 0 for success, non-zero for failure.
  4583. */
  4584. static int
  4585. procmpt_create(void)
  4586. {
  4587. struct proc_dir_entry *ent;
  4588. mpt_proc_root_dir = proc_mkdir(MPT_PROCFS_MPTBASEDIR, NULL);
  4589. if (mpt_proc_root_dir == NULL)
  4590. return -ENOTDIR;
  4591. ent = create_proc_entry("summary", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4592. if (ent)
  4593. ent->read_proc = procmpt_summary_read;
  4594. ent = create_proc_entry("version", S_IFREG|S_IRUGO, mpt_proc_root_dir);
  4595. if (ent)
  4596. ent->read_proc = procmpt_version_read;
  4597. return 0;
  4598. }
  4599. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4600. /*
  4601. * procmpt_destroy - Tear down %MPT_PROCFS_MPTBASEDIR entries.
  4602. *
  4603. * Returns 0 for success, non-zero for failure.
  4604. */
  4605. static void
  4606. procmpt_destroy(void)
  4607. {
  4608. remove_proc_entry("version", mpt_proc_root_dir);
  4609. remove_proc_entry("summary", mpt_proc_root_dir);
  4610. remove_proc_entry(MPT_PROCFS_MPTBASEDIR, NULL);
  4611. }
  4612. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4613. /*
  4614. * procmpt_summary_read - Handle read request from /proc/mpt/summary
  4615. * or from /proc/mpt/iocN/summary.
  4616. * @buf: Pointer to area to write information
  4617. * @start: Pointer to start pointer
  4618. * @offset: Offset to start writing
  4619. * @request:
  4620. * @eof: Pointer to EOF integer
  4621. * @data: Pointer
  4622. *
  4623. * Returns number of characters written to process performing the read.
  4624. */
  4625. static int
  4626. procmpt_summary_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4627. {
  4628. MPT_ADAPTER *ioc;
  4629. char *out = buf;
  4630. int len;
  4631. if (data) {
  4632. int more = 0;
  4633. ioc = data;
  4634. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4635. out += more;
  4636. } else {
  4637. list_for_each_entry(ioc, &ioc_list, list) {
  4638. int more = 0;
  4639. mpt_print_ioc_summary(ioc, out, &more, 0, 1);
  4640. out += more;
  4641. if ((out-buf) >= request)
  4642. break;
  4643. }
  4644. }
  4645. len = out - buf;
  4646. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4647. }
  4648. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4649. /*
  4650. * procmpt_version_read - Handle read request from /proc/mpt/version.
  4651. * @buf: Pointer to area to write information
  4652. * @start: Pointer to start pointer
  4653. * @offset: Offset to start writing
  4654. * @request:
  4655. * @eof: Pointer to EOF integer
  4656. * @data: Pointer
  4657. *
  4658. * Returns number of characters written to process performing the read.
  4659. */
  4660. static int
  4661. procmpt_version_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4662. {
  4663. int ii;
  4664. int scsi, fc, sas, lan, ctl, targ, dmp;
  4665. char *drvname;
  4666. int len;
  4667. len = sprintf(buf, "%s-%s\n", "mptlinux", MPT_LINUX_VERSION_COMMON);
  4668. len += sprintf(buf+len, " Fusion MPT base driver\n");
  4669. scsi = fc = sas = lan = ctl = targ = dmp = 0;
  4670. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  4671. drvname = NULL;
  4672. if (MptCallbacks[ii]) {
  4673. switch (MptDriverClass[ii]) {
  4674. case MPTSPI_DRIVER:
  4675. if (!scsi++) drvname = "SPI host";
  4676. break;
  4677. case MPTFC_DRIVER:
  4678. if (!fc++) drvname = "FC host";
  4679. break;
  4680. case MPTSAS_DRIVER:
  4681. if (!sas++) drvname = "SAS host";
  4682. break;
  4683. case MPTLAN_DRIVER:
  4684. if (!lan++) drvname = "LAN";
  4685. break;
  4686. case MPTSTM_DRIVER:
  4687. if (!targ++) drvname = "SCSI target";
  4688. break;
  4689. case MPTCTL_DRIVER:
  4690. if (!ctl++) drvname = "ioctl";
  4691. break;
  4692. }
  4693. if (drvname)
  4694. len += sprintf(buf+len, " Fusion MPT %s driver\n", drvname);
  4695. }
  4696. }
  4697. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4698. }
  4699. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4700. /*
  4701. * procmpt_iocinfo_read - Handle read request from /proc/mpt/iocN/info.
  4702. * @buf: Pointer to area to write information
  4703. * @start: Pointer to start pointer
  4704. * @offset: Offset to start writing
  4705. * @request:
  4706. * @eof: Pointer to EOF integer
  4707. * @data: Pointer
  4708. *
  4709. * Returns number of characters written to process performing the read.
  4710. */
  4711. static int
  4712. procmpt_iocinfo_read(char *buf, char **start, off_t offset, int request, int *eof, void *data)
  4713. {
  4714. MPT_ADAPTER *ioc = data;
  4715. int len;
  4716. char expVer[32];
  4717. int sz;
  4718. int p;
  4719. mpt_get_fw_exp_ver(expVer, ioc);
  4720. len = sprintf(buf, "%s:", ioc->name);
  4721. if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
  4722. len += sprintf(buf+len, " (f/w download boot flag set)");
  4723. // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
  4724. // len += sprintf(buf+len, " CONFIG_CHECKSUM_FAIL!");
  4725. len += sprintf(buf+len, "\n ProductID = 0x%04x (%s)\n",
  4726. ioc->facts.ProductID,
  4727. ioc->prod_name);
  4728. len += sprintf(buf+len, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
  4729. if (ioc->facts.FWImageSize)
  4730. len += sprintf(buf+len, " (fw_size=%d)", ioc->facts.FWImageSize);
  4731. len += sprintf(buf+len, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
  4732. len += sprintf(buf+len, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
  4733. len += sprintf(buf+len, " EventState = 0x%02x\n", ioc->facts.EventState);
  4734. len += sprintf(buf+len, " CurrentHostMfaHighAddr = 0x%08x\n",
  4735. ioc->facts.CurrentHostMfaHighAddr);
  4736. len += sprintf(buf+len, " CurrentSenseBufferHighAddr = 0x%08x\n",
  4737. ioc->facts.CurrentSenseBufferHighAddr);
  4738. len += sprintf(buf+len, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
  4739. len += sprintf(buf+len, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
  4740. len += sprintf(buf+len, " RequestFrames @ 0x%p (Dma @ 0x%p)\n",
  4741. (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
  4742. /*
  4743. * Rounding UP to nearest 4-kB boundary here...
  4744. */
  4745. sz = (ioc->req_sz * ioc->req_depth) + 128;
  4746. sz = ((sz + 0x1000UL - 1UL) / 0x1000) * 0x1000;
  4747. len += sprintf(buf+len, " {CurReqSz=%d} x {CurReqDepth=%d} = %d bytes ^= 0x%x\n",
  4748. ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
  4749. len += sprintf(buf+len, " {MaxReqSz=%d} {MaxReqDepth=%d}\n",
  4750. 4*ioc->facts.RequestFrameSize,
  4751. ioc->facts.GlobalCredits);
  4752. len += sprintf(buf+len, " Frames @ 0x%p (Dma @ 0x%p)\n",
  4753. (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
  4754. sz = (ioc->reply_sz * ioc->reply_depth) + 128;
  4755. len += sprintf(buf+len, " {CurRepSz=%d} x {CurRepDepth=%d} = %d bytes ^= 0x%x\n",
  4756. ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
  4757. len += sprintf(buf+len, " {MaxRepSz=%d} {MaxRepDepth=%d}\n",
  4758. ioc->facts.CurReplyFrameSize,
  4759. ioc->facts.ReplyQueueDepth);
  4760. len += sprintf(buf+len, " MaxDevices = %d\n",
  4761. (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
  4762. len += sprintf(buf+len, " MaxBuses = %d\n", ioc->facts.MaxBuses);
  4763. /* per-port info */
  4764. for (p=0; p < ioc->facts.NumberOfPorts; p++) {
  4765. len += sprintf(buf+len, " PortNumber = %d (of %d)\n",
  4766. p+1,
  4767. ioc->facts.NumberOfPorts);
  4768. if (ioc->bus_type == FC) {
  4769. if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
  4770. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4771. len += sprintf(buf+len, " LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
  4772. a[5], a[4], a[3], a[2], a[1], a[0]);
  4773. }
  4774. len += sprintf(buf+len, " WWN = %08X%08X:%08X%08X\n",
  4775. ioc->fc_port_page0[p].WWNN.High,
  4776. ioc->fc_port_page0[p].WWNN.Low,
  4777. ioc->fc_port_page0[p].WWPN.High,
  4778. ioc->fc_port_page0[p].WWPN.Low);
  4779. }
  4780. }
  4781. MPT_PROC_READ_RETURN(buf,start,offset,request,eof,len);
  4782. }
  4783. #endif /* CONFIG_PROC_FS } */
  4784. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4785. static void
  4786. mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
  4787. {
  4788. buf[0] ='\0';
  4789. if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
  4790. sprintf(buf, " (Exp %02d%02d)",
  4791. (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
  4792. (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
  4793. /* insider hack! */
  4794. if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
  4795. strcat(buf, " [MDBG]");
  4796. }
  4797. }
  4798. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4799. /**
  4800. * mpt_print_ioc_summary - Write ASCII summary of IOC to a buffer.
  4801. * @ioc: Pointer to MPT_ADAPTER structure
  4802. * @buffer: Pointer to buffer where IOC summary info should be written
  4803. * @size: Pointer to number of bytes we wrote (set by this routine)
  4804. * @len: Offset at which to start writing in buffer
  4805. * @showlan: Display LAN stuff?
  4806. *
  4807. * This routine writes (english readable) ASCII text, which represents
  4808. * a summary of IOC information, to a buffer.
  4809. */
  4810. void
  4811. mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
  4812. {
  4813. char expVer[32];
  4814. int y;
  4815. mpt_get_fw_exp_ver(expVer, ioc);
  4816. /*
  4817. * Shorter summary of attached ioc's...
  4818. */
  4819. y = sprintf(buffer+len, "%s: %s, %s%08xh%s, Ports=%d, MaxQ=%d",
  4820. ioc->name,
  4821. ioc->prod_name,
  4822. MPT_FW_REV_MAGIC_ID_STRING, /* "FwRev=" or somesuch */
  4823. ioc->facts.FWVersion.Word,
  4824. expVer,
  4825. ioc->facts.NumberOfPorts,
  4826. ioc->req_depth);
  4827. if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
  4828. u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
  4829. y += sprintf(buffer+len+y, ", LanAddr=%02X:%02X:%02X:%02X:%02X:%02X",
  4830. a[5], a[4], a[3], a[2], a[1], a[0]);
  4831. }
  4832. #ifndef __sparc__
  4833. y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
  4834. #else
  4835. y += sprintf(buffer+len+y, ", IRQ=%s", __irq_itoa(ioc->pci_irq));
  4836. #endif
  4837. if (!ioc->active)
  4838. y += sprintf(buffer+len+y, " (disabled)");
  4839. y += sprintf(buffer+len+y, "\n");
  4840. *size = y;
  4841. }
  4842. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4843. /*
  4844. * Reset Handling
  4845. */
  4846. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4847. /**
  4848. * mpt_HardResetHandler - Generic reset handler, issue SCSI Task
  4849. * Management call based on input arg values. If TaskMgmt fails,
  4850. * return associated SCSI request.
  4851. * @ioc: Pointer to MPT_ADAPTER structure
  4852. * @sleepFlag: Indicates if sleep or schedule must be called.
  4853. *
  4854. * Remark: _HardResetHandler can be invoked from an interrupt thread (timer)
  4855. * or a non-interrupt thread. In the former, must not call schedule().
  4856. *
  4857. * Remark: A return of -1 is a FATAL error case, as it means a
  4858. * FW reload/initialization failed.
  4859. *
  4860. * Returns 0 for SUCCESS or -1 if FAILED.
  4861. */
  4862. int
  4863. mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
  4864. {
  4865. int rc;
  4866. unsigned long flags;
  4867. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name));
  4868. #ifdef MFCNT
  4869. printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
  4870. printk("MF count 0x%x !\n", ioc->mfcnt);
  4871. #endif
  4872. /* Reset the adapter. Prevent more than 1 call to
  4873. * mpt_do_ioc_recovery at any instant in time.
  4874. */
  4875. spin_lock_irqsave(&ioc->diagLock, flags);
  4876. if ((ioc->diagPending) || (ioc->alt_ioc && ioc->alt_ioc->diagPending)){
  4877. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4878. return 0;
  4879. } else {
  4880. ioc->diagPending = 1;
  4881. }
  4882. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4883. /* FIXME: If do_ioc_recovery fails, repeat....
  4884. */
  4885. /* The SCSI driver needs to adjust timeouts on all current
  4886. * commands prior to the diagnostic reset being issued.
  4887. * Prevents timeouts occuring during a diagnostic reset...very bad.
  4888. * For all other protocol drivers, this is a no-op.
  4889. */
  4890. {
  4891. int ii;
  4892. int r = 0;
  4893. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  4894. if (MptResetHandlers[ii]) {
  4895. dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
  4896. ioc->name, ii));
  4897. r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_SETUP_RESET);
  4898. if (ioc->alt_ioc) {
  4899. dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
  4900. ioc->name, ioc->alt_ioc->name, ii));
  4901. r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_SETUP_RESET);
  4902. }
  4903. }
  4904. }
  4905. }
  4906. if ((rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag)) != 0) {
  4907. printk(KERN_WARNING MYNAM ": WARNING - (%d) Cannot recover %s\n",
  4908. rc, ioc->name);
  4909. }
  4910. ioc->reload_fw = 0;
  4911. if (ioc->alt_ioc)
  4912. ioc->alt_ioc->reload_fw = 0;
  4913. spin_lock_irqsave(&ioc->diagLock, flags);
  4914. ioc->diagPending = 0;
  4915. if (ioc->alt_ioc)
  4916. ioc->alt_ioc->diagPending = 0;
  4917. spin_unlock_irqrestore(&ioc->diagLock, flags);
  4918. dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc));
  4919. return rc;
  4920. }
  4921. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  4922. static void
  4923. EventDescriptionStr(u8 event, u32 evData0, char *evStr)
  4924. {
  4925. char *ds;
  4926. switch(event) {
  4927. case MPI_EVENT_NONE:
  4928. ds = "None";
  4929. break;
  4930. case MPI_EVENT_LOG_DATA:
  4931. ds = "Log Data";
  4932. break;
  4933. case MPI_EVENT_STATE_CHANGE:
  4934. ds = "State Change";
  4935. break;
  4936. case MPI_EVENT_UNIT_ATTENTION:
  4937. ds = "Unit Attention";
  4938. break;
  4939. case MPI_EVENT_IOC_BUS_RESET:
  4940. ds = "IOC Bus Reset";
  4941. break;
  4942. case MPI_EVENT_EXT_BUS_RESET:
  4943. ds = "External Bus Reset";
  4944. break;
  4945. case MPI_EVENT_RESCAN:
  4946. ds = "Bus Rescan Event";
  4947. /* Ok, do we need to do anything here? As far as
  4948. I can tell, this is when a new device gets added
  4949. to the loop. */
  4950. break;
  4951. case MPI_EVENT_LINK_STATUS_CHANGE:
  4952. if (evData0 == MPI_EVENT_LINK_STATUS_FAILURE)
  4953. ds = "Link Status(FAILURE) Change";
  4954. else
  4955. ds = "Link Status(ACTIVE) Change";
  4956. break;
  4957. case MPI_EVENT_LOOP_STATE_CHANGE:
  4958. if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LIP)
  4959. ds = "Loop State(LIP) Change";
  4960. else if (evData0 == MPI_EVENT_LOOP_STATE_CHANGE_LPE)
  4961. ds = "Loop State(LPE) Change"; /* ??? */
  4962. else
  4963. ds = "Loop State(LPB) Change"; /* ??? */
  4964. break;
  4965. case MPI_EVENT_LOGOUT:
  4966. ds = "Logout";
  4967. break;
  4968. case MPI_EVENT_EVENT_CHANGE:
  4969. if (evData0)
  4970. ds = "Events(ON) Change";
  4971. else
  4972. ds = "Events(OFF) Change";
  4973. break;
  4974. case MPI_EVENT_INTEGRATED_RAID:
  4975. {
  4976. u8 ReasonCode = (u8)(evData0 >> 16);
  4977. switch (ReasonCode) {
  4978. case MPI_EVENT_RAID_RC_VOLUME_CREATED :
  4979. ds = "Integrated Raid: Volume Created";
  4980. break;
  4981. case MPI_EVENT_RAID_RC_VOLUME_DELETED :
  4982. ds = "Integrated Raid: Volume Deleted";
  4983. break;
  4984. case MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED :
  4985. ds = "Integrated Raid: Volume Settings Changed";
  4986. break;
  4987. case MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED :
  4988. ds = "Integrated Raid: Volume Status Changed";
  4989. break;
  4990. case MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED :
  4991. ds = "Integrated Raid: Volume Physdisk Changed";
  4992. break;
  4993. case MPI_EVENT_RAID_RC_PHYSDISK_CREATED :
  4994. ds = "Integrated Raid: Physdisk Created";
  4995. break;
  4996. case MPI_EVENT_RAID_RC_PHYSDISK_DELETED :
  4997. ds = "Integrated Raid: Physdisk Deleted";
  4998. break;
  4999. case MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED :
  5000. ds = "Integrated Raid: Physdisk Settings Changed";
  5001. break;
  5002. case MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED :
  5003. ds = "Integrated Raid: Physdisk Status Changed";
  5004. break;
  5005. case MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED :
  5006. ds = "Integrated Raid: Domain Validation Needed";
  5007. break;
  5008. case MPI_EVENT_RAID_RC_SMART_DATA :
  5009. ds = "Integrated Raid; Smart Data";
  5010. break;
  5011. case MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED :
  5012. ds = "Integrated Raid: Replace Action Started";
  5013. break;
  5014. default:
  5015. ds = "Integrated Raid";
  5016. break;
  5017. }
  5018. break;
  5019. }
  5020. case MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE:
  5021. ds = "SCSI Device Status Change";
  5022. break;
  5023. case MPI_EVENT_SAS_DEVICE_STATUS_CHANGE:
  5024. {
  5025. u8 ReasonCode = (u8)(evData0 >> 16);
  5026. switch (ReasonCode) {
  5027. case MPI_EVENT_SAS_DEV_STAT_RC_ADDED:
  5028. ds = "SAS Device Status Change: Added";
  5029. break;
  5030. case MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING:
  5031. ds = "SAS Device Status Change: Deleted";
  5032. break;
  5033. case MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
  5034. ds = "SAS Device Status Change: SMART Data";
  5035. break;
  5036. case MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED:
  5037. ds = "SAS Device Status Change: No Persistancy Added";
  5038. break;
  5039. default:
  5040. ds = "SAS Device Status Change: Unknown";
  5041. break;
  5042. }
  5043. break;
  5044. }
  5045. case MPI_EVENT_ON_BUS_TIMER_EXPIRED:
  5046. ds = "Bus Timer Expired";
  5047. break;
  5048. case MPI_EVENT_QUEUE_FULL:
  5049. ds = "Queue Full";
  5050. break;
  5051. case MPI_EVENT_SAS_SES:
  5052. ds = "SAS SES Event";
  5053. break;
  5054. case MPI_EVENT_PERSISTENT_TABLE_FULL:
  5055. ds = "Persistent Table Full";
  5056. break;
  5057. case MPI_EVENT_SAS_PHY_LINK_STATUS:
  5058. ds = "SAS PHY Link Status";
  5059. break;
  5060. case MPI_EVENT_SAS_DISCOVERY_ERROR:
  5061. ds = "SAS Discovery Error";
  5062. break;
  5063. /*
  5064. * MPT base "custom" events may be added here...
  5065. */
  5066. default:
  5067. ds = "Unknown";
  5068. break;
  5069. }
  5070. strcpy(evStr,ds);
  5071. }
  5072. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5073. /*
  5074. * ProcessEventNotification - Route a received EventNotificationReply to
  5075. * all currently regeistered event handlers.
  5076. * @ioc: Pointer to MPT_ADAPTER structure
  5077. * @pEventReply: Pointer to EventNotification reply frame
  5078. * @evHandlers: Pointer to integer, number of event handlers
  5079. *
  5080. * Returns sum of event handlers return values.
  5081. */
  5082. static int
  5083. ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
  5084. {
  5085. u16 evDataLen;
  5086. u32 evData0 = 0;
  5087. // u32 evCtx;
  5088. int ii;
  5089. int r = 0;
  5090. int handlers = 0;
  5091. char evStr[100];
  5092. u8 event;
  5093. /*
  5094. * Do platform normalization of values
  5095. */
  5096. event = le32_to_cpu(pEventReply->Event) & 0xFF;
  5097. // evCtx = le32_to_cpu(pEventReply->EventContext);
  5098. evDataLen = le16_to_cpu(pEventReply->EventDataLength);
  5099. if (evDataLen) {
  5100. evData0 = le32_to_cpu(pEventReply->Data[0]);
  5101. }
  5102. EventDescriptionStr(event, evData0, evStr);
  5103. devtprintk((MYIOC_s_INFO_FMT "MPT event (%s=%02Xh) detected!\n",
  5104. ioc->name,
  5105. evStr,
  5106. event));
  5107. #if defined(MPT_DEBUG) || defined(MPT_DEBUG_EVENTS)
  5108. printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO);
  5109. for (ii = 0; ii < evDataLen; ii++)
  5110. printk(" %08x", le32_to_cpu(pEventReply->Data[ii]));
  5111. printk("\n");
  5112. #endif
  5113. /*
  5114. * Do general / base driver event processing
  5115. */
  5116. switch(event) {
  5117. case MPI_EVENT_EVENT_CHANGE: /* 0A */
  5118. if (evDataLen) {
  5119. u8 evState = evData0 & 0xFF;
  5120. /* CHECKME! What if evState unexpectedly says OFF (0)? */
  5121. /* Update EventState field in cached IocFacts */
  5122. if (ioc->facts.Function) {
  5123. ioc->facts.EventState = evState;
  5124. }
  5125. }
  5126. break;
  5127. default:
  5128. break;
  5129. }
  5130. /*
  5131. * Should this event be logged? Events are written sequentially.
  5132. * When buffer is full, start again at the top.
  5133. */
  5134. if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
  5135. int idx;
  5136. idx = ioc->eventContext % ioc->eventLogSize;
  5137. ioc->events[idx].event = event;
  5138. ioc->events[idx].eventContext = ioc->eventContext;
  5139. for (ii = 0; ii < 2; ii++) {
  5140. if (ii < evDataLen)
  5141. ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
  5142. else
  5143. ioc->events[idx].data[ii] = 0;
  5144. }
  5145. ioc->eventContext++;
  5146. }
  5147. /*
  5148. * Call each currently registered protocol event handler.
  5149. */
  5150. for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
  5151. if (MptEvHandlers[ii]) {
  5152. devtprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n",
  5153. ioc->name, ii));
  5154. r += (*(MptEvHandlers[ii]))(ioc, pEventReply);
  5155. handlers++;
  5156. }
  5157. }
  5158. /* FIXME? Examine results here? */
  5159. /*
  5160. * If needed, send (a single) EventAck.
  5161. */
  5162. if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) {
  5163. devtprintk((MYIOC_s_WARN_FMT
  5164. "EventAck required\n",ioc->name));
  5165. if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
  5166. devtprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n",
  5167. ioc->name, ii));
  5168. }
  5169. }
  5170. *evHandlers = handlers;
  5171. return r;
  5172. }
  5173. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5174. /*
  5175. * mpt_fc_log_info - Log information returned from Fibre Channel IOC.
  5176. * @ioc: Pointer to MPT_ADAPTER structure
  5177. * @log_info: U32 LogInfo reply word from the IOC
  5178. *
  5179. * Refer to lsi/fc_log.h.
  5180. */
  5181. static void
  5182. mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5183. {
  5184. static char *subcl_str[8] = {
  5185. "FCP Initiator", "FCP Target", "LAN", "MPI Message Layer",
  5186. "FC Link", "Context Manager", "Invalid Field Offset", "State Change Info"
  5187. };
  5188. u8 subcl = (log_info >> 24) & 0x7;
  5189. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): SubCl={%s}\n",
  5190. ioc->name, log_info, subcl_str[subcl]);
  5191. }
  5192. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5193. /*
  5194. * mpt_sp_log_info - Log information returned from SCSI Parallel IOC.
  5195. * @ioc: Pointer to MPT_ADAPTER structure
  5196. * @mr: Pointer to MPT reply frame
  5197. * @log_info: U32 LogInfo word from the IOC
  5198. *
  5199. * Refer to lsi/sp_log.h.
  5200. */
  5201. static void
  5202. mpt_sp_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5203. {
  5204. u32 info = log_info & 0x00FF0000;
  5205. char *desc = "unknown";
  5206. switch (info) {
  5207. case 0x00010000:
  5208. desc = "bug! MID not found";
  5209. if (ioc->reload_fw == 0)
  5210. ioc->reload_fw++;
  5211. break;
  5212. case 0x00020000:
  5213. desc = "Parity Error";
  5214. break;
  5215. case 0x00030000:
  5216. desc = "ASYNC Outbound Overrun";
  5217. break;
  5218. case 0x00040000:
  5219. desc = "SYNC Offset Error";
  5220. break;
  5221. case 0x00050000:
  5222. desc = "BM Change";
  5223. break;
  5224. case 0x00060000:
  5225. desc = "Msg In Overflow";
  5226. break;
  5227. case 0x00070000:
  5228. desc = "DMA Error";
  5229. break;
  5230. case 0x00080000:
  5231. desc = "Outbound DMA Overrun";
  5232. break;
  5233. case 0x00090000:
  5234. desc = "Task Management";
  5235. break;
  5236. case 0x000A0000:
  5237. desc = "Device Problem";
  5238. break;
  5239. case 0x000B0000:
  5240. desc = "Invalid Phase Change";
  5241. break;
  5242. case 0x000C0000:
  5243. desc = "Untagged Table Size";
  5244. break;
  5245. }
  5246. printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
  5247. }
  5248. /* strings for sas loginfo */
  5249. static char *originator_str[] = {
  5250. "IOP", /* 00h */
  5251. "PL", /* 01h */
  5252. "IR" /* 02h */
  5253. };
  5254. static char *iop_code_str[] = {
  5255. NULL, /* 00h */
  5256. "Invalid SAS Address", /* 01h */
  5257. NULL, /* 02h */
  5258. "Invalid Page", /* 03h */
  5259. NULL, /* 04h */
  5260. "Task Terminated" /* 05h */
  5261. };
  5262. static char *pl_code_str[] = {
  5263. NULL, /* 00h */
  5264. "Open Failure", /* 01h */
  5265. "Invalid Scatter Gather List", /* 02h */
  5266. "Wrong Relative Offset or Frame Length", /* 03h */
  5267. "Frame Transfer Error", /* 04h */
  5268. "Transmit Frame Connected Low", /* 05h */
  5269. "SATA Non-NCQ RW Error Bit Set", /* 06h */
  5270. "SATA Read Log Receive Data Error", /* 07h */
  5271. "SATA NCQ Fail All Commands After Error", /* 08h */
  5272. "SATA Error in Receive Set Device Bit FIS", /* 09h */
  5273. "Receive Frame Invalid Message", /* 0Ah */
  5274. "Receive Context Message Valid Error", /* 0Bh */
  5275. "Receive Frame Current Frame Error", /* 0Ch */
  5276. "SATA Link Down", /* 0Dh */
  5277. "Discovery SATA Init W IOS", /* 0Eh */
  5278. "Config Invalid Page", /* 0Fh */
  5279. "Discovery SATA Init Timeout", /* 10h */
  5280. "Reset", /* 11h */
  5281. "Abort", /* 12h */
  5282. "IO Not Yet Executed", /* 13h */
  5283. "IO Executed", /* 14h */
  5284. NULL, /* 15h */
  5285. NULL, /* 16h */
  5286. NULL, /* 17h */
  5287. NULL, /* 18h */
  5288. NULL, /* 19h */
  5289. NULL, /* 1Ah */
  5290. NULL, /* 1Bh */
  5291. NULL, /* 1Ch */
  5292. NULL, /* 1Dh */
  5293. NULL, /* 1Eh */
  5294. NULL, /* 1Fh */
  5295. "Enclosure Management" /* 20h */
  5296. };
  5297. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5298. /*
  5299. * mpt_sas_log_info - Log information returned from SAS IOC.
  5300. * @ioc: Pointer to MPT_ADAPTER structure
  5301. * @log_info: U32 LogInfo reply word from the IOC
  5302. *
  5303. * Refer to lsi/mpi_log_sas.h.
  5304. */
  5305. static void
  5306. mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info)
  5307. {
  5308. union loginfo_type {
  5309. u32 loginfo;
  5310. struct {
  5311. u32 subcode:16;
  5312. u32 code:8;
  5313. u32 originator:4;
  5314. u32 bus_type:4;
  5315. }dw;
  5316. };
  5317. union loginfo_type sas_loginfo;
  5318. char *code_desc = NULL;
  5319. sas_loginfo.loginfo = log_info;
  5320. if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) &&
  5321. (sas_loginfo.dw.originator < sizeof(originator_str)/sizeof(char*)))
  5322. return;
  5323. if ((sas_loginfo.dw.originator == 0 /*IOP*/) &&
  5324. (sas_loginfo.dw.code < sizeof(iop_code_str)/sizeof(char*))) {
  5325. code_desc = iop_code_str[sas_loginfo.dw.code];
  5326. }else if ((sas_loginfo.dw.originator == 1 /*PL*/) &&
  5327. (sas_loginfo.dw.code < sizeof(pl_code_str)/sizeof(char*) )) {
  5328. code_desc = pl_code_str[sas_loginfo.dw.code];
  5329. }
  5330. if (code_desc != NULL)
  5331. printk(MYIOC_s_INFO_FMT
  5332. "LogInfo(0x%08x): Originator={%s}, Code={%s},"
  5333. " SubCode(0x%04x)\n",
  5334. ioc->name,
  5335. log_info,
  5336. originator_str[sas_loginfo.dw.originator],
  5337. code_desc,
  5338. sas_loginfo.dw.subcode);
  5339. else
  5340. printk(MYIOC_s_INFO_FMT
  5341. "LogInfo(0x%08x): Originator={%s}, Code=(0x%02x),"
  5342. " SubCode(0x%04x)\n",
  5343. ioc->name,
  5344. log_info,
  5345. originator_str[sas_loginfo.dw.originator],
  5346. sas_loginfo.dw.code,
  5347. sas_loginfo.dw.subcode);
  5348. }
  5349. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5350. /*
  5351. * mpt_sp_ioc_info - IOC information returned from SCSI Parallel IOC.
  5352. * @ioc: Pointer to MPT_ADAPTER structure
  5353. * @ioc_status: U32 IOCStatus word from IOC
  5354. * @mf: Pointer to MPT request frame
  5355. *
  5356. * Refer to lsi/mpi.h.
  5357. */
  5358. static void
  5359. mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
  5360. {
  5361. u32 status = ioc_status & MPI_IOCSTATUS_MASK;
  5362. char *desc = "";
  5363. switch (status) {
  5364. case MPI_IOCSTATUS_INVALID_FUNCTION: /* 0x0001 */
  5365. desc = "Invalid Function";
  5366. break;
  5367. case MPI_IOCSTATUS_BUSY: /* 0x0002 */
  5368. desc = "Busy";
  5369. break;
  5370. case MPI_IOCSTATUS_INVALID_SGL: /* 0x0003 */
  5371. desc = "Invalid SGL";
  5372. break;
  5373. case MPI_IOCSTATUS_INTERNAL_ERROR: /* 0x0004 */
  5374. desc = "Internal Error";
  5375. break;
  5376. case MPI_IOCSTATUS_RESERVED: /* 0x0005 */
  5377. desc = "Reserved";
  5378. break;
  5379. case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES: /* 0x0006 */
  5380. desc = "Insufficient Resources";
  5381. break;
  5382. case MPI_IOCSTATUS_INVALID_FIELD: /* 0x0007 */
  5383. desc = "Invalid Field";
  5384. break;
  5385. case MPI_IOCSTATUS_INVALID_STATE: /* 0x0008 */
  5386. desc = "Invalid State";
  5387. break;
  5388. case MPI_IOCSTATUS_CONFIG_INVALID_ACTION: /* 0x0020 */
  5389. case MPI_IOCSTATUS_CONFIG_INVALID_TYPE: /* 0x0021 */
  5390. case MPI_IOCSTATUS_CONFIG_INVALID_PAGE: /* 0x0022 */
  5391. case MPI_IOCSTATUS_CONFIG_INVALID_DATA: /* 0x0023 */
  5392. case MPI_IOCSTATUS_CONFIG_NO_DEFAULTS: /* 0x0024 */
  5393. case MPI_IOCSTATUS_CONFIG_CANT_COMMIT: /* 0x0025 */
  5394. /* No message for Config IOCStatus values */
  5395. break;
  5396. case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
  5397. /* No message for recovered error
  5398. desc = "SCSI Recovered Error";
  5399. */
  5400. break;
  5401. case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */
  5402. desc = "SCSI Invalid Bus";
  5403. break;
  5404. case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */
  5405. desc = "SCSI Invalid TargetID";
  5406. break;
  5407. case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */
  5408. {
  5409. SCSIIORequest_t *pScsiReq = (SCSIIORequest_t *) mf;
  5410. U8 cdb = pScsiReq->CDB[0];
  5411. if (cdb != 0x12) { /* Inquiry is issued for device scanning */
  5412. desc = "SCSI Device Not There";
  5413. }
  5414. break;
  5415. }
  5416. case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
  5417. desc = "SCSI Data Overrun";
  5418. break;
  5419. case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: /* 0x0045 */
  5420. /* This error is checked in scsi_io_done(). Skip.
  5421. desc = "SCSI Data Underrun";
  5422. */
  5423. break;
  5424. case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */
  5425. desc = "SCSI I/O Data Error";
  5426. break;
  5427. case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */
  5428. desc = "SCSI Protocol Error";
  5429. break;
  5430. case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
  5431. desc = "SCSI Task Terminated";
  5432. break;
  5433. case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */
  5434. desc = "SCSI Residual Mismatch";
  5435. break;
  5436. case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */
  5437. desc = "SCSI Task Management Failed";
  5438. break;
  5439. case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */
  5440. desc = "SCSI IOC Terminated";
  5441. break;
  5442. case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */
  5443. desc = "SCSI Ext Terminated";
  5444. break;
  5445. default:
  5446. desc = "Others";
  5447. break;
  5448. }
  5449. if (desc != "")
  5450. printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04x): %s\n", ioc->name, status, desc);
  5451. }
  5452. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5453. EXPORT_SYMBOL(mpt_attach);
  5454. EXPORT_SYMBOL(mpt_detach);
  5455. #ifdef CONFIG_PM
  5456. EXPORT_SYMBOL(mpt_resume);
  5457. EXPORT_SYMBOL(mpt_suspend);
  5458. #endif
  5459. EXPORT_SYMBOL(ioc_list);
  5460. EXPORT_SYMBOL(mpt_proc_root_dir);
  5461. EXPORT_SYMBOL(mpt_register);
  5462. EXPORT_SYMBOL(mpt_deregister);
  5463. EXPORT_SYMBOL(mpt_event_register);
  5464. EXPORT_SYMBOL(mpt_event_deregister);
  5465. EXPORT_SYMBOL(mpt_reset_register);
  5466. EXPORT_SYMBOL(mpt_reset_deregister);
  5467. EXPORT_SYMBOL(mpt_device_driver_register);
  5468. EXPORT_SYMBOL(mpt_device_driver_deregister);
  5469. EXPORT_SYMBOL(mpt_get_msg_frame);
  5470. EXPORT_SYMBOL(mpt_put_msg_frame);
  5471. EXPORT_SYMBOL(mpt_free_msg_frame);
  5472. EXPORT_SYMBOL(mpt_add_sge);
  5473. EXPORT_SYMBOL(mpt_send_handshake_request);
  5474. EXPORT_SYMBOL(mpt_verify_adapter);
  5475. EXPORT_SYMBOL(mpt_GetIocState);
  5476. EXPORT_SYMBOL(mpt_print_ioc_summary);
  5477. EXPORT_SYMBOL(mpt_lan_index);
  5478. EXPORT_SYMBOL(mpt_stm_index);
  5479. EXPORT_SYMBOL(mpt_HardResetHandler);
  5480. EXPORT_SYMBOL(mpt_config);
  5481. EXPORT_SYMBOL(mpt_toolbox);
  5482. EXPORT_SYMBOL(mpt_findImVolumes);
  5483. EXPORT_SYMBOL(mpt_read_ioc_pg_3);
  5484. EXPORT_SYMBOL(mpt_alloc_fw_memory);
  5485. EXPORT_SYMBOL(mpt_free_fw_memory);
  5486. EXPORT_SYMBOL(mptbase_sas_persist_operation);
  5487. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5488. /*
  5489. * fusion_init - Fusion MPT base driver initialization routine.
  5490. *
  5491. * Returns 0 for success, non-zero for failure.
  5492. */
  5493. static int __init
  5494. fusion_init(void)
  5495. {
  5496. int i;
  5497. show_mptmod_ver(my_NAME, my_VERSION);
  5498. printk(KERN_INFO COPYRIGHT "\n");
  5499. for (i = 0; i < MPT_MAX_PROTOCOL_DRIVERS; i++) {
  5500. MptCallbacks[i] = NULL;
  5501. MptDriverClass[i] = MPTUNKNOWN_DRIVER;
  5502. MptEvHandlers[i] = NULL;
  5503. MptResetHandlers[i] = NULL;
  5504. }
  5505. /* Register ourselves (mptbase) in order to facilitate
  5506. * EventNotification handling.
  5507. */
  5508. mpt_base_index = mpt_register(mpt_base_reply, MPTBASE_DRIVER);
  5509. /* Register for hard reset handling callbacks.
  5510. */
  5511. if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) {
  5512. dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n"));
  5513. } else {
  5514. /* FIXME! */
  5515. }
  5516. #ifdef CONFIG_PROC_FS
  5517. (void) procmpt_create();
  5518. #endif
  5519. return 0;
  5520. }
  5521. /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  5522. /*
  5523. * fusion_exit - Perform driver unload cleanup.
  5524. *
  5525. * This routine frees all resources associated with each MPT adapter
  5526. * and removes all %MPT_PROCFS_MPTBASEDIR entries.
  5527. */
  5528. static void __exit
  5529. fusion_exit(void)
  5530. {
  5531. dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n"));
  5532. mpt_reset_deregister(mpt_base_index);
  5533. #ifdef CONFIG_PROC_FS
  5534. procmpt_destroy();
  5535. #endif
  5536. }
  5537. module_init(fusion_init);
  5538. module_exit(fusion_exit);