phy.h 17 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #ifndef _ISCI_PHY_H_
  56. #define _ISCI_PHY_H_
  57. #include <scsi/sas.h>
  58. #include <scsi/libsas.h>
  59. #include "state_machine.h"
  60. #include "sas.h"
  61. /* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
  62. * before restarting the starting state machine. Technically, the old parallel
  63. * ATA specification required up to 30 seconds for a device to issue its
  64. * signature FIS as a result of a soft reset. Now we see that devices respond
  65. * generally within 15 seconds, but we'll use 25 for now.
  66. */
  67. #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT 25000
  68. /* This is the timeout for the SATA OOB/SN because the hardware does not
  69. * recognize a hot plug after OOB signal but before the SN signals. We need to
  70. * make sure after a hotplug timeout if we have not received the speed event
  71. * notification from the hardware that we restart the hardware OOB state
  72. * machine.
  73. */
  74. #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT 250
  75. enum scic_sds_phy_protocol {
  76. SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
  77. SCIC_SDS_PHY_PROTOCOL_SAS,
  78. SCIC_SDS_PHY_PROTOCOL_SATA,
  79. SCIC_SDS_MAX_PHY_PROTOCOLS
  80. };
  81. /**
  82. * struct scic_sds_phy - This structure contains or references all of the data
  83. * necessary to represent the core phy object and SCU harware protocol
  84. * engine.
  85. *
  86. *
  87. */
  88. struct scic_sds_phy {
  89. /**
  90. * This field contains the information for the base phy state machine.
  91. */
  92. struct sci_base_state_machine state_machine;
  93. /**
  94. * This field specifies the port object that owns/contains this phy.
  95. */
  96. struct scic_sds_port *owning_port;
  97. /**
  98. * This field indicates whether the phy supports 1.5 Gb/s, 3.0 Gb/s,
  99. * or 6.0 Gb/s operation.
  100. */
  101. enum sas_linkrate max_negotiated_speed;
  102. /**
  103. * This member specifies the protocol being utilized on this phy. This
  104. * field contains a legitamite value once the PHY has link trained with
  105. * a remote phy.
  106. */
  107. enum scic_sds_phy_protocol protocol;
  108. /**
  109. * This field specifies the index with which this phy is associated (0-3).
  110. */
  111. u8 phy_index;
  112. /**
  113. * This member indicates if this particular PHY has received a BCN while
  114. * it had no port assignement. This BCN will be reported once the phy is
  115. * assigned to a port.
  116. */
  117. bool bcn_received_while_port_unassigned;
  118. /**
  119. * This field indicates if this PHY is currently in the process of
  120. * link training (i.e. it has started OOB, but has yet to perform
  121. * IAF exchange/Signature FIS reception).
  122. */
  123. bool is_in_link_training;
  124. /**
  125. * This field contains a reference to the timer utilized in detecting
  126. * when a signature FIS timeout has occurred. The signature FIS is the
  127. * first FIS sent by an attached SATA device after OOB/SN.
  128. */
  129. void *sata_timeout_timer;
  130. const struct scic_sds_phy_state_handler *state_handlers;
  131. /**
  132. * This field is the pointer to the transport layer register for the SCU
  133. * hardware.
  134. */
  135. struct scu_transport_layer_registers __iomem *transport_layer_registers;
  136. /**
  137. * This field points to the link layer register set within the SCU.
  138. */
  139. struct scu_link_layer_registers __iomem *link_layer_registers;
  140. };
  141. struct isci_phy {
  142. struct scic_sds_phy sci;
  143. struct asd_sas_phy sas_phy;
  144. struct isci_port *isci_port;
  145. u8 sas_addr[SAS_ADDR_SIZE];
  146. union {
  147. struct sas_identify_frame iaf;
  148. struct dev_to_host_fis fis;
  149. } frame_rcvd;
  150. };
  151. static inline struct isci_phy *to_isci_phy(struct asd_sas_phy *sas_phy)
  152. {
  153. struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
  154. return iphy;
  155. }
  156. static inline struct isci_phy *sci_phy_to_iphy(struct scic_sds_phy *sci_phy)
  157. {
  158. struct isci_phy *iphy = container_of(sci_phy, typeof(*iphy), sci);
  159. return iphy;
  160. }
  161. struct scic_phy_cap {
  162. union {
  163. struct {
  164. /*
  165. * The SAS specification indicates the start bit shall
  166. * always be set to
  167. * 1. This implementation will have the start bit set
  168. * to 0 if the PHY CAPABILITIES were either not
  169. * received or speed negotiation failed.
  170. */
  171. u8 start:1;
  172. u8 tx_ssc_type:1;
  173. u8 res1:2;
  174. u8 req_logical_linkrate:4;
  175. u32 gen1_no_ssc:1;
  176. u32 gen1_ssc:1;
  177. u32 gen2_no_ssc:1;
  178. u32 gen2_ssc:1;
  179. u32 gen3_no_ssc:1;
  180. u32 gen3_ssc:1;
  181. u32 res2:17;
  182. u32 parity:1;
  183. };
  184. u32 all;
  185. };
  186. } __packed;
  187. /* this data structure reflects the link layer transmit identification reg */
  188. struct scic_phy_proto {
  189. union {
  190. struct {
  191. u16 _r_a:1;
  192. u16 smp_iport:1;
  193. u16 stp_iport:1;
  194. u16 ssp_iport:1;
  195. u16 _r_b:4;
  196. u16 _r_c:1;
  197. u16 smp_tport:1;
  198. u16 stp_tport:1;
  199. u16 ssp_tport:1;
  200. u16 _r_d:4;
  201. };
  202. u16 all;
  203. };
  204. } __packed;
  205. /**
  206. * struct scic_phy_properties - This structure defines the properties common to
  207. * all phys that can be retrieved.
  208. *
  209. *
  210. */
  211. struct scic_phy_properties {
  212. /**
  213. * This field specifies the port that currently contains the
  214. * supplied phy. This field may be set to NULL
  215. * if the phy is not currently contained in a port.
  216. */
  217. struct scic_sds_port *owning_port;
  218. /**
  219. * This field specifies the link rate at which the phy is
  220. * currently operating.
  221. */
  222. enum sas_linkrate negotiated_link_rate;
  223. /**
  224. * This field specifies the index of the phy in relation to other
  225. * phys within the controller. This index is zero relative.
  226. */
  227. u8 index;
  228. };
  229. /**
  230. * struct scic_sas_phy_properties - This structure defines the properties,
  231. * specific to a SAS phy, that can be retrieved.
  232. *
  233. *
  234. */
  235. struct scic_sas_phy_properties {
  236. /**
  237. * This field delineates the Identify Address Frame received
  238. * from the remote end point.
  239. */
  240. struct sas_identify_frame rcvd_iaf;
  241. /**
  242. * This field delineates the Phy capabilities structure received
  243. * from the remote end point.
  244. */
  245. struct scic_phy_cap rcvd_cap;
  246. };
  247. /**
  248. * struct scic_sata_phy_properties - This structure defines the properties,
  249. * specific to a SATA phy, that can be retrieved.
  250. *
  251. *
  252. */
  253. struct scic_sata_phy_properties {
  254. /**
  255. * This field delineates the signature FIS received from the
  256. * attached target.
  257. */
  258. struct dev_to_host_fis signature_fis;
  259. /**
  260. * This field specifies to the user if a port selector is connected
  261. * on the specified phy.
  262. */
  263. bool is_port_selector_present;
  264. };
  265. /**
  266. * enum scic_phy_counter_id - This enumeration depicts the various pieces of
  267. * optional information that can be retrieved for a specific phy.
  268. *
  269. *
  270. */
  271. enum scic_phy_counter_id {
  272. /**
  273. * This PHY information field tracks the number of frames received.
  274. */
  275. SCIC_PHY_COUNTER_RECEIVED_FRAME,
  276. /**
  277. * This PHY information field tracks the number of frames transmitted.
  278. */
  279. SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
  280. /**
  281. * This PHY information field tracks the number of DWORDs received.
  282. */
  283. SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
  284. /**
  285. * This PHY information field tracks the number of DWORDs transmitted.
  286. */
  287. SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
  288. /**
  289. * This PHY information field tracks the number of times DWORD
  290. * synchronization was lost.
  291. */
  292. SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
  293. /**
  294. * This PHY information field tracks the number of received DWORDs with
  295. * running disparity errors.
  296. */
  297. SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
  298. /**
  299. * This PHY information field tracks the number of received frames with a
  300. * CRC error (not including short or truncated frames).
  301. */
  302. SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
  303. /**
  304. * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
  305. * primitives received.
  306. */
  307. SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
  308. /**
  309. * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
  310. * primitives transmitted.
  311. */
  312. SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
  313. /**
  314. * This PHY information field tracks the number of times the inactivity
  315. * timer for connections on the phy has been utilized.
  316. */
  317. SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
  318. /**
  319. * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
  320. * primitives received.
  321. */
  322. SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
  323. /**
  324. * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
  325. * primitives transmitted.
  326. */
  327. SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
  328. /**
  329. * This PHY information field tracks the number of CREDIT BLOCKED
  330. * primitives received.
  331. * @note Depending on remote device implementation, credit blocks
  332. * may occur regularly.
  333. */
  334. SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
  335. /**
  336. * This PHY information field contains the number of short frames
  337. * received. A short frame is simply a frame smaller then what is
  338. * allowed by either the SAS or SATA specification.
  339. */
  340. SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
  341. /**
  342. * This PHY information field contains the number of frames received after
  343. * credit has been exhausted.
  344. */
  345. SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
  346. /**
  347. * This PHY information field contains the number of frames received after
  348. * a DONE has been received.
  349. */
  350. SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
  351. /**
  352. * This PHY information field contains the number of times the phy
  353. * failed to achieve DWORD synchronization during speed negotiation.
  354. */
  355. SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
  356. };
  357. enum scic_sds_phy_states {
  358. /**
  359. * Simply the initial state for the base domain state machine.
  360. */
  361. SCI_BASE_PHY_STATE_INITIAL,
  362. /**
  363. * This state indicates that the phy has successfully been stopped.
  364. * In this state no new IO operations are permitted on this phy.
  365. * This state is entered from the INITIAL state.
  366. * This state is entered from the STARTING state.
  367. * This state is entered from the READY state.
  368. * This state is entered from the RESETTING state.
  369. */
  370. SCI_BASE_PHY_STATE_STOPPED,
  371. /**
  372. * This state indicates that the phy is in the process of becomming
  373. * ready. In this state no new IO operations are permitted on this phy.
  374. * This state is entered from the STOPPED state.
  375. * This state is entered from the READY state.
  376. * This state is entered from the RESETTING state.
  377. */
  378. SCI_BASE_PHY_STATE_STARTING,
  379. /**
  380. * Initial state
  381. */
  382. SCIC_SDS_PHY_STARTING_SUBSTATE_INITIAL,
  383. /**
  384. * Wait state for the hardware OSSP event type notification
  385. */
  386. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_OSSP_EN,
  387. /**
  388. * Wait state for the PHY speed notification
  389. */
  390. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_SPEED_EN,
  391. /**
  392. * Wait state for the IAF Unsolicited frame notification
  393. */
  394. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_IAF_UF,
  395. /**
  396. * Wait state for the request to consume power
  397. */
  398. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SAS_POWER,
  399. /**
  400. * Wait state for request to consume power
  401. */
  402. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_POWER,
  403. /**
  404. * Wait state for the SATA PHY notification
  405. */
  406. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_PHY_EN,
  407. /**
  408. * Wait for the SATA PHY speed notification
  409. */
  410. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SATA_SPEED_EN,
  411. /**
  412. * Wait state for the SIGNATURE FIS unsolicited frame notification
  413. */
  414. SCIC_SDS_PHY_STARTING_SUBSTATE_AWAIT_SIG_FIS_UF,
  415. /**
  416. * Exit state for this state machine
  417. */
  418. SCIC_SDS_PHY_STARTING_SUBSTATE_FINAL,
  419. /**
  420. * This state indicates the the phy is now ready. Thus, the user
  421. * is able to perform IO operations utilizing this phy as long as it
  422. * is currently part of a valid port.
  423. * This state is entered from the STARTING state.
  424. */
  425. SCI_BASE_PHY_STATE_READY,
  426. /**
  427. * This state indicates that the phy is in the process of being reset.
  428. * In this state no new IO operations are permitted on this phy.
  429. * This state is entered from the READY state.
  430. */
  431. SCI_BASE_PHY_STATE_RESETTING,
  432. /**
  433. * Simply the final state for the base phy state machine.
  434. */
  435. SCI_BASE_PHY_STATE_FINAL,
  436. };
  437. typedef enum sci_status (*scic_sds_phy_handler_t)(struct scic_sds_phy *);
  438. typedef enum sci_status (*scic_sds_phy_event_handler_t)(struct scic_sds_phy *, u32);
  439. typedef enum sci_status (*scic_sds_phy_frame_handler_t)(struct scic_sds_phy *, u32);
  440. typedef enum sci_status (*scic_sds_phy_power_handler_t)(struct scic_sds_phy *);
  441. struct scic_sds_phy_state_handler {
  442. /**
  443. * The state handler for events received from the SCU hardware.
  444. */
  445. scic_sds_phy_event_handler_t event_handler;
  446. /**
  447. * The state handler for staggered spinup.
  448. */
  449. scic_sds_phy_power_handler_t consume_power_handler;
  450. };
  451. /**
  452. * scic_sds_phy_get_index() -
  453. *
  454. * This macro returns the phy index for the specified phy
  455. */
  456. #define scic_sds_phy_get_index(phy) \
  457. ((phy)->phy_index)
  458. /**
  459. * scic_sds_phy_get_controller() - This macro returns the controller for this
  460. * phy
  461. *
  462. *
  463. */
  464. #define scic_sds_phy_get_controller(phy) \
  465. (scic_sds_port_get_controller((phy)->owning_port))
  466. /**
  467. * scic_sds_phy_set_state_handlers() - This macro sets the state handlers for
  468. * this phy object
  469. *
  470. *
  471. */
  472. #define scic_sds_phy_set_state_handlers(phy, handlers) \
  473. ((phy)->state_handlers = (handlers))
  474. /**
  475. * scic_sds_phy_set_base_state_handlers() -
  476. *
  477. * This macro set the base state handlers for the phy object.
  478. */
  479. #define scic_sds_phy_set_base_state_handlers(phy, state_id) \
  480. scic_sds_phy_set_state_handlers(\
  481. (phy), \
  482. &scic_sds_phy_state_handler_table[(state_id)] \
  483. )
  484. void scic_sds_phy_construct(
  485. struct scic_sds_phy *this_phy,
  486. struct scic_sds_port *owning_port,
  487. u8 phy_index);
  488. struct scic_sds_port *scic_sds_phy_get_port(
  489. struct scic_sds_phy *this_phy);
  490. void scic_sds_phy_set_port(
  491. struct scic_sds_phy *this_phy,
  492. struct scic_sds_port *owning_port);
  493. enum sci_status scic_sds_phy_initialize(
  494. struct scic_sds_phy *this_phy,
  495. struct scu_transport_layer_registers __iomem *transport_layer_registers,
  496. struct scu_link_layer_registers __iomem *link_layer_registers);
  497. enum sci_status scic_sds_phy_start(
  498. struct scic_sds_phy *this_phy);
  499. enum sci_status scic_sds_phy_stop(
  500. struct scic_sds_phy *this_phy);
  501. enum sci_status scic_sds_phy_reset(
  502. struct scic_sds_phy *this_phy);
  503. void scic_sds_phy_resume(
  504. struct scic_sds_phy *this_phy);
  505. void scic_sds_phy_setup_transport(
  506. struct scic_sds_phy *this_phy,
  507. u32 device_id);
  508. enum sci_status scic_sds_phy_event_handler(
  509. struct scic_sds_phy *this_phy,
  510. u32 event_code);
  511. enum sci_status scic_sds_phy_frame_handler(
  512. struct scic_sds_phy *this_phy,
  513. u32 frame_index);
  514. enum sci_status scic_sds_phy_consume_power_handler(
  515. struct scic_sds_phy *this_phy);
  516. void scic_sds_phy_get_sas_address(
  517. struct scic_sds_phy *this_phy,
  518. struct sci_sas_address *sas_address);
  519. void scic_sds_phy_get_attached_sas_address(
  520. struct scic_sds_phy *this_phy,
  521. struct sci_sas_address *sas_address);
  522. struct scic_phy_proto;
  523. void scic_sds_phy_get_protocols(
  524. struct scic_sds_phy *sci_phy,
  525. struct scic_phy_proto *protocols);
  526. enum sas_linkrate sci_phy_linkrate(struct scic_sds_phy *sci_phy);
  527. struct isci_host;
  528. void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
  529. int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
  530. #endif /* !defined(_ISCI_PHY_H_) */