pmc551.c 26 KB

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  1. /*
  2. * PMC551 PCI Mezzanine Ram Device
  3. *
  4. * Author:
  5. * Mark Ferrell <mferrell@mvista.com>
  6. * Copyright 1999,2000 Nortel Networks
  7. *
  8. * License:
  9. * As part of this driver was derived from the slram.c driver it
  10. * falls under the same license, which is GNU General Public
  11. * License v2
  12. *
  13. * Description:
  14. * This driver is intended to support the PMC551 PCI Ram device
  15. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  16. * cPCI embedded systems. The device contains a single SROM
  17. * that initially programs the V370PDC chipset onboard the
  18. * device, and various banks of DRAM/SDRAM onboard. This driver
  19. * implements this PCI Ram device as an MTD (Memory Technology
  20. * Device) so that it can be used to hold a file system, or for
  21. * added swap space in embedded systems. Since the memory on
  22. * this board isn't as fast as main memory we do not try to hook
  23. * it into main memory as that would simply reduce performance
  24. * on the system. Using it as a block device allows us to use
  25. * it as high speed swap or for a high speed disk device of some
  26. * sort. Which becomes very useful on diskless systems in the
  27. * embedded market I might add.
  28. *
  29. * Notes:
  30. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  31. * have available claims that all 4 of its DRAM banks have 64MiB
  32. * of ram configured (making a grand total of 256MiB onboard).
  33. * This is slightly annoying since the BAR0 size reflects the
  34. * aperture size, not the dram size, and the V370PDC supplies no
  35. * other method for memory size discovery. This problem is
  36. * mostly only relevant when compiled as a module, as the
  37. * unloading of the module with an aperture size smaller than
  38. * the ram will cause the driver to detect the onboard memory
  39. * size to be equal to the aperture size when the module is
  40. * reloaded. Soooo, to help, the module supports an msize
  41. * option to allow the specification of the onboard memory, and
  42. * an asize option, to allow the specification of the aperture
  43. * size. The aperture must be equal to or less then the memory
  44. * size, the driver will correct this if you screw it up. This
  45. * problem is not relevant for compiled in drivers as compiled
  46. * in drivers only init once.
  47. *
  48. * Credits:
  49. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  50. * initial example code of how to initialize this device and for
  51. * help with questions I had concerning operation of the device.
  52. *
  53. * Most of the MTD code for this driver was originally written
  54. * for the slram.o module in the MTD drivers package which
  55. * allows the mapping of system memory into an MTD device.
  56. * Since the PMC551 memory module is accessed in the same
  57. * fashion as system memory, the slram.c code became a very nice
  58. * fit to the needs of this driver. All we added was PCI
  59. * detection/initialization to the driver and automatically figure
  60. * out the size via the PCI detection.o, later changes by Corey
  61. * Minyard set up the card to utilize a 1M sliding apature.
  62. *
  63. * Corey Minyard <minyard@nortelnetworks.com>
  64. * * Modified driver to utilize a sliding aperture instead of
  65. * mapping all memory into kernel space which turned out to
  66. * be very wasteful.
  67. * * Located a bug in the SROM's initialization sequence that
  68. * made the memory unusable, added a fix to code to touch up
  69. * the DRAM some.
  70. *
  71. * Bugs/FIXMEs:
  72. * * MUST fix the init function to not spin on a register
  73. * waiting for it to set .. this does not safely handle busted
  74. * devices that never reset the register correctly which will
  75. * cause the system to hang w/ a reboot being the only chance at
  76. * recover. [sort of fixed, could be better]
  77. * * Add I2C handling of the SROM so we can read the SROM's information
  78. * about the aperture size. This should always accurately reflect the
  79. * onboard memory size.
  80. * * Comb the init routine. It's still a bit cludgy on a few things.
  81. */
  82. #include <linux/kernel.h>
  83. #include <linux/module.h>
  84. #include <asm/uaccess.h>
  85. #include <linux/types.h>
  86. #include <linux/init.h>
  87. #include <linux/ptrace.h>
  88. #include <linux/slab.h>
  89. #include <linux/string.h>
  90. #include <linux/timer.h>
  91. #include <linux/major.h>
  92. #include <linux/fs.h>
  93. #include <linux/ioctl.h>
  94. #include <asm/io.h>
  95. #include <asm/system.h>
  96. #include <linux/pci.h>
  97. #include <linux/mtd/mtd.h>
  98. #define PMC551_VERSION \
  99. "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
  100. #define PCI_VENDOR_ID_V3_SEMI 0x11b0
  101. #define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
  102. #define PMC551_PCI_MEM_MAP0 0x50
  103. #define PMC551_PCI_MEM_MAP1 0x54
  104. #define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
  105. #define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
  106. #define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
  107. #define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
  108. #define PMC551_SDRAM_MA 0x60
  109. #define PMC551_SDRAM_CMD 0x62
  110. #define PMC551_DRAM_CFG 0x64
  111. #define PMC551_SYS_CTRL_REG 0x78
  112. #define PMC551_DRAM_BLK0 0x68
  113. #define PMC551_DRAM_BLK1 0x6c
  114. #define PMC551_DRAM_BLK2 0x70
  115. #define PMC551_DRAM_BLK3 0x74
  116. #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
  117. #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
  118. #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
  119. struct mypriv {
  120. struct pci_dev *dev;
  121. u_char *start;
  122. u32 base_map0;
  123. u32 curr_map0;
  124. u32 asize;
  125. struct mtd_info *nextpmc551;
  126. };
  127. static struct mtd_info *pmc551list;
  128. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  129. size_t *retlen, void **virt, resource_size_t *phys);
  130. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  131. {
  132. struct mypriv *priv = mtd->priv;
  133. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  134. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  135. unsigned long end;
  136. u_char *ptr;
  137. size_t retlen;
  138. #ifdef CONFIG_MTD_PMC551_DEBUG
  139. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  140. (long)instr->len);
  141. #endif
  142. end = instr->addr + instr->len - 1;
  143. eoff_hi = end & ~(priv->asize - 1);
  144. soff_hi = instr->addr & ~(priv->asize - 1);
  145. eoff_lo = end & (priv->asize - 1);
  146. soff_lo = instr->addr & (priv->asize - 1);
  147. pmc551_point(mtd, instr->addr, instr->len, &retlen,
  148. (void **)&ptr, NULL);
  149. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  150. /* The whole thing fits within one access, so just one shot
  151. will do it. */
  152. memset(ptr, 0xff, instr->len);
  153. } else {
  154. /* We have to do multiple writes to get all the data
  155. written. */
  156. while (soff_hi != eoff_hi) {
  157. #ifdef CONFIG_MTD_PMC551_DEBUG
  158. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  159. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  160. #endif
  161. memset(ptr, 0xff, priv->asize);
  162. if (soff_hi + priv->asize >= mtd->size) {
  163. goto out;
  164. }
  165. soff_hi += priv->asize;
  166. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  167. priv->asize, &retlen,
  168. (void **)&ptr, NULL);
  169. }
  170. memset(ptr, 0xff, eoff_lo);
  171. }
  172. out:
  173. instr->state = MTD_ERASE_DONE;
  174. #ifdef CONFIG_MTD_PMC551_DEBUG
  175. printk(KERN_DEBUG "pmc551_erase() done\n");
  176. #endif
  177. mtd_erase_callback(instr);
  178. return 0;
  179. }
  180. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  181. size_t *retlen, void **virt, resource_size_t *phys)
  182. {
  183. struct mypriv *priv = mtd->priv;
  184. u32 soff_hi;
  185. u32 soff_lo;
  186. #ifdef CONFIG_MTD_PMC551_DEBUG
  187. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  188. #endif
  189. /* can we return a physical address with this driver? */
  190. if (phys)
  191. return -EINVAL;
  192. soff_hi = from & ~(priv->asize - 1);
  193. soff_lo = from & (priv->asize - 1);
  194. /* Cheap hack optimization */
  195. if (priv->curr_map0 != from) {
  196. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  197. (priv->base_map0 | soff_hi));
  198. priv->curr_map0 = soff_hi;
  199. }
  200. *virt = priv->start + soff_lo;
  201. *retlen = len;
  202. return 0;
  203. }
  204. static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
  205. {
  206. #ifdef CONFIG_MTD_PMC551_DEBUG
  207. printk(KERN_DEBUG "pmc551_unpoint()\n");
  208. #endif
  209. return 0;
  210. }
  211. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  212. size_t * retlen, u_char * buf)
  213. {
  214. struct mypriv *priv = mtd->priv;
  215. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  216. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  217. unsigned long end;
  218. u_char *ptr;
  219. u_char *copyto = buf;
  220. #ifdef CONFIG_MTD_PMC551_DEBUG
  221. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  222. (long)from, (long)len, (long)priv->asize);
  223. #endif
  224. end = from + len - 1;
  225. soff_hi = from & ~(priv->asize - 1);
  226. eoff_hi = end & ~(priv->asize - 1);
  227. soff_lo = from & (priv->asize - 1);
  228. eoff_lo = end & (priv->asize - 1);
  229. pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
  230. if (soff_hi == eoff_hi) {
  231. /* The whole thing fits within one access, so just one shot
  232. will do it. */
  233. memcpy(copyto, ptr, len);
  234. copyto += len;
  235. } else {
  236. /* We have to do multiple writes to get all the data
  237. written. */
  238. while (soff_hi != eoff_hi) {
  239. #ifdef CONFIG_MTD_PMC551_DEBUG
  240. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  241. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  242. #endif
  243. memcpy(copyto, ptr, priv->asize);
  244. copyto += priv->asize;
  245. if (soff_hi + priv->asize >= mtd->size) {
  246. goto out;
  247. }
  248. soff_hi += priv->asize;
  249. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  250. (void **)&ptr, NULL);
  251. }
  252. memcpy(copyto, ptr, eoff_lo);
  253. copyto += eoff_lo;
  254. }
  255. out:
  256. #ifdef CONFIG_MTD_PMC551_DEBUG
  257. printk(KERN_DEBUG "pmc551_read() done\n");
  258. #endif
  259. *retlen = copyto - buf;
  260. return 0;
  261. }
  262. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  263. size_t * retlen, const u_char * buf)
  264. {
  265. struct mypriv *priv = mtd->priv;
  266. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  267. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  268. unsigned long end;
  269. u_char *ptr;
  270. const u_char *copyfrom = buf;
  271. #ifdef CONFIG_MTD_PMC551_DEBUG
  272. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  273. (long)to, (long)len, (long)priv->asize);
  274. #endif
  275. end = to + len - 1;
  276. soff_hi = to & ~(priv->asize - 1);
  277. eoff_hi = end & ~(priv->asize - 1);
  278. soff_lo = to & (priv->asize - 1);
  279. eoff_lo = end & (priv->asize - 1);
  280. pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
  281. if (soff_hi == eoff_hi) {
  282. /* The whole thing fits within one access, so just one shot
  283. will do it. */
  284. memcpy(ptr, copyfrom, len);
  285. copyfrom += len;
  286. } else {
  287. /* We have to do multiple writes to get all the data
  288. written. */
  289. while (soff_hi != eoff_hi) {
  290. #ifdef CONFIG_MTD_PMC551_DEBUG
  291. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  292. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  293. #endif
  294. memcpy(ptr, copyfrom, priv->asize);
  295. copyfrom += priv->asize;
  296. if (soff_hi >= mtd->size) {
  297. goto out;
  298. }
  299. soff_hi += priv->asize;
  300. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  301. (void **)&ptr, NULL);
  302. }
  303. memcpy(ptr, copyfrom, eoff_lo);
  304. copyfrom += eoff_lo;
  305. }
  306. out:
  307. #ifdef CONFIG_MTD_PMC551_DEBUG
  308. printk(KERN_DEBUG "pmc551_write() done\n");
  309. #endif
  310. *retlen = copyfrom - buf;
  311. return 0;
  312. }
  313. /*
  314. * Fixup routines for the V370PDC
  315. * PCI device ID 0x020011b0
  316. *
  317. * This function basically kick starts the DRAM oboard the card and gets it
  318. * ready to be used. Before this is done the device reads VERY erratic, so
  319. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  320. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  321. * register. FIXME: stop spinning on registers .. must implement a timeout
  322. * mechanism
  323. * returns the size of the memory region found.
  324. */
  325. static int fixup_pmc551(struct pci_dev *dev)
  326. {
  327. #ifdef CONFIG_MTD_PMC551_BUGFIX
  328. u32 dram_data;
  329. #endif
  330. u32 size, dcmd, cfg, dtmp;
  331. u16 cmd, tmp, i;
  332. u8 bcmd, counter;
  333. /* Sanity Check */
  334. if (!dev) {
  335. return -ENODEV;
  336. }
  337. /*
  338. * Attempt to reset the card
  339. * FIXME: Stop Spinning registers
  340. */
  341. counter = 0;
  342. /* unlock registers */
  343. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  344. /* read in old data */
  345. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  346. /* bang the reset line up and down for a few */
  347. for (i = 0; i < 10; i++) {
  348. counter = 0;
  349. bcmd &= ~0x80;
  350. while (counter++ < 100) {
  351. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  352. }
  353. counter = 0;
  354. bcmd |= 0x80;
  355. while (counter++ < 100) {
  356. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  357. }
  358. }
  359. bcmd |= (0x40 | 0x20);
  360. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  361. /*
  362. * Take care and turn off the memory on the device while we
  363. * tweak the configurations
  364. */
  365. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  366. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  367. pci_write_config_word(dev, PCI_COMMAND, tmp);
  368. /*
  369. * Disable existing aperture before probing memory size
  370. */
  371. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  372. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  373. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  374. /*
  375. * Grab old BAR0 config so that we can figure out memory size
  376. * This is another bit of kludge going on. The reason for the
  377. * redundancy is I am hoping to retain the original configuration
  378. * previously assigned to the card by the BIOS or some previous
  379. * fixup routine in the kernel. So we read the old config into cfg,
  380. * then write all 1's to the memory space, read back the result into
  381. * "size", and then write back all the old config.
  382. */
  383. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  384. #ifndef CONFIG_MTD_PMC551_BUGFIX
  385. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  386. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  387. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  388. size &= ~(size - 1);
  389. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  390. #else
  391. /*
  392. * Get the size of the memory by reading all the DRAM size values
  393. * and adding them up.
  394. *
  395. * KLUDGE ALERT: the boards we are using have invalid column and
  396. * row mux values. We fix them here, but this will break other
  397. * memory configurations.
  398. */
  399. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  400. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  401. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  402. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  403. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  404. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  405. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  406. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  407. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  408. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  409. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  410. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  411. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  412. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  413. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  414. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  415. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  416. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  417. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  418. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  419. /*
  420. * Oops .. something went wrong
  421. */
  422. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  423. return -ENODEV;
  424. }
  425. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  426. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  427. return -ENODEV;
  428. }
  429. /*
  430. * Precharge Dram
  431. */
  432. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  433. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  434. /*
  435. * Wait until command has gone through
  436. * FIXME: register spinning issue
  437. */
  438. do {
  439. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  440. if (counter++ > 100)
  441. break;
  442. } while ((PCI_COMMAND_IO) & cmd);
  443. /*
  444. * Turn on auto refresh
  445. * The loop is taken directly from Ramix's example code. I assume that
  446. * this must be held high for some duration of time, but I can find no
  447. * documentation refrencing the reasons why.
  448. */
  449. for (i = 1; i <= 8; i++) {
  450. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  451. /*
  452. * Make certain command has gone through
  453. * FIXME: register spinning issue
  454. */
  455. counter = 0;
  456. do {
  457. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  458. if (counter++ > 100)
  459. break;
  460. } while ((PCI_COMMAND_IO) & cmd);
  461. }
  462. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  463. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  464. /*
  465. * Wait until command completes
  466. * FIXME: register spinning issue
  467. */
  468. counter = 0;
  469. do {
  470. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  471. if (counter++ > 100)
  472. break;
  473. } while ((PCI_COMMAND_IO) & cmd);
  474. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  475. dcmd |= 0x02000000;
  476. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  477. /*
  478. * Check to make certain fast back-to-back, if not
  479. * then set it so
  480. */
  481. pci_read_config_word(dev, PCI_STATUS, &cmd);
  482. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  483. cmd |= PCI_COMMAND_FAST_BACK;
  484. pci_write_config_word(dev, PCI_STATUS, cmd);
  485. }
  486. /*
  487. * Check to make certain the DEVSEL is set correctly, this device
  488. * has a tendency to assert DEVSEL and TRDY when a write is performed
  489. * to the memory when memory is read-only
  490. */
  491. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  492. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  493. pci_write_config_word(dev, PCI_STATUS, cmd);
  494. }
  495. /*
  496. * Set to be prefetchable and put everything back based on old cfg.
  497. * it's possible that the reset of the V370PDC nuked the original
  498. * setup
  499. */
  500. /*
  501. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  502. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  503. */
  504. /*
  505. * Turn PCI memory and I/O bus access back on
  506. */
  507. pci_write_config_word(dev, PCI_COMMAND,
  508. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  509. #ifdef CONFIG_MTD_PMC551_DEBUG
  510. /*
  511. * Some screen fun
  512. */
  513. printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
  514. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  515. size >> 10 : size >> 20,
  516. (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
  517. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  518. (unsigned long long)pci_resource_start(dev, 0));
  519. /*
  520. * Check to see the state of the memory
  521. */
  522. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  523. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  524. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  525. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  526. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  527. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  528. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  529. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  530. ((dcmd >> 9) & 0xF));
  531. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  532. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  533. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  534. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  535. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  536. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  537. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  538. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  539. ((dcmd >> 9) & 0xF));
  540. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  541. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  542. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  543. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  544. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  545. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  546. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  547. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  548. ((dcmd >> 9) & 0xF));
  549. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  550. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  551. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  552. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  553. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  554. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  555. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  556. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  557. ((dcmd >> 9) & 0xF));
  558. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  559. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  560. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  561. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  562. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  563. pci_read_config_word(dev, PCI_STATUS, &cmd);
  564. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  565. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  566. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  567. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  568. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  569. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  570. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  571. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  572. "pmc551: System Control Register is %slocked to PCI access\n"
  573. "pmc551: System Control Register is %slocked to EEPROM access\n",
  574. (bcmd & 0x1) ? "software" : "hardware",
  575. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  576. #endif
  577. return size;
  578. }
  579. /*
  580. * Kernel version specific module stuffages
  581. */
  582. MODULE_LICENSE("GPL");
  583. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  584. MODULE_DESCRIPTION(PMC551_VERSION);
  585. /*
  586. * Stuff these outside the ifdef so as to not bust compiled in driver support
  587. */
  588. static int msize = 0;
  589. static int asize = 0;
  590. module_param(msize, int, 0);
  591. MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
  592. module_param(asize, int, 0);
  593. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  594. /*
  595. * PMC551 Card Initialization
  596. */
  597. static int __init init_pmc551(void)
  598. {
  599. struct pci_dev *PCI_Device = NULL;
  600. struct mypriv *priv;
  601. int found = 0;
  602. struct mtd_info *mtd;
  603. int length = 0;
  604. if (msize) {
  605. msize = (1 << (ffs(msize) - 1)) << 20;
  606. if (msize > (1 << 30)) {
  607. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  608. msize);
  609. return -EINVAL;
  610. }
  611. }
  612. if (asize) {
  613. asize = (1 << (ffs(asize) - 1)) << 20;
  614. if (asize > (1 << 30)) {
  615. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  616. "[%d]\n", asize);
  617. return -EINVAL;
  618. }
  619. }
  620. printk(KERN_INFO PMC551_VERSION);
  621. /*
  622. * PCU-bus chipset probe.
  623. */
  624. for (;;) {
  625. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  626. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  627. PCI_Device)) == NULL) {
  628. break;
  629. }
  630. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  631. (unsigned long long)pci_resource_start(PCI_Device, 0));
  632. /*
  633. * The PMC551 device acts VERY weird if you don't init it
  634. * first. i.e. it will not correctly report devsel. If for
  635. * some reason the sdram is in a wrote-protected state the
  636. * device will DEVSEL when it is written to causing problems
  637. * with the oldproc.c driver in
  638. * some kernels (2.2.*)
  639. */
  640. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  641. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  642. break;
  643. }
  644. /*
  645. * This is needed until the driver is capable of reading the
  646. * onboard I2C SROM to discover the "real" memory size.
  647. */
  648. if (msize) {
  649. length = msize;
  650. printk(KERN_NOTICE "pmc551: Using specified memory "
  651. "size 0x%x\n", length);
  652. } else {
  653. msize = length;
  654. }
  655. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  656. if (!mtd) {
  657. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  658. "device.\n");
  659. break;
  660. }
  661. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  662. if (!priv) {
  663. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  664. "device.\n");
  665. kfree(mtd);
  666. break;
  667. }
  668. mtd->priv = priv;
  669. priv->dev = PCI_Device;
  670. if (asize > length) {
  671. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  672. "fit %dM\n", length >> 20);
  673. priv->asize = asize = length;
  674. } else if (asize == 0 || asize == length) {
  675. printk(KERN_NOTICE "pmc551: Using existing aperture "
  676. "size %dM\n", length >> 20);
  677. priv->asize = asize = length;
  678. } else {
  679. printk(KERN_NOTICE "pmc551: Using specified aperture "
  680. "size %dM\n", asize >> 20);
  681. priv->asize = asize;
  682. }
  683. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  684. if (!priv->start) {
  685. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  686. kfree(mtd->priv);
  687. kfree(mtd);
  688. break;
  689. }
  690. #ifdef CONFIG_MTD_PMC551_DEBUG
  691. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  692. ffs(priv->asize >> 20) - 1);
  693. #endif
  694. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  695. | PMC551_PCI_MEM_MAP_ENABLE
  696. | (ffs(priv->asize >> 20) - 1) << 4);
  697. priv->curr_map0 = priv->base_map0;
  698. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  699. priv->curr_map0);
  700. #ifdef CONFIG_MTD_PMC551_DEBUG
  701. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  702. (priv->base_map0 & 0xF0) >> 4);
  703. #endif
  704. mtd->size = msize;
  705. mtd->flags = MTD_CAP_RAM;
  706. mtd->_erase = pmc551_erase;
  707. mtd->_read = pmc551_read;
  708. mtd->_write = pmc551_write;
  709. mtd->_point = pmc551_point;
  710. mtd->_unpoint = pmc551_unpoint;
  711. mtd->type = MTD_RAM;
  712. mtd->name = "PMC551 RAM board";
  713. mtd->erasesize = 0x10000;
  714. mtd->writesize = 1;
  715. mtd->owner = THIS_MODULE;
  716. if (mtd_device_register(mtd, NULL, 0)) {
  717. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  718. pci_iounmap(PCI_Device, priv->start);
  719. kfree(mtd->priv);
  720. kfree(mtd);
  721. break;
  722. }
  723. /* Keep a reference as the mtd_device_register worked */
  724. pci_dev_get(PCI_Device);
  725. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  726. printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
  727. priv->asize >> 20,
  728. priv->start, priv->start + priv->asize);
  729. printk(KERN_NOTICE "Total memory is %d%sB\n",
  730. (length < 1024) ? length :
  731. (length < 1048576) ? length >> 10 : length >> 20,
  732. (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
  733. priv->nextpmc551 = pmc551list;
  734. pmc551list = mtd;
  735. found++;
  736. }
  737. /* Exited early, reference left over */
  738. if (PCI_Device)
  739. pci_dev_put(PCI_Device);
  740. if (!pmc551list) {
  741. printk(KERN_NOTICE "pmc551: not detected\n");
  742. return -ENODEV;
  743. } else {
  744. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  745. return 0;
  746. }
  747. }
  748. /*
  749. * PMC551 Card Cleanup
  750. */
  751. static void __exit cleanup_pmc551(void)
  752. {
  753. int found = 0;
  754. struct mtd_info *mtd;
  755. struct mypriv *priv;
  756. while ((mtd = pmc551list)) {
  757. priv = mtd->priv;
  758. pmc551list = priv->nextpmc551;
  759. if (priv->start) {
  760. printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
  761. "0x%p\n", priv->asize >> 20, priv->start);
  762. pci_iounmap(priv->dev, priv->start);
  763. }
  764. pci_dev_put(priv->dev);
  765. kfree(mtd->priv);
  766. mtd_device_unregister(mtd);
  767. kfree(mtd);
  768. found++;
  769. }
  770. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  771. }
  772. module_init(init_pmc551);
  773. module_exit(cleanup_pmc551);