board-3430sdp.c 16 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/i2c/twl.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/io.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/platform_data/spi-omap2-mcspi.h>
  27. #include <linux/platform_data/omap-twl4030.h>
  28. #include <linux/usb/phy.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/map.h>
  32. #include "common.h"
  33. #include <linux/omap-dma.h>
  34. #include <video/omapdss.h>
  35. #include <video/omap-panel-data.h>
  36. #include "gpmc.h"
  37. #include "gpmc-smc91x.h"
  38. #include "soc.h"
  39. #include "board-flash.h"
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #include "control.h"
  45. #include "common-board-devices.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. static uint32_t board_keymap[] = {
  53. KEY(0, 0, KEY_LEFT),
  54. KEY(0, 1, KEY_RIGHT),
  55. KEY(0, 2, KEY_A),
  56. KEY(0, 3, KEY_B),
  57. KEY(0, 4, KEY_C),
  58. KEY(1, 0, KEY_DOWN),
  59. KEY(1, 1, KEY_UP),
  60. KEY(1, 2, KEY_E),
  61. KEY(1, 3, KEY_F),
  62. KEY(1, 4, KEY_G),
  63. KEY(2, 0, KEY_ENTER),
  64. KEY(2, 1, KEY_I),
  65. KEY(2, 2, KEY_J),
  66. KEY(2, 3, KEY_K),
  67. KEY(2, 4, KEY_3),
  68. KEY(3, 0, KEY_M),
  69. KEY(3, 1, KEY_N),
  70. KEY(3, 2, KEY_O),
  71. KEY(3, 3, KEY_P),
  72. KEY(3, 4, KEY_Q),
  73. KEY(4, 0, KEY_R),
  74. KEY(4, 1, KEY_4),
  75. KEY(4, 2, KEY_T),
  76. KEY(4, 3, KEY_U),
  77. KEY(4, 4, KEY_D),
  78. KEY(5, 0, KEY_V),
  79. KEY(5, 1, KEY_W),
  80. KEY(5, 2, KEY_L),
  81. KEY(5, 3, KEY_S),
  82. KEY(5, 4, KEY_H),
  83. 0
  84. };
  85. static struct matrix_keymap_data board_map_data = {
  86. .keymap = board_keymap,
  87. .keymap_size = ARRAY_SIZE(board_keymap),
  88. };
  89. static struct twl4030_keypad_data sdp3430_kp_data = {
  90. .keymap_data = &board_map_data,
  91. .rows = 5,
  92. .cols = 6,
  93. .rep = 1,
  94. };
  95. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  96. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  97. static void __init sdp3430_display_init(void)
  98. {
  99. int r;
  100. /*
  101. * the backlight GPIO doesn't directly go to the panel, it enables
  102. * an internal circuit on 3430sdp to create the signal V_BKL_28V,
  103. * this is connected to LED+ pin of the sharp panel. This GPIO
  104. * is left enabled in the board file, and not passed to the panel
  105. * as platform_data.
  106. */
  107. r = gpio_request_one(SDP3430_LCD_PANEL_BACKLIGHT_GPIO,
  108. GPIOF_OUT_INIT_HIGH, "LCD Backlight");
  109. if (r)
  110. pr_err("failed to get LCD Backlight GPIO\n");
  111. }
  112. static struct panel_sharp_ls037v7dw01_platform_data sdp3430_lcd_pdata = {
  113. .name = "lcd",
  114. .source = "dpi.0",
  115. .data_lines = 16,
  116. .resb_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO,
  117. .ini_gpio = -1,
  118. .mo_gpio = -1,
  119. .lr_gpio = -1,
  120. .ud_gpio = -1,
  121. };
  122. static struct platform_device sdp3430_lcd_device = {
  123. .name = "panel-sharp-ls037v7dw01",
  124. .id = 0,
  125. .dev.platform_data = &sdp3430_lcd_pdata,
  126. };
  127. static struct connector_dvi_platform_data sdp3430_dvi_connector_pdata = {
  128. .name = "dvi",
  129. .source = "tfp410.0",
  130. .i2c_bus_num = -1,
  131. };
  132. static struct platform_device sdp3430_dvi_connector_device = {
  133. .name = "connector-dvi",
  134. .id = 0,
  135. .dev.platform_data = &sdp3430_dvi_connector_pdata,
  136. };
  137. static struct encoder_tfp410_platform_data sdp3430_tfp410_pdata = {
  138. .name = "tfp410.0",
  139. .source = "dpi.0",
  140. .data_lines = 24,
  141. .power_down_gpio = -1,
  142. };
  143. static struct platform_device sdp3430_tfp410_device = {
  144. .name = "tfp410",
  145. .id = 0,
  146. .dev.platform_data = &sdp3430_tfp410_pdata,
  147. };
  148. static struct connector_atv_platform_data sdp3430_tv_pdata = {
  149. .name = "tv",
  150. .source = "venc.0",
  151. .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
  152. .invert_polarity = false,
  153. };
  154. static struct platform_device sdp3430_tv_connector_device = {
  155. .name = "connector-analog-tv",
  156. .id = 0,
  157. .dev.platform_data = &sdp3430_tv_pdata,
  158. };
  159. static struct omap_dss_board_info sdp3430_dss_data = {
  160. .default_display_name = "lcd",
  161. };
  162. static struct omap2_hsmmc_info mmc[] = {
  163. {
  164. .mmc = 1,
  165. /* 8 bits (default) requires S6.3 == ON,
  166. * so the SIM card isn't used; else 4 bits.
  167. */
  168. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  169. .gpio_wp = 4,
  170. .deferred = true,
  171. },
  172. {
  173. .mmc = 2,
  174. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  175. .gpio_wp = 7,
  176. .deferred = true,
  177. },
  178. {} /* Terminator */
  179. };
  180. static struct omap_tw4030_pdata omap_twl4030_audio_data = {
  181. .voice_connected = true,
  182. .custom_routing = true,
  183. .has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  184. .has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  185. .has_mainmic = true,
  186. .has_submic = true,
  187. .has_hsmic = true,
  188. .has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
  189. };
  190. static int sdp3430_twl_gpio_setup(struct device *dev,
  191. unsigned gpio, unsigned ngpio)
  192. {
  193. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  194. * gpio + 1 is "mmc1_cd" (input/IRQ)
  195. */
  196. mmc[0].gpio_cd = gpio + 0;
  197. mmc[1].gpio_cd = gpio + 1;
  198. omap_hsmmc_late_init(mmc);
  199. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  200. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
  201. /* gpio + 15 is "sub_lcd_nRST" (output) */
  202. gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
  203. omap_twl4030_audio_data.jack_detect = gpio + 2;
  204. omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
  205. return 0;
  206. }
  207. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  208. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  209. | BIT(16) | BIT(17),
  210. .setup = sdp3430_twl_gpio_setup,
  211. };
  212. /* regulator consumer mappings */
  213. /* ads7846 on SPI */
  214. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  215. REGULATOR_SUPPLY("vcc", "spi1.0"),
  216. };
  217. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  218. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  219. };
  220. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  221. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  222. };
  223. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  224. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  225. };
  226. /*
  227. * Apply all the fixed voltages since most versions of U-Boot
  228. * don't bother with that initialization.
  229. */
  230. /* VAUX1 for mainboard (irda and sub-lcd) */
  231. static struct regulator_init_data sdp3430_vaux1 = {
  232. .constraints = {
  233. .min_uV = 2800000,
  234. .max_uV = 2800000,
  235. .apply_uV = true,
  236. .valid_modes_mask = REGULATOR_MODE_NORMAL
  237. | REGULATOR_MODE_STANDBY,
  238. .valid_ops_mask = REGULATOR_CHANGE_MODE
  239. | REGULATOR_CHANGE_STATUS,
  240. },
  241. };
  242. /* VAUX2 for camera module */
  243. static struct regulator_init_data sdp3430_vaux2 = {
  244. .constraints = {
  245. .min_uV = 2800000,
  246. .max_uV = 2800000,
  247. .apply_uV = true,
  248. .valid_modes_mask = REGULATOR_MODE_NORMAL
  249. | REGULATOR_MODE_STANDBY,
  250. .valid_ops_mask = REGULATOR_CHANGE_MODE
  251. | REGULATOR_CHANGE_STATUS,
  252. },
  253. };
  254. /* VAUX3 for LCD board */
  255. static struct regulator_init_data sdp3430_vaux3 = {
  256. .constraints = {
  257. .min_uV = 2800000,
  258. .max_uV = 2800000,
  259. .apply_uV = true,
  260. .valid_modes_mask = REGULATOR_MODE_NORMAL
  261. | REGULATOR_MODE_STANDBY,
  262. .valid_ops_mask = REGULATOR_CHANGE_MODE
  263. | REGULATOR_CHANGE_STATUS,
  264. },
  265. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  266. .consumer_supplies = sdp3430_vaux3_supplies,
  267. };
  268. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  269. static struct regulator_init_data sdp3430_vaux4 = {
  270. .constraints = {
  271. .min_uV = 1800000,
  272. .max_uV = 1800000,
  273. .apply_uV = true,
  274. .valid_modes_mask = REGULATOR_MODE_NORMAL
  275. | REGULATOR_MODE_STANDBY,
  276. .valid_ops_mask = REGULATOR_CHANGE_MODE
  277. | REGULATOR_CHANGE_STATUS,
  278. },
  279. };
  280. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  281. static struct regulator_init_data sdp3430_vmmc1 = {
  282. .constraints = {
  283. .min_uV = 1850000,
  284. .max_uV = 3150000,
  285. .valid_modes_mask = REGULATOR_MODE_NORMAL
  286. | REGULATOR_MODE_STANDBY,
  287. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  288. | REGULATOR_CHANGE_MODE
  289. | REGULATOR_CHANGE_STATUS,
  290. },
  291. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  292. .consumer_supplies = sdp3430_vmmc1_supplies,
  293. };
  294. /* VMMC2 for MMC2 card */
  295. static struct regulator_init_data sdp3430_vmmc2 = {
  296. .constraints = {
  297. .min_uV = 1850000,
  298. .max_uV = 1850000,
  299. .apply_uV = true,
  300. .valid_modes_mask = REGULATOR_MODE_NORMAL
  301. | REGULATOR_MODE_STANDBY,
  302. .valid_ops_mask = REGULATOR_CHANGE_MODE
  303. | REGULATOR_CHANGE_STATUS,
  304. },
  305. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  306. .consumer_supplies = sdp3430_vmmc2_supplies,
  307. };
  308. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  309. static struct regulator_init_data sdp3430_vsim = {
  310. .constraints = {
  311. .min_uV = 1800000,
  312. .max_uV = 3000000,
  313. .valid_modes_mask = REGULATOR_MODE_NORMAL
  314. | REGULATOR_MODE_STANDBY,
  315. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  316. | REGULATOR_CHANGE_MODE
  317. | REGULATOR_CHANGE_STATUS,
  318. },
  319. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  320. .consumer_supplies = sdp3430_vsim_supplies,
  321. };
  322. static struct twl4030_platform_data sdp3430_twldata = {
  323. /* platform_data for children goes here */
  324. .gpio = &sdp3430_gpio_data,
  325. .keypad = &sdp3430_kp_data,
  326. .vaux1 = &sdp3430_vaux1,
  327. .vaux2 = &sdp3430_vaux2,
  328. .vaux3 = &sdp3430_vaux3,
  329. .vaux4 = &sdp3430_vaux4,
  330. .vmmc1 = &sdp3430_vmmc1,
  331. .vmmc2 = &sdp3430_vmmc2,
  332. .vsim = &sdp3430_vsim,
  333. };
  334. static int __init omap3430_i2c_init(void)
  335. {
  336. /* i2c1 for PMIC only */
  337. omap3_pmic_get_config(&sdp3430_twldata,
  338. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
  339. TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
  340. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  341. sdp3430_twldata.vdac->constraints.apply_uV = true;
  342. sdp3430_twldata.vpll2->constraints.apply_uV = true;
  343. sdp3430_twldata.vpll2->constraints.name = "VDVI";
  344. sdp3430_twldata.audio->codec->hs_extmute = 1;
  345. sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
  346. omap3_pmic_init("twl4030", &sdp3430_twldata);
  347. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  348. omap_register_i2c_bus(2, 400, NULL, 0);
  349. /* i2c3 on display connector (for DVI, tfp410) */
  350. omap_register_i2c_bus(3, 400, NULL, 0);
  351. return 0;
  352. }
  353. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  354. static struct omap_smc91x_platform_data board_smc91x_data = {
  355. .cs = 3,
  356. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  357. IORESOURCE_IRQ_LOWLEVEL,
  358. };
  359. static void __init board_smc91x_init(void)
  360. {
  361. if (omap_rev() > OMAP3430_REV_ES1_0)
  362. board_smc91x_data.gpio_irq = 6;
  363. else
  364. board_smc91x_data.gpio_irq = 29;
  365. gpmc_smc91x_init(&board_smc91x_data);
  366. }
  367. #else
  368. static inline void board_smc91x_init(void)
  369. {
  370. }
  371. #endif
  372. static void enable_board_wakeup_source(void)
  373. {
  374. /* T2 interrupt line (keypad) */
  375. omap_mux_init_signal("sys_nirq",
  376. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  377. }
  378. static struct usbhs_phy_data phy_data[] __initdata = {
  379. {
  380. .port = 1,
  381. .reset_gpio = 57,
  382. .vcc_gpio = -EINVAL,
  383. },
  384. {
  385. .port = 2,
  386. .reset_gpio = 61,
  387. .vcc_gpio = -EINVAL,
  388. },
  389. };
  390. static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
  391. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  392. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  393. };
  394. #ifdef CONFIG_OMAP_MUX
  395. static struct omap_board_mux board_mux[] __initdata = {
  396. { .reg_offset = OMAP_MUX_TERMINATOR },
  397. };
  398. #else
  399. #define board_mux NULL
  400. #endif
  401. /*
  402. * SDP3430 V2 Board CS organization
  403. * Different from SDP3430 V1. Now 4 switches used to specify CS
  404. *
  405. * See also the Switch S8 settings in the comments.
  406. */
  407. static char chip_sel_3430[][GPMC_CS_NUM] = {
  408. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  409. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  410. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  411. };
  412. static struct mtd_partition sdp_nor_partitions[] = {
  413. /* bootloader (U-Boot, etc) in first sector */
  414. {
  415. .name = "Bootloader-NOR",
  416. .offset = 0,
  417. .size = SZ_256K,
  418. .mask_flags = MTD_WRITEABLE, /* force read-only */
  419. },
  420. /* bootloader params in the next sector */
  421. {
  422. .name = "Params-NOR",
  423. .offset = MTDPART_OFS_APPEND,
  424. .size = SZ_256K,
  425. .mask_flags = 0,
  426. },
  427. /* kernel */
  428. {
  429. .name = "Kernel-NOR",
  430. .offset = MTDPART_OFS_APPEND,
  431. .size = SZ_2M,
  432. .mask_flags = 0
  433. },
  434. /* file system */
  435. {
  436. .name = "Filesystem-NOR",
  437. .offset = MTDPART_OFS_APPEND,
  438. .size = MTDPART_SIZ_FULL,
  439. .mask_flags = 0
  440. }
  441. };
  442. static struct mtd_partition sdp_onenand_partitions[] = {
  443. {
  444. .name = "X-Loader-OneNAND",
  445. .offset = 0,
  446. .size = 4 * (64 * 2048),
  447. .mask_flags = MTD_WRITEABLE /* force read-only */
  448. },
  449. {
  450. .name = "U-Boot-OneNAND",
  451. .offset = MTDPART_OFS_APPEND,
  452. .size = 2 * (64 * 2048),
  453. .mask_flags = MTD_WRITEABLE /* force read-only */
  454. },
  455. {
  456. .name = "U-Boot Environment-OneNAND",
  457. .offset = MTDPART_OFS_APPEND,
  458. .size = 1 * (64 * 2048),
  459. },
  460. {
  461. .name = "Kernel-OneNAND",
  462. .offset = MTDPART_OFS_APPEND,
  463. .size = 16 * (64 * 2048),
  464. },
  465. {
  466. .name = "File System-OneNAND",
  467. .offset = MTDPART_OFS_APPEND,
  468. .size = MTDPART_SIZ_FULL,
  469. },
  470. };
  471. static struct mtd_partition sdp_nand_partitions[] = {
  472. /* All the partition sizes are listed in terms of NAND block size */
  473. {
  474. .name = "X-Loader-NAND",
  475. .offset = 0,
  476. .size = 4 * (64 * 2048),
  477. .mask_flags = MTD_WRITEABLE, /* force read-only */
  478. },
  479. {
  480. .name = "U-Boot-NAND",
  481. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  482. .size = 10 * (64 * 2048),
  483. .mask_flags = MTD_WRITEABLE, /* force read-only */
  484. },
  485. {
  486. .name = "Boot Env-NAND",
  487. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  488. .size = 6 * (64 * 2048),
  489. },
  490. {
  491. .name = "Kernel-NAND",
  492. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  493. .size = 40 * (64 * 2048),
  494. },
  495. {
  496. .name = "File System - NAND",
  497. .size = MTDPART_SIZ_FULL,
  498. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  499. },
  500. };
  501. static struct flash_partitions sdp_flash_partitions[] = {
  502. {
  503. .parts = sdp_nor_partitions,
  504. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  505. },
  506. {
  507. .parts = sdp_onenand_partitions,
  508. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  509. },
  510. {
  511. .parts = sdp_nand_partitions,
  512. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  513. },
  514. };
  515. static void __init omap_3430sdp_init(void)
  516. {
  517. int gpio_pendown;
  518. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  519. omap_hsmmc_init(mmc);
  520. omap3430_i2c_init();
  521. omap_display_init(&sdp3430_dss_data);
  522. platform_device_register(&sdp3430_lcd_device);
  523. platform_device_register(&sdp3430_tfp410_device);
  524. platform_device_register(&sdp3430_dvi_connector_device);
  525. platform_device_register(&sdp3430_tv_connector_device);
  526. if (omap_rev() > OMAP3430_REV_ES1_0)
  527. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
  528. else
  529. gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
  530. omap_ads7846_init(1, gpio_pendown, 310, NULL);
  531. omap_serial_init();
  532. omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
  533. usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
  534. usb_musb_init(NULL);
  535. board_smc91x_init();
  536. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  537. sdp3430_display_init();
  538. enable_board_wakeup_source();
  539. usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
  540. usbhs_init(&usbhs_bdata);
  541. }
  542. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  543. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  544. .atag_offset = 0x100,
  545. .reserve = omap_reserve,
  546. .map_io = omap3_map_io,
  547. .init_early = omap3430_init_early,
  548. .init_irq = omap3_init_irq,
  549. .handle_irq = omap3_intc_handle_irq,
  550. .init_machine = omap_3430sdp_init,
  551. .init_late = omap3430_init_late,
  552. .init_time = omap3_sync32k_timer_init,
  553. .restart = omap3xxx_restart,
  554. MACHINE_END