es1938.c 51 KB

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  1. /*
  2. * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
  3. * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
  4. * Jaroslav Kysela <perex@suse.cz>,
  5. * Thomas Sailer <sailer@ife.ee.ethz.ch>,
  6. * Abramo Bagnara <abramo@alsa-project.org>,
  7. * Markus Gruber <gruber@eikon.tum.de>
  8. *
  9. * Rewritten from sonicvibes.c source.
  10. *
  11. * TODO:
  12. * Rewrite better spinlocks
  13. *
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. /*
  31. NOTES:
  32. - Capture data is written unaligned starting from dma_base + 1 so I need to
  33. disable mmap and to add a copy callback.
  34. - After several cycle of the following:
  35. while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
  36. a "playback write error (DMA or IRQ trouble?)" may happen.
  37. This is due to playback interrupts not generated.
  38. I suspect a timing issue.
  39. - Sometimes the interrupt handler is invoked wrongly during playback.
  40. This generates some harmless "Unexpected hw_pointer: wrong interrupt
  41. acknowledge".
  42. I've seen that using small period sizes.
  43. Reproducible with:
  44. mpg123 test.mp3 &
  45. hdparm -t -T /dev/hda
  46. */
  47. #include <sound/driver.h>
  48. #include <linux/init.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/pci.h>
  51. #include <linux/slab.h>
  52. #include <linux/gameport.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/delay.h>
  55. #include <sound/core.h>
  56. #include <sound/control.h>
  57. #include <sound/pcm.h>
  58. #include <sound/opl3.h>
  59. #include <sound/mpu401.h>
  60. #include <sound/initval.h>
  61. #include <asm/io.h>
  62. MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
  63. MODULE_DESCRIPTION("ESS Solo-1");
  64. MODULE_LICENSE("GPL");
  65. MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
  66. "{ESS,ES1946},"
  67. "{ESS,ES1969},"
  68. "{TerraTec,128i PCI}}");
  69. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  70. #define SUPPORT_JOYSTICK 1
  71. #endif
  72. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  73. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  74. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
  81. #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
  82. #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
  83. #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
  84. #define SL_PCI_LEGACYCONTROL 0x40
  85. #define SL_PCI_CONFIG 0x50
  86. #define SL_PCI_DDMACONTROL 0x60
  87. #define ESSIO_REG_AUDIO2DMAADDR 0
  88. #define ESSIO_REG_AUDIO2DMACOUNT 4
  89. #define ESSIO_REG_AUDIO2MODE 6
  90. #define ESSIO_REG_IRQCONTROL 7
  91. #define ESSDM_REG_DMAADDR 0x00
  92. #define ESSDM_REG_DMACOUNT 0x04
  93. #define ESSDM_REG_DMACOMMAND 0x08
  94. #define ESSDM_REG_DMASTATUS 0x08
  95. #define ESSDM_REG_DMAMODE 0x0b
  96. #define ESSDM_REG_DMACLEAR 0x0d
  97. #define ESSDM_REG_DMAMASK 0x0f
  98. #define ESSSB_REG_FMLOWADDR 0x00
  99. #define ESSSB_REG_FMHIGHADDR 0x02
  100. #define ESSSB_REG_MIXERADDR 0x04
  101. #define ESSSB_REG_MIXERDATA 0x05
  102. #define ESSSB_IREG_AUDIO1 0x14
  103. #define ESSSB_IREG_MICMIX 0x1a
  104. #define ESSSB_IREG_RECSRC 0x1c
  105. #define ESSSB_IREG_MASTER 0x32
  106. #define ESSSB_IREG_FM 0x36
  107. #define ESSSB_IREG_AUXACD 0x38
  108. #define ESSSB_IREG_AUXB 0x3a
  109. #define ESSSB_IREG_PCSPEAKER 0x3c
  110. #define ESSSB_IREG_LINE 0x3e
  111. #define ESSSB_IREG_SPATCONTROL 0x50
  112. #define ESSSB_IREG_SPATLEVEL 0x52
  113. #define ESSSB_IREG_MASTER_LEFT 0x60
  114. #define ESSSB_IREG_MASTER_RIGHT 0x62
  115. #define ESSSB_IREG_MPU401CONTROL 0x64
  116. #define ESSSB_IREG_MICMIXRECORD 0x68
  117. #define ESSSB_IREG_AUDIO2RECORD 0x69
  118. #define ESSSB_IREG_AUXACDRECORD 0x6a
  119. #define ESSSB_IREG_FMRECORD 0x6b
  120. #define ESSSB_IREG_AUXBRECORD 0x6c
  121. #define ESSSB_IREG_MONO 0x6d
  122. #define ESSSB_IREG_LINERECORD 0x6e
  123. #define ESSSB_IREG_MONORECORD 0x6f
  124. #define ESSSB_IREG_AUDIO2SAMPLE 0x70
  125. #define ESSSB_IREG_AUDIO2MODE 0x71
  126. #define ESSSB_IREG_AUDIO2FILTER 0x72
  127. #define ESSSB_IREG_AUDIO2TCOUNTL 0x74
  128. #define ESSSB_IREG_AUDIO2TCOUNTH 0x76
  129. #define ESSSB_IREG_AUDIO2CONTROL1 0x78
  130. #define ESSSB_IREG_AUDIO2CONTROL2 0x7a
  131. #define ESSSB_IREG_AUDIO2 0x7c
  132. #define ESSSB_REG_RESET 0x06
  133. #define ESSSB_REG_READDATA 0x0a
  134. #define ESSSB_REG_WRITEDATA 0x0c
  135. #define ESSSB_REG_READSTATUS 0x0c
  136. #define ESSSB_REG_STATUS 0x0e
  137. #define ESS_CMD_EXTSAMPLERATE 0xa1
  138. #define ESS_CMD_FILTERDIV 0xa2
  139. #define ESS_CMD_DMACNTRELOADL 0xa4
  140. #define ESS_CMD_DMACNTRELOADH 0xa5
  141. #define ESS_CMD_ANALOGCONTROL 0xa8
  142. #define ESS_CMD_IRQCONTROL 0xb1
  143. #define ESS_CMD_DRQCONTROL 0xb2
  144. #define ESS_CMD_RECLEVEL 0xb4
  145. #define ESS_CMD_SETFORMAT 0xb6
  146. #define ESS_CMD_SETFORMAT2 0xb7
  147. #define ESS_CMD_DMACONTROL 0xb8
  148. #define ESS_CMD_DMATYPE 0xb9
  149. #define ESS_CMD_OFFSETLEFT 0xba
  150. #define ESS_CMD_OFFSETRIGHT 0xbb
  151. #define ESS_CMD_READREG 0xc0
  152. #define ESS_CMD_ENABLEEXT 0xc6
  153. #define ESS_CMD_PAUSEDMA 0xd0
  154. #define ESS_CMD_ENABLEAUDIO1 0xd1
  155. #define ESS_CMD_STOPAUDIO1 0xd3
  156. #define ESS_CMD_AUDIO1STATUS 0xd8
  157. #define ESS_CMD_CONTDMA 0xd4
  158. #define ESS_CMD_TESTIRQ 0xf2
  159. #define ESS_RECSRC_MIC 0
  160. #define ESS_RECSRC_AUXACD 2
  161. #define ESS_RECSRC_AUXB 5
  162. #define ESS_RECSRC_LINE 6
  163. #define ESS_RECSRC_NONE 7
  164. #define DAC1 0x01
  165. #define ADC1 0x02
  166. #define DAC2 0x04
  167. /*
  168. */
  169. typedef struct _snd_es1938 es1938_t;
  170. #define SAVED_REG_SIZE 32 /* max. number of registers to save */
  171. struct _snd_es1938 {
  172. int irq;
  173. unsigned long io_port;
  174. unsigned long sb_port;
  175. unsigned long vc_port;
  176. unsigned long mpu_port;
  177. unsigned long game_port;
  178. unsigned long ddma_port;
  179. unsigned char irqmask;
  180. unsigned char revision;
  181. snd_kcontrol_t *hw_volume;
  182. snd_kcontrol_t *hw_switch;
  183. snd_kcontrol_t *master_volume;
  184. snd_kcontrol_t *master_switch;
  185. struct pci_dev *pci;
  186. snd_card_t *card;
  187. snd_pcm_t *pcm;
  188. snd_pcm_substream_t *capture_substream;
  189. snd_pcm_substream_t *playback1_substream;
  190. snd_pcm_substream_t *playback2_substream;
  191. snd_kmixer_t *mixer;
  192. snd_rawmidi_t *rmidi;
  193. unsigned int dma1_size;
  194. unsigned int dma2_size;
  195. unsigned int dma1_start;
  196. unsigned int dma2_start;
  197. unsigned int dma1_shift;
  198. unsigned int dma2_shift;
  199. unsigned int active;
  200. spinlock_t reg_lock;
  201. spinlock_t mixer_lock;
  202. snd_info_entry_t *proc_entry;
  203. #ifdef SUPPORT_JOYSTICK
  204. struct gameport *gameport;
  205. #endif
  206. #ifdef CONFIG_PM
  207. unsigned char saved_regs[SAVED_REG_SIZE];
  208. #endif
  209. };
  210. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  211. static struct pci_device_id snd_es1938_ids[] = {
  212. { 0x125d, 0x1969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Solo-1 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
  216. #define RESET_LOOP_TIMEOUT 0x10000
  217. #define WRITE_LOOP_TIMEOUT 0x10000
  218. #define GET_LOOP_TIMEOUT 0x01000
  219. #undef REG_DEBUG
  220. /* -----------------------------------------------------------------
  221. * Write to a mixer register
  222. * -----------------------------------------------------------------*/
  223. static void snd_es1938_mixer_write(es1938_t *chip, unsigned char reg, unsigned char val)
  224. {
  225. unsigned long flags;
  226. spin_lock_irqsave(&chip->mixer_lock, flags);
  227. outb(reg, SLSB_REG(chip, MIXERADDR));
  228. outb(val, SLSB_REG(chip, MIXERDATA));
  229. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  230. #ifdef REG_DEBUG
  231. snd_printk(KERN_DEBUG "Mixer reg %02x set to %02x\n", reg, val);
  232. #endif
  233. }
  234. /* -----------------------------------------------------------------
  235. * Read from a mixer register
  236. * -----------------------------------------------------------------*/
  237. static int snd_es1938_mixer_read(es1938_t *chip, unsigned char reg)
  238. {
  239. int data;
  240. unsigned long flags;
  241. spin_lock_irqsave(&chip->mixer_lock, flags);
  242. outb(reg, SLSB_REG(chip, MIXERADDR));
  243. data = inb(SLSB_REG(chip, MIXERDATA));
  244. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  245. #ifdef REG_DEBUG
  246. snd_printk(KERN_DEBUG "Mixer reg %02x now is %02x\n", reg, data);
  247. #endif
  248. return data;
  249. }
  250. /* -----------------------------------------------------------------
  251. * Write to some bits of a mixer register (return old value)
  252. * -----------------------------------------------------------------*/
  253. static int snd_es1938_mixer_bits(es1938_t *chip, unsigned char reg, unsigned char mask, unsigned char val)
  254. {
  255. unsigned long flags;
  256. unsigned char old, new, oval;
  257. spin_lock_irqsave(&chip->mixer_lock, flags);
  258. outb(reg, SLSB_REG(chip, MIXERADDR));
  259. old = inb(SLSB_REG(chip, MIXERDATA));
  260. oval = old & mask;
  261. if (val != oval) {
  262. new = (old & ~mask) | (val & mask);
  263. outb(new, SLSB_REG(chip, MIXERDATA));
  264. #ifdef REG_DEBUG
  265. snd_printk(KERN_DEBUG "Mixer reg %02x was %02x, set to %02x\n",
  266. reg, old, new);
  267. #endif
  268. }
  269. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  270. return oval;
  271. }
  272. /* -----------------------------------------------------------------
  273. * Write command to Controller Registers
  274. * -----------------------------------------------------------------*/
  275. static void snd_es1938_write_cmd(es1938_t *chip, unsigned char cmd)
  276. {
  277. int i;
  278. unsigned char v;
  279. for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
  280. if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
  281. outb(cmd, SLSB_REG(chip, WRITEDATA));
  282. return;
  283. }
  284. }
  285. printk(KERN_ERR "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
  286. }
  287. /* -----------------------------------------------------------------
  288. * Read the Read Data Buffer
  289. * -----------------------------------------------------------------*/
  290. static int snd_es1938_get_byte(es1938_t *chip)
  291. {
  292. int i;
  293. unsigned char v;
  294. for (i = GET_LOOP_TIMEOUT; i; i--)
  295. if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
  296. return inb(SLSB_REG(chip, READDATA));
  297. snd_printk(KERN_ERR "get_byte timeout: status 0x02%x\n", v);
  298. return -ENODEV;
  299. }
  300. /* -----------------------------------------------------------------
  301. * Write value cmd register
  302. * -----------------------------------------------------------------*/
  303. static void snd_es1938_write(es1938_t *chip, unsigned char reg, unsigned char val)
  304. {
  305. unsigned long flags;
  306. spin_lock_irqsave(&chip->reg_lock, flags);
  307. snd_es1938_write_cmd(chip, reg);
  308. snd_es1938_write_cmd(chip, val);
  309. spin_unlock_irqrestore(&chip->reg_lock, flags);
  310. #ifdef REG_DEBUG
  311. snd_printk(KERN_DEBUG "Reg %02x set to %02x\n", reg, val);
  312. #endif
  313. }
  314. /* -----------------------------------------------------------------
  315. * Read data from cmd register and return it
  316. * -----------------------------------------------------------------*/
  317. static unsigned char snd_es1938_read(es1938_t *chip, unsigned char reg)
  318. {
  319. unsigned char val;
  320. unsigned long flags;
  321. spin_lock_irqsave(&chip->reg_lock, flags);
  322. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  323. snd_es1938_write_cmd(chip, reg);
  324. val = snd_es1938_get_byte(chip);
  325. spin_unlock_irqrestore(&chip->reg_lock, flags);
  326. #ifdef REG_DEBUG
  327. snd_printk(KERN_DEBUG "Reg %02x now is %02x\n", reg, val);
  328. #endif
  329. return val;
  330. }
  331. /* -----------------------------------------------------------------
  332. * Write data to cmd register and return old value
  333. * -----------------------------------------------------------------*/
  334. static int snd_es1938_bits(es1938_t *chip, unsigned char reg, unsigned char mask, unsigned char val)
  335. {
  336. unsigned long flags;
  337. unsigned char old, new, oval;
  338. spin_lock_irqsave(&chip->reg_lock, flags);
  339. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  340. snd_es1938_write_cmd(chip, reg);
  341. old = snd_es1938_get_byte(chip);
  342. oval = old & mask;
  343. if (val != oval) {
  344. snd_es1938_write_cmd(chip, reg);
  345. new = (old & ~mask) | (val & mask);
  346. snd_es1938_write_cmd(chip, new);
  347. #ifdef REG_DEBUG
  348. snd_printk(KERN_DEBUG "Reg %02x was %02x, set to %02x\n",
  349. reg, old, new);
  350. #endif
  351. }
  352. spin_unlock_irqrestore(&chip->reg_lock, flags);
  353. return oval;
  354. }
  355. /* --------------------------------------------------------------------
  356. * Reset the chip
  357. * --------------------------------------------------------------------*/
  358. static void snd_es1938_reset(es1938_t *chip)
  359. {
  360. int i;
  361. outb(3, SLSB_REG(chip, RESET));
  362. inb(SLSB_REG(chip, RESET));
  363. outb(0, SLSB_REG(chip, RESET));
  364. for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
  365. if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
  366. if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
  367. goto __next;
  368. }
  369. }
  370. snd_printk(KERN_ERR "ESS Solo-1 reset failed\n");
  371. __next:
  372. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
  373. /* Demand transfer DMA: 4 bytes per DMA request */
  374. snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
  375. /* Change behaviour of register A1
  376. 4x oversampling
  377. 2nd channel DAC asynchronous */
  378. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
  379. /* enable/select DMA channel and IRQ channel */
  380. snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
  381. snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
  382. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
  383. /* Set spatializer parameters to recommended values */
  384. snd_es1938_mixer_write(chip, 0x54, 0x8f);
  385. snd_es1938_mixer_write(chip, 0x56, 0x95);
  386. snd_es1938_mixer_write(chip, 0x58, 0x94);
  387. snd_es1938_mixer_write(chip, 0x5a, 0x80);
  388. }
  389. /* --------------------------------------------------------------------
  390. * Reset the FIFOs
  391. * --------------------------------------------------------------------*/
  392. static void snd_es1938_reset_fifo(es1938_t *chip)
  393. {
  394. outb(2, SLSB_REG(chip, RESET));
  395. outb(0, SLSB_REG(chip, RESET));
  396. }
  397. static ratnum_t clocks[2] = {
  398. {
  399. .num = 793800,
  400. .den_min = 1,
  401. .den_max = 128,
  402. .den_step = 1,
  403. },
  404. {
  405. .num = 768000,
  406. .den_min = 1,
  407. .den_max = 128,
  408. .den_step = 1,
  409. }
  410. };
  411. static snd_pcm_hw_constraint_ratnums_t hw_constraints_clocks = {
  412. .nrats = 2,
  413. .rats = clocks,
  414. };
  415. static void snd_es1938_rate_set(es1938_t *chip,
  416. snd_pcm_substream_t *substream,
  417. int mode)
  418. {
  419. unsigned int bits, div0;
  420. snd_pcm_runtime_t *runtime = substream->runtime;
  421. if (runtime->rate_num == clocks[0].num)
  422. bits = 128 - runtime->rate_den;
  423. else
  424. bits = 256 - runtime->rate_den;
  425. /* set filter register */
  426. div0 = 256 - 7160000*20/(8*82*runtime->rate);
  427. if (mode == DAC2) {
  428. snd_es1938_mixer_write(chip, 0x70, bits);
  429. snd_es1938_mixer_write(chip, 0x72, div0);
  430. } else {
  431. snd_es1938_write(chip, 0xA1, bits);
  432. snd_es1938_write(chip, 0xA2, div0);
  433. }
  434. }
  435. /* --------------------------------------------------------------------
  436. * Configure Solo1 builtin DMA Controller
  437. * --------------------------------------------------------------------*/
  438. static void snd_es1938_playback1_setdma(es1938_t *chip)
  439. {
  440. outb(0x00, SLIO_REG(chip, AUDIO2MODE));
  441. outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
  442. outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
  443. outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
  444. }
  445. static void snd_es1938_playback2_setdma(es1938_t *chip)
  446. {
  447. /* Enable DMA controller */
  448. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  449. /* 1. Master reset */
  450. outb(0, SLDM_REG(chip, DMACLEAR));
  451. /* 2. Mask DMA */
  452. outb(1, SLDM_REG(chip, DMAMASK));
  453. outb(0x18, SLDM_REG(chip, DMAMODE));
  454. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  455. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  456. /* 3. Unmask DMA */
  457. outb(0, SLDM_REG(chip, DMAMASK));
  458. }
  459. static void snd_es1938_capture_setdma(es1938_t *chip)
  460. {
  461. /* Enable DMA controller */
  462. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  463. /* 1. Master reset */
  464. outb(0, SLDM_REG(chip, DMACLEAR));
  465. /* 2. Mask DMA */
  466. outb(1, SLDM_REG(chip, DMAMASK));
  467. outb(0x14, SLDM_REG(chip, DMAMODE));
  468. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  469. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  470. /* 3. Unmask DMA */
  471. outb(0, SLDM_REG(chip, DMAMASK));
  472. }
  473. /* ----------------------------------------------------------------------
  474. *
  475. * *** PCM part ***
  476. */
  477. static int snd_es1938_capture_trigger(snd_pcm_substream_t * substream,
  478. int cmd)
  479. {
  480. es1938_t *chip = snd_pcm_substream_chip(substream);
  481. int val;
  482. switch (cmd) {
  483. case SNDRV_PCM_TRIGGER_START:
  484. case SNDRV_PCM_TRIGGER_RESUME:
  485. val = 0x0f;
  486. chip->active |= ADC1;
  487. break;
  488. case SNDRV_PCM_TRIGGER_STOP:
  489. case SNDRV_PCM_TRIGGER_SUSPEND:
  490. val = 0x00;
  491. chip->active &= ~ADC1;
  492. break;
  493. default:
  494. return -EINVAL;
  495. }
  496. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  497. return 0;
  498. }
  499. static int snd_es1938_playback1_trigger(snd_pcm_substream_t * substream,
  500. int cmd)
  501. {
  502. es1938_t *chip = snd_pcm_substream_chip(substream);
  503. switch (cmd) {
  504. case SNDRV_PCM_TRIGGER_START:
  505. case SNDRV_PCM_TRIGGER_RESUME:
  506. /* According to the documentation this should be:
  507. 0x13 but that value may randomly swap stereo channels */
  508. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
  509. udelay(10);
  510. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
  511. /* This two stage init gives the FIFO -> DAC connection time to
  512. * settle before first data from DMA flows in. This should ensure
  513. * no swapping of stereo channels. Report a bug if otherwise :-) */
  514. outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
  515. chip->active |= DAC2;
  516. break;
  517. case SNDRV_PCM_TRIGGER_STOP:
  518. case SNDRV_PCM_TRIGGER_SUSPEND:
  519. outb(0, SLIO_REG(chip, AUDIO2MODE));
  520. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
  521. chip->active &= ~DAC2;
  522. break;
  523. default:
  524. return -EINVAL;
  525. }
  526. return 0;
  527. }
  528. static int snd_es1938_playback2_trigger(snd_pcm_substream_t * substream,
  529. int cmd)
  530. {
  531. es1938_t *chip = snd_pcm_substream_chip(substream);
  532. int val;
  533. switch (cmd) {
  534. case SNDRV_PCM_TRIGGER_START:
  535. case SNDRV_PCM_TRIGGER_RESUME:
  536. val = 5;
  537. chip->active |= DAC1;
  538. break;
  539. case SNDRV_PCM_TRIGGER_STOP:
  540. case SNDRV_PCM_TRIGGER_SUSPEND:
  541. val = 0;
  542. chip->active &= ~DAC1;
  543. break;
  544. default:
  545. return -EINVAL;
  546. }
  547. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  548. return 0;
  549. }
  550. static int snd_es1938_playback_trigger(snd_pcm_substream_t *substream,
  551. int cmd)
  552. {
  553. switch (substream->number) {
  554. case 0:
  555. return snd_es1938_playback1_trigger(substream, cmd);
  556. case 1:
  557. return snd_es1938_playback2_trigger(substream, cmd);
  558. }
  559. snd_BUG();
  560. return -EINVAL;
  561. }
  562. /* --------------------------------------------------------------------
  563. * First channel for Extended Mode Audio 1 ADC Operation
  564. * --------------------------------------------------------------------*/
  565. static int snd_es1938_capture_prepare(snd_pcm_substream_t * substream)
  566. {
  567. es1938_t *chip = snd_pcm_substream_chip(substream);
  568. snd_pcm_runtime_t *runtime = substream->runtime;
  569. int u, is8, mono;
  570. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  571. unsigned int count = snd_pcm_lib_period_bytes(substream);
  572. chip->dma1_size = size;
  573. chip->dma1_start = runtime->dma_addr;
  574. mono = (runtime->channels > 1) ? 0 : 1;
  575. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  576. u = snd_pcm_format_unsigned(runtime->format);
  577. chip->dma1_shift = 2 - mono - is8;
  578. snd_es1938_reset_fifo(chip);
  579. /* program type */
  580. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  581. /* set clock and counters */
  582. snd_es1938_rate_set(chip, substream, ADC1);
  583. count = 0x10000 - count;
  584. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  585. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  586. /* initialize and configure ADC */
  587. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
  588. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
  589. (u ? 0x00 : 0x20) |
  590. (is8 ? 0x00 : 0x04) |
  591. (mono ? 0x40 : 0x08));
  592. // snd_es1938_reset_fifo(chip);
  593. /* 11. configure system interrupt controller and DMA controller */
  594. snd_es1938_capture_setdma(chip);
  595. return 0;
  596. }
  597. /* ------------------------------------------------------------------------------
  598. * Second Audio channel DAC Operation
  599. * ------------------------------------------------------------------------------*/
  600. static int snd_es1938_playback1_prepare(snd_pcm_substream_t * substream)
  601. {
  602. es1938_t *chip = snd_pcm_substream_chip(substream);
  603. snd_pcm_runtime_t *runtime = substream->runtime;
  604. int u, is8, mono;
  605. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  606. unsigned int count = snd_pcm_lib_period_bytes(substream);
  607. chip->dma2_size = size;
  608. chip->dma2_start = runtime->dma_addr;
  609. mono = (runtime->channels > 1) ? 0 : 1;
  610. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  611. u = snd_pcm_format_unsigned(runtime->format);
  612. chip->dma2_shift = 2 - mono - is8;
  613. snd_es1938_reset_fifo(chip);
  614. /* set clock and counters */
  615. snd_es1938_rate_set(chip, substream, DAC2);
  616. count >>= 1;
  617. count = 0x10000 - count;
  618. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
  619. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
  620. /* initialize and configure Audio 2 DAC */
  621. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | (mono ? 0 : 2) | (is8 ? 0 : 1));
  622. /* program DMA */
  623. snd_es1938_playback1_setdma(chip);
  624. return 0;
  625. }
  626. static int snd_es1938_playback2_prepare(snd_pcm_substream_t * substream)
  627. {
  628. es1938_t *chip = snd_pcm_substream_chip(substream);
  629. snd_pcm_runtime_t *runtime = substream->runtime;
  630. int u, is8, mono;
  631. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  632. unsigned int count = snd_pcm_lib_period_bytes(substream);
  633. chip->dma1_size = size;
  634. chip->dma1_start = runtime->dma_addr;
  635. mono = (runtime->channels > 1) ? 0 : 1;
  636. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  637. u = snd_pcm_format_unsigned(runtime->format);
  638. chip->dma1_shift = 2 - mono - is8;
  639. count = 0x10000 - count;
  640. /* reset */
  641. snd_es1938_reset_fifo(chip);
  642. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  643. /* set clock and counters */
  644. snd_es1938_rate_set(chip, substream, DAC1);
  645. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  646. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  647. /* initialized and configure DAC */
  648. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
  649. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
  650. snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
  651. 0x90 | (mono ? 0x40 : 0x08) |
  652. (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
  653. /* program DMA */
  654. snd_es1938_playback2_setdma(chip);
  655. return 0;
  656. }
  657. static int snd_es1938_playback_prepare(snd_pcm_substream_t *substream)
  658. {
  659. switch (substream->number) {
  660. case 0:
  661. return snd_es1938_playback1_prepare(substream);
  662. case 1:
  663. return snd_es1938_playback2_prepare(substream);
  664. }
  665. snd_BUG();
  666. return -EINVAL;
  667. }
  668. static snd_pcm_uframes_t snd_es1938_capture_pointer(snd_pcm_substream_t * substream)
  669. {
  670. es1938_t *chip = snd_pcm_substream_chip(substream);
  671. size_t ptr;
  672. size_t old, new;
  673. #if 1
  674. /* This stuff is *needed*, don't ask why - AB */
  675. old = inw(SLDM_REG(chip, DMACOUNT));
  676. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  677. old = new;
  678. ptr = chip->dma1_size - 1 - new;
  679. #else
  680. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  681. #endif
  682. return ptr >> chip->dma1_shift;
  683. }
  684. static snd_pcm_uframes_t snd_es1938_playback1_pointer(snd_pcm_substream_t * substream)
  685. {
  686. es1938_t *chip = snd_pcm_substream_chip(substream);
  687. size_t ptr;
  688. #if 1
  689. ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
  690. #else
  691. ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
  692. #endif
  693. return ptr >> chip->dma2_shift;
  694. }
  695. static snd_pcm_uframes_t snd_es1938_playback2_pointer(snd_pcm_substream_t * substream)
  696. {
  697. es1938_t *chip = snd_pcm_substream_chip(substream);
  698. size_t ptr;
  699. size_t old, new;
  700. #if 1
  701. /* This stuff is *needed*, don't ask why - AB */
  702. old = inw(SLDM_REG(chip, DMACOUNT));
  703. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  704. old = new;
  705. ptr = chip->dma1_size - 1 - new;
  706. #else
  707. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  708. #endif
  709. return ptr >> chip->dma1_shift;
  710. }
  711. static snd_pcm_uframes_t snd_es1938_playback_pointer(snd_pcm_substream_t *substream)
  712. {
  713. switch (substream->number) {
  714. case 0:
  715. return snd_es1938_playback1_pointer(substream);
  716. case 1:
  717. return snd_es1938_playback2_pointer(substream);
  718. }
  719. snd_BUG();
  720. return -EINVAL;
  721. }
  722. static int snd_es1938_capture_copy(snd_pcm_substream_t *substream,
  723. int channel,
  724. snd_pcm_uframes_t pos,
  725. void __user *dst,
  726. snd_pcm_uframes_t count)
  727. {
  728. snd_pcm_runtime_t *runtime = substream->runtime;
  729. es1938_t *chip = snd_pcm_substream_chip(substream);
  730. pos <<= chip->dma1_shift;
  731. count <<= chip->dma1_shift;
  732. snd_assert(pos + count <= chip->dma1_size, return -EINVAL);
  733. if (pos + count < chip->dma1_size) {
  734. if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
  735. return -EFAULT;
  736. } else {
  737. if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
  738. return -EFAULT;
  739. if (put_user(runtime->dma_area[0], ((unsigned char __user *)dst) + count - 1))
  740. return -EFAULT;
  741. }
  742. return 0;
  743. }
  744. /*
  745. * buffer management
  746. */
  747. static int snd_es1938_pcm_hw_params(snd_pcm_substream_t *substream,
  748. snd_pcm_hw_params_t * hw_params)
  749. {
  750. int err;
  751. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  752. return err;
  753. return 0;
  754. }
  755. static int snd_es1938_pcm_hw_free(snd_pcm_substream_t *substream)
  756. {
  757. return snd_pcm_lib_free_pages(substream);
  758. }
  759. /* ----------------------------------------------------------------------
  760. * Audio1 Capture (ADC)
  761. * ----------------------------------------------------------------------*/
  762. static snd_pcm_hardware_t snd_es1938_capture =
  763. {
  764. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  765. SNDRV_PCM_INFO_BLOCK_TRANSFER),
  766. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE,
  767. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  768. .rate_min = 6000,
  769. .rate_max = 48000,
  770. .channels_min = 1,
  771. .channels_max = 2,
  772. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  773. .period_bytes_min = 64,
  774. .period_bytes_max = 0x8000,
  775. .periods_min = 1,
  776. .periods_max = 1024,
  777. .fifo_size = 256,
  778. };
  779. /* -----------------------------------------------------------------------
  780. * Audio2 Playback (DAC)
  781. * -----------------------------------------------------------------------*/
  782. static snd_pcm_hardware_t snd_es1938_playback =
  783. {
  784. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  785. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  786. SNDRV_PCM_INFO_MMAP_VALID),
  787. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE,
  788. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  789. .rate_min = 6000,
  790. .rate_max = 48000,
  791. .channels_min = 1,
  792. .channels_max = 2,
  793. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  794. .period_bytes_min = 64,
  795. .period_bytes_max = 0x8000,
  796. .periods_min = 1,
  797. .periods_max = 1024,
  798. .fifo_size = 256,
  799. };
  800. static int snd_es1938_capture_open(snd_pcm_substream_t * substream)
  801. {
  802. es1938_t *chip = snd_pcm_substream_chip(substream);
  803. snd_pcm_runtime_t *runtime = substream->runtime;
  804. if (chip->playback2_substream)
  805. return -EAGAIN;
  806. chip->capture_substream = substream;
  807. runtime->hw = snd_es1938_capture;
  808. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  809. &hw_constraints_clocks);
  810. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  811. return 0;
  812. }
  813. static int snd_es1938_playback_open(snd_pcm_substream_t * substream)
  814. {
  815. es1938_t *chip = snd_pcm_substream_chip(substream);
  816. snd_pcm_runtime_t *runtime = substream->runtime;
  817. switch (substream->number) {
  818. case 0:
  819. chip->playback1_substream = substream;
  820. break;
  821. case 1:
  822. if (chip->capture_substream)
  823. return -EAGAIN;
  824. chip->playback2_substream = substream;
  825. break;
  826. default:
  827. snd_BUG();
  828. return -EINVAL;
  829. }
  830. runtime->hw = snd_es1938_playback;
  831. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  832. &hw_constraints_clocks);
  833. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  834. return 0;
  835. }
  836. static int snd_es1938_capture_close(snd_pcm_substream_t * substream)
  837. {
  838. es1938_t *chip = snd_pcm_substream_chip(substream);
  839. chip->capture_substream = NULL;
  840. return 0;
  841. }
  842. static int snd_es1938_playback_close(snd_pcm_substream_t * substream)
  843. {
  844. es1938_t *chip = snd_pcm_substream_chip(substream);
  845. switch (substream->number) {
  846. case 0:
  847. chip->playback1_substream = NULL;
  848. break;
  849. case 1:
  850. chip->playback2_substream = NULL;
  851. break;
  852. default:
  853. snd_BUG();
  854. return -EINVAL;
  855. }
  856. return 0;
  857. }
  858. static snd_pcm_ops_t snd_es1938_playback_ops = {
  859. .open = snd_es1938_playback_open,
  860. .close = snd_es1938_playback_close,
  861. .ioctl = snd_pcm_lib_ioctl,
  862. .hw_params = snd_es1938_pcm_hw_params,
  863. .hw_free = snd_es1938_pcm_hw_free,
  864. .prepare = snd_es1938_playback_prepare,
  865. .trigger = snd_es1938_playback_trigger,
  866. .pointer = snd_es1938_playback_pointer,
  867. };
  868. static snd_pcm_ops_t snd_es1938_capture_ops = {
  869. .open = snd_es1938_capture_open,
  870. .close = snd_es1938_capture_close,
  871. .ioctl = snd_pcm_lib_ioctl,
  872. .hw_params = snd_es1938_pcm_hw_params,
  873. .hw_free = snd_es1938_pcm_hw_free,
  874. .prepare = snd_es1938_capture_prepare,
  875. .trigger = snd_es1938_capture_trigger,
  876. .pointer = snd_es1938_capture_pointer,
  877. .copy = snd_es1938_capture_copy,
  878. };
  879. static int __devinit snd_es1938_new_pcm(es1938_t *chip, int device)
  880. {
  881. snd_pcm_t *pcm;
  882. int err;
  883. if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
  884. return err;
  885. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
  886. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
  887. pcm->private_data = chip;
  888. pcm->info_flags = 0;
  889. strcpy(pcm->name, "ESS Solo-1");
  890. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  891. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  892. chip->pcm = pcm;
  893. return 0;
  894. }
  895. /* -------------------------------------------------------------------
  896. *
  897. * *** Mixer part ***
  898. */
  899. static int snd_es1938_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  900. {
  901. static char *texts[8] = {
  902. "Mic", "Mic Master", "CD", "AOUT",
  903. "Mic1", "Mix", "Line", "Master"
  904. };
  905. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  906. uinfo->count = 1;
  907. uinfo->value.enumerated.items = 8;
  908. if (uinfo->value.enumerated.item > 7)
  909. uinfo->value.enumerated.item = 7;
  910. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  911. return 0;
  912. }
  913. static int snd_es1938_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  914. {
  915. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  916. ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
  917. return 0;
  918. }
  919. static int snd_es1938_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  920. {
  921. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  922. unsigned char val = ucontrol->value.enumerated.item[0];
  923. if (val > 7)
  924. return -EINVAL;
  925. return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
  926. }
  927. static int snd_es1938_info_spatializer_enable(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  928. {
  929. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  930. uinfo->count = 1;
  931. uinfo->value.integer.min = 0;
  932. uinfo->value.integer.max = 1;
  933. return 0;
  934. }
  935. static int snd_es1938_get_spatializer_enable(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  936. {
  937. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  938. unsigned char val = snd_es1938_mixer_read(chip, 0x50);
  939. ucontrol->value.integer.value[0] = !!(val & 8);
  940. return 0;
  941. }
  942. static int snd_es1938_put_spatializer_enable(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  943. {
  944. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  945. unsigned char oval, nval;
  946. int change;
  947. nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
  948. oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
  949. change = nval != oval;
  950. if (change) {
  951. snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
  952. snd_es1938_mixer_write(chip, 0x50, nval);
  953. }
  954. return change;
  955. }
  956. static int snd_es1938_info_hw_volume(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  957. {
  958. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  959. uinfo->count = 2;
  960. uinfo->value.integer.min = 0;
  961. uinfo->value.integer.max = 63;
  962. return 0;
  963. }
  964. static int snd_es1938_get_hw_volume(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  965. {
  966. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  967. ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
  968. ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
  969. return 0;
  970. }
  971. static int snd_es1938_info_hw_switch(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  972. {
  973. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  974. uinfo->count = 2;
  975. uinfo->value.integer.min = 0;
  976. uinfo->value.integer.max = 1;
  977. return 0;
  978. }
  979. static int snd_es1938_get_hw_switch(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  980. {
  981. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  982. ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
  983. ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
  984. return 0;
  985. }
  986. static void snd_es1938_hwv_free(snd_kcontrol_t *kcontrol)
  987. {
  988. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  989. chip->master_volume = NULL;
  990. chip->master_switch = NULL;
  991. chip->hw_volume = NULL;
  992. chip->hw_switch = NULL;
  993. }
  994. static int snd_es1938_reg_bits(es1938_t *chip, unsigned char reg,
  995. unsigned char mask, unsigned char val)
  996. {
  997. if (reg < 0xa0)
  998. return snd_es1938_mixer_bits(chip, reg, mask, val);
  999. else
  1000. return snd_es1938_bits(chip, reg, mask, val);
  1001. }
  1002. static int snd_es1938_reg_read(es1938_t *chip, unsigned char reg)
  1003. {
  1004. if (reg < 0xa0)
  1005. return snd_es1938_mixer_read(chip, reg);
  1006. else
  1007. return snd_es1938_read(chip, reg);
  1008. }
  1009. #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1010. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1011. .info = snd_es1938_info_single, \
  1012. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1013. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  1014. static int snd_es1938_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1015. {
  1016. int mask = (kcontrol->private_value >> 16) & 0xff;
  1017. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1018. uinfo->count = 1;
  1019. uinfo->value.integer.min = 0;
  1020. uinfo->value.integer.max = mask;
  1021. return 0;
  1022. }
  1023. static int snd_es1938_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1024. {
  1025. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1026. int reg = kcontrol->private_value & 0xff;
  1027. int shift = (kcontrol->private_value >> 8) & 0xff;
  1028. int mask = (kcontrol->private_value >> 16) & 0xff;
  1029. int invert = (kcontrol->private_value >> 24) & 0xff;
  1030. int val;
  1031. val = snd_es1938_reg_read(chip, reg);
  1032. ucontrol->value.integer.value[0] = (val >> shift) & mask;
  1033. if (invert)
  1034. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1035. return 0;
  1036. }
  1037. static int snd_es1938_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1038. {
  1039. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1040. int reg = kcontrol->private_value & 0xff;
  1041. int shift = (kcontrol->private_value >> 8) & 0xff;
  1042. int mask = (kcontrol->private_value >> 16) & 0xff;
  1043. int invert = (kcontrol->private_value >> 24) & 0xff;
  1044. unsigned char val;
  1045. val = (ucontrol->value.integer.value[0] & mask);
  1046. if (invert)
  1047. val = mask - val;
  1048. mask <<= shift;
  1049. val <<= shift;
  1050. return snd_es1938_reg_bits(chip, reg, mask, val) != val;
  1051. }
  1052. #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  1053. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1054. .info = snd_es1938_info_double, \
  1055. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1056. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  1057. static int snd_es1938_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1058. {
  1059. int mask = (kcontrol->private_value >> 24) & 0xff;
  1060. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1061. uinfo->count = 2;
  1062. uinfo->value.integer.min = 0;
  1063. uinfo->value.integer.max = mask;
  1064. return 0;
  1065. }
  1066. static int snd_es1938_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1067. {
  1068. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1069. int left_reg = kcontrol->private_value & 0xff;
  1070. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1071. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1072. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1073. int mask = (kcontrol->private_value >> 24) & 0xff;
  1074. int invert = (kcontrol->private_value >> 22) & 1;
  1075. unsigned char left, right;
  1076. left = snd_es1938_reg_read(chip, left_reg);
  1077. if (left_reg != right_reg)
  1078. right = snd_es1938_reg_read(chip, right_reg);
  1079. else
  1080. right = left;
  1081. ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
  1082. ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
  1083. if (invert) {
  1084. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1085. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  1086. }
  1087. return 0;
  1088. }
  1089. static int snd_es1938_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1090. {
  1091. es1938_t *chip = snd_kcontrol_chip(kcontrol);
  1092. int left_reg = kcontrol->private_value & 0xff;
  1093. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1094. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1095. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1096. int mask = (kcontrol->private_value >> 24) & 0xff;
  1097. int invert = (kcontrol->private_value >> 22) & 1;
  1098. int change;
  1099. unsigned char val1, val2, mask1, mask2;
  1100. val1 = ucontrol->value.integer.value[0] & mask;
  1101. val2 = ucontrol->value.integer.value[1] & mask;
  1102. if (invert) {
  1103. val1 = mask - val1;
  1104. val2 = mask - val2;
  1105. }
  1106. val1 <<= shift_left;
  1107. val2 <<= shift_right;
  1108. mask1 = mask << shift_left;
  1109. mask2 = mask << shift_right;
  1110. if (left_reg != right_reg) {
  1111. change = 0;
  1112. if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
  1113. change = 1;
  1114. if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
  1115. change = 1;
  1116. } else {
  1117. change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
  1118. val1 | val2) != (val1 | val2));
  1119. }
  1120. return change;
  1121. }
  1122. static snd_kcontrol_new_t snd_es1938_controls[] = {
  1123. ES1938_DOUBLE("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0),
  1124. ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
  1125. {
  1126. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1127. .name = "Hardware Master Playback Volume",
  1128. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1129. .info = snd_es1938_info_hw_volume,
  1130. .get = snd_es1938_get_hw_volume,
  1131. },
  1132. {
  1133. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1134. .name = "Hardware Master Playback Switch",
  1135. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1136. .info = snd_es1938_info_hw_switch,
  1137. .get = snd_es1938_get_hw_switch,
  1138. },
  1139. ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
  1140. ES1938_DOUBLE("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0),
  1141. ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
  1142. ES1938_DOUBLE("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0),
  1143. ES1938_DOUBLE("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
  1144. ES1938_DOUBLE("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0),
  1145. ES1938_DOUBLE("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0),
  1146. ES1938_DOUBLE("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0),
  1147. ES1938_SINGLE("PC Speaker Volume", 0, 0x3c, 0, 7, 0),
  1148. ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
  1149. ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
  1150. {
  1151. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1152. .name = "Capture Source",
  1153. .info = snd_es1938_info_mux,
  1154. .get = snd_es1938_get_mux,
  1155. .put = snd_es1938_put_mux,
  1156. },
  1157. ES1938_DOUBLE("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0),
  1158. ES1938_DOUBLE("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0),
  1159. ES1938_DOUBLE("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0),
  1160. ES1938_DOUBLE("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0),
  1161. ES1938_DOUBLE("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0),
  1162. ES1938_DOUBLE("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0),
  1163. ES1938_DOUBLE("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0),
  1164. ES1938_DOUBLE("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0),
  1165. ES1938_DOUBLE("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0),
  1166. ES1938_DOUBLE("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0),
  1167. ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
  1168. {
  1169. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1170. .name = "3D Control - Switch",
  1171. .info = snd_es1938_info_spatializer_enable,
  1172. .get = snd_es1938_get_spatializer_enable,
  1173. .put = snd_es1938_put_spatializer_enable,
  1174. },
  1175. ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
  1176. };
  1177. /* ---------------------------------------------------------------------------- */
  1178. /* ---------------------------------------------------------------------------- */
  1179. /*
  1180. * initialize the chip - used by resume callback, too
  1181. */
  1182. static void snd_es1938_chip_init(es1938_t *chip)
  1183. {
  1184. /* reset chip */
  1185. snd_es1938_reset(chip);
  1186. /* configure native mode */
  1187. /* enable bus master */
  1188. pci_set_master(chip->pci);
  1189. /* disable legacy audio */
  1190. pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
  1191. /* set DDMA base */
  1192. pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
  1193. /* set DMA/IRQ policy */
  1194. pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
  1195. /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
  1196. outb(0xf0, SLIO_REG(chip, IRQCONTROL));
  1197. /* reset DMA */
  1198. outb(0, SLDM_REG(chip, DMACLEAR));
  1199. }
  1200. #ifdef CONFIG_PM
  1201. /*
  1202. * PM support
  1203. */
  1204. static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
  1205. 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
  1206. 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
  1207. 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
  1208. 0xa8, 0xb4,
  1209. };
  1210. static int es1938_suspend(snd_card_t *card, pm_message_t state)
  1211. {
  1212. es1938_t *chip = card->pm_private_data;
  1213. unsigned char *s, *d;
  1214. snd_pcm_suspend_all(chip->pcm);
  1215. /* save mixer-related registers */
  1216. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
  1217. *d = snd_es1938_reg_read(chip, *s);
  1218. outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
  1219. if (chip->irq >= 0)
  1220. free_irq(chip->irq, (void *)chip);
  1221. pci_disable_device(chip->pci);
  1222. return 0;
  1223. }
  1224. static int es1938_resume(snd_card_t *card)
  1225. {
  1226. es1938_t *chip = card->pm_private_data;
  1227. unsigned char *s, *d;
  1228. pci_enable_device(chip->pci);
  1229. request_irq(chip->pci->irq, snd_es1938_interrupt,
  1230. SA_INTERRUPT|SA_SHIRQ, "ES1938", (void *)chip);
  1231. chip->irq = chip->pci->irq;
  1232. snd_es1938_chip_init(chip);
  1233. /* restore mixer-related registers */
  1234. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
  1235. if (*s < 0xa0)
  1236. snd_es1938_mixer_write(chip, *s, *d);
  1237. else
  1238. snd_es1938_write(chip, *s, *d);
  1239. }
  1240. return 0;
  1241. }
  1242. #endif /* CONFIG_PM */
  1243. #ifdef SUPPORT_JOYSTICK
  1244. static int __devinit snd_es1938_create_gameport(es1938_t *chip)
  1245. {
  1246. struct gameport *gp;
  1247. chip->gameport = gp = gameport_allocate_port();
  1248. if (!gp) {
  1249. printk(KERN_ERR "es1938: cannot allocate memory for gameport\n");
  1250. return -ENOMEM;
  1251. }
  1252. gameport_set_name(gp, "ES1938");
  1253. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1254. gameport_set_dev_parent(gp, &chip->pci->dev);
  1255. gp->io = chip->game_port;
  1256. gameport_register_port(gp);
  1257. return 0;
  1258. }
  1259. static void snd_es1938_free_gameport(es1938_t *chip)
  1260. {
  1261. if (chip->gameport) {
  1262. gameport_unregister_port(chip->gameport);
  1263. chip->gameport = NULL;
  1264. }
  1265. }
  1266. #else
  1267. static inline int snd_es1938_create_gameport(es1938_t *chip) { return -ENOSYS; }
  1268. static inline void snd_es1938_free_gameport(es1938_t *chip) { }
  1269. #endif /* SUPPORT_JOYSTICK */
  1270. static int snd_es1938_free(es1938_t *chip)
  1271. {
  1272. /* disable irqs */
  1273. outb(0x00, SLIO_REG(chip, IRQCONTROL));
  1274. if (chip->rmidi)
  1275. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
  1276. snd_es1938_free_gameport(chip);
  1277. if (chip->irq >= 0)
  1278. free_irq(chip->irq, (void *)chip);
  1279. pci_release_regions(chip->pci);
  1280. pci_disable_device(chip->pci);
  1281. kfree(chip);
  1282. return 0;
  1283. }
  1284. static int snd_es1938_dev_free(snd_device_t *device)
  1285. {
  1286. es1938_t *chip = device->device_data;
  1287. return snd_es1938_free(chip);
  1288. }
  1289. static int __devinit snd_es1938_create(snd_card_t * card,
  1290. struct pci_dev * pci,
  1291. es1938_t ** rchip)
  1292. {
  1293. es1938_t *chip;
  1294. int err;
  1295. static snd_device_ops_t ops = {
  1296. .dev_free = snd_es1938_dev_free,
  1297. };
  1298. *rchip = NULL;
  1299. /* enable PCI device */
  1300. if ((err = pci_enable_device(pci)) < 0)
  1301. return err;
  1302. /* check, if we can restrict PCI DMA transfers to 24 bits */
  1303. if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
  1304. pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
  1305. snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n");
  1306. pci_disable_device(pci);
  1307. return -ENXIO;
  1308. }
  1309. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1310. if (chip == NULL) {
  1311. pci_disable_device(pci);
  1312. return -ENOMEM;
  1313. }
  1314. spin_lock_init(&chip->reg_lock);
  1315. spin_lock_init(&chip->mixer_lock);
  1316. chip->card = card;
  1317. chip->pci = pci;
  1318. if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
  1319. kfree(chip);
  1320. pci_disable_device(pci);
  1321. return err;
  1322. }
  1323. chip->io_port = pci_resource_start(pci, 0);
  1324. chip->sb_port = pci_resource_start(pci, 1);
  1325. chip->vc_port = pci_resource_start(pci, 2);
  1326. chip->mpu_port = pci_resource_start(pci, 3);
  1327. chip->game_port = pci_resource_start(pci, 4);
  1328. if (request_irq(pci->irq, snd_es1938_interrupt, SA_INTERRUPT|SA_SHIRQ, "ES1938", (void *)chip)) {
  1329. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1330. snd_es1938_free(chip);
  1331. return -EBUSY;
  1332. }
  1333. chip->irq = pci->irq;
  1334. #ifdef ES1938_DDEBUG
  1335. snd_printk(KERN_DEBUG "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
  1336. chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
  1337. #endif
  1338. chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
  1339. snd_es1938_chip_init(chip);
  1340. snd_card_set_pm_callback(card, es1938_suspend, es1938_resume, chip);
  1341. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1342. snd_es1938_free(chip);
  1343. return err;
  1344. }
  1345. snd_card_set_dev(card, &pci->dev);
  1346. *rchip = chip;
  1347. return 0;
  1348. }
  1349. /* --------------------------------------------------------------------
  1350. * Interrupt handler
  1351. * -------------------------------------------------------------------- */
  1352. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1353. {
  1354. es1938_t *chip = dev_id;
  1355. unsigned char status, audiostatus;
  1356. int handled = 0;
  1357. status = inb(SLIO_REG(chip, IRQCONTROL));
  1358. #if 0
  1359. printk("Es1938debug - interrupt status: =0x%x\n", status);
  1360. #endif
  1361. /* AUDIO 1 */
  1362. if (status & 0x10) {
  1363. #if 0
  1364. printk("Es1938debug - AUDIO channel 1 interrupt\n");
  1365. printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", inw(SLDM_REG(chip, DMACOUNT)));
  1366. printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", inl(SLDM_REG(chip, DMAADDR)));
  1367. printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", inl(SLDM_REG(chip, DMASTATUS)));
  1368. #endif
  1369. /* clear irq */
  1370. handled = 1;
  1371. audiostatus = inb(SLSB_REG(chip, STATUS));
  1372. if (chip->active & ADC1)
  1373. snd_pcm_period_elapsed(chip->capture_substream);
  1374. else if (chip->active & DAC1)
  1375. snd_pcm_period_elapsed(chip->playback2_substream);
  1376. }
  1377. /* AUDIO 2 */
  1378. if (status & 0x20) {
  1379. #if 0
  1380. printk("Es1938debug - AUDIO channel 2 interrupt\n");
  1381. printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
  1382. printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", inl(SLIO_REG(chip, AUDIO2DMAADDR)));
  1383. #endif
  1384. /* clear irq */
  1385. handled = 1;
  1386. snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
  1387. if (chip->active & DAC2)
  1388. snd_pcm_period_elapsed(chip->playback1_substream);
  1389. }
  1390. /* Hardware volume */
  1391. if (status & 0x40) {
  1392. int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
  1393. handled = 1;
  1394. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
  1395. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
  1396. if (!split) {
  1397. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->master_switch->id);
  1398. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->master_volume->id);
  1399. }
  1400. /* ack interrupt */
  1401. snd_es1938_mixer_write(chip, 0x66, 0x00);
  1402. }
  1403. /* MPU401 */
  1404. if (status & 0x80) {
  1405. // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
  1406. // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
  1407. // andreas@flying-snail.de
  1408. // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
  1409. if (chip->rmidi) {
  1410. handled = 1;
  1411. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  1412. }
  1413. }
  1414. return IRQ_RETVAL(handled);
  1415. }
  1416. #define ES1938_DMA_SIZE 64
  1417. static int __devinit snd_es1938_mixer(es1938_t *chip)
  1418. {
  1419. snd_card_t *card;
  1420. unsigned int idx;
  1421. int err;
  1422. card = chip->card;
  1423. strcpy(card->mixername, "ESS Solo-1");
  1424. for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
  1425. snd_kcontrol_t *kctl;
  1426. kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
  1427. switch (idx) {
  1428. case 0:
  1429. chip->master_volume = kctl;
  1430. kctl->private_free = snd_es1938_hwv_free;
  1431. break;
  1432. case 1:
  1433. chip->master_switch = kctl;
  1434. kctl->private_free = snd_es1938_hwv_free;
  1435. break;
  1436. case 2:
  1437. chip->hw_volume = kctl;
  1438. kctl->private_free = snd_es1938_hwv_free;
  1439. break;
  1440. case 3:
  1441. chip->hw_switch = kctl;
  1442. kctl->private_free = snd_es1938_hwv_free;
  1443. break;
  1444. }
  1445. if ((err = snd_ctl_add(card, kctl)) < 0)
  1446. return err;
  1447. }
  1448. return 0;
  1449. }
  1450. static int __devinit snd_es1938_probe(struct pci_dev *pci,
  1451. const struct pci_device_id *pci_id)
  1452. {
  1453. static int dev;
  1454. snd_card_t *card;
  1455. es1938_t *chip;
  1456. opl3_t *opl3;
  1457. int idx, err;
  1458. if (dev >= SNDRV_CARDS)
  1459. return -ENODEV;
  1460. if (!enable[dev]) {
  1461. dev++;
  1462. return -ENOENT;
  1463. }
  1464. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1465. if (card == NULL)
  1466. return -ENOMEM;
  1467. for (idx = 0; idx < 5; idx++) {
  1468. if (pci_resource_start(pci, idx) == 0 ||
  1469. !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
  1470. snd_card_free(card);
  1471. return -ENODEV;
  1472. }
  1473. }
  1474. if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
  1475. snd_card_free(card);
  1476. return err;
  1477. }
  1478. strcpy(card->driver, "ES1938");
  1479. strcpy(card->shortname, "ESS ES1938 (Solo-1)");
  1480. sprintf(card->longname, "%s rev %i, irq %i",
  1481. card->shortname,
  1482. chip->revision,
  1483. chip->irq);
  1484. if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
  1485. snd_card_free(card);
  1486. return err;
  1487. }
  1488. if ((err = snd_es1938_mixer(chip)) < 0) {
  1489. snd_card_free(card);
  1490. return err;
  1491. }
  1492. if (snd_opl3_create(card,
  1493. SLSB_REG(chip, FMLOWADDR),
  1494. SLSB_REG(chip, FMHIGHADDR),
  1495. OPL3_HW_OPL3, 1, &opl3) < 0) {
  1496. printk(KERN_ERR "es1938: OPL3 not detected at 0x%lx\n",
  1497. SLSB_REG(chip, FMLOWADDR));
  1498. } else {
  1499. if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
  1500. snd_card_free(card);
  1501. return err;
  1502. }
  1503. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1504. snd_card_free(card);
  1505. return err;
  1506. }
  1507. }
  1508. if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
  1509. chip->mpu_port, 1, chip->irq, 0, &chip->rmidi) < 0) {
  1510. printk(KERN_ERR "es1938: unable to initialize MPU-401\n");
  1511. } else {
  1512. // this line is vital for MIDI interrupt handling on ess-solo1
  1513. // andreas@flying-snail.de
  1514. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
  1515. }
  1516. snd_es1938_create_gameport(chip);
  1517. if ((err = snd_card_register(card)) < 0) {
  1518. snd_card_free(card);
  1519. return err;
  1520. }
  1521. pci_set_drvdata(pci, card);
  1522. dev++;
  1523. return 0;
  1524. }
  1525. static void __devexit snd_es1938_remove(struct pci_dev *pci)
  1526. {
  1527. snd_card_free(pci_get_drvdata(pci));
  1528. pci_set_drvdata(pci, NULL);
  1529. }
  1530. static struct pci_driver driver = {
  1531. .name = "ESS ES1938 (Solo-1)",
  1532. .id_table = snd_es1938_ids,
  1533. .probe = snd_es1938_probe,
  1534. .remove = __devexit_p(snd_es1938_remove),
  1535. SND_PCI_PM_CALLBACKS
  1536. };
  1537. static int __init alsa_card_es1938_init(void)
  1538. {
  1539. return pci_register_driver(&driver);
  1540. }
  1541. static void __exit alsa_card_es1938_exit(void)
  1542. {
  1543. pci_unregister_driver(&driver);
  1544. }
  1545. module_init(alsa_card_es1938_init)
  1546. module_exit(alsa_card_es1938_exit)