emu10k1x.c 47 KB

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  1. /*
  2. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  3. * Driver EMU10K1X chips
  4. *
  5. * Parts of this code were adapted from audigyls.c driver which is
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  7. *
  8. * BUGS:
  9. * --
  10. *
  11. * TODO:
  12. *
  13. * Chips (SB0200 model):
  14. * - EMU10K1X-DBQ
  15. * - STAC 9708T
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. */
  32. #include <sound/driver.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/pci.h>
  36. #include <linux/slab.h>
  37. #include <linux/moduleparam.h>
  38. #include <sound/core.h>
  39. #include <sound/initval.h>
  40. #include <sound/pcm.h>
  41. #include <sound/ac97_codec.h>
  42. #include <sound/info.h>
  43. #include <sound/rawmidi.h>
  44. MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
  45. MODULE_DESCRIPTION("EMU10K1X");
  46. MODULE_LICENSE("GPL");
  47. MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
  48. // module parameters (see "Module Parameters")
  49. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  50. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  51. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  52. module_param_array(index, int, NULL, 0444);
  53. MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
  54. module_param_array(id, charp, NULL, 0444);
  55. MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
  56. module_param_array(enable, bool, NULL, 0444);
  57. MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
  58. // some definitions were borrowed from emu10k1 driver as they seem to be the same
  59. /************************************************************************************************/
  60. /* PCI function 0 registers, address = <val> + PCIBASE0 */
  61. /************************************************************************************************/
  62. #define PTR 0x00 /* Indexed register set pointer register */
  63. /* NOTE: The CHANNELNUM and ADDRESS words can */
  64. /* be modified independently of each other. */
  65. #define DATA 0x04 /* Indexed register set data register */
  66. #define IPR 0x08 /* Global interrupt pending register */
  67. /* Clear pending interrupts by writing a 1 to */
  68. /* the relevant bits and zero to the other bits */
  69. #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
  70. #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
  71. #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  72. #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  73. #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  74. #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  75. #define INTE 0x0c /* Interrupt enable register */
  76. #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
  77. #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
  78. #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  79. #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  80. #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  81. #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  82. #define HCFG 0x14 /* Hardware config register */
  83. #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
  84. /* NOTE: This should generally never be used. */
  85. #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
  86. /* Should be set to 1 when the EMU10K1 is */
  87. /* completely initialized. */
  88. #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
  89. #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
  90. #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
  91. /********************************************************************************************************/
  92. /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
  93. /********************************************************************************************************/
  94. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  95. /* One list entry: 4 bytes for DMA address,
  96. * 4 bytes for period_size << 16.
  97. * One list entry is 8 bytes long.
  98. * One list entry for each period in the buffer.
  99. */
  100. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  101. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  102. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */
  103. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
  104. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
  105. #define PLAYBACK_UNKNOWN1 0x07
  106. #define PLAYBACK_UNKNOWN2 0x08
  107. /* Only one capture channel supported */
  108. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  109. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  110. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  111. #define CAPTURE_UNKNOWN 0x13
  112. /* From 0x20 - 0x3f, last samples played on each channel */
  113. #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
  114. #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
  115. #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
  116. #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
  117. #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
  118. #define ROUTING 0x41 /* Setup sound routing ? */
  119. #define ROUTING_FRONT_LEFT 0x00000001
  120. #define ROUTING_FRONT_RIGHT 0x00000002
  121. #define ROUTING_REAR_LEFT 0x00000004
  122. #define ROUTING_REAR_RIGHT 0x00000008
  123. #define ROUTING_CENTER_LFE 0x00010000
  124. #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
  125. #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
  126. #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
  127. #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
  128. #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
  129. #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
  130. #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
  131. #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
  132. #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
  133. #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
  134. #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
  135. #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
  136. #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
  137. #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
  138. #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
  139. #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
  140. #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
  141. #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
  142. #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
  143. #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
  144. #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
  145. #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
  146. #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
  147. #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
  148. #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
  149. #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
  150. #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
  151. /* This is the MPU port on the card */
  152. #define MUDATA 0x47
  153. #define MUCMD 0x48
  154. #define MUSTAT MUCMD
  155. /* From 0x50 - 0x5f, last samples captured */
  156. /**
  157. * The hardware has 3 channels for playback and 1 for capture.
  158. * - channel 0 is the front channel
  159. * - channel 1 is the rear channel
  160. * - channel 2 is the center/lfe chanel
  161. * Volume is controlled by the AC97 for the front and rear channels by
  162. * the PCM Playback Volume, Sigmatel Surround Playback Volume and
  163. * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
  164. * the front/rear channel mixing in the REAR OUT jack. When using the
  165. * 4-Speaker Stereo, both front and rear channels will be mixed in the
  166. * REAR OUT.
  167. * The center/lfe channel has no volume control and cannot be muted during
  168. * playback.
  169. */
  170. typedef struct snd_emu10k1x_voice emu10k1x_voice_t;
  171. typedef struct snd_emu10k1x emu10k1x_t;
  172. typedef struct snd_emu10k1x_pcm emu10k1x_pcm_t;
  173. struct snd_emu10k1x_voice {
  174. emu10k1x_t *emu;
  175. int number;
  176. int use;
  177. emu10k1x_pcm_t *epcm;
  178. };
  179. struct snd_emu10k1x_pcm {
  180. emu10k1x_t *emu;
  181. snd_pcm_substream_t *substream;
  182. emu10k1x_voice_t *voice;
  183. unsigned short running;
  184. };
  185. typedef struct {
  186. struct snd_emu10k1x *emu;
  187. snd_rawmidi_t *rmidi;
  188. snd_rawmidi_substream_t *substream_input;
  189. snd_rawmidi_substream_t *substream_output;
  190. unsigned int midi_mode;
  191. spinlock_t input_lock;
  192. spinlock_t output_lock;
  193. spinlock_t open_lock;
  194. int tx_enable, rx_enable;
  195. int port;
  196. int ipr_tx, ipr_rx;
  197. void (*interrupt)(emu10k1x_t *emu, unsigned int status);
  198. } emu10k1x_midi_t;
  199. // definition of the chip-specific record
  200. struct snd_emu10k1x {
  201. snd_card_t *card;
  202. struct pci_dev *pci;
  203. unsigned long port;
  204. struct resource *res_port;
  205. int irq;
  206. unsigned int revision; /* chip revision */
  207. unsigned int serial; /* serial number */
  208. unsigned short model; /* subsystem id */
  209. spinlock_t emu_lock;
  210. spinlock_t voice_lock;
  211. ac97_t *ac97;
  212. snd_pcm_t *pcm;
  213. emu10k1x_voice_t voices[3];
  214. emu10k1x_voice_t capture_voice;
  215. u32 spdif_bits[3]; // SPDIF out setup
  216. struct snd_dma_buffer dma_buffer;
  217. emu10k1x_midi_t midi;
  218. };
  219. /* hardware definition */
  220. static snd_pcm_hardware_t snd_emu10k1x_playback_hw = {
  221. .info = (SNDRV_PCM_INFO_MMAP |
  222. SNDRV_PCM_INFO_INTERLEAVED |
  223. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  224. SNDRV_PCM_INFO_MMAP_VALID),
  225. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  226. .rates = SNDRV_PCM_RATE_48000,
  227. .rate_min = 48000,
  228. .rate_max = 48000,
  229. .channels_min = 2,
  230. .channels_max = 2,
  231. .buffer_bytes_max = (32*1024),
  232. .period_bytes_min = 64,
  233. .period_bytes_max = (16*1024),
  234. .periods_min = 2,
  235. .periods_max = 8,
  236. .fifo_size = 0,
  237. };
  238. static snd_pcm_hardware_t snd_emu10k1x_capture_hw = {
  239. .info = (SNDRV_PCM_INFO_MMAP |
  240. SNDRV_PCM_INFO_INTERLEAVED |
  241. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  242. SNDRV_PCM_INFO_MMAP_VALID),
  243. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  244. .rates = SNDRV_PCM_RATE_48000,
  245. .rate_min = 48000,
  246. .rate_max = 48000,
  247. .channels_min = 2,
  248. .channels_max = 2,
  249. .buffer_bytes_max = (32*1024),
  250. .period_bytes_min = 64,
  251. .period_bytes_max = (16*1024),
  252. .periods_min = 2,
  253. .periods_max = 2,
  254. .fifo_size = 0,
  255. };
  256. static unsigned int snd_emu10k1x_ptr_read(emu10k1x_t * emu,
  257. unsigned int reg,
  258. unsigned int chn)
  259. {
  260. unsigned long flags;
  261. unsigned int regptr, val;
  262. regptr = (reg << 16) | chn;
  263. spin_lock_irqsave(&emu->emu_lock, flags);
  264. outl(regptr, emu->port + PTR);
  265. val = inl(emu->port + DATA);
  266. spin_unlock_irqrestore(&emu->emu_lock, flags);
  267. return val;
  268. }
  269. static void snd_emu10k1x_ptr_write(emu10k1x_t *emu,
  270. unsigned int reg,
  271. unsigned int chn,
  272. unsigned int data)
  273. {
  274. unsigned int regptr;
  275. unsigned long flags;
  276. regptr = (reg << 16) | chn;
  277. spin_lock_irqsave(&emu->emu_lock, flags);
  278. outl(regptr, emu->port + PTR);
  279. outl(data, emu->port + DATA);
  280. spin_unlock_irqrestore(&emu->emu_lock, flags);
  281. }
  282. static void snd_emu10k1x_intr_enable(emu10k1x_t *emu, unsigned int intrenb)
  283. {
  284. unsigned long flags;
  285. unsigned int enable;
  286. spin_lock_irqsave(&emu->emu_lock, flags);
  287. enable = inl(emu->port + INTE) | intrenb;
  288. outl(enable, emu->port + INTE);
  289. spin_unlock_irqrestore(&emu->emu_lock, flags);
  290. }
  291. static void snd_emu10k1x_intr_disable(emu10k1x_t *emu, unsigned int intrenb)
  292. {
  293. unsigned long flags;
  294. unsigned int enable;
  295. spin_lock_irqsave(&emu->emu_lock, flags);
  296. enable = inl(emu->port + INTE) & ~intrenb;
  297. outl(enable, emu->port + INTE);
  298. spin_unlock_irqrestore(&emu->emu_lock, flags);
  299. }
  300. static void snd_emu10k1x_gpio_write(emu10k1x_t *emu, unsigned int value)
  301. {
  302. unsigned long flags;
  303. spin_lock_irqsave(&emu->emu_lock, flags);
  304. outl(value, emu->port + GPIO);
  305. spin_unlock_irqrestore(&emu->emu_lock, flags);
  306. }
  307. static void snd_emu10k1x_pcm_free_substream(snd_pcm_runtime_t *runtime)
  308. {
  309. kfree(runtime->private_data);
  310. }
  311. static void snd_emu10k1x_pcm_interrupt(emu10k1x_t *emu, emu10k1x_voice_t *voice)
  312. {
  313. emu10k1x_pcm_t *epcm;
  314. if ((epcm = voice->epcm) == NULL)
  315. return;
  316. if (epcm->substream == NULL)
  317. return;
  318. #if 0
  319. snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
  320. epcm->substream->ops->pointer(epcm->substream),
  321. snd_pcm_lib_period_bytes(epcm->substream),
  322. snd_pcm_lib_buffer_bytes(epcm->substream));
  323. #endif
  324. snd_pcm_period_elapsed(epcm->substream);
  325. }
  326. /* open callback */
  327. static int snd_emu10k1x_playback_open(snd_pcm_substream_t *substream)
  328. {
  329. emu10k1x_t *chip = snd_pcm_substream_chip(substream);
  330. emu10k1x_pcm_t *epcm;
  331. snd_pcm_runtime_t *runtime = substream->runtime;
  332. int err;
  333. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
  334. return err;
  335. }
  336. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  337. return err;
  338. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  339. if (epcm == NULL)
  340. return -ENOMEM;
  341. epcm->emu = chip;
  342. epcm->substream = substream;
  343. runtime->private_data = epcm;
  344. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  345. runtime->hw = snd_emu10k1x_playback_hw;
  346. return 0;
  347. }
  348. /* close callback */
  349. static int snd_emu10k1x_playback_close(snd_pcm_substream_t *substream)
  350. {
  351. return 0;
  352. }
  353. /* hw_params callback */
  354. static int snd_emu10k1x_pcm_hw_params(snd_pcm_substream_t *substream,
  355. snd_pcm_hw_params_t * hw_params)
  356. {
  357. snd_pcm_runtime_t *runtime = substream->runtime;
  358. emu10k1x_pcm_t *epcm = runtime->private_data;
  359. if (! epcm->voice) {
  360. epcm->voice = &epcm->emu->voices[substream->pcm->device];
  361. epcm->voice->use = 1;
  362. epcm->voice->epcm = epcm;
  363. }
  364. return snd_pcm_lib_malloc_pages(substream,
  365. params_buffer_bytes(hw_params));
  366. }
  367. /* hw_free callback */
  368. static int snd_emu10k1x_pcm_hw_free(snd_pcm_substream_t *substream)
  369. {
  370. snd_pcm_runtime_t *runtime = substream->runtime;
  371. emu10k1x_pcm_t *epcm;
  372. if (runtime->private_data == NULL)
  373. return 0;
  374. epcm = runtime->private_data;
  375. if (epcm->voice) {
  376. epcm->voice->use = 0;
  377. epcm->voice->epcm = NULL;
  378. epcm->voice = NULL;
  379. }
  380. return snd_pcm_lib_free_pages(substream);
  381. }
  382. /* prepare callback */
  383. static int snd_emu10k1x_pcm_prepare(snd_pcm_substream_t *substream)
  384. {
  385. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  386. snd_pcm_runtime_t *runtime = substream->runtime;
  387. emu10k1x_pcm_t *epcm = runtime->private_data;
  388. int voice = epcm->voice->number;
  389. u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
  390. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  391. int i;
  392. for(i=0; i < runtime->periods; i++) {
  393. *table_base++=runtime->dma_addr+(i*period_size_bytes);
  394. *table_base++=period_size_bytes<<16;
  395. }
  396. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
  397. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
  398. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
  399. snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
  400. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
  401. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
  402. snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
  403. snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
  404. return 0;
  405. }
  406. /* trigger callback */
  407. static int snd_emu10k1x_pcm_trigger(snd_pcm_substream_t *substream,
  408. int cmd)
  409. {
  410. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  411. snd_pcm_runtime_t *runtime = substream->runtime;
  412. emu10k1x_pcm_t *epcm = runtime->private_data;
  413. int channel = epcm->voice->number;
  414. int result = 0;
  415. // snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
  416. switch (cmd) {
  417. case SNDRV_PCM_TRIGGER_START:
  418. if(runtime->periods == 2)
  419. snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  420. else
  421. snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
  422. epcm->running = 1;
  423. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
  424. break;
  425. case SNDRV_PCM_TRIGGER_STOP:
  426. epcm->running = 0;
  427. snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  428. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
  429. break;
  430. default:
  431. result = -EINVAL;
  432. break;
  433. }
  434. return result;
  435. }
  436. /* pointer callback */
  437. static snd_pcm_uframes_t
  438. snd_emu10k1x_pcm_pointer(snd_pcm_substream_t *substream)
  439. {
  440. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  441. snd_pcm_runtime_t *runtime = substream->runtime;
  442. emu10k1x_pcm_t *epcm = runtime->private_data;
  443. int channel = epcm->voice->number;
  444. snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
  445. if (!epcm->running)
  446. return 0;
  447. ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  448. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  449. ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  450. if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
  451. return 0;
  452. if (ptr3 != ptr4)
  453. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  454. ptr2 = bytes_to_frames(runtime, ptr1);
  455. ptr2 += (ptr4 >> 3) * runtime->period_size;
  456. ptr = ptr2;
  457. if (ptr >= runtime->buffer_size)
  458. ptr -= runtime->buffer_size;
  459. return ptr;
  460. }
  461. /* operators */
  462. static snd_pcm_ops_t snd_emu10k1x_playback_ops = {
  463. .open = snd_emu10k1x_playback_open,
  464. .close = snd_emu10k1x_playback_close,
  465. .ioctl = snd_pcm_lib_ioctl,
  466. .hw_params = snd_emu10k1x_pcm_hw_params,
  467. .hw_free = snd_emu10k1x_pcm_hw_free,
  468. .prepare = snd_emu10k1x_pcm_prepare,
  469. .trigger = snd_emu10k1x_pcm_trigger,
  470. .pointer = snd_emu10k1x_pcm_pointer,
  471. };
  472. /* open_capture callback */
  473. static int snd_emu10k1x_pcm_open_capture(snd_pcm_substream_t *substream)
  474. {
  475. emu10k1x_t *chip = snd_pcm_substream_chip(substream);
  476. emu10k1x_pcm_t *epcm;
  477. snd_pcm_runtime_t *runtime = substream->runtime;
  478. int err;
  479. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  480. return err;
  481. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  482. return err;
  483. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  484. if (epcm == NULL)
  485. return -ENOMEM;
  486. epcm->emu = chip;
  487. epcm->substream = substream;
  488. runtime->private_data = epcm;
  489. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  490. runtime->hw = snd_emu10k1x_capture_hw;
  491. return 0;
  492. }
  493. /* close callback */
  494. static int snd_emu10k1x_pcm_close_capture(snd_pcm_substream_t *substream)
  495. {
  496. return 0;
  497. }
  498. /* hw_params callback */
  499. static int snd_emu10k1x_pcm_hw_params_capture(snd_pcm_substream_t *substream,
  500. snd_pcm_hw_params_t * hw_params)
  501. {
  502. snd_pcm_runtime_t *runtime = substream->runtime;
  503. emu10k1x_pcm_t *epcm = runtime->private_data;
  504. if (! epcm->voice) {
  505. if (epcm->emu->capture_voice.use)
  506. return -EBUSY;
  507. epcm->voice = &epcm->emu->capture_voice;
  508. epcm->voice->epcm = epcm;
  509. epcm->voice->use = 1;
  510. }
  511. return snd_pcm_lib_malloc_pages(substream,
  512. params_buffer_bytes(hw_params));
  513. }
  514. /* hw_free callback */
  515. static int snd_emu10k1x_pcm_hw_free_capture(snd_pcm_substream_t *substream)
  516. {
  517. snd_pcm_runtime_t *runtime = substream->runtime;
  518. emu10k1x_pcm_t *epcm;
  519. if (runtime->private_data == NULL)
  520. return 0;
  521. epcm = runtime->private_data;
  522. if (epcm->voice) {
  523. epcm->voice->use = 0;
  524. epcm->voice->epcm = NULL;
  525. epcm->voice = NULL;
  526. }
  527. return snd_pcm_lib_free_pages(substream);
  528. }
  529. /* prepare capture callback */
  530. static int snd_emu10k1x_pcm_prepare_capture(snd_pcm_substream_t *substream)
  531. {
  532. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  533. snd_pcm_runtime_t *runtime = substream->runtime;
  534. snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
  535. snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  536. snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
  537. snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
  538. return 0;
  539. }
  540. /* trigger_capture callback */
  541. static int snd_emu10k1x_pcm_trigger_capture(snd_pcm_substream_t *substream,
  542. int cmd)
  543. {
  544. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  545. snd_pcm_runtime_t *runtime = substream->runtime;
  546. emu10k1x_pcm_t *epcm = runtime->private_data;
  547. int result = 0;
  548. switch (cmd) {
  549. case SNDRV_PCM_TRIGGER_START:
  550. snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
  551. INTE_CAP_0_HALF_LOOP);
  552. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
  553. epcm->running = 1;
  554. break;
  555. case SNDRV_PCM_TRIGGER_STOP:
  556. epcm->running = 0;
  557. snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
  558. INTE_CAP_0_HALF_LOOP);
  559. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
  560. break;
  561. default:
  562. result = -EINVAL;
  563. break;
  564. }
  565. return result;
  566. }
  567. /* pointer_capture callback */
  568. static snd_pcm_uframes_t
  569. snd_emu10k1x_pcm_pointer_capture(snd_pcm_substream_t *substream)
  570. {
  571. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  572. snd_pcm_runtime_t *runtime = substream->runtime;
  573. emu10k1x_pcm_t *epcm = runtime->private_data;
  574. snd_pcm_uframes_t ptr;
  575. if (!epcm->running)
  576. return 0;
  577. ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
  578. if (ptr >= runtime->buffer_size)
  579. ptr -= runtime->buffer_size;
  580. return ptr;
  581. }
  582. static snd_pcm_ops_t snd_emu10k1x_capture_ops = {
  583. .open = snd_emu10k1x_pcm_open_capture,
  584. .close = snd_emu10k1x_pcm_close_capture,
  585. .ioctl = snd_pcm_lib_ioctl,
  586. .hw_params = snd_emu10k1x_pcm_hw_params_capture,
  587. .hw_free = snd_emu10k1x_pcm_hw_free_capture,
  588. .prepare = snd_emu10k1x_pcm_prepare_capture,
  589. .trigger = snd_emu10k1x_pcm_trigger_capture,
  590. .pointer = snd_emu10k1x_pcm_pointer_capture,
  591. };
  592. static unsigned short snd_emu10k1x_ac97_read(ac97_t *ac97,
  593. unsigned short reg)
  594. {
  595. emu10k1x_t *emu = ac97->private_data;
  596. unsigned long flags;
  597. unsigned short val;
  598. spin_lock_irqsave(&emu->emu_lock, flags);
  599. outb(reg, emu->port + AC97ADDRESS);
  600. val = inw(emu->port + AC97DATA);
  601. spin_unlock_irqrestore(&emu->emu_lock, flags);
  602. return val;
  603. }
  604. static void snd_emu10k1x_ac97_write(ac97_t *ac97,
  605. unsigned short reg, unsigned short val)
  606. {
  607. emu10k1x_t *emu = ac97->private_data;
  608. unsigned long flags;
  609. spin_lock_irqsave(&emu->emu_lock, flags);
  610. outb(reg, emu->port + AC97ADDRESS);
  611. outw(val, emu->port + AC97DATA);
  612. spin_unlock_irqrestore(&emu->emu_lock, flags);
  613. }
  614. static int snd_emu10k1x_ac97(emu10k1x_t *chip)
  615. {
  616. ac97_bus_t *pbus;
  617. ac97_template_t ac97;
  618. int err;
  619. static ac97_bus_ops_t ops = {
  620. .write = snd_emu10k1x_ac97_write,
  621. .read = snd_emu10k1x_ac97_read,
  622. };
  623. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  624. return err;
  625. pbus->no_vra = 1; /* we don't need VRA */
  626. memset(&ac97, 0, sizeof(ac97));
  627. ac97.private_data = chip;
  628. ac97.scaps = AC97_SCAP_NO_SPDIF;
  629. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  630. }
  631. static int snd_emu10k1x_free(emu10k1x_t *chip)
  632. {
  633. snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
  634. // disable interrupts
  635. outl(0, chip->port + INTE);
  636. // disable audio
  637. outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
  638. // release the i/o port
  639. release_and_free_resource(chip->res_port);
  640. // release the irq
  641. if (chip->irq >= 0)
  642. free_irq(chip->irq, (void *)chip);
  643. // release the DMA
  644. if (chip->dma_buffer.area) {
  645. snd_dma_free_pages(&chip->dma_buffer);
  646. }
  647. pci_disable_device(chip->pci);
  648. // release the data
  649. kfree(chip);
  650. return 0;
  651. }
  652. static int snd_emu10k1x_dev_free(snd_device_t *device)
  653. {
  654. emu10k1x_t *chip = device->device_data;
  655. return snd_emu10k1x_free(chip);
  656. }
  657. static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id,
  658. struct pt_regs *regs)
  659. {
  660. unsigned int status;
  661. emu10k1x_t *chip = dev_id;
  662. emu10k1x_voice_t *pvoice = chip->voices;
  663. int i;
  664. int mask;
  665. status = inl(chip->port + IPR);
  666. if(status) {
  667. // capture interrupt
  668. if(status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
  669. emu10k1x_voice_t *pvoice = &chip->capture_voice;
  670. if(pvoice->use)
  671. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  672. else
  673. snd_emu10k1x_intr_disable(chip,
  674. INTE_CAP_0_LOOP |
  675. INTE_CAP_0_HALF_LOOP);
  676. }
  677. mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
  678. for(i = 0; i < 3; i++) {
  679. if(status & mask) {
  680. if(pvoice->use)
  681. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  682. else
  683. snd_emu10k1x_intr_disable(chip, mask);
  684. }
  685. pvoice++;
  686. mask <<= 1;
  687. }
  688. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  689. if (chip->midi.interrupt)
  690. chip->midi.interrupt(chip, status);
  691. else
  692. snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  693. }
  694. // acknowledge the interrupt if necessary
  695. if(status)
  696. outl(status, chip->port+IPR);
  697. // snd_printk(KERN_INFO "interrupt %08x\n", status);
  698. }
  699. return IRQ_HANDLED;
  700. }
  701. static int __devinit snd_emu10k1x_pcm(emu10k1x_t *emu, int device, snd_pcm_t **rpcm)
  702. {
  703. snd_pcm_t *pcm;
  704. int err;
  705. int capture = 0;
  706. if (rpcm)
  707. *rpcm = NULL;
  708. if (device == 0)
  709. capture = 1;
  710. if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
  711. return err;
  712. pcm->private_data = emu;
  713. switch(device) {
  714. case 0:
  715. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  716. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
  717. break;
  718. case 1:
  719. case 2:
  720. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  721. break;
  722. }
  723. pcm->info_flags = 0;
  724. pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
  725. switch(device) {
  726. case 0:
  727. strcpy(pcm->name, "EMU10K1X Front");
  728. break;
  729. case 1:
  730. strcpy(pcm->name, "EMU10K1X Rear");
  731. break;
  732. case 2:
  733. strcpy(pcm->name, "EMU10K1X Center/LFE");
  734. break;
  735. }
  736. emu->pcm = pcm;
  737. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  738. snd_dma_pci_data(emu->pci),
  739. 32*1024, 32*1024);
  740. if (rpcm)
  741. *rpcm = pcm;
  742. return 0;
  743. }
  744. static int __devinit snd_emu10k1x_create(snd_card_t *card,
  745. struct pci_dev *pci,
  746. emu10k1x_t **rchip)
  747. {
  748. emu10k1x_t *chip;
  749. int err;
  750. int ch;
  751. static snd_device_ops_t ops = {
  752. .dev_free = snd_emu10k1x_dev_free,
  753. };
  754. *rchip = NULL;
  755. if ((err = pci_enable_device(pci)) < 0)
  756. return err;
  757. if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
  758. pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
  759. snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
  760. pci_disable_device(pci);
  761. return -ENXIO;
  762. }
  763. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  764. if (chip == NULL) {
  765. pci_disable_device(pci);
  766. return -ENOMEM;
  767. }
  768. chip->card = card;
  769. chip->pci = pci;
  770. chip->irq = -1;
  771. spin_lock_init(&chip->emu_lock);
  772. spin_lock_init(&chip->voice_lock);
  773. chip->port = pci_resource_start(pci, 0);
  774. if ((chip->res_port = request_region(chip->port, 8,
  775. "EMU10K1X")) == NULL) {
  776. snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
  777. snd_emu10k1x_free(chip);
  778. return -EBUSY;
  779. }
  780. if (request_irq(pci->irq, snd_emu10k1x_interrupt,
  781. SA_INTERRUPT|SA_SHIRQ, "EMU10K1X",
  782. (void *)chip)) {
  783. snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
  784. snd_emu10k1x_free(chip);
  785. return -EBUSY;
  786. }
  787. chip->irq = pci->irq;
  788. if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  789. 4 * 1024, &chip->dma_buffer) < 0) {
  790. snd_emu10k1x_free(chip);
  791. return -ENOMEM;
  792. }
  793. pci_set_master(pci);
  794. /* read revision & serial */
  795. pci_read_config_byte(pci, PCI_REVISION_ID, (char *)&chip->revision);
  796. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  797. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  798. snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
  799. chip->revision, chip->serial);
  800. outl(0, chip->port + INTE);
  801. for(ch = 0; ch < 3; ch++) {
  802. chip->voices[ch].emu = chip;
  803. chip->voices[ch].number = ch;
  804. }
  805. /*
  806. * Init to 0x02109204 :
  807. * Clock accuracy = 0 (1000ppm)
  808. * Sample Rate = 2 (48kHz)
  809. * Audio Channel = 1 (Left of 2)
  810. * Source Number = 0 (Unspecified)
  811. * Generation Status = 1 (Original for Cat Code 12)
  812. * Cat Code = 12 (Digital Signal Mixer)
  813. * Mode = 0 (Mode 0)
  814. * Emphasis = 0 (None)
  815. * CP = 1 (Copyright unasserted)
  816. * AN = 0 (Audio data)
  817. * P = 0 (Consumer)
  818. */
  819. snd_emu10k1x_ptr_write(chip, SPCS0, 0,
  820. chip->spdif_bits[0] =
  821. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  822. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  823. SPCS_GENERATIONSTATUS | 0x00001200 |
  824. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  825. snd_emu10k1x_ptr_write(chip, SPCS1, 0,
  826. chip->spdif_bits[1] =
  827. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  828. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  829. SPCS_GENERATIONSTATUS | 0x00001200 |
  830. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  831. snd_emu10k1x_ptr_write(chip, SPCS2, 0,
  832. chip->spdif_bits[2] =
  833. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  834. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  835. SPCS_GENERATIONSTATUS | 0x00001200 |
  836. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  837. snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
  838. snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
  839. snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
  840. outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
  841. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  842. chip, &ops)) < 0) {
  843. snd_emu10k1x_free(chip);
  844. return err;
  845. }
  846. *rchip = chip;
  847. return 0;
  848. }
  849. static void snd_emu10k1x_proc_reg_read(snd_info_entry_t *entry,
  850. snd_info_buffer_t * buffer)
  851. {
  852. emu10k1x_t *emu = entry->private_data;
  853. unsigned long value,value1,value2;
  854. unsigned long flags;
  855. int i;
  856. snd_iprintf(buffer, "Registers:\n\n");
  857. for(i = 0; i < 0x20; i+=4) {
  858. spin_lock_irqsave(&emu->emu_lock, flags);
  859. value = inl(emu->port + i);
  860. spin_unlock_irqrestore(&emu->emu_lock, flags);
  861. snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
  862. }
  863. snd_iprintf(buffer, "\nRegisters\n\n");
  864. for(i = 0; i <= 0x48; i++) {
  865. value = snd_emu10k1x_ptr_read(emu, i, 0);
  866. if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
  867. value1 = snd_emu10k1x_ptr_read(emu, i, 1);
  868. value2 = snd_emu10k1x_ptr_read(emu, i, 2);
  869. snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
  870. } else {
  871. snd_iprintf(buffer, "%02X: %08lX\n", i, value);
  872. }
  873. }
  874. }
  875. static void snd_emu10k1x_proc_reg_write(snd_info_entry_t *entry,
  876. snd_info_buffer_t *buffer)
  877. {
  878. emu10k1x_t *emu = entry->private_data;
  879. char line[64];
  880. unsigned int reg, channel_id , val;
  881. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  882. if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
  883. continue;
  884. if ((reg < 0x49) && (reg >=0) && (val <= 0xffffffff)
  885. && (channel_id >=0) && (channel_id <= 2) )
  886. snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
  887. }
  888. }
  889. static int __devinit snd_emu10k1x_proc_init(emu10k1x_t * emu)
  890. {
  891. snd_info_entry_t *entry;
  892. if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
  893. snd_info_set_text_ops(entry, emu, 1024, snd_emu10k1x_proc_reg_read);
  894. entry->c.text.write_size = 64;
  895. entry->c.text.write = snd_emu10k1x_proc_reg_write;
  896. entry->mode |= S_IWUSR;
  897. entry->private_data = emu;
  898. }
  899. return 0;
  900. }
  901. static int snd_emu10k1x_shared_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  902. {
  903. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  904. uinfo->count = 1;
  905. uinfo->value.integer.min = 0;
  906. uinfo->value.integer.max = 1;
  907. return 0;
  908. }
  909. static int snd_emu10k1x_shared_spdif_get(snd_kcontrol_t * kcontrol,
  910. snd_ctl_elem_value_t * ucontrol)
  911. {
  912. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  913. ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
  914. return 0;
  915. }
  916. static int snd_emu10k1x_shared_spdif_put(snd_kcontrol_t * kcontrol,
  917. snd_ctl_elem_value_t * ucontrol)
  918. {
  919. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  920. unsigned int val;
  921. int change = 0;
  922. val = ucontrol->value.integer.value[0] ;
  923. if (val) {
  924. // enable spdif output
  925. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
  926. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
  927. snd_emu10k1x_gpio_write(emu, 0x1000);
  928. } else {
  929. // disable spdif output
  930. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
  931. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
  932. snd_emu10k1x_gpio_write(emu, 0x1080);
  933. }
  934. return change;
  935. }
  936. static snd_kcontrol_new_t snd_emu10k1x_shared_spdif __devinitdata =
  937. {
  938. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  939. .name = "Analog/Digital Output Jack",
  940. .info = snd_emu10k1x_shared_spdif_info,
  941. .get = snd_emu10k1x_shared_spdif_get,
  942. .put = snd_emu10k1x_shared_spdif_put
  943. };
  944. static int snd_emu10k1x_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  945. {
  946. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  947. uinfo->count = 1;
  948. return 0;
  949. }
  950. static int snd_emu10k1x_spdif_get(snd_kcontrol_t * kcontrol,
  951. snd_ctl_elem_value_t * ucontrol)
  952. {
  953. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  954. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  955. ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
  956. ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
  957. ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
  958. ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
  959. return 0;
  960. }
  961. static int snd_emu10k1x_spdif_get_mask(snd_kcontrol_t * kcontrol,
  962. snd_ctl_elem_value_t * ucontrol)
  963. {
  964. ucontrol->value.iec958.status[0] = 0xff;
  965. ucontrol->value.iec958.status[1] = 0xff;
  966. ucontrol->value.iec958.status[2] = 0xff;
  967. ucontrol->value.iec958.status[3] = 0xff;
  968. return 0;
  969. }
  970. static int snd_emu10k1x_spdif_put(snd_kcontrol_t * kcontrol,
  971. snd_ctl_elem_value_t * ucontrol)
  972. {
  973. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  974. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  975. int change;
  976. unsigned int val;
  977. val = (ucontrol->value.iec958.status[0] << 0) |
  978. (ucontrol->value.iec958.status[1] << 8) |
  979. (ucontrol->value.iec958.status[2] << 16) |
  980. (ucontrol->value.iec958.status[3] << 24);
  981. change = val != emu->spdif_bits[idx];
  982. if (change) {
  983. snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
  984. emu->spdif_bits[idx] = val;
  985. }
  986. return change;
  987. }
  988. static snd_kcontrol_new_t snd_emu10k1x_spdif_mask_control =
  989. {
  990. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  991. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  992. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  993. .count = 3,
  994. .info = snd_emu10k1x_spdif_info,
  995. .get = snd_emu10k1x_spdif_get_mask
  996. };
  997. static snd_kcontrol_new_t snd_emu10k1x_spdif_control =
  998. {
  999. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1000. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1001. .count = 3,
  1002. .info = snd_emu10k1x_spdif_info,
  1003. .get = snd_emu10k1x_spdif_get,
  1004. .put = snd_emu10k1x_spdif_put
  1005. };
  1006. static int __devinit snd_emu10k1x_mixer(emu10k1x_t *emu)
  1007. {
  1008. int err;
  1009. snd_kcontrol_t *kctl;
  1010. snd_card_t *card = emu->card;
  1011. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
  1012. return -ENOMEM;
  1013. if ((err = snd_ctl_add(card, kctl)))
  1014. return err;
  1015. if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
  1016. return -ENOMEM;
  1017. if ((err = snd_ctl_add(card, kctl)))
  1018. return err;
  1019. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
  1020. return -ENOMEM;
  1021. if ((err = snd_ctl_add(card, kctl)))
  1022. return err;
  1023. return 0;
  1024. }
  1025. #define EMU10K1X_MIDI_MODE_INPUT (1<<0)
  1026. #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
  1027. static inline unsigned char mpu401_read(emu10k1x_t *emu, emu10k1x_midi_t *mpu, int idx)
  1028. {
  1029. return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
  1030. }
  1031. static inline void mpu401_write(emu10k1x_t *emu, emu10k1x_midi_t *mpu, int data, int idx)
  1032. {
  1033. snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
  1034. }
  1035. #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
  1036. #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
  1037. #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
  1038. #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
  1039. #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
  1040. #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
  1041. #define MPU401_RESET 0xff
  1042. #define MPU401_ENTER_UART 0x3f
  1043. #define MPU401_ACK 0xfe
  1044. static void mpu401_clear_rx(emu10k1x_t *emu, emu10k1x_midi_t *mpu)
  1045. {
  1046. int timeout = 100000;
  1047. for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
  1048. mpu401_read_data(emu, mpu);
  1049. #ifdef CONFIG_SND_DEBUG
  1050. if (timeout <= 0)
  1051. snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
  1052. #endif
  1053. }
  1054. /*
  1055. */
  1056. static void do_emu10k1x_midi_interrupt(emu10k1x_t *emu, emu10k1x_midi_t *midi, unsigned int status)
  1057. {
  1058. unsigned char byte;
  1059. if (midi->rmidi == NULL) {
  1060. snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
  1061. return;
  1062. }
  1063. spin_lock(&midi->input_lock);
  1064. if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
  1065. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1066. mpu401_clear_rx(emu, midi);
  1067. } else {
  1068. byte = mpu401_read_data(emu, midi);
  1069. if (midi->substream_input)
  1070. snd_rawmidi_receive(midi->substream_input, &byte, 1);
  1071. }
  1072. }
  1073. spin_unlock(&midi->input_lock);
  1074. spin_lock(&midi->output_lock);
  1075. if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
  1076. if (midi->substream_output &&
  1077. snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
  1078. mpu401_write_data(emu, midi, byte);
  1079. } else {
  1080. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1081. }
  1082. }
  1083. spin_unlock(&midi->output_lock);
  1084. }
  1085. static void snd_emu10k1x_midi_interrupt(emu10k1x_t *emu, unsigned int status)
  1086. {
  1087. do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
  1088. }
  1089. static void snd_emu10k1x_midi_cmd(emu10k1x_t * emu, emu10k1x_midi_t *midi, unsigned char cmd, int ack)
  1090. {
  1091. unsigned long flags;
  1092. int timeout, ok;
  1093. spin_lock_irqsave(&midi->input_lock, flags);
  1094. mpu401_write_data(emu, midi, 0x00);
  1095. /* mpu401_clear_rx(emu, midi); */
  1096. mpu401_write_cmd(emu, midi, cmd);
  1097. if (ack) {
  1098. ok = 0;
  1099. timeout = 10000;
  1100. while (!ok && timeout-- > 0) {
  1101. if (mpu401_input_avail(emu, midi)) {
  1102. if (mpu401_read_data(emu, midi) == MPU401_ACK)
  1103. ok = 1;
  1104. }
  1105. }
  1106. if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
  1107. ok = 1;
  1108. } else {
  1109. ok = 1;
  1110. }
  1111. spin_unlock_irqrestore(&midi->input_lock, flags);
  1112. if (!ok)
  1113. snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
  1114. cmd, emu->port,
  1115. mpu401_read_stat(emu, midi),
  1116. mpu401_read_data(emu, midi));
  1117. }
  1118. static int snd_emu10k1x_midi_input_open(snd_rawmidi_substream_t * substream)
  1119. {
  1120. emu10k1x_t *emu;
  1121. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1122. unsigned long flags;
  1123. emu = midi->emu;
  1124. snd_assert(emu, return -ENXIO);
  1125. spin_lock_irqsave(&midi->open_lock, flags);
  1126. midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
  1127. midi->substream_input = substream;
  1128. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1129. spin_unlock_irqrestore(&midi->open_lock, flags);
  1130. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1131. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1132. } else {
  1133. spin_unlock_irqrestore(&midi->open_lock, flags);
  1134. }
  1135. return 0;
  1136. }
  1137. static int snd_emu10k1x_midi_output_open(snd_rawmidi_substream_t * substream)
  1138. {
  1139. emu10k1x_t *emu;
  1140. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1141. unsigned long flags;
  1142. emu = midi->emu;
  1143. snd_assert(emu, return -ENXIO);
  1144. spin_lock_irqsave(&midi->open_lock, flags);
  1145. midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
  1146. midi->substream_output = substream;
  1147. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1148. spin_unlock_irqrestore(&midi->open_lock, flags);
  1149. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1150. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1151. } else {
  1152. spin_unlock_irqrestore(&midi->open_lock, flags);
  1153. }
  1154. return 0;
  1155. }
  1156. static int snd_emu10k1x_midi_input_close(snd_rawmidi_substream_t * substream)
  1157. {
  1158. emu10k1x_t *emu;
  1159. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1160. unsigned long flags;
  1161. emu = midi->emu;
  1162. snd_assert(emu, return -ENXIO);
  1163. spin_lock_irqsave(&midi->open_lock, flags);
  1164. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1165. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
  1166. midi->substream_input = NULL;
  1167. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1168. spin_unlock_irqrestore(&midi->open_lock, flags);
  1169. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1170. } else {
  1171. spin_unlock_irqrestore(&midi->open_lock, flags);
  1172. }
  1173. return 0;
  1174. }
  1175. static int snd_emu10k1x_midi_output_close(snd_rawmidi_substream_t * substream)
  1176. {
  1177. emu10k1x_t *emu;
  1178. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1179. unsigned long flags;
  1180. emu = midi->emu;
  1181. snd_assert(emu, return -ENXIO);
  1182. spin_lock_irqsave(&midi->open_lock, flags);
  1183. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1184. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
  1185. midi->substream_output = NULL;
  1186. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1187. spin_unlock_irqrestore(&midi->open_lock, flags);
  1188. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1189. } else {
  1190. spin_unlock_irqrestore(&midi->open_lock, flags);
  1191. }
  1192. return 0;
  1193. }
  1194. static void snd_emu10k1x_midi_input_trigger(snd_rawmidi_substream_t * substream, int up)
  1195. {
  1196. emu10k1x_t *emu;
  1197. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1198. emu = midi->emu;
  1199. snd_assert(emu, return);
  1200. if (up)
  1201. snd_emu10k1x_intr_enable(emu, midi->rx_enable);
  1202. else
  1203. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1204. }
  1205. static void snd_emu10k1x_midi_output_trigger(snd_rawmidi_substream_t * substream, int up)
  1206. {
  1207. emu10k1x_t *emu;
  1208. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1209. unsigned long flags;
  1210. emu = midi->emu;
  1211. snd_assert(emu, return);
  1212. if (up) {
  1213. int max = 4;
  1214. unsigned char byte;
  1215. /* try to send some amount of bytes here before interrupts */
  1216. spin_lock_irqsave(&midi->output_lock, flags);
  1217. while (max > 0) {
  1218. if (mpu401_output_ready(emu, midi)) {
  1219. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
  1220. snd_rawmidi_transmit(substream, &byte, 1) != 1) {
  1221. /* no more data */
  1222. spin_unlock_irqrestore(&midi->output_lock, flags);
  1223. return;
  1224. }
  1225. mpu401_write_data(emu, midi, byte);
  1226. max--;
  1227. } else {
  1228. break;
  1229. }
  1230. }
  1231. spin_unlock_irqrestore(&midi->output_lock, flags);
  1232. snd_emu10k1x_intr_enable(emu, midi->tx_enable);
  1233. } else {
  1234. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1235. }
  1236. }
  1237. /*
  1238. */
  1239. static snd_rawmidi_ops_t snd_emu10k1x_midi_output =
  1240. {
  1241. .open = snd_emu10k1x_midi_output_open,
  1242. .close = snd_emu10k1x_midi_output_close,
  1243. .trigger = snd_emu10k1x_midi_output_trigger,
  1244. };
  1245. static snd_rawmidi_ops_t snd_emu10k1x_midi_input =
  1246. {
  1247. .open = snd_emu10k1x_midi_input_open,
  1248. .close = snd_emu10k1x_midi_input_close,
  1249. .trigger = snd_emu10k1x_midi_input_trigger,
  1250. };
  1251. static void snd_emu10k1x_midi_free(snd_rawmidi_t *rmidi)
  1252. {
  1253. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)rmidi->private_data;
  1254. midi->interrupt = NULL;
  1255. midi->rmidi = NULL;
  1256. }
  1257. static int __devinit emu10k1x_midi_init(emu10k1x_t *emu, emu10k1x_midi_t *midi, int device, char *name)
  1258. {
  1259. snd_rawmidi_t *rmidi;
  1260. int err;
  1261. if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
  1262. return err;
  1263. midi->emu = emu;
  1264. spin_lock_init(&midi->open_lock);
  1265. spin_lock_init(&midi->input_lock);
  1266. spin_lock_init(&midi->output_lock);
  1267. strcpy(rmidi->name, name);
  1268. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
  1269. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
  1270. rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
  1271. SNDRV_RAWMIDI_INFO_INPUT |
  1272. SNDRV_RAWMIDI_INFO_DUPLEX;
  1273. rmidi->private_data = midi;
  1274. rmidi->private_free = snd_emu10k1x_midi_free;
  1275. midi->rmidi = rmidi;
  1276. return 0;
  1277. }
  1278. static int __devinit snd_emu10k1x_midi(emu10k1x_t *emu)
  1279. {
  1280. emu10k1x_midi_t *midi = &emu->midi;
  1281. int err;
  1282. if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
  1283. return err;
  1284. midi->tx_enable = INTE_MIDITXENABLE;
  1285. midi->rx_enable = INTE_MIDIRXENABLE;
  1286. midi->port = MUDATA;
  1287. midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
  1288. midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
  1289. midi->interrupt = snd_emu10k1x_midi_interrupt;
  1290. return 0;
  1291. }
  1292. static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
  1293. const struct pci_device_id *pci_id)
  1294. {
  1295. static int dev;
  1296. snd_card_t *card;
  1297. emu10k1x_t *chip;
  1298. int err;
  1299. if (dev >= SNDRV_CARDS)
  1300. return -ENODEV;
  1301. if (!enable[dev]) {
  1302. dev++;
  1303. return -ENOENT;
  1304. }
  1305. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1306. if (card == NULL)
  1307. return -ENOMEM;
  1308. if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
  1309. snd_card_free(card);
  1310. return err;
  1311. }
  1312. if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
  1313. snd_card_free(card);
  1314. return err;
  1315. }
  1316. if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
  1317. snd_card_free(card);
  1318. return err;
  1319. }
  1320. if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
  1321. snd_card_free(card);
  1322. return err;
  1323. }
  1324. if ((err = snd_emu10k1x_ac97(chip)) < 0) {
  1325. snd_card_free(card);
  1326. return err;
  1327. }
  1328. if ((err = snd_emu10k1x_mixer(chip)) < 0) {
  1329. snd_card_free(card);
  1330. return err;
  1331. }
  1332. if ((err = snd_emu10k1x_midi(chip)) < 0) {
  1333. snd_card_free(card);
  1334. return err;
  1335. }
  1336. snd_emu10k1x_proc_init(chip);
  1337. strcpy(card->driver, "EMU10K1X");
  1338. strcpy(card->shortname, "Dell Sound Blaster Live!");
  1339. sprintf(card->longname, "%s at 0x%lx irq %i",
  1340. card->shortname, chip->port, chip->irq);
  1341. if ((err = snd_card_register(card)) < 0) {
  1342. snd_card_free(card);
  1343. return err;
  1344. }
  1345. pci_set_drvdata(pci, card);
  1346. dev++;
  1347. return 0;
  1348. }
  1349. static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
  1350. {
  1351. snd_card_free(pci_get_drvdata(pci));
  1352. pci_set_drvdata(pci, NULL);
  1353. }
  1354. // PCI IDs
  1355. static struct pci_device_id snd_emu10k1x_ids[] = {
  1356. { 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
  1357. { 0, }
  1358. };
  1359. MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
  1360. // pci_driver definition
  1361. static struct pci_driver driver = {
  1362. .name = "EMU10K1X",
  1363. .id_table = snd_emu10k1x_ids,
  1364. .probe = snd_emu10k1x_probe,
  1365. .remove = __devexit_p(snd_emu10k1x_remove),
  1366. };
  1367. // initialization of the module
  1368. static int __init alsa_card_emu10k1x_init(void)
  1369. {
  1370. int err;
  1371. if ((err = pci_register_driver(&driver)) > 0)
  1372. return err;
  1373. return 0;
  1374. }
  1375. // clean up the module
  1376. static void __exit alsa_card_emu10k1x_exit(void)
  1377. {
  1378. pci_unregister_driver(&driver);
  1379. }
  1380. module_init(alsa_card_emu10k1x_init)
  1381. module_exit(alsa_card_emu10k1x_exit)