e1000_main.c 133 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "6.3.9-k4"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  149. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  150. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  151. /* required last entry */
  152. {0,}
  153. };
  154. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  155. int e1000_up(struct e1000_adapter *adapter);
  156. void e1000_down(struct e1000_adapter *adapter);
  157. void e1000_reset(struct e1000_adapter *adapter);
  158. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  159. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  160. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  161. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  162. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  163. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  164. struct e1000_tx_ring *txdr);
  165. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rxdr);
  167. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  168. struct e1000_tx_ring *tx_ring);
  169. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. void e1000_update_stats(struct e1000_adapter *adapter);
  172. /* Local Function Prototypes */
  173. static int e1000_init_module(void);
  174. static void e1000_exit_module(void);
  175. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  176. static void __devexit e1000_remove(struct pci_dev *pdev);
  177. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  178. #ifdef CONFIG_E1000_MQ
  179. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  180. #endif
  181. static int e1000_sw_init(struct e1000_adapter *adapter);
  182. static int e1000_open(struct net_device *netdev);
  183. static int e1000_close(struct net_device *netdev);
  184. static void e1000_configure_tx(struct e1000_adapter *adapter);
  185. static void e1000_configure_rx(struct e1000_adapter *adapter);
  186. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  187. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  188. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  189. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  190. struct e1000_tx_ring *tx_ring);
  191. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  192. struct e1000_rx_ring *rx_ring);
  193. static void e1000_set_multi(struct net_device *netdev);
  194. static void e1000_update_phy_info(unsigned long data);
  195. static void e1000_watchdog(unsigned long data);
  196. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  197. static void e1000_82547_tx_fifo_stall(unsigned long data);
  198. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  199. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  200. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  201. static int e1000_set_mac(struct net_device *netdev, void *p);
  202. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  203. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  204. struct e1000_tx_ring *tx_ring);
  205. #ifdef CONFIG_E1000_NAPI
  206. static int e1000_clean(struct net_device *poll_dev, int *budget);
  207. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  211. struct e1000_rx_ring *rx_ring,
  212. int *work_done, int work_to_do);
  213. #else
  214. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  215. struct e1000_rx_ring *rx_ring);
  216. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring);
  218. #endif
  219. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  223. struct e1000_rx_ring *rx_ring,
  224. int cleaned_count);
  225. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  226. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  227. int cmd);
  228. void e1000_set_ethtool_ops(struct net_device *netdev);
  229. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  230. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  231. static void e1000_tx_timeout(struct net_device *dev);
  232. static void e1000_tx_timeout_task(struct net_device *dev);
  233. static void e1000_smartspeed(struct e1000_adapter *adapter);
  234. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  235. struct sk_buff *skb);
  236. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  237. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  238. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  239. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  240. #ifdef CONFIG_PM
  241. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  242. static int e1000_resume(struct pci_dev *pdev);
  243. #endif
  244. #ifdef CONFIG_NET_POLL_CONTROLLER
  245. /* for netdump / net console */
  246. static void e1000_netpoll (struct net_device *netdev);
  247. #endif
  248. #ifdef CONFIG_E1000_MQ
  249. /* for multiple Rx queues */
  250. void e1000_rx_schedule(void *data);
  251. #endif
  252. /* Exported from other modules */
  253. extern void e1000_check_options(struct e1000_adapter *adapter);
  254. static struct pci_driver e1000_driver = {
  255. .name = e1000_driver_name,
  256. .id_table = e1000_pci_tbl,
  257. .probe = e1000_probe,
  258. .remove = __devexit_p(e1000_remove),
  259. /* Power Managment Hooks */
  260. #ifdef CONFIG_PM
  261. .suspend = e1000_suspend,
  262. .resume = e1000_resume
  263. #endif
  264. };
  265. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  266. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  267. MODULE_LICENSE("GPL");
  268. MODULE_VERSION(DRV_VERSION);
  269. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  270. module_param(debug, int, 0);
  271. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  272. /**
  273. * e1000_init_module - Driver Registration Routine
  274. *
  275. * e1000_init_module is the first routine called when the driver is
  276. * loaded. All it does is register with the PCI subsystem.
  277. **/
  278. static int __init
  279. e1000_init_module(void)
  280. {
  281. int ret;
  282. printk(KERN_INFO "%s - version %s\n",
  283. e1000_driver_string, e1000_driver_version);
  284. printk(KERN_INFO "%s\n", e1000_copyright);
  285. ret = pci_module_init(&e1000_driver);
  286. return ret;
  287. }
  288. module_init(e1000_init_module);
  289. /**
  290. * e1000_exit_module - Driver Exit Cleanup Routine
  291. *
  292. * e1000_exit_module is called just before the driver is removed
  293. * from memory.
  294. **/
  295. static void __exit
  296. e1000_exit_module(void)
  297. {
  298. pci_unregister_driver(&e1000_driver);
  299. }
  300. module_exit(e1000_exit_module);
  301. /**
  302. * e1000_irq_disable - Mask off interrupt generation on the NIC
  303. * @adapter: board private structure
  304. **/
  305. static inline void
  306. e1000_irq_disable(struct e1000_adapter *adapter)
  307. {
  308. atomic_inc(&adapter->irq_sem);
  309. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  310. E1000_WRITE_FLUSH(&adapter->hw);
  311. synchronize_irq(adapter->pdev->irq);
  312. }
  313. /**
  314. * e1000_irq_enable - Enable default interrupt generation settings
  315. * @adapter: board private structure
  316. **/
  317. static inline void
  318. e1000_irq_enable(struct e1000_adapter *adapter)
  319. {
  320. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  321. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  322. E1000_WRITE_FLUSH(&adapter->hw);
  323. }
  324. }
  325. static void
  326. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  327. {
  328. struct net_device *netdev = adapter->netdev;
  329. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  330. uint16_t old_vid = adapter->mng_vlan_id;
  331. if (adapter->vlgrp) {
  332. if (!adapter->vlgrp->vlan_devices[vid]) {
  333. if (adapter->hw.mng_cookie.status &
  334. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  335. e1000_vlan_rx_add_vid(netdev, vid);
  336. adapter->mng_vlan_id = vid;
  337. } else
  338. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  339. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  340. (vid != old_vid) &&
  341. !adapter->vlgrp->vlan_devices[old_vid])
  342. e1000_vlan_rx_kill_vid(netdev, old_vid);
  343. }
  344. }
  345. }
  346. /**
  347. * e1000_release_hw_control - release control of the h/w to f/w
  348. * @adapter: address of board private structure
  349. *
  350. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  351. * For ASF and Pass Through versions of f/w this means that the
  352. * driver is no longer loaded. For AMT version (only with 82573) i
  353. * of the f/w this means that the netowrk i/f is closed.
  354. *
  355. **/
  356. static inline void
  357. e1000_release_hw_control(struct e1000_adapter *adapter)
  358. {
  359. uint32_t ctrl_ext;
  360. uint32_t swsm;
  361. /* Let firmware taken over control of h/w */
  362. switch (adapter->hw.mac_type) {
  363. case e1000_82571:
  364. case e1000_82572:
  365. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  366. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  367. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  368. break;
  369. case e1000_82573:
  370. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  371. E1000_WRITE_REG(&adapter->hw, SWSM,
  372. swsm & ~E1000_SWSM_DRV_LOAD);
  373. default:
  374. break;
  375. }
  376. }
  377. /**
  378. * e1000_get_hw_control - get control of the h/w from f/w
  379. * @adapter: address of board private structure
  380. *
  381. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  382. * For ASF and Pass Through versions of f/w this means that
  383. * the driver is loaded. For AMT version (only with 82573)
  384. * of the f/w this means that the netowrk i/f is open.
  385. *
  386. **/
  387. static inline void
  388. e1000_get_hw_control(struct e1000_adapter *adapter)
  389. {
  390. uint32_t ctrl_ext;
  391. uint32_t swsm;
  392. /* Let firmware know the driver has taken over */
  393. switch (adapter->hw.mac_type) {
  394. case e1000_82571:
  395. case e1000_82572:
  396. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  397. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  398. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  399. break;
  400. case e1000_82573:
  401. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  402. E1000_WRITE_REG(&adapter->hw, SWSM,
  403. swsm | E1000_SWSM_DRV_LOAD);
  404. break;
  405. default:
  406. break;
  407. }
  408. }
  409. int
  410. e1000_up(struct e1000_adapter *adapter)
  411. {
  412. struct net_device *netdev = adapter->netdev;
  413. int i, err;
  414. /* hardware has been reset, we need to reload some things */
  415. /* Reset the PHY if it was previously powered down */
  416. if (adapter->hw.media_type == e1000_media_type_copper) {
  417. uint16_t mii_reg;
  418. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  419. if (mii_reg & MII_CR_POWER_DOWN)
  420. e1000_phy_reset(&adapter->hw);
  421. }
  422. e1000_set_multi(netdev);
  423. e1000_restore_vlan(adapter);
  424. e1000_configure_tx(adapter);
  425. e1000_setup_rctl(adapter);
  426. e1000_configure_rx(adapter);
  427. /* call E1000_DESC_UNUSED which always leaves
  428. * at least 1 descriptor unused to make sure
  429. * next_to_use != next_to_clean */
  430. for (i = 0; i < adapter->num_rx_queues; i++) {
  431. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  432. adapter->alloc_rx_buf(adapter, ring,
  433. E1000_DESC_UNUSED(ring));
  434. }
  435. #ifdef CONFIG_PCI_MSI
  436. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  437. adapter->have_msi = TRUE;
  438. if ((err = pci_enable_msi(adapter->pdev))) {
  439. DPRINTK(PROBE, ERR,
  440. "Unable to allocate MSI interrupt Error: %d\n", err);
  441. adapter->have_msi = FALSE;
  442. }
  443. }
  444. #endif
  445. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  446. SA_SHIRQ | SA_SAMPLE_RANDOM,
  447. netdev->name, netdev))) {
  448. DPRINTK(PROBE, ERR,
  449. "Unable to allocate interrupt Error: %d\n", err);
  450. return err;
  451. }
  452. #ifdef CONFIG_E1000_MQ
  453. e1000_setup_queue_mapping(adapter);
  454. #endif
  455. adapter->tx_queue_len = netdev->tx_queue_len;
  456. mod_timer(&adapter->watchdog_timer, jiffies);
  457. #ifdef CONFIG_E1000_NAPI
  458. netif_poll_enable(netdev);
  459. #endif
  460. e1000_irq_enable(adapter);
  461. return 0;
  462. }
  463. void
  464. e1000_down(struct e1000_adapter *adapter)
  465. {
  466. struct net_device *netdev = adapter->netdev;
  467. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  468. e1000_check_mng_mode(&adapter->hw);
  469. e1000_irq_disable(adapter);
  470. #ifdef CONFIG_E1000_MQ
  471. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  472. #endif
  473. free_irq(adapter->pdev->irq, netdev);
  474. #ifdef CONFIG_PCI_MSI
  475. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  476. adapter->have_msi == TRUE)
  477. pci_disable_msi(adapter->pdev);
  478. #endif
  479. del_timer_sync(&adapter->tx_fifo_stall_timer);
  480. del_timer_sync(&adapter->watchdog_timer);
  481. del_timer_sync(&adapter->phy_info_timer);
  482. #ifdef CONFIG_E1000_NAPI
  483. netif_poll_disable(netdev);
  484. #endif
  485. netdev->tx_queue_len = adapter->tx_queue_len;
  486. adapter->link_speed = 0;
  487. adapter->link_duplex = 0;
  488. netif_carrier_off(netdev);
  489. netif_stop_queue(netdev);
  490. e1000_reset(adapter);
  491. e1000_clean_all_tx_rings(adapter);
  492. e1000_clean_all_rx_rings(adapter);
  493. /* Power down the PHY so no link is implied when interface is down *
  494. * The PHY cannot be powered down if any of the following is TRUE *
  495. * (a) WoL is enabled
  496. * (b) AMT is active
  497. * (c) SoL/IDER session is active */
  498. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  499. adapter->hw.media_type == e1000_media_type_copper &&
  500. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  501. !mng_mode_enabled &&
  502. !e1000_check_phy_reset_block(&adapter->hw)) {
  503. uint16_t mii_reg;
  504. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  505. mii_reg |= MII_CR_POWER_DOWN;
  506. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  507. mdelay(1);
  508. }
  509. }
  510. void
  511. e1000_reset(struct e1000_adapter *adapter)
  512. {
  513. uint32_t pba, manc;
  514. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  515. /* Repartition Pba for greater than 9k mtu
  516. * To take effect CTRL.RST is required.
  517. */
  518. switch (adapter->hw.mac_type) {
  519. case e1000_82547:
  520. case e1000_82547_rev_2:
  521. pba = E1000_PBA_30K;
  522. break;
  523. case e1000_82571:
  524. case e1000_82572:
  525. pba = E1000_PBA_38K;
  526. break;
  527. case e1000_82573:
  528. pba = E1000_PBA_12K;
  529. break;
  530. default:
  531. pba = E1000_PBA_48K;
  532. break;
  533. }
  534. if ((adapter->hw.mac_type != e1000_82573) &&
  535. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  536. pba -= 8; /* allocate more FIFO for Tx */
  537. if (adapter->hw.mac_type == e1000_82547) {
  538. adapter->tx_fifo_head = 0;
  539. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  540. adapter->tx_fifo_size =
  541. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  542. atomic_set(&adapter->tx_fifo_stall, 0);
  543. }
  544. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  545. /* flow control settings */
  546. /* Set the FC high water mark to 90% of the FIFO size.
  547. * Required to clear last 3 LSB */
  548. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  549. adapter->hw.fc_high_water = fc_high_water_mark;
  550. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  551. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  552. adapter->hw.fc_send_xon = 1;
  553. adapter->hw.fc = adapter->hw.original_fc;
  554. /* Allow time for pending master requests to run */
  555. e1000_reset_hw(&adapter->hw);
  556. if (adapter->hw.mac_type >= e1000_82544)
  557. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  558. if (e1000_init_hw(&adapter->hw))
  559. DPRINTK(PROBE, ERR, "Hardware Error\n");
  560. e1000_update_mng_vlan(adapter);
  561. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  562. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  563. e1000_reset_adaptive(&adapter->hw);
  564. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  565. if (adapter->en_mng_pt) {
  566. manc = E1000_READ_REG(&adapter->hw, MANC);
  567. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  568. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  569. }
  570. }
  571. /**
  572. * e1000_probe - Device Initialization Routine
  573. * @pdev: PCI device information struct
  574. * @ent: entry in e1000_pci_tbl
  575. *
  576. * Returns 0 on success, negative on failure
  577. *
  578. * e1000_probe initializes an adapter identified by a pci_dev structure.
  579. * The OS initialization, configuring of the adapter private structure,
  580. * and a hardware reset occur.
  581. **/
  582. static int __devinit
  583. e1000_probe(struct pci_dev *pdev,
  584. const struct pci_device_id *ent)
  585. {
  586. struct net_device *netdev;
  587. struct e1000_adapter *adapter;
  588. unsigned long mmio_start, mmio_len;
  589. static int cards_found = 0;
  590. int i, err, pci_using_dac;
  591. uint16_t eeprom_data;
  592. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  593. if ((err = pci_enable_device(pdev)))
  594. return err;
  595. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  596. pci_using_dac = 1;
  597. } else {
  598. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  599. E1000_ERR("No usable DMA configuration, aborting\n");
  600. return err;
  601. }
  602. pci_using_dac = 0;
  603. }
  604. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  605. return err;
  606. pci_set_master(pdev);
  607. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  608. if (!netdev) {
  609. err = -ENOMEM;
  610. goto err_alloc_etherdev;
  611. }
  612. SET_MODULE_OWNER(netdev);
  613. SET_NETDEV_DEV(netdev, &pdev->dev);
  614. pci_set_drvdata(pdev, netdev);
  615. adapter = netdev_priv(netdev);
  616. adapter->netdev = netdev;
  617. adapter->pdev = pdev;
  618. adapter->hw.back = adapter;
  619. adapter->msg_enable = (1 << debug) - 1;
  620. mmio_start = pci_resource_start(pdev, BAR_0);
  621. mmio_len = pci_resource_len(pdev, BAR_0);
  622. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  623. if (!adapter->hw.hw_addr) {
  624. err = -EIO;
  625. goto err_ioremap;
  626. }
  627. for (i = BAR_1; i <= BAR_5; i++) {
  628. if (pci_resource_len(pdev, i) == 0)
  629. continue;
  630. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  631. adapter->hw.io_base = pci_resource_start(pdev, i);
  632. break;
  633. }
  634. }
  635. netdev->open = &e1000_open;
  636. netdev->stop = &e1000_close;
  637. netdev->hard_start_xmit = &e1000_xmit_frame;
  638. netdev->get_stats = &e1000_get_stats;
  639. netdev->set_multicast_list = &e1000_set_multi;
  640. netdev->set_mac_address = &e1000_set_mac;
  641. netdev->change_mtu = &e1000_change_mtu;
  642. netdev->do_ioctl = &e1000_ioctl;
  643. e1000_set_ethtool_ops(netdev);
  644. netdev->tx_timeout = &e1000_tx_timeout;
  645. netdev->watchdog_timeo = 5 * HZ;
  646. #ifdef CONFIG_E1000_NAPI
  647. netdev->poll = &e1000_clean;
  648. netdev->weight = 64;
  649. #endif
  650. netdev->vlan_rx_register = e1000_vlan_rx_register;
  651. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  652. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  653. #ifdef CONFIG_NET_POLL_CONTROLLER
  654. netdev->poll_controller = e1000_netpoll;
  655. #endif
  656. strcpy(netdev->name, pci_name(pdev));
  657. netdev->mem_start = mmio_start;
  658. netdev->mem_end = mmio_start + mmio_len;
  659. netdev->base_addr = adapter->hw.io_base;
  660. adapter->bd_number = cards_found;
  661. /* setup the private structure */
  662. if ((err = e1000_sw_init(adapter)))
  663. goto err_sw_init;
  664. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  665. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  666. if (adapter->hw.mac_type >= e1000_82543) {
  667. netdev->features = NETIF_F_SG |
  668. NETIF_F_HW_CSUM |
  669. NETIF_F_HW_VLAN_TX |
  670. NETIF_F_HW_VLAN_RX |
  671. NETIF_F_HW_VLAN_FILTER;
  672. }
  673. #ifdef NETIF_F_TSO
  674. if ((adapter->hw.mac_type >= e1000_82544) &&
  675. (adapter->hw.mac_type != e1000_82547))
  676. netdev->features |= NETIF_F_TSO;
  677. #ifdef NETIF_F_TSO_IPV6
  678. if (adapter->hw.mac_type > e1000_82547_rev_2)
  679. netdev->features |= NETIF_F_TSO_IPV6;
  680. #endif
  681. #endif
  682. if (pci_using_dac)
  683. netdev->features |= NETIF_F_HIGHDMA;
  684. /* hard_start_xmit is safe against parallel locking */
  685. netdev->features |= NETIF_F_LLTX;
  686. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  687. /* before reading the EEPROM, reset the controller to
  688. * put the device in a known good starting state */
  689. e1000_reset_hw(&adapter->hw);
  690. /* make sure the EEPROM is good */
  691. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  692. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  693. err = -EIO;
  694. goto err_eeprom;
  695. }
  696. /* copy the MAC address out of the EEPROM */
  697. if (e1000_read_mac_addr(&adapter->hw))
  698. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  699. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  700. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  701. if (!is_valid_ether_addr(netdev->perm_addr)) {
  702. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  703. err = -EIO;
  704. goto err_eeprom;
  705. }
  706. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  707. e1000_get_bus_info(&adapter->hw);
  708. init_timer(&adapter->tx_fifo_stall_timer);
  709. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  710. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  711. init_timer(&adapter->watchdog_timer);
  712. adapter->watchdog_timer.function = &e1000_watchdog;
  713. adapter->watchdog_timer.data = (unsigned long) adapter;
  714. INIT_WORK(&adapter->watchdog_task,
  715. (void (*)(void *))e1000_watchdog_task, adapter);
  716. init_timer(&adapter->phy_info_timer);
  717. adapter->phy_info_timer.function = &e1000_update_phy_info;
  718. adapter->phy_info_timer.data = (unsigned long) adapter;
  719. INIT_WORK(&adapter->tx_timeout_task,
  720. (void (*)(void *))e1000_tx_timeout_task, netdev);
  721. /* we're going to reset, so assume we have no link for now */
  722. netif_carrier_off(netdev);
  723. netif_stop_queue(netdev);
  724. e1000_check_options(adapter);
  725. /* Initial Wake on LAN setting
  726. * If APM wake is enabled in the EEPROM,
  727. * enable the ACPI Magic Packet filter
  728. */
  729. switch (adapter->hw.mac_type) {
  730. case e1000_82542_rev2_0:
  731. case e1000_82542_rev2_1:
  732. case e1000_82543:
  733. break;
  734. case e1000_82544:
  735. e1000_read_eeprom(&adapter->hw,
  736. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  737. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  738. break;
  739. case e1000_82546:
  740. case e1000_82546_rev_3:
  741. case e1000_82571:
  742. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  743. e1000_read_eeprom(&adapter->hw,
  744. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  745. break;
  746. }
  747. /* Fall Through */
  748. default:
  749. e1000_read_eeprom(&adapter->hw,
  750. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  751. break;
  752. }
  753. if (eeprom_data & eeprom_apme_mask)
  754. adapter->wol |= E1000_WUFC_MAG;
  755. /* print bus type/speed/width info */
  756. {
  757. struct e1000_hw *hw = &adapter->hw;
  758. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  759. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  760. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  761. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  762. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  763. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  764. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  765. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  766. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  767. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  768. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  769. "32-bit"));
  770. }
  771. for (i = 0; i < 6; i++)
  772. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  773. /* reset the hardware with the new settings */
  774. e1000_reset(adapter);
  775. /* If the controller is 82573 and f/w is AMT, do not set
  776. * DRV_LOAD until the interface is up. For all other cases,
  777. * let the f/w know that the h/w is now under the control
  778. * of the driver. */
  779. if (adapter->hw.mac_type != e1000_82573 ||
  780. !e1000_check_mng_mode(&adapter->hw))
  781. e1000_get_hw_control(adapter);
  782. strcpy(netdev->name, "eth%d");
  783. if ((err = register_netdev(netdev)))
  784. goto err_register;
  785. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  786. cards_found++;
  787. return 0;
  788. err_register:
  789. err_sw_init:
  790. err_eeprom:
  791. iounmap(adapter->hw.hw_addr);
  792. err_ioremap:
  793. free_netdev(netdev);
  794. err_alloc_etherdev:
  795. pci_release_regions(pdev);
  796. return err;
  797. }
  798. /**
  799. * e1000_remove - Device Removal Routine
  800. * @pdev: PCI device information struct
  801. *
  802. * e1000_remove is called by the PCI subsystem to alert the driver
  803. * that it should release a PCI device. The could be caused by a
  804. * Hot-Plug event, or because the driver is going to be removed from
  805. * memory.
  806. **/
  807. static void __devexit
  808. e1000_remove(struct pci_dev *pdev)
  809. {
  810. struct net_device *netdev = pci_get_drvdata(pdev);
  811. struct e1000_adapter *adapter = netdev_priv(netdev);
  812. uint32_t manc;
  813. #ifdef CONFIG_E1000_NAPI
  814. int i;
  815. #endif
  816. flush_scheduled_work();
  817. if (adapter->hw.mac_type >= e1000_82540 &&
  818. adapter->hw.media_type == e1000_media_type_copper) {
  819. manc = E1000_READ_REG(&adapter->hw, MANC);
  820. if (manc & E1000_MANC_SMBUS_EN) {
  821. manc |= E1000_MANC_ARP_EN;
  822. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  823. }
  824. }
  825. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  826. * would have already happened in close and is redundant. */
  827. e1000_release_hw_control(adapter);
  828. unregister_netdev(netdev);
  829. #ifdef CONFIG_E1000_NAPI
  830. for (i = 0; i < adapter->num_rx_queues; i++)
  831. __dev_put(&adapter->polling_netdev[i]);
  832. #endif
  833. if (!e1000_check_phy_reset_block(&adapter->hw))
  834. e1000_phy_hw_reset(&adapter->hw);
  835. kfree(adapter->tx_ring);
  836. kfree(adapter->rx_ring);
  837. #ifdef CONFIG_E1000_NAPI
  838. kfree(adapter->polling_netdev);
  839. #endif
  840. iounmap(adapter->hw.hw_addr);
  841. pci_release_regions(pdev);
  842. #ifdef CONFIG_E1000_MQ
  843. free_percpu(adapter->cpu_netdev);
  844. free_percpu(adapter->cpu_tx_ring);
  845. #endif
  846. free_netdev(netdev);
  847. pci_disable_device(pdev);
  848. }
  849. /**
  850. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  851. * @adapter: board private structure to initialize
  852. *
  853. * e1000_sw_init initializes the Adapter private data structure.
  854. * Fields are initialized based on PCI device information and
  855. * OS network device settings (MTU size).
  856. **/
  857. static int __devinit
  858. e1000_sw_init(struct e1000_adapter *adapter)
  859. {
  860. struct e1000_hw *hw = &adapter->hw;
  861. struct net_device *netdev = adapter->netdev;
  862. struct pci_dev *pdev = adapter->pdev;
  863. #ifdef CONFIG_E1000_NAPI
  864. int i;
  865. #endif
  866. /* PCI config space info */
  867. hw->vendor_id = pdev->vendor;
  868. hw->device_id = pdev->device;
  869. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  870. hw->subsystem_id = pdev->subsystem_device;
  871. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  872. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  873. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  874. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  875. hw->max_frame_size = netdev->mtu +
  876. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  877. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  878. /* identify the MAC */
  879. if (e1000_set_mac_type(hw)) {
  880. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  881. return -EIO;
  882. }
  883. /* initialize eeprom parameters */
  884. if (e1000_init_eeprom_params(hw)) {
  885. E1000_ERR("EEPROM initialization failed\n");
  886. return -EIO;
  887. }
  888. switch (hw->mac_type) {
  889. default:
  890. break;
  891. case e1000_82541:
  892. case e1000_82547:
  893. case e1000_82541_rev_2:
  894. case e1000_82547_rev_2:
  895. hw->phy_init_script = 1;
  896. break;
  897. }
  898. e1000_set_media_type(hw);
  899. hw->wait_autoneg_complete = FALSE;
  900. hw->tbi_compatibility_en = TRUE;
  901. hw->adaptive_ifs = TRUE;
  902. /* Copper options */
  903. if (hw->media_type == e1000_media_type_copper) {
  904. hw->mdix = AUTO_ALL_MODES;
  905. hw->disable_polarity_correction = FALSE;
  906. hw->master_slave = E1000_MASTER_SLAVE;
  907. }
  908. #ifdef CONFIG_E1000_MQ
  909. /* Number of supported queues */
  910. switch (hw->mac_type) {
  911. case e1000_82571:
  912. case e1000_82572:
  913. /* These controllers support 2 tx queues, but with a single
  914. * qdisc implementation, multiple tx queues aren't quite as
  915. * interesting. If we can find a logical way of mapping
  916. * flows to a queue, then perhaps we can up the num_tx_queue
  917. * count back to its default. Until then, we run the risk of
  918. * terrible performance due to SACK overload. */
  919. adapter->num_tx_queues = 1;
  920. adapter->num_rx_queues = 2;
  921. break;
  922. default:
  923. adapter->num_tx_queues = 1;
  924. adapter->num_rx_queues = 1;
  925. break;
  926. }
  927. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  928. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  929. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  930. adapter->num_rx_queues,
  931. ((adapter->num_rx_queues == 1)
  932. ? ((num_online_cpus() > 1)
  933. ? "(due to unsupported feature in current adapter)"
  934. : "(due to unsupported system configuration)")
  935. : ""));
  936. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  937. adapter->num_tx_queues);
  938. #else
  939. adapter->num_tx_queues = 1;
  940. adapter->num_rx_queues = 1;
  941. #endif
  942. if (e1000_alloc_queues(adapter)) {
  943. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  944. return -ENOMEM;
  945. }
  946. #ifdef CONFIG_E1000_NAPI
  947. for (i = 0; i < adapter->num_rx_queues; i++) {
  948. adapter->polling_netdev[i].priv = adapter;
  949. adapter->polling_netdev[i].poll = &e1000_clean;
  950. adapter->polling_netdev[i].weight = 64;
  951. dev_hold(&adapter->polling_netdev[i]);
  952. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  953. }
  954. spin_lock_init(&adapter->tx_queue_lock);
  955. #endif
  956. atomic_set(&adapter->irq_sem, 1);
  957. spin_lock_init(&adapter->stats_lock);
  958. return 0;
  959. }
  960. /**
  961. * e1000_alloc_queues - Allocate memory for all rings
  962. * @adapter: board private structure to initialize
  963. *
  964. * We allocate one ring per queue at run-time since we don't know the
  965. * number of queues at compile-time. The polling_netdev array is
  966. * intended for Multiqueue, but should work fine with a single queue.
  967. **/
  968. static int __devinit
  969. e1000_alloc_queues(struct e1000_adapter *adapter)
  970. {
  971. int size;
  972. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  973. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  974. if (!adapter->tx_ring)
  975. return -ENOMEM;
  976. memset(adapter->tx_ring, 0, size);
  977. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  978. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  979. if (!adapter->rx_ring) {
  980. kfree(adapter->tx_ring);
  981. return -ENOMEM;
  982. }
  983. memset(adapter->rx_ring, 0, size);
  984. #ifdef CONFIG_E1000_NAPI
  985. size = sizeof(struct net_device) * adapter->num_rx_queues;
  986. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  987. if (!adapter->polling_netdev) {
  988. kfree(adapter->tx_ring);
  989. kfree(adapter->rx_ring);
  990. return -ENOMEM;
  991. }
  992. memset(adapter->polling_netdev, 0, size);
  993. #endif
  994. #ifdef CONFIG_E1000_MQ
  995. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  996. adapter->rx_sched_call_data.info = adapter->netdev;
  997. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  998. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  999. #endif
  1000. return E1000_SUCCESS;
  1001. }
  1002. #ifdef CONFIG_E1000_MQ
  1003. static void __devinit
  1004. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  1005. {
  1006. int i, cpu;
  1007. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  1008. adapter->rx_sched_call_data.info = adapter->netdev;
  1009. cpus_clear(adapter->rx_sched_call_data.cpumask);
  1010. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  1011. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  1012. lock_cpu_hotplug();
  1013. i = 0;
  1014. for_each_online_cpu(cpu) {
  1015. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  1016. /* This is incomplete because we'd like to assign separate
  1017. * physical cpus to these netdev polling structures and
  1018. * avoid saturating a subset of cpus.
  1019. */
  1020. if (i < adapter->num_rx_queues) {
  1021. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  1022. adapter->rx_ring[i].cpu = cpu;
  1023. cpu_set(cpu, adapter->cpumask);
  1024. } else
  1025. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  1026. i++;
  1027. }
  1028. unlock_cpu_hotplug();
  1029. }
  1030. #endif
  1031. /**
  1032. * e1000_open - Called when a network interface is made active
  1033. * @netdev: network interface device structure
  1034. *
  1035. * Returns 0 on success, negative value on failure
  1036. *
  1037. * The open entry point is called when a network interface is made
  1038. * active by the system (IFF_UP). At this point all resources needed
  1039. * for transmit and receive operations are allocated, the interrupt
  1040. * handler is registered with the OS, the watchdog timer is started,
  1041. * and the stack is notified that the interface is ready.
  1042. **/
  1043. static int
  1044. e1000_open(struct net_device *netdev)
  1045. {
  1046. struct e1000_adapter *adapter = netdev_priv(netdev);
  1047. int err;
  1048. /* allocate transmit descriptors */
  1049. if ((err = e1000_setup_all_tx_resources(adapter)))
  1050. goto err_setup_tx;
  1051. /* allocate receive descriptors */
  1052. if ((err = e1000_setup_all_rx_resources(adapter)))
  1053. goto err_setup_rx;
  1054. if ((err = e1000_up(adapter)))
  1055. goto err_up;
  1056. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1057. if ((adapter->hw.mng_cookie.status &
  1058. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1059. e1000_update_mng_vlan(adapter);
  1060. }
  1061. /* If AMT is enabled, let the firmware know that the network
  1062. * interface is now open */
  1063. if (adapter->hw.mac_type == e1000_82573 &&
  1064. e1000_check_mng_mode(&adapter->hw))
  1065. e1000_get_hw_control(adapter);
  1066. return E1000_SUCCESS;
  1067. err_up:
  1068. e1000_free_all_rx_resources(adapter);
  1069. err_setup_rx:
  1070. e1000_free_all_tx_resources(adapter);
  1071. err_setup_tx:
  1072. e1000_reset(adapter);
  1073. return err;
  1074. }
  1075. /**
  1076. * e1000_close - Disables a network interface
  1077. * @netdev: network interface device structure
  1078. *
  1079. * Returns 0, this is not allowed to fail
  1080. *
  1081. * The close entry point is called when an interface is de-activated
  1082. * by the OS. The hardware is still under the drivers control, but
  1083. * needs to be disabled. A global MAC reset is issued to stop the
  1084. * hardware, and all transmit and receive resources are freed.
  1085. **/
  1086. static int
  1087. e1000_close(struct net_device *netdev)
  1088. {
  1089. struct e1000_adapter *adapter = netdev_priv(netdev);
  1090. e1000_down(adapter);
  1091. e1000_free_all_tx_resources(adapter);
  1092. e1000_free_all_rx_resources(adapter);
  1093. if ((adapter->hw.mng_cookie.status &
  1094. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1095. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1096. }
  1097. /* If AMT is enabled, let the firmware know that the network
  1098. * interface is now closed */
  1099. if (adapter->hw.mac_type == e1000_82573 &&
  1100. e1000_check_mng_mode(&adapter->hw))
  1101. e1000_release_hw_control(adapter);
  1102. return 0;
  1103. }
  1104. /**
  1105. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1106. * @adapter: address of board private structure
  1107. * @start: address of beginning of memory
  1108. * @len: length of memory
  1109. **/
  1110. static inline boolean_t
  1111. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1112. void *start, unsigned long len)
  1113. {
  1114. unsigned long begin = (unsigned long) start;
  1115. unsigned long end = begin + len;
  1116. /* First rev 82545 and 82546 need to not allow any memory
  1117. * write location to cross 64k boundary due to errata 23 */
  1118. if (adapter->hw.mac_type == e1000_82545 ||
  1119. adapter->hw.mac_type == e1000_82546) {
  1120. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1121. }
  1122. return TRUE;
  1123. }
  1124. /**
  1125. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1126. * @adapter: board private structure
  1127. * @txdr: tx descriptor ring (for a specific queue) to setup
  1128. *
  1129. * Return 0 on success, negative on failure
  1130. **/
  1131. static int
  1132. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1133. struct e1000_tx_ring *txdr)
  1134. {
  1135. struct pci_dev *pdev = adapter->pdev;
  1136. int size;
  1137. size = sizeof(struct e1000_buffer) * txdr->count;
  1138. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1139. if (!txdr->buffer_info) {
  1140. DPRINTK(PROBE, ERR,
  1141. "Unable to allocate memory for the transmit descriptor ring\n");
  1142. return -ENOMEM;
  1143. }
  1144. memset(txdr->buffer_info, 0, size);
  1145. /* round up to nearest 4K */
  1146. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1147. E1000_ROUNDUP(txdr->size, 4096);
  1148. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1149. if (!txdr->desc) {
  1150. setup_tx_desc_die:
  1151. vfree(txdr->buffer_info);
  1152. DPRINTK(PROBE, ERR,
  1153. "Unable to allocate memory for the transmit descriptor ring\n");
  1154. return -ENOMEM;
  1155. }
  1156. /* Fix for errata 23, can't cross 64kB boundary */
  1157. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1158. void *olddesc = txdr->desc;
  1159. dma_addr_t olddma = txdr->dma;
  1160. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1161. "at %p\n", txdr->size, txdr->desc);
  1162. /* Try again, without freeing the previous */
  1163. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1164. /* Failed allocation, critical failure */
  1165. if (!txdr->desc) {
  1166. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1167. goto setup_tx_desc_die;
  1168. }
  1169. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1170. /* give up */
  1171. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1172. txdr->dma);
  1173. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1174. DPRINTK(PROBE, ERR,
  1175. "Unable to allocate aligned memory "
  1176. "for the transmit descriptor ring\n");
  1177. vfree(txdr->buffer_info);
  1178. return -ENOMEM;
  1179. } else {
  1180. /* Free old allocation, new allocation was successful */
  1181. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1182. }
  1183. }
  1184. memset(txdr->desc, 0, txdr->size);
  1185. txdr->next_to_use = 0;
  1186. txdr->next_to_clean = 0;
  1187. spin_lock_init(&txdr->tx_lock);
  1188. return 0;
  1189. }
  1190. /**
  1191. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1192. * (Descriptors) for all queues
  1193. * @adapter: board private structure
  1194. *
  1195. * If this function returns with an error, then it's possible one or
  1196. * more of the rings is populated (while the rest are not). It is the
  1197. * callers duty to clean those orphaned rings.
  1198. *
  1199. * Return 0 on success, negative on failure
  1200. **/
  1201. int
  1202. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1203. {
  1204. int i, err = 0;
  1205. for (i = 0; i < adapter->num_tx_queues; i++) {
  1206. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1207. if (err) {
  1208. DPRINTK(PROBE, ERR,
  1209. "Allocation for Tx Queue %u failed\n", i);
  1210. break;
  1211. }
  1212. }
  1213. return err;
  1214. }
  1215. /**
  1216. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1217. * @adapter: board private structure
  1218. *
  1219. * Configure the Tx unit of the MAC after a reset.
  1220. **/
  1221. static void
  1222. e1000_configure_tx(struct e1000_adapter *adapter)
  1223. {
  1224. uint64_t tdba;
  1225. struct e1000_hw *hw = &adapter->hw;
  1226. uint32_t tdlen, tctl, tipg, tarc;
  1227. uint32_t ipgr1, ipgr2;
  1228. /* Setup the HW Tx Head and Tail descriptor pointers */
  1229. switch (adapter->num_tx_queues) {
  1230. case 2:
  1231. tdba = adapter->tx_ring[1].dma;
  1232. tdlen = adapter->tx_ring[1].count *
  1233. sizeof(struct e1000_tx_desc);
  1234. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1235. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1236. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1237. E1000_WRITE_REG(hw, TDH1, 0);
  1238. E1000_WRITE_REG(hw, TDT1, 0);
  1239. adapter->tx_ring[1].tdh = E1000_TDH1;
  1240. adapter->tx_ring[1].tdt = E1000_TDT1;
  1241. /* Fall Through */
  1242. case 1:
  1243. default:
  1244. tdba = adapter->tx_ring[0].dma;
  1245. tdlen = adapter->tx_ring[0].count *
  1246. sizeof(struct e1000_tx_desc);
  1247. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1248. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1249. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1250. E1000_WRITE_REG(hw, TDH, 0);
  1251. E1000_WRITE_REG(hw, TDT, 0);
  1252. adapter->tx_ring[0].tdh = E1000_TDH;
  1253. adapter->tx_ring[0].tdt = E1000_TDT;
  1254. break;
  1255. }
  1256. /* Set the default values for the Tx Inter Packet Gap timer */
  1257. if (hw->media_type == e1000_media_type_fiber ||
  1258. hw->media_type == e1000_media_type_internal_serdes)
  1259. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1260. else
  1261. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1262. switch (hw->mac_type) {
  1263. case e1000_82542_rev2_0:
  1264. case e1000_82542_rev2_1:
  1265. tipg = DEFAULT_82542_TIPG_IPGT;
  1266. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1267. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1268. break;
  1269. default:
  1270. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1271. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1272. break;
  1273. }
  1274. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1275. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1276. E1000_WRITE_REG(hw, TIPG, tipg);
  1277. /* Set the Tx Interrupt Delay register */
  1278. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1279. if (hw->mac_type >= e1000_82540)
  1280. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1281. /* Program the Transmit Control Register */
  1282. tctl = E1000_READ_REG(hw, TCTL);
  1283. tctl &= ~E1000_TCTL_CT;
  1284. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1285. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1286. E1000_WRITE_REG(hw, TCTL, tctl);
  1287. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1288. tarc = E1000_READ_REG(hw, TARC0);
  1289. tarc |= ((1 << 25) | (1 << 21));
  1290. E1000_WRITE_REG(hw, TARC0, tarc);
  1291. tarc = E1000_READ_REG(hw, TARC1);
  1292. tarc |= (1 << 25);
  1293. if (tctl & E1000_TCTL_MULR)
  1294. tarc &= ~(1 << 28);
  1295. else
  1296. tarc |= (1 << 28);
  1297. E1000_WRITE_REG(hw, TARC1, tarc);
  1298. }
  1299. e1000_config_collision_dist(hw);
  1300. /* Setup Transmit Descriptor Settings for eop descriptor */
  1301. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1302. E1000_TXD_CMD_IFCS;
  1303. if (hw->mac_type < e1000_82543)
  1304. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1305. else
  1306. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1307. /* Cache if we're 82544 running in PCI-X because we'll
  1308. * need this to apply a workaround later in the send path. */
  1309. if (hw->mac_type == e1000_82544 &&
  1310. hw->bus_type == e1000_bus_type_pcix)
  1311. adapter->pcix_82544 = 1;
  1312. }
  1313. /**
  1314. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1315. * @adapter: board private structure
  1316. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1317. *
  1318. * Returns 0 on success, negative on failure
  1319. **/
  1320. static int
  1321. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1322. struct e1000_rx_ring *rxdr)
  1323. {
  1324. struct pci_dev *pdev = adapter->pdev;
  1325. int size, desc_len;
  1326. size = sizeof(struct e1000_buffer) * rxdr->count;
  1327. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1328. if (!rxdr->buffer_info) {
  1329. DPRINTK(PROBE, ERR,
  1330. "Unable to allocate memory for the receive descriptor ring\n");
  1331. return -ENOMEM;
  1332. }
  1333. memset(rxdr->buffer_info, 0, size);
  1334. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1335. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1336. if (!rxdr->ps_page) {
  1337. vfree(rxdr->buffer_info);
  1338. DPRINTK(PROBE, ERR,
  1339. "Unable to allocate memory for the receive descriptor ring\n");
  1340. return -ENOMEM;
  1341. }
  1342. memset(rxdr->ps_page, 0, size);
  1343. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1344. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1345. if (!rxdr->ps_page_dma) {
  1346. vfree(rxdr->buffer_info);
  1347. kfree(rxdr->ps_page);
  1348. DPRINTK(PROBE, ERR,
  1349. "Unable to allocate memory for the receive descriptor ring\n");
  1350. return -ENOMEM;
  1351. }
  1352. memset(rxdr->ps_page_dma, 0, size);
  1353. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1354. desc_len = sizeof(struct e1000_rx_desc);
  1355. else
  1356. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1357. /* Round up to nearest 4K */
  1358. rxdr->size = rxdr->count * desc_len;
  1359. E1000_ROUNDUP(rxdr->size, 4096);
  1360. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1361. if (!rxdr->desc) {
  1362. DPRINTK(PROBE, ERR,
  1363. "Unable to allocate memory for the receive descriptor ring\n");
  1364. setup_rx_desc_die:
  1365. vfree(rxdr->buffer_info);
  1366. kfree(rxdr->ps_page);
  1367. kfree(rxdr->ps_page_dma);
  1368. return -ENOMEM;
  1369. }
  1370. /* Fix for errata 23, can't cross 64kB boundary */
  1371. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1372. void *olddesc = rxdr->desc;
  1373. dma_addr_t olddma = rxdr->dma;
  1374. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1375. "at %p\n", rxdr->size, rxdr->desc);
  1376. /* Try again, without freeing the previous */
  1377. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1378. /* Failed allocation, critical failure */
  1379. if (!rxdr->desc) {
  1380. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1381. DPRINTK(PROBE, ERR,
  1382. "Unable to allocate memory "
  1383. "for the receive descriptor ring\n");
  1384. goto setup_rx_desc_die;
  1385. }
  1386. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1387. /* give up */
  1388. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1389. rxdr->dma);
  1390. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1391. DPRINTK(PROBE, ERR,
  1392. "Unable to allocate aligned memory "
  1393. "for the receive descriptor ring\n");
  1394. goto setup_rx_desc_die;
  1395. } else {
  1396. /* Free old allocation, new allocation was successful */
  1397. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1398. }
  1399. }
  1400. memset(rxdr->desc, 0, rxdr->size);
  1401. rxdr->next_to_clean = 0;
  1402. rxdr->next_to_use = 0;
  1403. return 0;
  1404. }
  1405. /**
  1406. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1407. * (Descriptors) for all queues
  1408. * @adapter: board private structure
  1409. *
  1410. * If this function returns with an error, then it's possible one or
  1411. * more of the rings is populated (while the rest are not). It is the
  1412. * callers duty to clean those orphaned rings.
  1413. *
  1414. * Return 0 on success, negative on failure
  1415. **/
  1416. int
  1417. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1418. {
  1419. int i, err = 0;
  1420. for (i = 0; i < adapter->num_rx_queues; i++) {
  1421. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1422. if (err) {
  1423. DPRINTK(PROBE, ERR,
  1424. "Allocation for Rx Queue %u failed\n", i);
  1425. break;
  1426. }
  1427. }
  1428. return err;
  1429. }
  1430. /**
  1431. * e1000_setup_rctl - configure the receive control registers
  1432. * @adapter: Board private structure
  1433. **/
  1434. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1435. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1436. static void
  1437. e1000_setup_rctl(struct e1000_adapter *adapter)
  1438. {
  1439. uint32_t rctl, rfctl;
  1440. uint32_t psrctl = 0;
  1441. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1442. uint32_t pages = 0;
  1443. #endif
  1444. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1445. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1446. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1447. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1448. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1449. if (adapter->hw.mac_type > e1000_82543)
  1450. rctl |= E1000_RCTL_SECRC;
  1451. if (adapter->hw.tbi_compatibility_on == 1)
  1452. rctl |= E1000_RCTL_SBP;
  1453. else
  1454. rctl &= ~E1000_RCTL_SBP;
  1455. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1456. rctl &= ~E1000_RCTL_LPE;
  1457. else
  1458. rctl |= E1000_RCTL_LPE;
  1459. /* Setup buffer sizes */
  1460. if (adapter->hw.mac_type >= e1000_82571) {
  1461. /* We can now specify buffers in 1K increments.
  1462. * BSIZE and BSEX are ignored in this case. */
  1463. rctl |= adapter->rx_buffer_len << 0x11;
  1464. } else {
  1465. rctl &= ~E1000_RCTL_SZ_4096;
  1466. rctl |= E1000_RCTL_BSEX;
  1467. switch (adapter->rx_buffer_len) {
  1468. case E1000_RXBUFFER_2048:
  1469. default:
  1470. rctl |= E1000_RCTL_SZ_2048;
  1471. rctl &= ~E1000_RCTL_BSEX;
  1472. break;
  1473. case E1000_RXBUFFER_4096:
  1474. rctl |= E1000_RCTL_SZ_4096;
  1475. break;
  1476. case E1000_RXBUFFER_8192:
  1477. rctl |= E1000_RCTL_SZ_8192;
  1478. break;
  1479. case E1000_RXBUFFER_16384:
  1480. rctl |= E1000_RCTL_SZ_16384;
  1481. break;
  1482. }
  1483. }
  1484. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1485. /* 82571 and greater support packet-split where the protocol
  1486. * header is placed in skb->data and the packet data is
  1487. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1488. * In the case of a non-split, skb->data is linearly filled,
  1489. * followed by the page buffers. Therefore, skb->data is
  1490. * sized to hold the largest protocol header.
  1491. */
  1492. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1493. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1494. PAGE_SIZE <= 16384)
  1495. adapter->rx_ps_pages = pages;
  1496. else
  1497. adapter->rx_ps_pages = 0;
  1498. #endif
  1499. if (adapter->rx_ps_pages) {
  1500. /* Configure extra packet-split registers */
  1501. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1502. rfctl |= E1000_RFCTL_EXTEN;
  1503. /* disable IPv6 packet split support */
  1504. rfctl |= E1000_RFCTL_IPV6_DIS;
  1505. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1506. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1507. psrctl |= adapter->rx_ps_bsize0 >>
  1508. E1000_PSRCTL_BSIZE0_SHIFT;
  1509. switch (adapter->rx_ps_pages) {
  1510. case 3:
  1511. psrctl |= PAGE_SIZE <<
  1512. E1000_PSRCTL_BSIZE3_SHIFT;
  1513. case 2:
  1514. psrctl |= PAGE_SIZE <<
  1515. E1000_PSRCTL_BSIZE2_SHIFT;
  1516. case 1:
  1517. psrctl |= PAGE_SIZE >>
  1518. E1000_PSRCTL_BSIZE1_SHIFT;
  1519. break;
  1520. }
  1521. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1522. }
  1523. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1524. }
  1525. /**
  1526. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1527. * @adapter: board private structure
  1528. *
  1529. * Configure the Rx unit of the MAC after a reset.
  1530. **/
  1531. static void
  1532. e1000_configure_rx(struct e1000_adapter *adapter)
  1533. {
  1534. uint64_t rdba;
  1535. struct e1000_hw *hw = &adapter->hw;
  1536. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1537. #ifdef CONFIG_E1000_MQ
  1538. uint32_t reta, mrqc;
  1539. int i;
  1540. #endif
  1541. if (adapter->rx_ps_pages) {
  1542. rdlen = adapter->rx_ring[0].count *
  1543. sizeof(union e1000_rx_desc_packet_split);
  1544. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1545. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1546. } else {
  1547. rdlen = adapter->rx_ring[0].count *
  1548. sizeof(struct e1000_rx_desc);
  1549. adapter->clean_rx = e1000_clean_rx_irq;
  1550. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1551. }
  1552. /* disable receives while setting up the descriptors */
  1553. rctl = E1000_READ_REG(hw, RCTL);
  1554. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1555. /* set the Receive Delay Timer Register */
  1556. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1557. if (hw->mac_type >= e1000_82540) {
  1558. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1559. if (adapter->itr > 1)
  1560. E1000_WRITE_REG(hw, ITR,
  1561. 1000000000 / (adapter->itr * 256));
  1562. }
  1563. if (hw->mac_type >= e1000_82571) {
  1564. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1565. /* Reset delay timers after every interrupt */
  1566. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1567. #ifdef CONFIG_E1000_NAPI
  1568. /* Auto-Mask interrupts upon ICR read. */
  1569. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1570. #endif
  1571. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1572. E1000_WRITE_REG(hw, IAM, ~0);
  1573. E1000_WRITE_FLUSH(hw);
  1574. }
  1575. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1576. * the Base and Length of the Rx Descriptor Ring */
  1577. switch (adapter->num_rx_queues) {
  1578. #ifdef CONFIG_E1000_MQ
  1579. case 2:
  1580. rdba = adapter->rx_ring[1].dma;
  1581. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1582. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1583. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1584. E1000_WRITE_REG(hw, RDH1, 0);
  1585. E1000_WRITE_REG(hw, RDT1, 0);
  1586. adapter->rx_ring[1].rdh = E1000_RDH1;
  1587. adapter->rx_ring[1].rdt = E1000_RDT1;
  1588. /* Fall Through */
  1589. #endif
  1590. case 1:
  1591. default:
  1592. rdba = adapter->rx_ring[0].dma;
  1593. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1594. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1595. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1596. E1000_WRITE_REG(hw, RDH, 0);
  1597. E1000_WRITE_REG(hw, RDT, 0);
  1598. adapter->rx_ring[0].rdh = E1000_RDH;
  1599. adapter->rx_ring[0].rdt = E1000_RDT;
  1600. break;
  1601. }
  1602. #ifdef CONFIG_E1000_MQ
  1603. if (adapter->num_rx_queues > 1) {
  1604. uint32_t random[10];
  1605. get_random_bytes(&random[0], 40);
  1606. if (hw->mac_type <= e1000_82572) {
  1607. E1000_WRITE_REG(hw, RSSIR, 0);
  1608. E1000_WRITE_REG(hw, RSSIM, 0);
  1609. }
  1610. switch (adapter->num_rx_queues) {
  1611. case 2:
  1612. default:
  1613. reta = 0x00800080;
  1614. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1615. break;
  1616. }
  1617. /* Fill out redirection table */
  1618. for (i = 0; i < 32; i++)
  1619. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1620. /* Fill out hash function seeds */
  1621. for (i = 0; i < 10; i++)
  1622. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1623. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1624. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1625. E1000_WRITE_REG(hw, MRQC, mrqc);
  1626. }
  1627. /* Multiqueue and packet checksumming are mutually exclusive. */
  1628. if (hw->mac_type >= e1000_82571) {
  1629. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1630. rxcsum |= E1000_RXCSUM_PCSD;
  1631. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1632. }
  1633. #else
  1634. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1635. if (hw->mac_type >= e1000_82543) {
  1636. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1637. if (adapter->rx_csum == TRUE) {
  1638. rxcsum |= E1000_RXCSUM_TUOFL;
  1639. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1640. * Must be used in conjunction with packet-split. */
  1641. if ((hw->mac_type >= e1000_82571) &&
  1642. (adapter->rx_ps_pages)) {
  1643. rxcsum |= E1000_RXCSUM_IPPCSE;
  1644. }
  1645. } else {
  1646. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1647. /* don't need to clear IPPCSE as it defaults to 0 */
  1648. }
  1649. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1650. }
  1651. #endif /* CONFIG_E1000_MQ */
  1652. if (hw->mac_type == e1000_82573)
  1653. E1000_WRITE_REG(hw, ERT, 0x0100);
  1654. /* Enable Receives */
  1655. E1000_WRITE_REG(hw, RCTL, rctl);
  1656. }
  1657. /**
  1658. * e1000_free_tx_resources - Free Tx Resources per Queue
  1659. * @adapter: board private structure
  1660. * @tx_ring: Tx descriptor ring for a specific queue
  1661. *
  1662. * Free all transmit software resources
  1663. **/
  1664. static void
  1665. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1666. struct e1000_tx_ring *tx_ring)
  1667. {
  1668. struct pci_dev *pdev = adapter->pdev;
  1669. e1000_clean_tx_ring(adapter, tx_ring);
  1670. vfree(tx_ring->buffer_info);
  1671. tx_ring->buffer_info = NULL;
  1672. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1673. tx_ring->desc = NULL;
  1674. }
  1675. /**
  1676. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1677. * @adapter: board private structure
  1678. *
  1679. * Free all transmit software resources
  1680. **/
  1681. void
  1682. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1683. {
  1684. int i;
  1685. for (i = 0; i < adapter->num_tx_queues; i++)
  1686. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1687. }
  1688. static inline void
  1689. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1690. struct e1000_buffer *buffer_info)
  1691. {
  1692. if (buffer_info->dma) {
  1693. pci_unmap_page(adapter->pdev,
  1694. buffer_info->dma,
  1695. buffer_info->length,
  1696. PCI_DMA_TODEVICE);
  1697. }
  1698. if (buffer_info->skb)
  1699. dev_kfree_skb_any(buffer_info->skb);
  1700. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1701. }
  1702. /**
  1703. * e1000_clean_tx_ring - Free Tx Buffers
  1704. * @adapter: board private structure
  1705. * @tx_ring: ring to be cleaned
  1706. **/
  1707. static void
  1708. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1709. struct e1000_tx_ring *tx_ring)
  1710. {
  1711. struct e1000_buffer *buffer_info;
  1712. unsigned long size;
  1713. unsigned int i;
  1714. /* Free all the Tx ring sk_buffs */
  1715. for (i = 0; i < tx_ring->count; i++) {
  1716. buffer_info = &tx_ring->buffer_info[i];
  1717. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1718. }
  1719. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1720. memset(tx_ring->buffer_info, 0, size);
  1721. /* Zero out the descriptor ring */
  1722. memset(tx_ring->desc, 0, tx_ring->size);
  1723. tx_ring->next_to_use = 0;
  1724. tx_ring->next_to_clean = 0;
  1725. tx_ring->last_tx_tso = 0;
  1726. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1727. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1728. }
  1729. /**
  1730. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1731. * @adapter: board private structure
  1732. **/
  1733. static void
  1734. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1735. {
  1736. int i;
  1737. for (i = 0; i < adapter->num_tx_queues; i++)
  1738. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1739. }
  1740. /**
  1741. * e1000_free_rx_resources - Free Rx Resources
  1742. * @adapter: board private structure
  1743. * @rx_ring: ring to clean the resources from
  1744. *
  1745. * Free all receive software resources
  1746. **/
  1747. static void
  1748. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1749. struct e1000_rx_ring *rx_ring)
  1750. {
  1751. struct pci_dev *pdev = adapter->pdev;
  1752. e1000_clean_rx_ring(adapter, rx_ring);
  1753. vfree(rx_ring->buffer_info);
  1754. rx_ring->buffer_info = NULL;
  1755. kfree(rx_ring->ps_page);
  1756. rx_ring->ps_page = NULL;
  1757. kfree(rx_ring->ps_page_dma);
  1758. rx_ring->ps_page_dma = NULL;
  1759. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1760. rx_ring->desc = NULL;
  1761. }
  1762. /**
  1763. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1764. * @adapter: board private structure
  1765. *
  1766. * Free all receive software resources
  1767. **/
  1768. void
  1769. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1770. {
  1771. int i;
  1772. for (i = 0; i < adapter->num_rx_queues; i++)
  1773. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1774. }
  1775. /**
  1776. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1777. * @adapter: board private structure
  1778. * @rx_ring: ring to free buffers from
  1779. **/
  1780. static void
  1781. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1782. struct e1000_rx_ring *rx_ring)
  1783. {
  1784. struct e1000_buffer *buffer_info;
  1785. struct e1000_ps_page *ps_page;
  1786. struct e1000_ps_page_dma *ps_page_dma;
  1787. struct pci_dev *pdev = adapter->pdev;
  1788. unsigned long size;
  1789. unsigned int i, j;
  1790. /* Free all the Rx ring sk_buffs */
  1791. for (i = 0; i < rx_ring->count; i++) {
  1792. buffer_info = &rx_ring->buffer_info[i];
  1793. if (buffer_info->skb) {
  1794. pci_unmap_single(pdev,
  1795. buffer_info->dma,
  1796. buffer_info->length,
  1797. PCI_DMA_FROMDEVICE);
  1798. dev_kfree_skb(buffer_info->skb);
  1799. buffer_info->skb = NULL;
  1800. }
  1801. ps_page = &rx_ring->ps_page[i];
  1802. ps_page_dma = &rx_ring->ps_page_dma[i];
  1803. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1804. if (!ps_page->ps_page[j]) break;
  1805. pci_unmap_page(pdev,
  1806. ps_page_dma->ps_page_dma[j],
  1807. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1808. ps_page_dma->ps_page_dma[j] = 0;
  1809. put_page(ps_page->ps_page[j]);
  1810. ps_page->ps_page[j] = NULL;
  1811. }
  1812. }
  1813. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1814. memset(rx_ring->buffer_info, 0, size);
  1815. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1816. memset(rx_ring->ps_page, 0, size);
  1817. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1818. memset(rx_ring->ps_page_dma, 0, size);
  1819. /* Zero out the descriptor ring */
  1820. memset(rx_ring->desc, 0, rx_ring->size);
  1821. rx_ring->next_to_clean = 0;
  1822. rx_ring->next_to_use = 0;
  1823. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1824. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1825. }
  1826. /**
  1827. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1828. * @adapter: board private structure
  1829. **/
  1830. static void
  1831. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1832. {
  1833. int i;
  1834. for (i = 0; i < adapter->num_rx_queues; i++)
  1835. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1836. }
  1837. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1838. * and memory write and invalidate disabled for certain operations
  1839. */
  1840. static void
  1841. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1842. {
  1843. struct net_device *netdev = adapter->netdev;
  1844. uint32_t rctl;
  1845. e1000_pci_clear_mwi(&adapter->hw);
  1846. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1847. rctl |= E1000_RCTL_RST;
  1848. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1849. E1000_WRITE_FLUSH(&adapter->hw);
  1850. mdelay(5);
  1851. if (netif_running(netdev))
  1852. e1000_clean_all_rx_rings(adapter);
  1853. }
  1854. static void
  1855. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1856. {
  1857. struct net_device *netdev = adapter->netdev;
  1858. uint32_t rctl;
  1859. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1860. rctl &= ~E1000_RCTL_RST;
  1861. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1862. E1000_WRITE_FLUSH(&adapter->hw);
  1863. mdelay(5);
  1864. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1865. e1000_pci_set_mwi(&adapter->hw);
  1866. if (netif_running(netdev)) {
  1867. /* No need to loop, because 82542 supports only 1 queue */
  1868. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1869. e1000_configure_rx(adapter);
  1870. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1871. }
  1872. }
  1873. /**
  1874. * e1000_set_mac - Change the Ethernet Address of the NIC
  1875. * @netdev: network interface device structure
  1876. * @p: pointer to an address structure
  1877. *
  1878. * Returns 0 on success, negative on failure
  1879. **/
  1880. static int
  1881. e1000_set_mac(struct net_device *netdev, void *p)
  1882. {
  1883. struct e1000_adapter *adapter = netdev_priv(netdev);
  1884. struct sockaddr *addr = p;
  1885. if (!is_valid_ether_addr(addr->sa_data))
  1886. return -EADDRNOTAVAIL;
  1887. /* 82542 2.0 needs to be in reset to write receive address registers */
  1888. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1889. e1000_enter_82542_rst(adapter);
  1890. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1891. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1892. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1893. /* With 82571 controllers, LAA may be overwritten (with the default)
  1894. * due to controller reset from the other port. */
  1895. if (adapter->hw.mac_type == e1000_82571) {
  1896. /* activate the work around */
  1897. adapter->hw.laa_is_present = 1;
  1898. /* Hold a copy of the LAA in RAR[14] This is done so that
  1899. * between the time RAR[0] gets clobbered and the time it
  1900. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1901. * of the RARs and no incoming packets directed to this port
  1902. * are dropped. Eventaully the LAA will be in RAR[0] and
  1903. * RAR[14] */
  1904. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1905. E1000_RAR_ENTRIES - 1);
  1906. }
  1907. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1908. e1000_leave_82542_rst(adapter);
  1909. return 0;
  1910. }
  1911. /**
  1912. * e1000_set_multi - Multicast and Promiscuous mode set
  1913. * @netdev: network interface device structure
  1914. *
  1915. * The set_multi entry point is called whenever the multicast address
  1916. * list or the network interface flags are updated. This routine is
  1917. * responsible for configuring the hardware for proper multicast,
  1918. * promiscuous mode, and all-multi behavior.
  1919. **/
  1920. static void
  1921. e1000_set_multi(struct net_device *netdev)
  1922. {
  1923. struct e1000_adapter *adapter = netdev_priv(netdev);
  1924. struct e1000_hw *hw = &adapter->hw;
  1925. struct dev_mc_list *mc_ptr;
  1926. uint32_t rctl;
  1927. uint32_t hash_value;
  1928. int i, rar_entries = E1000_RAR_ENTRIES;
  1929. /* reserve RAR[14] for LAA over-write work-around */
  1930. if (adapter->hw.mac_type == e1000_82571)
  1931. rar_entries--;
  1932. /* Check for Promiscuous and All Multicast modes */
  1933. rctl = E1000_READ_REG(hw, RCTL);
  1934. if (netdev->flags & IFF_PROMISC) {
  1935. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1936. } else if (netdev->flags & IFF_ALLMULTI) {
  1937. rctl |= E1000_RCTL_MPE;
  1938. rctl &= ~E1000_RCTL_UPE;
  1939. } else {
  1940. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1941. }
  1942. E1000_WRITE_REG(hw, RCTL, rctl);
  1943. /* 82542 2.0 needs to be in reset to write receive address registers */
  1944. if (hw->mac_type == e1000_82542_rev2_0)
  1945. e1000_enter_82542_rst(adapter);
  1946. /* load the first 14 multicast address into the exact filters 1-14
  1947. * RAR 0 is used for the station MAC adddress
  1948. * if there are not 14 addresses, go ahead and clear the filters
  1949. * -- with 82571 controllers only 0-13 entries are filled here
  1950. */
  1951. mc_ptr = netdev->mc_list;
  1952. for (i = 1; i < rar_entries; i++) {
  1953. if (mc_ptr) {
  1954. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1955. mc_ptr = mc_ptr->next;
  1956. } else {
  1957. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1958. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1959. }
  1960. }
  1961. /* clear the old settings from the multicast hash table */
  1962. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1963. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1964. /* load any remaining addresses into the hash table */
  1965. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1966. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1967. e1000_mta_set(hw, hash_value);
  1968. }
  1969. if (hw->mac_type == e1000_82542_rev2_0)
  1970. e1000_leave_82542_rst(adapter);
  1971. }
  1972. /* Need to wait a few seconds after link up to get diagnostic information from
  1973. * the phy */
  1974. static void
  1975. e1000_update_phy_info(unsigned long data)
  1976. {
  1977. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1978. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1979. }
  1980. /**
  1981. * e1000_82547_tx_fifo_stall - Timer Call-back
  1982. * @data: pointer to adapter cast into an unsigned long
  1983. **/
  1984. static void
  1985. e1000_82547_tx_fifo_stall(unsigned long data)
  1986. {
  1987. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1988. struct net_device *netdev = adapter->netdev;
  1989. uint32_t tctl;
  1990. if (atomic_read(&adapter->tx_fifo_stall)) {
  1991. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1992. E1000_READ_REG(&adapter->hw, TDH)) &&
  1993. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1994. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1995. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1996. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1997. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1998. E1000_WRITE_REG(&adapter->hw, TCTL,
  1999. tctl & ~E1000_TCTL_EN);
  2000. E1000_WRITE_REG(&adapter->hw, TDFT,
  2001. adapter->tx_head_addr);
  2002. E1000_WRITE_REG(&adapter->hw, TDFH,
  2003. adapter->tx_head_addr);
  2004. E1000_WRITE_REG(&adapter->hw, TDFTS,
  2005. adapter->tx_head_addr);
  2006. E1000_WRITE_REG(&adapter->hw, TDFHS,
  2007. adapter->tx_head_addr);
  2008. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2009. E1000_WRITE_FLUSH(&adapter->hw);
  2010. adapter->tx_fifo_head = 0;
  2011. atomic_set(&adapter->tx_fifo_stall, 0);
  2012. netif_wake_queue(netdev);
  2013. } else {
  2014. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2015. }
  2016. }
  2017. }
  2018. /**
  2019. * e1000_watchdog - Timer Call-back
  2020. * @data: pointer to adapter cast into an unsigned long
  2021. **/
  2022. static void
  2023. e1000_watchdog(unsigned long data)
  2024. {
  2025. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2026. /* Do the rest outside of interrupt context */
  2027. schedule_work(&adapter->watchdog_task);
  2028. }
  2029. static void
  2030. e1000_watchdog_task(struct e1000_adapter *adapter)
  2031. {
  2032. struct net_device *netdev = adapter->netdev;
  2033. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2034. uint32_t link;
  2035. e1000_check_for_link(&adapter->hw);
  2036. if (adapter->hw.mac_type == e1000_82573) {
  2037. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2038. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2039. e1000_update_mng_vlan(adapter);
  2040. }
  2041. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2042. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2043. link = !adapter->hw.serdes_link_down;
  2044. else
  2045. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2046. if (link) {
  2047. if (!netif_carrier_ok(netdev)) {
  2048. e1000_get_speed_and_duplex(&adapter->hw,
  2049. &adapter->link_speed,
  2050. &adapter->link_duplex);
  2051. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2052. adapter->link_speed,
  2053. adapter->link_duplex == FULL_DUPLEX ?
  2054. "Full Duplex" : "Half Duplex");
  2055. /* tweak tx_queue_len according to speed/duplex */
  2056. netdev->tx_queue_len = adapter->tx_queue_len;
  2057. adapter->tx_timeout_factor = 1;
  2058. if (adapter->link_duplex == HALF_DUPLEX) {
  2059. switch (adapter->link_speed) {
  2060. case SPEED_10:
  2061. netdev->tx_queue_len = 10;
  2062. adapter->tx_timeout_factor = 8;
  2063. break;
  2064. case SPEED_100:
  2065. netdev->tx_queue_len = 100;
  2066. break;
  2067. }
  2068. }
  2069. netif_carrier_on(netdev);
  2070. netif_wake_queue(netdev);
  2071. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2072. adapter->smartspeed = 0;
  2073. }
  2074. } else {
  2075. if (netif_carrier_ok(netdev)) {
  2076. adapter->link_speed = 0;
  2077. adapter->link_duplex = 0;
  2078. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2079. netif_carrier_off(netdev);
  2080. netif_stop_queue(netdev);
  2081. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2082. }
  2083. e1000_smartspeed(adapter);
  2084. }
  2085. e1000_update_stats(adapter);
  2086. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2087. adapter->tpt_old = adapter->stats.tpt;
  2088. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2089. adapter->colc_old = adapter->stats.colc;
  2090. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2091. adapter->gorcl_old = adapter->stats.gorcl;
  2092. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2093. adapter->gotcl_old = adapter->stats.gotcl;
  2094. e1000_update_adaptive(&adapter->hw);
  2095. #ifdef CONFIG_E1000_MQ
  2096. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2097. #endif
  2098. if (!netif_carrier_ok(netdev)) {
  2099. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2100. /* We've lost link, so the controller stops DMA,
  2101. * but we've got queued Tx work that's never going
  2102. * to get done, so reset controller to flush Tx.
  2103. * (Do the reset outside of interrupt context). */
  2104. schedule_work(&adapter->tx_timeout_task);
  2105. }
  2106. }
  2107. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2108. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2109. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2110. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2111. * else is between 2000-8000. */
  2112. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2113. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2114. adapter->gotcl - adapter->gorcl :
  2115. adapter->gorcl - adapter->gotcl) / 10000;
  2116. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2117. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2118. }
  2119. /* Cause software interrupt to ensure rx ring is cleaned */
  2120. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2121. /* Force detection of hung controller every watchdog period */
  2122. adapter->detect_tx_hung = TRUE;
  2123. /* With 82571 controllers, LAA may be overwritten due to controller
  2124. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2125. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2126. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2127. /* Reset the timer */
  2128. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2129. }
  2130. #define E1000_TX_FLAGS_CSUM 0x00000001
  2131. #define E1000_TX_FLAGS_VLAN 0x00000002
  2132. #define E1000_TX_FLAGS_TSO 0x00000004
  2133. #define E1000_TX_FLAGS_IPV4 0x00000008
  2134. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2135. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2136. static inline int
  2137. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2138. struct sk_buff *skb)
  2139. {
  2140. #ifdef NETIF_F_TSO
  2141. struct e1000_context_desc *context_desc;
  2142. struct e1000_buffer *buffer_info;
  2143. unsigned int i;
  2144. uint32_t cmd_length = 0;
  2145. uint16_t ipcse = 0, tucse, mss;
  2146. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2147. int err;
  2148. if (skb_shinfo(skb)->tso_size) {
  2149. if (skb_header_cloned(skb)) {
  2150. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2151. if (err)
  2152. return err;
  2153. }
  2154. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2155. mss = skb_shinfo(skb)->tso_size;
  2156. if (skb->protocol == ntohs(ETH_P_IP)) {
  2157. skb->nh.iph->tot_len = 0;
  2158. skb->nh.iph->check = 0;
  2159. skb->h.th->check =
  2160. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2161. skb->nh.iph->daddr,
  2162. 0,
  2163. IPPROTO_TCP,
  2164. 0);
  2165. cmd_length = E1000_TXD_CMD_IP;
  2166. ipcse = skb->h.raw - skb->data - 1;
  2167. #ifdef NETIF_F_TSO_IPV6
  2168. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2169. skb->nh.ipv6h->payload_len = 0;
  2170. skb->h.th->check =
  2171. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2172. &skb->nh.ipv6h->daddr,
  2173. 0,
  2174. IPPROTO_TCP,
  2175. 0);
  2176. ipcse = 0;
  2177. #endif
  2178. }
  2179. ipcss = skb->nh.raw - skb->data;
  2180. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2181. tucss = skb->h.raw - skb->data;
  2182. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2183. tucse = 0;
  2184. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2185. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2186. i = tx_ring->next_to_use;
  2187. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2188. buffer_info = &tx_ring->buffer_info[i];
  2189. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2190. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2191. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2192. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2193. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2194. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2195. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2196. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2197. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2198. buffer_info->time_stamp = jiffies;
  2199. if (++i == tx_ring->count) i = 0;
  2200. tx_ring->next_to_use = i;
  2201. return TRUE;
  2202. }
  2203. #endif
  2204. return FALSE;
  2205. }
  2206. static inline boolean_t
  2207. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2208. struct sk_buff *skb)
  2209. {
  2210. struct e1000_context_desc *context_desc;
  2211. struct e1000_buffer *buffer_info;
  2212. unsigned int i;
  2213. uint8_t css;
  2214. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2215. css = skb->h.raw - skb->data;
  2216. i = tx_ring->next_to_use;
  2217. buffer_info = &tx_ring->buffer_info[i];
  2218. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2219. context_desc->upper_setup.tcp_fields.tucss = css;
  2220. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2221. context_desc->upper_setup.tcp_fields.tucse = 0;
  2222. context_desc->tcp_seg_setup.data = 0;
  2223. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2224. buffer_info->time_stamp = jiffies;
  2225. if (unlikely(++i == tx_ring->count)) i = 0;
  2226. tx_ring->next_to_use = i;
  2227. return TRUE;
  2228. }
  2229. return FALSE;
  2230. }
  2231. #define E1000_MAX_TXD_PWR 12
  2232. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2233. static inline int
  2234. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2235. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2236. unsigned int nr_frags, unsigned int mss)
  2237. {
  2238. struct e1000_buffer *buffer_info;
  2239. unsigned int len = skb->len;
  2240. unsigned int offset = 0, size, count = 0, i;
  2241. unsigned int f;
  2242. len -= skb->data_len;
  2243. i = tx_ring->next_to_use;
  2244. while (len) {
  2245. buffer_info = &tx_ring->buffer_info[i];
  2246. size = min(len, max_per_txd);
  2247. #ifdef NETIF_F_TSO
  2248. /* Workaround for Controller erratum --
  2249. * descriptor for non-tso packet in a linear SKB that follows a
  2250. * tso gets written back prematurely before the data is fully
  2251. * DMAd to the controller */
  2252. if (!skb->data_len && tx_ring->last_tx_tso &&
  2253. !skb_shinfo(skb)->tso_size) {
  2254. tx_ring->last_tx_tso = 0;
  2255. size -= 4;
  2256. }
  2257. /* Workaround for premature desc write-backs
  2258. * in TSO mode. Append 4-byte sentinel desc */
  2259. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2260. size -= 4;
  2261. #endif
  2262. /* work-around for errata 10 and it applies
  2263. * to all controllers in PCI-X mode
  2264. * The fix is to make sure that the first descriptor of a
  2265. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2266. */
  2267. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2268. (size > 2015) && count == 0))
  2269. size = 2015;
  2270. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2271. * terminating buffers within evenly-aligned dwords. */
  2272. if (unlikely(adapter->pcix_82544 &&
  2273. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2274. size > 4))
  2275. size -= 4;
  2276. buffer_info->length = size;
  2277. buffer_info->dma =
  2278. pci_map_single(adapter->pdev,
  2279. skb->data + offset,
  2280. size,
  2281. PCI_DMA_TODEVICE);
  2282. buffer_info->time_stamp = jiffies;
  2283. len -= size;
  2284. offset += size;
  2285. count++;
  2286. if (unlikely(++i == tx_ring->count)) i = 0;
  2287. }
  2288. for (f = 0; f < nr_frags; f++) {
  2289. struct skb_frag_struct *frag;
  2290. frag = &skb_shinfo(skb)->frags[f];
  2291. len = frag->size;
  2292. offset = frag->page_offset;
  2293. while (len) {
  2294. buffer_info = &tx_ring->buffer_info[i];
  2295. size = min(len, max_per_txd);
  2296. #ifdef NETIF_F_TSO
  2297. /* Workaround for premature desc write-backs
  2298. * in TSO mode. Append 4-byte sentinel desc */
  2299. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2300. size -= 4;
  2301. #endif
  2302. /* Workaround for potential 82544 hang in PCI-X.
  2303. * Avoid terminating buffers within evenly-aligned
  2304. * dwords. */
  2305. if (unlikely(adapter->pcix_82544 &&
  2306. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2307. size > 4))
  2308. size -= 4;
  2309. buffer_info->length = size;
  2310. buffer_info->dma =
  2311. pci_map_page(adapter->pdev,
  2312. frag->page,
  2313. offset,
  2314. size,
  2315. PCI_DMA_TODEVICE);
  2316. buffer_info->time_stamp = jiffies;
  2317. len -= size;
  2318. offset += size;
  2319. count++;
  2320. if (unlikely(++i == tx_ring->count)) i = 0;
  2321. }
  2322. }
  2323. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2324. tx_ring->buffer_info[i].skb = skb;
  2325. tx_ring->buffer_info[first].next_to_watch = i;
  2326. return count;
  2327. }
  2328. static inline void
  2329. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2330. int tx_flags, int count)
  2331. {
  2332. struct e1000_tx_desc *tx_desc = NULL;
  2333. struct e1000_buffer *buffer_info;
  2334. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2335. unsigned int i;
  2336. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2337. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2338. E1000_TXD_CMD_TSE;
  2339. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2340. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2341. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2342. }
  2343. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2344. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2345. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2346. }
  2347. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2348. txd_lower |= E1000_TXD_CMD_VLE;
  2349. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2350. }
  2351. i = tx_ring->next_to_use;
  2352. while (count--) {
  2353. buffer_info = &tx_ring->buffer_info[i];
  2354. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2355. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2356. tx_desc->lower.data =
  2357. cpu_to_le32(txd_lower | buffer_info->length);
  2358. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2359. if (unlikely(++i == tx_ring->count)) i = 0;
  2360. }
  2361. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2362. /* Force memory writes to complete before letting h/w
  2363. * know there are new descriptors to fetch. (Only
  2364. * applicable for weak-ordered memory model archs,
  2365. * such as IA-64). */
  2366. wmb();
  2367. tx_ring->next_to_use = i;
  2368. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2369. }
  2370. /**
  2371. * 82547 workaround to avoid controller hang in half-duplex environment.
  2372. * The workaround is to avoid queuing a large packet that would span
  2373. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2374. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2375. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2376. * to the beginning of the Tx FIFO.
  2377. **/
  2378. #define E1000_FIFO_HDR 0x10
  2379. #define E1000_82547_PAD_LEN 0x3E0
  2380. static inline int
  2381. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2382. {
  2383. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2384. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2385. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2386. if (adapter->link_duplex != HALF_DUPLEX)
  2387. goto no_fifo_stall_required;
  2388. if (atomic_read(&adapter->tx_fifo_stall))
  2389. return 1;
  2390. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2391. atomic_set(&adapter->tx_fifo_stall, 1);
  2392. return 1;
  2393. }
  2394. no_fifo_stall_required:
  2395. adapter->tx_fifo_head += skb_fifo_len;
  2396. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2397. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2398. return 0;
  2399. }
  2400. #define MINIMUM_DHCP_PACKET_SIZE 282
  2401. static inline int
  2402. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2403. {
  2404. struct e1000_hw *hw = &adapter->hw;
  2405. uint16_t length, offset;
  2406. if (vlan_tx_tag_present(skb)) {
  2407. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2408. ( adapter->hw.mng_cookie.status &
  2409. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2410. return 0;
  2411. }
  2412. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2413. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2414. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2415. const struct iphdr *ip =
  2416. (struct iphdr *)((uint8_t *)skb->data+14);
  2417. if (IPPROTO_UDP == ip->protocol) {
  2418. struct udphdr *udp =
  2419. (struct udphdr *)((uint8_t *)ip +
  2420. (ip->ihl << 2));
  2421. if (ntohs(udp->dest) == 67) {
  2422. offset = (uint8_t *)udp + 8 - skb->data;
  2423. length = skb->len - offset;
  2424. return e1000_mng_write_dhcp_info(hw,
  2425. (uint8_t *)udp + 8,
  2426. length);
  2427. }
  2428. }
  2429. }
  2430. }
  2431. return 0;
  2432. }
  2433. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2434. static int
  2435. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2436. {
  2437. struct e1000_adapter *adapter = netdev_priv(netdev);
  2438. struct e1000_tx_ring *tx_ring;
  2439. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2440. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2441. unsigned int tx_flags = 0;
  2442. unsigned int len = skb->len;
  2443. unsigned long flags;
  2444. unsigned int nr_frags = 0;
  2445. unsigned int mss = 0;
  2446. int count = 0;
  2447. int tso;
  2448. unsigned int f;
  2449. len -= skb->data_len;
  2450. #ifdef CONFIG_E1000_MQ
  2451. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2452. #else
  2453. tx_ring = adapter->tx_ring;
  2454. #endif
  2455. if (unlikely(skb->len <= 0)) {
  2456. dev_kfree_skb_any(skb);
  2457. return NETDEV_TX_OK;
  2458. }
  2459. #ifdef NETIF_F_TSO
  2460. mss = skb_shinfo(skb)->tso_size;
  2461. /* The controller does a simple calculation to
  2462. * make sure there is enough room in the FIFO before
  2463. * initiating the DMA for each buffer. The calc is:
  2464. * 4 = ceil(buffer len/mss). To make sure we don't
  2465. * overrun the FIFO, adjust the max buffer len if mss
  2466. * drops. */
  2467. if (mss) {
  2468. uint8_t hdr_len;
  2469. max_per_txd = min(mss << 2, max_per_txd);
  2470. max_txd_pwr = fls(max_per_txd) - 1;
  2471. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2472. * points to just header, pull a few bytes of payload from
  2473. * frags into skb->data */
  2474. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2475. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2476. (adapter->hw.mac_type == e1000_82571 ||
  2477. adapter->hw.mac_type == e1000_82572)) {
  2478. unsigned int pull_size;
  2479. pull_size = min((unsigned int)4, skb->data_len);
  2480. if (!__pskb_pull_tail(skb, pull_size)) {
  2481. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2482. dev_kfree_skb_any(skb);
  2483. return NETDEV_TX_OK;
  2484. }
  2485. len = skb->len - skb->data_len;
  2486. }
  2487. }
  2488. /* reserve a descriptor for the offload context */
  2489. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2490. count++;
  2491. count++;
  2492. #else
  2493. if (skb->ip_summed == CHECKSUM_HW)
  2494. count++;
  2495. #endif
  2496. #ifdef NETIF_F_TSO
  2497. /* Controller Erratum workaround */
  2498. if (!skb->data_len && tx_ring->last_tx_tso &&
  2499. !skb_shinfo(skb)->tso_size)
  2500. count++;
  2501. #endif
  2502. count += TXD_USE_COUNT(len, max_txd_pwr);
  2503. if (adapter->pcix_82544)
  2504. count++;
  2505. /* work-around for errata 10 and it applies to all controllers
  2506. * in PCI-X mode, so add one more descriptor to the count
  2507. */
  2508. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2509. (len > 2015)))
  2510. count++;
  2511. nr_frags = skb_shinfo(skb)->nr_frags;
  2512. for (f = 0; f < nr_frags; f++)
  2513. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2514. max_txd_pwr);
  2515. if (adapter->pcix_82544)
  2516. count += nr_frags;
  2517. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2518. e1000_transfer_dhcp_info(adapter, skb);
  2519. local_irq_save(flags);
  2520. if (!spin_trylock(&tx_ring->tx_lock)) {
  2521. /* Collision - tell upper layer to requeue */
  2522. local_irq_restore(flags);
  2523. return NETDEV_TX_LOCKED;
  2524. }
  2525. /* need: count + 2 desc gap to keep tail from touching
  2526. * head, otherwise try next time */
  2527. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2528. netif_stop_queue(netdev);
  2529. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2530. return NETDEV_TX_BUSY;
  2531. }
  2532. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2533. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2534. netif_stop_queue(netdev);
  2535. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2536. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2537. return NETDEV_TX_BUSY;
  2538. }
  2539. }
  2540. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2541. tx_flags |= E1000_TX_FLAGS_VLAN;
  2542. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2543. }
  2544. first = tx_ring->next_to_use;
  2545. tso = e1000_tso(adapter, tx_ring, skb);
  2546. if (tso < 0) {
  2547. dev_kfree_skb_any(skb);
  2548. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2549. return NETDEV_TX_OK;
  2550. }
  2551. if (likely(tso)) {
  2552. tx_ring->last_tx_tso = 1;
  2553. tx_flags |= E1000_TX_FLAGS_TSO;
  2554. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2555. tx_flags |= E1000_TX_FLAGS_CSUM;
  2556. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2557. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2558. * no longer assume, we must. */
  2559. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2560. tx_flags |= E1000_TX_FLAGS_IPV4;
  2561. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2562. e1000_tx_map(adapter, tx_ring, skb, first,
  2563. max_per_txd, nr_frags, mss));
  2564. netdev->trans_start = jiffies;
  2565. /* Make sure there is space in the ring for the next send. */
  2566. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2567. netif_stop_queue(netdev);
  2568. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2569. return NETDEV_TX_OK;
  2570. }
  2571. /**
  2572. * e1000_tx_timeout - Respond to a Tx Hang
  2573. * @netdev: network interface device structure
  2574. **/
  2575. static void
  2576. e1000_tx_timeout(struct net_device *netdev)
  2577. {
  2578. struct e1000_adapter *adapter = netdev_priv(netdev);
  2579. /* Do the reset outside of interrupt context */
  2580. schedule_work(&adapter->tx_timeout_task);
  2581. }
  2582. static void
  2583. e1000_tx_timeout_task(struct net_device *netdev)
  2584. {
  2585. struct e1000_adapter *adapter = netdev_priv(netdev);
  2586. adapter->tx_timeout_count++;
  2587. e1000_down(adapter);
  2588. e1000_up(adapter);
  2589. }
  2590. /**
  2591. * e1000_get_stats - Get System Network Statistics
  2592. * @netdev: network interface device structure
  2593. *
  2594. * Returns the address of the device statistics structure.
  2595. * The statistics are actually updated from the timer callback.
  2596. **/
  2597. static struct net_device_stats *
  2598. e1000_get_stats(struct net_device *netdev)
  2599. {
  2600. struct e1000_adapter *adapter = netdev_priv(netdev);
  2601. /* only return the current stats */
  2602. return &adapter->net_stats;
  2603. }
  2604. /**
  2605. * e1000_change_mtu - Change the Maximum Transfer Unit
  2606. * @netdev: network interface device structure
  2607. * @new_mtu: new value for maximum frame size
  2608. *
  2609. * Returns 0 on success, negative on failure
  2610. **/
  2611. static int
  2612. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2613. {
  2614. struct e1000_adapter *adapter = netdev_priv(netdev);
  2615. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2616. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2617. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2618. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2619. return -EINVAL;
  2620. }
  2621. /* Adapter-specific max frame size limits. */
  2622. switch (adapter->hw.mac_type) {
  2623. case e1000_82542_rev2_0:
  2624. case e1000_82542_rev2_1:
  2625. case e1000_82573:
  2626. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2627. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2628. return -EINVAL;
  2629. }
  2630. break;
  2631. case e1000_82571:
  2632. case e1000_82572:
  2633. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2634. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2635. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2636. return -EINVAL;
  2637. }
  2638. break;
  2639. default:
  2640. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2641. break;
  2642. }
  2643. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2644. adapter->rx_buffer_len = max_frame;
  2645. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2646. } else {
  2647. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2648. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2649. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2650. "on 82542\n");
  2651. return -EINVAL;
  2652. } else {
  2653. if(max_frame <= E1000_RXBUFFER_2048)
  2654. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2655. else if(max_frame <= E1000_RXBUFFER_4096)
  2656. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2657. else if(max_frame <= E1000_RXBUFFER_8192)
  2658. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2659. else if(max_frame <= E1000_RXBUFFER_16384)
  2660. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2661. }
  2662. }
  2663. netdev->mtu = new_mtu;
  2664. if (netif_running(netdev)) {
  2665. e1000_down(adapter);
  2666. e1000_up(adapter);
  2667. }
  2668. adapter->hw.max_frame_size = max_frame;
  2669. return 0;
  2670. }
  2671. /**
  2672. * e1000_update_stats - Update the board statistics counters
  2673. * @adapter: board private structure
  2674. **/
  2675. void
  2676. e1000_update_stats(struct e1000_adapter *adapter)
  2677. {
  2678. struct e1000_hw *hw = &adapter->hw;
  2679. unsigned long flags;
  2680. uint16_t phy_tmp;
  2681. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2682. spin_lock_irqsave(&adapter->stats_lock, flags);
  2683. /* these counters are modified from e1000_adjust_tbi_stats,
  2684. * called from the interrupt context, so they must only
  2685. * be written while holding adapter->stats_lock
  2686. */
  2687. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2688. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2689. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2690. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2691. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2692. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2693. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2694. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2695. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2696. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2697. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2698. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2699. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2700. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2701. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2702. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2703. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2704. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2705. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2706. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2707. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2708. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2709. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2710. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2711. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2712. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2713. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2714. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2715. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2716. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2717. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2718. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2719. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2720. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2721. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2722. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2723. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2724. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2725. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2726. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2727. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2728. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2729. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2730. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2731. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2732. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2733. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2734. /* used for adaptive IFS */
  2735. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2736. adapter->stats.tpt += hw->tx_packet_delta;
  2737. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2738. adapter->stats.colc += hw->collision_delta;
  2739. if (hw->mac_type >= e1000_82543) {
  2740. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2741. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2742. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2743. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2744. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2745. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2746. }
  2747. if (hw->mac_type > e1000_82547_rev_2) {
  2748. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2749. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2750. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2751. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2752. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2753. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2754. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2755. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2756. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2757. }
  2758. /* Fill out the OS statistics structure */
  2759. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2760. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2761. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2762. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2763. adapter->net_stats.multicast = adapter->stats.mprc;
  2764. adapter->net_stats.collisions = adapter->stats.colc;
  2765. /* Rx Errors */
  2766. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2767. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2768. adapter->stats.rlec + adapter->stats.cexterr;
  2769. adapter->net_stats.rx_dropped = 0;
  2770. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2771. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2772. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2773. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2774. /* Tx Errors */
  2775. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2776. adapter->stats.latecol;
  2777. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2778. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2779. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2780. /* Tx Dropped needs to be maintained elsewhere */
  2781. /* Phy Stats */
  2782. if (hw->media_type == e1000_media_type_copper) {
  2783. if ((adapter->link_speed == SPEED_1000) &&
  2784. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2785. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2786. adapter->phy_stats.idle_errors += phy_tmp;
  2787. }
  2788. if ((hw->mac_type <= e1000_82546) &&
  2789. (hw->phy_type == e1000_phy_m88) &&
  2790. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2791. adapter->phy_stats.receive_errors += phy_tmp;
  2792. }
  2793. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2794. }
  2795. #ifdef CONFIG_E1000_MQ
  2796. void
  2797. e1000_rx_schedule(void *data)
  2798. {
  2799. struct net_device *poll_dev, *netdev = data;
  2800. struct e1000_adapter *adapter = netdev->priv;
  2801. int this_cpu = get_cpu();
  2802. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2803. if (poll_dev == NULL) {
  2804. put_cpu();
  2805. return;
  2806. }
  2807. if (likely(netif_rx_schedule_prep(poll_dev)))
  2808. __netif_rx_schedule(poll_dev);
  2809. else
  2810. e1000_irq_enable(adapter);
  2811. put_cpu();
  2812. }
  2813. #endif
  2814. /**
  2815. * e1000_intr - Interrupt Handler
  2816. * @irq: interrupt number
  2817. * @data: pointer to a network interface device structure
  2818. * @pt_regs: CPU registers structure
  2819. **/
  2820. static irqreturn_t
  2821. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2822. {
  2823. struct net_device *netdev = data;
  2824. struct e1000_adapter *adapter = netdev_priv(netdev);
  2825. struct e1000_hw *hw = &adapter->hw;
  2826. uint32_t icr = E1000_READ_REG(hw, ICR);
  2827. #ifndef CONFIG_E1000_NAPI
  2828. int i;
  2829. #else
  2830. /* Interrupt Auto-Mask...upon reading ICR,
  2831. * interrupts are masked. No need for the
  2832. * IMC write, but it does mean we should
  2833. * account for it ASAP. */
  2834. if (likely(hw->mac_type >= e1000_82571))
  2835. atomic_inc(&adapter->irq_sem);
  2836. #endif
  2837. if (unlikely(!icr)) {
  2838. #ifdef CONFIG_E1000_NAPI
  2839. if (hw->mac_type >= e1000_82571)
  2840. e1000_irq_enable(adapter);
  2841. #endif
  2842. return IRQ_NONE; /* Not our interrupt */
  2843. }
  2844. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2845. hw->get_link_status = 1;
  2846. mod_timer(&adapter->watchdog_timer, jiffies);
  2847. }
  2848. #ifdef CONFIG_E1000_NAPI
  2849. if (unlikely(hw->mac_type < e1000_82571)) {
  2850. atomic_inc(&adapter->irq_sem);
  2851. E1000_WRITE_REG(hw, IMC, ~0);
  2852. E1000_WRITE_FLUSH(hw);
  2853. }
  2854. #ifdef CONFIG_E1000_MQ
  2855. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2856. /* We must setup the cpumask once count == 0 since
  2857. * each cpu bit is cleared when the work is done. */
  2858. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2859. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2860. atomic_set(&adapter->rx_sched_call_data.count,
  2861. adapter->num_rx_queues);
  2862. smp_call_async_mask(&adapter->rx_sched_call_data);
  2863. } else {
  2864. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2865. }
  2866. #else /* if !CONFIG_E1000_MQ */
  2867. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2868. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2869. else
  2870. e1000_irq_enable(adapter);
  2871. #endif /* CONFIG_E1000_MQ */
  2872. #else /* if !CONFIG_E1000_NAPI */
  2873. /* Writing IMC and IMS is needed for 82547.
  2874. * Due to Hub Link bus being occupied, an interrupt
  2875. * de-assertion message is not able to be sent.
  2876. * When an interrupt assertion message is generated later,
  2877. * two messages are re-ordered and sent out.
  2878. * That causes APIC to think 82547 is in de-assertion
  2879. * state, while 82547 is in assertion state, resulting
  2880. * in dead lock. Writing IMC forces 82547 into
  2881. * de-assertion state.
  2882. */
  2883. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2884. atomic_inc(&adapter->irq_sem);
  2885. E1000_WRITE_REG(hw, IMC, ~0);
  2886. }
  2887. for (i = 0; i < E1000_MAX_INTR; i++)
  2888. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2889. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2890. break;
  2891. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2892. e1000_irq_enable(adapter);
  2893. #endif /* CONFIG_E1000_NAPI */
  2894. return IRQ_HANDLED;
  2895. }
  2896. #ifdef CONFIG_E1000_NAPI
  2897. /**
  2898. * e1000_clean - NAPI Rx polling callback
  2899. * @adapter: board private structure
  2900. **/
  2901. static int
  2902. e1000_clean(struct net_device *poll_dev, int *budget)
  2903. {
  2904. struct e1000_adapter *adapter;
  2905. int work_to_do = min(*budget, poll_dev->quota);
  2906. int tx_cleaned = 0, i = 0, work_done = 0;
  2907. /* Must NOT use netdev_priv macro here. */
  2908. adapter = poll_dev->priv;
  2909. /* Keep link state information with original netdev */
  2910. if (!netif_carrier_ok(adapter->netdev))
  2911. goto quit_polling;
  2912. while (poll_dev != &adapter->polling_netdev[i]) {
  2913. i++;
  2914. if (unlikely(i == adapter->num_rx_queues))
  2915. BUG();
  2916. }
  2917. if (likely(adapter->num_tx_queues == 1)) {
  2918. /* e1000_clean is called per-cpu. This lock protects
  2919. * tx_ring[0] from being cleaned by multiple cpus
  2920. * simultaneously. A failure obtaining the lock means
  2921. * tx_ring[0] is currently being cleaned anyway. */
  2922. if (spin_trylock(&adapter->tx_queue_lock)) {
  2923. tx_cleaned = e1000_clean_tx_irq(adapter,
  2924. &adapter->tx_ring[0]);
  2925. spin_unlock(&adapter->tx_queue_lock);
  2926. }
  2927. } else
  2928. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2929. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2930. &work_done, work_to_do);
  2931. *budget -= work_done;
  2932. poll_dev->quota -= work_done;
  2933. /* If no Tx and not enough Rx work done, exit the polling mode */
  2934. if ((!tx_cleaned && (work_done == 0)) ||
  2935. !netif_running(adapter->netdev)) {
  2936. quit_polling:
  2937. netif_rx_complete(poll_dev);
  2938. e1000_irq_enable(adapter);
  2939. return 0;
  2940. }
  2941. return 1;
  2942. }
  2943. #endif
  2944. /**
  2945. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2946. * @adapter: board private structure
  2947. **/
  2948. static boolean_t
  2949. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2950. struct e1000_tx_ring *tx_ring)
  2951. {
  2952. struct net_device *netdev = adapter->netdev;
  2953. struct e1000_tx_desc *tx_desc, *eop_desc;
  2954. struct e1000_buffer *buffer_info;
  2955. unsigned int i, eop;
  2956. boolean_t cleaned = FALSE;
  2957. i = tx_ring->next_to_clean;
  2958. eop = tx_ring->buffer_info[i].next_to_watch;
  2959. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2960. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2961. for (cleaned = FALSE; !cleaned; ) {
  2962. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2963. buffer_info = &tx_ring->buffer_info[i];
  2964. cleaned = (i == eop);
  2965. #ifdef CONFIG_E1000_MQ
  2966. tx_ring->tx_stats.bytes += buffer_info->length;
  2967. #endif
  2968. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2969. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2970. if (unlikely(++i == tx_ring->count)) i = 0;
  2971. }
  2972. #ifdef CONFIG_E1000_MQ
  2973. tx_ring->tx_stats.packets++;
  2974. #endif
  2975. eop = tx_ring->buffer_info[i].next_to_watch;
  2976. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2977. }
  2978. tx_ring->next_to_clean = i;
  2979. spin_lock(&tx_ring->tx_lock);
  2980. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2981. netif_carrier_ok(netdev)))
  2982. netif_wake_queue(netdev);
  2983. spin_unlock(&tx_ring->tx_lock);
  2984. if (adapter->detect_tx_hung) {
  2985. /* Detect a transmit hang in hardware, this serializes the
  2986. * check with the clearing of time_stamp and movement of i */
  2987. adapter->detect_tx_hung = FALSE;
  2988. if (tx_ring->buffer_info[eop].dma &&
  2989. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2990. adapter->tx_timeout_factor * HZ)
  2991. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2992. E1000_STATUS_TXOFF)) {
  2993. /* detected Tx unit hang */
  2994. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2995. " Tx Queue <%lu>\n"
  2996. " TDH <%x>\n"
  2997. " TDT <%x>\n"
  2998. " next_to_use <%x>\n"
  2999. " next_to_clean <%x>\n"
  3000. "buffer_info[next_to_clean]\n"
  3001. " time_stamp <%lx>\n"
  3002. " next_to_watch <%x>\n"
  3003. " jiffies <%lx>\n"
  3004. " next_to_watch.status <%x>\n",
  3005. (unsigned long)((tx_ring - adapter->tx_ring) /
  3006. sizeof(struct e1000_tx_ring)),
  3007. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3008. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3009. tx_ring->next_to_use,
  3010. tx_ring->next_to_clean,
  3011. tx_ring->buffer_info[eop].time_stamp,
  3012. eop,
  3013. jiffies,
  3014. eop_desc->upper.fields.status);
  3015. netif_stop_queue(netdev);
  3016. }
  3017. }
  3018. return cleaned;
  3019. }
  3020. /**
  3021. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3022. * @adapter: board private structure
  3023. * @status_err: receive descriptor status and error fields
  3024. * @csum: receive descriptor csum field
  3025. * @sk_buff: socket buffer with received data
  3026. **/
  3027. static inline void
  3028. e1000_rx_checksum(struct e1000_adapter *adapter,
  3029. uint32_t status_err, uint32_t csum,
  3030. struct sk_buff *skb)
  3031. {
  3032. uint16_t status = (uint16_t)status_err;
  3033. uint8_t errors = (uint8_t)(status_err >> 24);
  3034. skb->ip_summed = CHECKSUM_NONE;
  3035. /* 82543 or newer only */
  3036. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3037. /* Ignore Checksum bit is set */
  3038. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3039. /* TCP/UDP checksum error bit is set */
  3040. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3041. /* let the stack verify checksum errors */
  3042. adapter->hw_csum_err++;
  3043. return;
  3044. }
  3045. /* TCP/UDP Checksum has not been calculated */
  3046. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3047. if (!(status & E1000_RXD_STAT_TCPCS))
  3048. return;
  3049. } else {
  3050. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3051. return;
  3052. }
  3053. /* It must be a TCP or UDP packet with a valid checksum */
  3054. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3055. /* TCP checksum is good */
  3056. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3057. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3058. /* IP fragment with UDP payload */
  3059. /* Hardware complements the payload checksum, so we undo it
  3060. * and then put the value in host order for further stack use.
  3061. */
  3062. csum = ntohl(csum ^ 0xFFFF);
  3063. skb->csum = csum;
  3064. skb->ip_summed = CHECKSUM_HW;
  3065. }
  3066. adapter->hw_csum_good++;
  3067. }
  3068. /**
  3069. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3070. * @adapter: board private structure
  3071. **/
  3072. static boolean_t
  3073. #ifdef CONFIG_E1000_NAPI
  3074. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3075. struct e1000_rx_ring *rx_ring,
  3076. int *work_done, int work_to_do)
  3077. #else
  3078. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3079. struct e1000_rx_ring *rx_ring)
  3080. #endif
  3081. {
  3082. struct net_device *netdev = adapter->netdev;
  3083. struct pci_dev *pdev = adapter->pdev;
  3084. struct e1000_rx_desc *rx_desc, *next_rxd;
  3085. struct e1000_buffer *buffer_info, *next_buffer;
  3086. unsigned long flags;
  3087. uint32_t length;
  3088. uint8_t last_byte;
  3089. unsigned int i;
  3090. int cleaned_count = 0;
  3091. boolean_t cleaned = FALSE;
  3092. i = rx_ring->next_to_clean;
  3093. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3094. buffer_info = &rx_ring->buffer_info[i];
  3095. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3096. struct sk_buff *skb, *next_skb;
  3097. u8 status;
  3098. #ifdef CONFIG_E1000_NAPI
  3099. if (*work_done >= work_to_do)
  3100. break;
  3101. (*work_done)++;
  3102. #endif
  3103. status = rx_desc->status;
  3104. skb = buffer_info->skb;
  3105. buffer_info->skb = NULL;
  3106. if (++i == rx_ring->count) i = 0;
  3107. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3108. next_buffer = &rx_ring->buffer_info[i];
  3109. next_skb = next_buffer->skb;
  3110. cleaned = TRUE;
  3111. cleaned_count++;
  3112. pci_unmap_single(pdev,
  3113. buffer_info->dma,
  3114. buffer_info->length,
  3115. PCI_DMA_FROMDEVICE);
  3116. length = le16_to_cpu(rx_desc->length);
  3117. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3118. /* All receives must fit into a single buffer */
  3119. E1000_DBG("%s: Receive packet consumed multiple"
  3120. " buffers\n", netdev->name);
  3121. dev_kfree_skb_irq(skb);
  3122. goto next_desc;
  3123. }
  3124. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3125. last_byte = *(skb->data + length - 1);
  3126. if (TBI_ACCEPT(&adapter->hw, status,
  3127. rx_desc->errors, length, last_byte)) {
  3128. spin_lock_irqsave(&adapter->stats_lock, flags);
  3129. e1000_tbi_adjust_stats(&adapter->hw,
  3130. &adapter->stats,
  3131. length, skb->data);
  3132. spin_unlock_irqrestore(&adapter->stats_lock,
  3133. flags);
  3134. length--;
  3135. } else {
  3136. dev_kfree_skb_irq(skb);
  3137. goto next_desc;
  3138. }
  3139. }
  3140. /* code added for copybreak, this should improve
  3141. * performance for small packets with large amounts
  3142. * of reassembly being done in the stack */
  3143. #define E1000_CB_LENGTH 256
  3144. if (length < E1000_CB_LENGTH) {
  3145. struct sk_buff *new_skb =
  3146. dev_alloc_skb(length + NET_IP_ALIGN);
  3147. if (new_skb) {
  3148. skb_reserve(new_skb, NET_IP_ALIGN);
  3149. new_skb->dev = netdev;
  3150. memcpy(new_skb->data - NET_IP_ALIGN,
  3151. skb->data - NET_IP_ALIGN,
  3152. length + NET_IP_ALIGN);
  3153. /* save the skb in buffer_info as good */
  3154. buffer_info->skb = skb;
  3155. skb = new_skb;
  3156. skb_put(skb, length);
  3157. }
  3158. } else
  3159. skb_put(skb, length);
  3160. /* end copybreak code */
  3161. /* Receive Checksum Offload */
  3162. e1000_rx_checksum(adapter,
  3163. (uint32_t)(status) |
  3164. ((uint32_t)(rx_desc->errors) << 24),
  3165. le16_to_cpu(rx_desc->csum), skb);
  3166. skb->protocol = eth_type_trans(skb, netdev);
  3167. #ifdef CONFIG_E1000_NAPI
  3168. if (unlikely(adapter->vlgrp &&
  3169. (status & E1000_RXD_STAT_VP))) {
  3170. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3171. le16_to_cpu(rx_desc->special) &
  3172. E1000_RXD_SPC_VLAN_MASK);
  3173. } else {
  3174. netif_receive_skb(skb);
  3175. }
  3176. #else /* CONFIG_E1000_NAPI */
  3177. if (unlikely(adapter->vlgrp &&
  3178. (status & E1000_RXD_STAT_VP))) {
  3179. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3180. le16_to_cpu(rx_desc->special) &
  3181. E1000_RXD_SPC_VLAN_MASK);
  3182. } else {
  3183. netif_rx(skb);
  3184. }
  3185. #endif /* CONFIG_E1000_NAPI */
  3186. netdev->last_rx = jiffies;
  3187. #ifdef CONFIG_E1000_MQ
  3188. rx_ring->rx_stats.packets++;
  3189. rx_ring->rx_stats.bytes += length;
  3190. #endif
  3191. next_desc:
  3192. rx_desc->status = 0;
  3193. /* return some buffers to hardware, one at a time is too slow */
  3194. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3195. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3196. cleaned_count = 0;
  3197. }
  3198. rx_desc = next_rxd;
  3199. buffer_info = next_buffer;
  3200. }
  3201. rx_ring->next_to_clean = i;
  3202. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3203. if (cleaned_count)
  3204. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3205. return cleaned;
  3206. }
  3207. /**
  3208. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3209. * @adapter: board private structure
  3210. **/
  3211. static boolean_t
  3212. #ifdef CONFIG_E1000_NAPI
  3213. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3214. struct e1000_rx_ring *rx_ring,
  3215. int *work_done, int work_to_do)
  3216. #else
  3217. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3218. struct e1000_rx_ring *rx_ring)
  3219. #endif
  3220. {
  3221. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3222. struct net_device *netdev = adapter->netdev;
  3223. struct pci_dev *pdev = adapter->pdev;
  3224. struct e1000_buffer *buffer_info, *next_buffer;
  3225. struct e1000_ps_page *ps_page;
  3226. struct e1000_ps_page_dma *ps_page_dma;
  3227. struct sk_buff *skb, *next_skb;
  3228. unsigned int i, j;
  3229. uint32_t length, staterr;
  3230. int cleaned_count = 0;
  3231. boolean_t cleaned = FALSE;
  3232. i = rx_ring->next_to_clean;
  3233. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3234. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3235. buffer_info = &rx_ring->buffer_info[i];
  3236. while (staterr & E1000_RXD_STAT_DD) {
  3237. ps_page = &rx_ring->ps_page[i];
  3238. ps_page_dma = &rx_ring->ps_page_dma[i];
  3239. #ifdef CONFIG_E1000_NAPI
  3240. if (unlikely(*work_done >= work_to_do))
  3241. break;
  3242. (*work_done)++;
  3243. #endif
  3244. skb = buffer_info->skb;
  3245. if (++i == rx_ring->count) i = 0;
  3246. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3247. next_buffer = &rx_ring->buffer_info[i];
  3248. next_skb = next_buffer->skb;
  3249. cleaned = TRUE;
  3250. cleaned_count++;
  3251. pci_unmap_single(pdev, buffer_info->dma,
  3252. buffer_info->length,
  3253. PCI_DMA_FROMDEVICE);
  3254. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3255. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3256. " the full packet\n", netdev->name);
  3257. dev_kfree_skb_irq(skb);
  3258. goto next_desc;
  3259. }
  3260. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3261. dev_kfree_skb_irq(skb);
  3262. goto next_desc;
  3263. }
  3264. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3265. if (unlikely(!length)) {
  3266. E1000_DBG("%s: Last part of the packet spanning"
  3267. " multiple descriptors\n", netdev->name);
  3268. dev_kfree_skb_irq(skb);
  3269. goto next_desc;
  3270. }
  3271. /* Good Receive */
  3272. skb_put(skb, length);
  3273. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3274. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3275. break;
  3276. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3277. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3278. ps_page_dma->ps_page_dma[j] = 0;
  3279. skb_shinfo(skb)->frags[j].page =
  3280. ps_page->ps_page[j];
  3281. ps_page->ps_page[j] = NULL;
  3282. skb_shinfo(skb)->frags[j].page_offset = 0;
  3283. skb_shinfo(skb)->frags[j].size = length;
  3284. skb_shinfo(skb)->nr_frags++;
  3285. skb->len += length;
  3286. skb->data_len += length;
  3287. }
  3288. e1000_rx_checksum(adapter, staterr,
  3289. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3290. skb->protocol = eth_type_trans(skb, netdev);
  3291. if (likely(rx_desc->wb.upper.header_status &
  3292. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3293. adapter->rx_hdr_split++;
  3294. #ifdef CONFIG_E1000_NAPI
  3295. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3296. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3297. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3298. E1000_RXD_SPC_VLAN_MASK);
  3299. } else {
  3300. netif_receive_skb(skb);
  3301. }
  3302. #else /* CONFIG_E1000_NAPI */
  3303. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3304. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3305. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3306. E1000_RXD_SPC_VLAN_MASK);
  3307. } else {
  3308. netif_rx(skb);
  3309. }
  3310. #endif /* CONFIG_E1000_NAPI */
  3311. netdev->last_rx = jiffies;
  3312. #ifdef CONFIG_E1000_MQ
  3313. rx_ring->rx_stats.packets++;
  3314. rx_ring->rx_stats.bytes += length;
  3315. #endif
  3316. next_desc:
  3317. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3318. buffer_info->skb = NULL;
  3319. /* return some buffers to hardware, one at a time is too slow */
  3320. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3321. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3322. cleaned_count = 0;
  3323. }
  3324. rx_desc = next_rxd;
  3325. buffer_info = next_buffer;
  3326. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3327. }
  3328. rx_ring->next_to_clean = i;
  3329. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3330. if (cleaned_count)
  3331. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3332. return cleaned;
  3333. }
  3334. /**
  3335. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3336. * @adapter: address of board private structure
  3337. **/
  3338. static void
  3339. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3340. struct e1000_rx_ring *rx_ring,
  3341. int cleaned_count)
  3342. {
  3343. struct net_device *netdev = adapter->netdev;
  3344. struct pci_dev *pdev = adapter->pdev;
  3345. struct e1000_rx_desc *rx_desc;
  3346. struct e1000_buffer *buffer_info;
  3347. struct sk_buff *skb;
  3348. unsigned int i;
  3349. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3350. i = rx_ring->next_to_use;
  3351. buffer_info = &rx_ring->buffer_info[i];
  3352. while (cleaned_count--) {
  3353. if (!(skb = buffer_info->skb))
  3354. skb = dev_alloc_skb(bufsz);
  3355. else {
  3356. skb_trim(skb, 0);
  3357. goto map_skb;
  3358. }
  3359. if (unlikely(!skb)) {
  3360. /* Better luck next round */
  3361. adapter->alloc_rx_buff_failed++;
  3362. break;
  3363. }
  3364. /* Fix for errata 23, can't cross 64kB boundary */
  3365. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3366. struct sk_buff *oldskb = skb;
  3367. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3368. "at %p\n", bufsz, skb->data);
  3369. /* Try again, without freeing the previous */
  3370. skb = dev_alloc_skb(bufsz);
  3371. /* Failed allocation, critical failure */
  3372. if (!skb) {
  3373. dev_kfree_skb(oldskb);
  3374. break;
  3375. }
  3376. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3377. /* give up */
  3378. dev_kfree_skb(skb);
  3379. dev_kfree_skb(oldskb);
  3380. break; /* while !buffer_info->skb */
  3381. } else {
  3382. /* Use new allocation */
  3383. dev_kfree_skb(oldskb);
  3384. }
  3385. }
  3386. /* Make buffer alignment 2 beyond a 16 byte boundary
  3387. * this will result in a 16 byte aligned IP header after
  3388. * the 14 byte MAC header is removed
  3389. */
  3390. skb_reserve(skb, NET_IP_ALIGN);
  3391. skb->dev = netdev;
  3392. buffer_info->skb = skb;
  3393. buffer_info->length = adapter->rx_buffer_len;
  3394. map_skb:
  3395. buffer_info->dma = pci_map_single(pdev,
  3396. skb->data,
  3397. adapter->rx_buffer_len,
  3398. PCI_DMA_FROMDEVICE);
  3399. /* Fix for errata 23, can't cross 64kB boundary */
  3400. if (!e1000_check_64k_bound(adapter,
  3401. (void *)(unsigned long)buffer_info->dma,
  3402. adapter->rx_buffer_len)) {
  3403. DPRINTK(RX_ERR, ERR,
  3404. "dma align check failed: %u bytes at %p\n",
  3405. adapter->rx_buffer_len,
  3406. (void *)(unsigned long)buffer_info->dma);
  3407. dev_kfree_skb(skb);
  3408. buffer_info->skb = NULL;
  3409. pci_unmap_single(pdev, buffer_info->dma,
  3410. adapter->rx_buffer_len,
  3411. PCI_DMA_FROMDEVICE);
  3412. break; /* while !buffer_info->skb */
  3413. }
  3414. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3415. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3416. if (unlikely(++i == rx_ring->count))
  3417. i = 0;
  3418. buffer_info = &rx_ring->buffer_info[i];
  3419. }
  3420. if (likely(rx_ring->next_to_use != i)) {
  3421. rx_ring->next_to_use = i;
  3422. if (unlikely(i-- == 0))
  3423. i = (rx_ring->count - 1);
  3424. /* Force memory writes to complete before letting h/w
  3425. * know there are new descriptors to fetch. (Only
  3426. * applicable for weak-ordered memory model archs,
  3427. * such as IA-64). */
  3428. wmb();
  3429. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3430. }
  3431. }
  3432. /**
  3433. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3434. * @adapter: address of board private structure
  3435. **/
  3436. static void
  3437. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3438. struct e1000_rx_ring *rx_ring,
  3439. int cleaned_count)
  3440. {
  3441. struct net_device *netdev = adapter->netdev;
  3442. struct pci_dev *pdev = adapter->pdev;
  3443. union e1000_rx_desc_packet_split *rx_desc;
  3444. struct e1000_buffer *buffer_info;
  3445. struct e1000_ps_page *ps_page;
  3446. struct e1000_ps_page_dma *ps_page_dma;
  3447. struct sk_buff *skb;
  3448. unsigned int i, j;
  3449. i = rx_ring->next_to_use;
  3450. buffer_info = &rx_ring->buffer_info[i];
  3451. ps_page = &rx_ring->ps_page[i];
  3452. ps_page_dma = &rx_ring->ps_page_dma[i];
  3453. while (cleaned_count--) {
  3454. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3455. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3456. if (j < adapter->rx_ps_pages) {
  3457. if (likely(!ps_page->ps_page[j])) {
  3458. ps_page->ps_page[j] =
  3459. alloc_page(GFP_ATOMIC);
  3460. if (unlikely(!ps_page->ps_page[j])) {
  3461. adapter->alloc_rx_buff_failed++;
  3462. goto no_buffers;
  3463. }
  3464. ps_page_dma->ps_page_dma[j] =
  3465. pci_map_page(pdev,
  3466. ps_page->ps_page[j],
  3467. 0, PAGE_SIZE,
  3468. PCI_DMA_FROMDEVICE);
  3469. }
  3470. /* Refresh the desc even if buffer_addrs didn't
  3471. * change because each write-back erases
  3472. * this info.
  3473. */
  3474. rx_desc->read.buffer_addr[j+1] =
  3475. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3476. } else
  3477. rx_desc->read.buffer_addr[j+1] = ~0;
  3478. }
  3479. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3480. if (unlikely(!skb)) {
  3481. adapter->alloc_rx_buff_failed++;
  3482. break;
  3483. }
  3484. /* Make buffer alignment 2 beyond a 16 byte boundary
  3485. * this will result in a 16 byte aligned IP header after
  3486. * the 14 byte MAC header is removed
  3487. */
  3488. skb_reserve(skb, NET_IP_ALIGN);
  3489. skb->dev = netdev;
  3490. buffer_info->skb = skb;
  3491. buffer_info->length = adapter->rx_ps_bsize0;
  3492. buffer_info->dma = pci_map_single(pdev, skb->data,
  3493. adapter->rx_ps_bsize0,
  3494. PCI_DMA_FROMDEVICE);
  3495. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3496. if (unlikely(++i == rx_ring->count)) i = 0;
  3497. buffer_info = &rx_ring->buffer_info[i];
  3498. ps_page = &rx_ring->ps_page[i];
  3499. ps_page_dma = &rx_ring->ps_page_dma[i];
  3500. }
  3501. no_buffers:
  3502. if (likely(rx_ring->next_to_use != i)) {
  3503. rx_ring->next_to_use = i;
  3504. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3505. /* Force memory writes to complete before letting h/w
  3506. * know there are new descriptors to fetch. (Only
  3507. * applicable for weak-ordered memory model archs,
  3508. * such as IA-64). */
  3509. wmb();
  3510. /* Hardware increments by 16 bytes, but packet split
  3511. * descriptors are 32 bytes...so we increment tail
  3512. * twice as much.
  3513. */
  3514. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3515. }
  3516. }
  3517. /**
  3518. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3519. * @adapter:
  3520. **/
  3521. static void
  3522. e1000_smartspeed(struct e1000_adapter *adapter)
  3523. {
  3524. uint16_t phy_status;
  3525. uint16_t phy_ctrl;
  3526. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3527. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3528. return;
  3529. if (adapter->smartspeed == 0) {
  3530. /* If Master/Slave config fault is asserted twice,
  3531. * we assume back-to-back */
  3532. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3533. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3534. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3535. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3536. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3537. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3538. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3539. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3540. phy_ctrl);
  3541. adapter->smartspeed++;
  3542. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3543. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3544. &phy_ctrl)) {
  3545. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3546. MII_CR_RESTART_AUTO_NEG);
  3547. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3548. phy_ctrl);
  3549. }
  3550. }
  3551. return;
  3552. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3553. /* If still no link, perhaps using 2/3 pair cable */
  3554. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3555. phy_ctrl |= CR_1000T_MS_ENABLE;
  3556. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3557. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3558. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3559. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3560. MII_CR_RESTART_AUTO_NEG);
  3561. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3562. }
  3563. }
  3564. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3565. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3566. adapter->smartspeed = 0;
  3567. }
  3568. /**
  3569. * e1000_ioctl -
  3570. * @netdev:
  3571. * @ifreq:
  3572. * @cmd:
  3573. **/
  3574. static int
  3575. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3576. {
  3577. switch (cmd) {
  3578. case SIOCGMIIPHY:
  3579. case SIOCGMIIREG:
  3580. case SIOCSMIIREG:
  3581. return e1000_mii_ioctl(netdev, ifr, cmd);
  3582. default:
  3583. return -EOPNOTSUPP;
  3584. }
  3585. }
  3586. /**
  3587. * e1000_mii_ioctl -
  3588. * @netdev:
  3589. * @ifreq:
  3590. * @cmd:
  3591. **/
  3592. static int
  3593. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3594. {
  3595. struct e1000_adapter *adapter = netdev_priv(netdev);
  3596. struct mii_ioctl_data *data = if_mii(ifr);
  3597. int retval;
  3598. uint16_t mii_reg;
  3599. uint16_t spddplx;
  3600. unsigned long flags;
  3601. if (adapter->hw.media_type != e1000_media_type_copper)
  3602. return -EOPNOTSUPP;
  3603. switch (cmd) {
  3604. case SIOCGMIIPHY:
  3605. data->phy_id = adapter->hw.phy_addr;
  3606. break;
  3607. case SIOCGMIIREG:
  3608. if (!capable(CAP_NET_ADMIN))
  3609. return -EPERM;
  3610. spin_lock_irqsave(&adapter->stats_lock, flags);
  3611. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3612. &data->val_out)) {
  3613. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3614. return -EIO;
  3615. }
  3616. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3617. break;
  3618. case SIOCSMIIREG:
  3619. if (!capable(CAP_NET_ADMIN))
  3620. return -EPERM;
  3621. if (data->reg_num & ~(0x1F))
  3622. return -EFAULT;
  3623. mii_reg = data->val_in;
  3624. spin_lock_irqsave(&adapter->stats_lock, flags);
  3625. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3626. mii_reg)) {
  3627. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3628. return -EIO;
  3629. }
  3630. if (adapter->hw.phy_type == e1000_phy_m88) {
  3631. switch (data->reg_num) {
  3632. case PHY_CTRL:
  3633. if (mii_reg & MII_CR_POWER_DOWN)
  3634. break;
  3635. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3636. adapter->hw.autoneg = 1;
  3637. adapter->hw.autoneg_advertised = 0x2F;
  3638. } else {
  3639. if (mii_reg & 0x40)
  3640. spddplx = SPEED_1000;
  3641. else if (mii_reg & 0x2000)
  3642. spddplx = SPEED_100;
  3643. else
  3644. spddplx = SPEED_10;
  3645. spddplx += (mii_reg & 0x100)
  3646. ? FULL_DUPLEX :
  3647. HALF_DUPLEX;
  3648. retval = e1000_set_spd_dplx(adapter,
  3649. spddplx);
  3650. if (retval) {
  3651. spin_unlock_irqrestore(
  3652. &adapter->stats_lock,
  3653. flags);
  3654. return retval;
  3655. }
  3656. }
  3657. if (netif_running(adapter->netdev)) {
  3658. e1000_down(adapter);
  3659. e1000_up(adapter);
  3660. } else
  3661. e1000_reset(adapter);
  3662. break;
  3663. case M88E1000_PHY_SPEC_CTRL:
  3664. case M88E1000_EXT_PHY_SPEC_CTRL:
  3665. if (e1000_phy_reset(&adapter->hw)) {
  3666. spin_unlock_irqrestore(
  3667. &adapter->stats_lock, flags);
  3668. return -EIO;
  3669. }
  3670. break;
  3671. }
  3672. } else {
  3673. switch (data->reg_num) {
  3674. case PHY_CTRL:
  3675. if (mii_reg & MII_CR_POWER_DOWN)
  3676. break;
  3677. if (netif_running(adapter->netdev)) {
  3678. e1000_down(adapter);
  3679. e1000_up(adapter);
  3680. } else
  3681. e1000_reset(adapter);
  3682. break;
  3683. }
  3684. }
  3685. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3686. break;
  3687. default:
  3688. return -EOPNOTSUPP;
  3689. }
  3690. return E1000_SUCCESS;
  3691. }
  3692. void
  3693. e1000_pci_set_mwi(struct e1000_hw *hw)
  3694. {
  3695. struct e1000_adapter *adapter = hw->back;
  3696. int ret_val = pci_set_mwi(adapter->pdev);
  3697. if (ret_val)
  3698. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3699. }
  3700. void
  3701. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3702. {
  3703. struct e1000_adapter *adapter = hw->back;
  3704. pci_clear_mwi(adapter->pdev);
  3705. }
  3706. void
  3707. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3708. {
  3709. struct e1000_adapter *adapter = hw->back;
  3710. pci_read_config_word(adapter->pdev, reg, value);
  3711. }
  3712. void
  3713. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3714. {
  3715. struct e1000_adapter *adapter = hw->back;
  3716. pci_write_config_word(adapter->pdev, reg, *value);
  3717. }
  3718. uint32_t
  3719. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3720. {
  3721. return inl(port);
  3722. }
  3723. void
  3724. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3725. {
  3726. outl(value, port);
  3727. }
  3728. static void
  3729. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3730. {
  3731. struct e1000_adapter *adapter = netdev_priv(netdev);
  3732. uint32_t ctrl, rctl;
  3733. e1000_irq_disable(adapter);
  3734. adapter->vlgrp = grp;
  3735. if (grp) {
  3736. /* enable VLAN tag insert/strip */
  3737. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3738. ctrl |= E1000_CTRL_VME;
  3739. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3740. /* enable VLAN receive filtering */
  3741. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3742. rctl |= E1000_RCTL_VFE;
  3743. rctl &= ~E1000_RCTL_CFIEN;
  3744. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3745. e1000_update_mng_vlan(adapter);
  3746. } else {
  3747. /* disable VLAN tag insert/strip */
  3748. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3749. ctrl &= ~E1000_CTRL_VME;
  3750. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3751. /* disable VLAN filtering */
  3752. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3753. rctl &= ~E1000_RCTL_VFE;
  3754. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3755. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3756. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3757. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3758. }
  3759. }
  3760. e1000_irq_enable(adapter);
  3761. }
  3762. static void
  3763. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3764. {
  3765. struct e1000_adapter *adapter = netdev_priv(netdev);
  3766. uint32_t vfta, index;
  3767. if ((adapter->hw.mng_cookie.status &
  3768. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3769. (vid == adapter->mng_vlan_id))
  3770. return;
  3771. /* add VID to filter table */
  3772. index = (vid >> 5) & 0x7F;
  3773. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3774. vfta |= (1 << (vid & 0x1F));
  3775. e1000_write_vfta(&adapter->hw, index, vfta);
  3776. }
  3777. static void
  3778. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3779. {
  3780. struct e1000_adapter *adapter = netdev_priv(netdev);
  3781. uint32_t vfta, index;
  3782. e1000_irq_disable(adapter);
  3783. if (adapter->vlgrp)
  3784. adapter->vlgrp->vlan_devices[vid] = NULL;
  3785. e1000_irq_enable(adapter);
  3786. if ((adapter->hw.mng_cookie.status &
  3787. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3788. (vid == adapter->mng_vlan_id)) {
  3789. /* release control to f/w */
  3790. e1000_release_hw_control(adapter);
  3791. return;
  3792. }
  3793. /* remove VID from filter table */
  3794. index = (vid >> 5) & 0x7F;
  3795. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3796. vfta &= ~(1 << (vid & 0x1F));
  3797. e1000_write_vfta(&adapter->hw, index, vfta);
  3798. }
  3799. static void
  3800. e1000_restore_vlan(struct e1000_adapter *adapter)
  3801. {
  3802. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3803. if (adapter->vlgrp) {
  3804. uint16_t vid;
  3805. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3806. if (!adapter->vlgrp->vlan_devices[vid])
  3807. continue;
  3808. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3809. }
  3810. }
  3811. }
  3812. int
  3813. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3814. {
  3815. adapter->hw.autoneg = 0;
  3816. /* Fiber NICs only allow 1000 gbps Full duplex */
  3817. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3818. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3819. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3820. return -EINVAL;
  3821. }
  3822. switch (spddplx) {
  3823. case SPEED_10 + DUPLEX_HALF:
  3824. adapter->hw.forced_speed_duplex = e1000_10_half;
  3825. break;
  3826. case SPEED_10 + DUPLEX_FULL:
  3827. adapter->hw.forced_speed_duplex = e1000_10_full;
  3828. break;
  3829. case SPEED_100 + DUPLEX_HALF:
  3830. adapter->hw.forced_speed_duplex = e1000_100_half;
  3831. break;
  3832. case SPEED_100 + DUPLEX_FULL:
  3833. adapter->hw.forced_speed_duplex = e1000_100_full;
  3834. break;
  3835. case SPEED_1000 + DUPLEX_FULL:
  3836. adapter->hw.autoneg = 1;
  3837. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3838. break;
  3839. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3840. default:
  3841. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3842. return -EINVAL;
  3843. }
  3844. return 0;
  3845. }
  3846. #ifdef CONFIG_PM
  3847. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3848. * space versus the 64 bytes that pci_[save|restore]_state handle
  3849. */
  3850. #define PCIE_CONFIG_SPACE_LEN 256
  3851. #define PCI_CONFIG_SPACE_LEN 64
  3852. static int
  3853. e1000_pci_save_state(struct e1000_adapter *adapter)
  3854. {
  3855. struct pci_dev *dev = adapter->pdev;
  3856. int size;
  3857. int i;
  3858. if (adapter->hw.mac_type >= e1000_82571)
  3859. size = PCIE_CONFIG_SPACE_LEN;
  3860. else
  3861. size = PCI_CONFIG_SPACE_LEN;
  3862. WARN_ON(adapter->config_space != NULL);
  3863. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3864. if (!adapter->config_space) {
  3865. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3866. return -ENOMEM;
  3867. }
  3868. for (i = 0; i < (size / 4); i++)
  3869. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3870. return 0;
  3871. }
  3872. static void
  3873. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3874. {
  3875. struct pci_dev *dev = adapter->pdev;
  3876. int size;
  3877. int i;
  3878. if (adapter->config_space == NULL)
  3879. return;
  3880. if (adapter->hw.mac_type >= e1000_82571)
  3881. size = PCIE_CONFIG_SPACE_LEN;
  3882. else
  3883. size = PCI_CONFIG_SPACE_LEN;
  3884. for (i = 0; i < (size / 4); i++)
  3885. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3886. kfree(adapter->config_space);
  3887. adapter->config_space = NULL;
  3888. return;
  3889. }
  3890. #endif /* CONFIG_PM */
  3891. static int
  3892. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3893. {
  3894. struct net_device *netdev = pci_get_drvdata(pdev);
  3895. struct e1000_adapter *adapter = netdev_priv(netdev);
  3896. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3897. uint32_t wufc = adapter->wol;
  3898. int retval = 0;
  3899. netif_device_detach(netdev);
  3900. if (netif_running(netdev))
  3901. e1000_down(adapter);
  3902. #ifdef CONFIG_PM
  3903. /* implement our own version of pci_save_state(pdev) because pci
  3904. * express adapters have larger 256 byte config spaces */
  3905. retval = e1000_pci_save_state(adapter);
  3906. if (retval)
  3907. return retval;
  3908. #endif
  3909. status = E1000_READ_REG(&adapter->hw, STATUS);
  3910. if (status & E1000_STATUS_LU)
  3911. wufc &= ~E1000_WUFC_LNKC;
  3912. if (wufc) {
  3913. e1000_setup_rctl(adapter);
  3914. e1000_set_multi(netdev);
  3915. /* turn on all-multi mode if wake on multicast is enabled */
  3916. if (adapter->wol & E1000_WUFC_MC) {
  3917. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3918. rctl |= E1000_RCTL_MPE;
  3919. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3920. }
  3921. if (adapter->hw.mac_type >= e1000_82540) {
  3922. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3923. /* advertise wake from D3Cold */
  3924. #define E1000_CTRL_ADVD3WUC 0x00100000
  3925. /* phy power management enable */
  3926. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3927. ctrl |= E1000_CTRL_ADVD3WUC |
  3928. E1000_CTRL_EN_PHY_PWR_MGMT;
  3929. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3930. }
  3931. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3932. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3933. /* keep the laser running in D3 */
  3934. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3935. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3936. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3937. }
  3938. /* Allow time for pending master requests to run */
  3939. e1000_disable_pciex_master(&adapter->hw);
  3940. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3941. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3942. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3943. if (retval)
  3944. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3945. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3946. if (retval)
  3947. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3948. } else {
  3949. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3950. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3951. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3952. if (retval)
  3953. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3954. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3955. if (retval)
  3956. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3957. }
  3958. if (adapter->hw.mac_type >= e1000_82540 &&
  3959. adapter->hw.media_type == e1000_media_type_copper) {
  3960. manc = E1000_READ_REG(&adapter->hw, MANC);
  3961. if (manc & E1000_MANC_SMBUS_EN) {
  3962. manc |= E1000_MANC_ARP_EN;
  3963. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3964. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3965. if (retval)
  3966. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3967. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3968. if (retval)
  3969. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3970. }
  3971. }
  3972. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3973. * would have already happened in close and is redundant. */
  3974. e1000_release_hw_control(adapter);
  3975. pci_disable_device(pdev);
  3976. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3977. if (retval)
  3978. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3979. return 0;
  3980. }
  3981. #ifdef CONFIG_PM
  3982. static int
  3983. e1000_resume(struct pci_dev *pdev)
  3984. {
  3985. struct net_device *netdev = pci_get_drvdata(pdev);
  3986. struct e1000_adapter *adapter = netdev_priv(netdev);
  3987. int retval;
  3988. uint32_t manc, ret_val;
  3989. retval = pci_set_power_state(pdev, PCI_D0);
  3990. if (retval)
  3991. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3992. e1000_pci_restore_state(adapter);
  3993. ret_val = pci_enable_device(pdev);
  3994. pci_set_master(pdev);
  3995. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3996. if (retval)
  3997. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3998. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3999. if (retval)
  4000. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  4001. e1000_reset(adapter);
  4002. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4003. if (netif_running(netdev))
  4004. e1000_up(adapter);
  4005. netif_device_attach(netdev);
  4006. if (adapter->hw.mac_type >= e1000_82540 &&
  4007. adapter->hw.media_type == e1000_media_type_copper) {
  4008. manc = E1000_READ_REG(&adapter->hw, MANC);
  4009. manc &= ~(E1000_MANC_ARP_EN);
  4010. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4011. }
  4012. /* If the controller is 82573 and f/w is AMT, do not set
  4013. * DRV_LOAD until the interface is up. For all other cases,
  4014. * let the f/w know that the h/w is now under the control
  4015. * of the driver. */
  4016. if (adapter->hw.mac_type != e1000_82573 ||
  4017. !e1000_check_mng_mode(&adapter->hw))
  4018. e1000_get_hw_control(adapter);
  4019. return 0;
  4020. }
  4021. #endif
  4022. #ifdef CONFIG_NET_POLL_CONTROLLER
  4023. /*
  4024. * Polling 'interrupt' - used by things like netconsole to send skbs
  4025. * without having to re-enable interrupts. It's not called while
  4026. * the interrupt routine is executing.
  4027. */
  4028. static void
  4029. e1000_netpoll(struct net_device *netdev)
  4030. {
  4031. struct e1000_adapter *adapter = netdev_priv(netdev);
  4032. disable_irq(adapter->pdev->irq);
  4033. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4034. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4035. #ifndef CONFIG_E1000_NAPI
  4036. adapter->clean_rx(adapter, adapter->rx_ring);
  4037. #endif
  4038. enable_irq(adapter->pdev->irq);
  4039. }
  4040. #endif
  4041. /* e1000_main.c */