mmu.c 40 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include "x86.h"
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <asm/page.h>
  29. #include <asm/cmpxchg.h>
  30. #include <asm/io.h>
  31. #undef MMU_DEBUG
  32. #undef AUDIT
  33. #ifdef AUDIT
  34. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  35. #else
  36. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  37. #endif
  38. #ifdef MMU_DEBUG
  39. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  40. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  41. #else
  42. #define pgprintk(x...) do { } while (0)
  43. #define rmap_printk(x...) do { } while (0)
  44. #endif
  45. #if defined(MMU_DEBUG) || defined(AUDIT)
  46. static int dbg = 1;
  47. #endif
  48. #ifndef MMU_DEBUG
  49. #define ASSERT(x) do { } while (0)
  50. #else
  51. #define ASSERT(x) \
  52. if (!(x)) { \
  53. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  54. __FILE__, __LINE__, #x); \
  55. }
  56. #endif
  57. #define PT64_PT_BITS 9
  58. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  59. #define PT32_PT_BITS 10
  60. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  61. #define PT_WRITABLE_SHIFT 1
  62. #define PT_PRESENT_MASK (1ULL << 0)
  63. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  64. #define PT_USER_MASK (1ULL << 2)
  65. #define PT_PWT_MASK (1ULL << 3)
  66. #define PT_PCD_MASK (1ULL << 4)
  67. #define PT_ACCESSED_MASK (1ULL << 5)
  68. #define PT_DIRTY_MASK (1ULL << 6)
  69. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  70. #define PT_PAT_MASK (1ULL << 7)
  71. #define PT_GLOBAL_MASK (1ULL << 8)
  72. #define PT64_NX_MASK (1ULL << 63)
  73. #define PT_PAT_SHIFT 7
  74. #define PT_DIR_PAT_SHIFT 12
  75. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  76. #define PT32_DIR_PSE36_SIZE 4
  77. #define PT32_DIR_PSE36_SHIFT 13
  78. #define PT32_DIR_PSE36_MASK \
  79. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  80. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  81. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  82. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  83. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  84. #define PT64_LEVEL_BITS 9
  85. #define PT64_LEVEL_SHIFT(level) \
  86. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  87. #define PT64_LEVEL_MASK(level) \
  88. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  89. #define PT64_INDEX(address, level)\
  90. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  91. #define PT32_LEVEL_BITS 10
  92. #define PT32_LEVEL_SHIFT(level) \
  93. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  94. #define PT32_LEVEL_MASK(level) \
  95. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  96. #define PT32_INDEX(address, level)\
  97. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  98. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  99. #define PT64_DIR_BASE_ADDR_MASK \
  100. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  101. #define PT32_BASE_ADDR_MASK PAGE_MASK
  102. #define PT32_DIR_BASE_ADDR_MASK \
  103. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  104. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  105. | PT64_NX_MASK)
  106. #define PFERR_PRESENT_MASK (1U << 0)
  107. #define PFERR_WRITE_MASK (1U << 1)
  108. #define PFERR_USER_MASK (1U << 2)
  109. #define PFERR_FETCH_MASK (1U << 4)
  110. #define PT64_ROOT_LEVEL 4
  111. #define PT32_ROOT_LEVEL 2
  112. #define PT32E_ROOT_LEVEL 3
  113. #define PT_DIRECTORY_LEVEL 2
  114. #define PT_PAGE_TABLE_LEVEL 1
  115. #define RMAP_EXT 4
  116. struct kvm_rmap_desc {
  117. u64 *shadow_ptes[RMAP_EXT];
  118. struct kvm_rmap_desc *more;
  119. };
  120. static struct kmem_cache *pte_chain_cache;
  121. static struct kmem_cache *rmap_desc_cache;
  122. static struct kmem_cache *mmu_page_header_cache;
  123. static u64 __read_mostly shadow_trap_nonpresent_pte;
  124. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  125. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  126. {
  127. shadow_trap_nonpresent_pte = trap_pte;
  128. shadow_notrap_nonpresent_pte = notrap_pte;
  129. }
  130. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  131. static int is_write_protection(struct kvm_vcpu *vcpu)
  132. {
  133. return vcpu->cr0 & X86_CR0_WP;
  134. }
  135. static int is_cpuid_PSE36(void)
  136. {
  137. return 1;
  138. }
  139. static int is_nx(struct kvm_vcpu *vcpu)
  140. {
  141. return vcpu->shadow_efer & EFER_NX;
  142. }
  143. static int is_present_pte(unsigned long pte)
  144. {
  145. return pte & PT_PRESENT_MASK;
  146. }
  147. static int is_shadow_present_pte(u64 pte)
  148. {
  149. pte &= ~PT_SHADOW_IO_MARK;
  150. return pte != shadow_trap_nonpresent_pte
  151. && pte != shadow_notrap_nonpresent_pte;
  152. }
  153. static int is_writeble_pte(unsigned long pte)
  154. {
  155. return pte & PT_WRITABLE_MASK;
  156. }
  157. static int is_dirty_pte(unsigned long pte)
  158. {
  159. return pte & PT_DIRTY_MASK;
  160. }
  161. static int is_io_pte(unsigned long pte)
  162. {
  163. return pte & PT_SHADOW_IO_MARK;
  164. }
  165. static int is_rmap_pte(u64 pte)
  166. {
  167. return pte != shadow_trap_nonpresent_pte
  168. && pte != shadow_notrap_nonpresent_pte;
  169. }
  170. static gfn_t pse36_gfn_delta(u32 gpte)
  171. {
  172. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  173. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  174. }
  175. static void set_shadow_pte(u64 *sptep, u64 spte)
  176. {
  177. #ifdef CONFIG_X86_64
  178. set_64bit((unsigned long *)sptep, spte);
  179. #else
  180. set_64bit((unsigned long long *)sptep, spte);
  181. #endif
  182. }
  183. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  184. struct kmem_cache *base_cache, int min)
  185. {
  186. void *obj;
  187. if (cache->nobjs >= min)
  188. return 0;
  189. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  190. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  191. if (!obj)
  192. return -ENOMEM;
  193. cache->objects[cache->nobjs++] = obj;
  194. }
  195. return 0;
  196. }
  197. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  198. {
  199. while (mc->nobjs)
  200. kfree(mc->objects[--mc->nobjs]);
  201. }
  202. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  203. int min)
  204. {
  205. struct page *page;
  206. if (cache->nobjs >= min)
  207. return 0;
  208. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  209. page = alloc_page(GFP_KERNEL);
  210. if (!page)
  211. return -ENOMEM;
  212. set_page_private(page, 0);
  213. cache->objects[cache->nobjs++] = page_address(page);
  214. }
  215. return 0;
  216. }
  217. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  218. {
  219. while (mc->nobjs)
  220. free_page((unsigned long)mc->objects[--mc->nobjs]);
  221. }
  222. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  223. {
  224. int r;
  225. kvm_mmu_free_some_pages(vcpu);
  226. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  227. pte_chain_cache, 4);
  228. if (r)
  229. goto out;
  230. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  231. rmap_desc_cache, 1);
  232. if (r)
  233. goto out;
  234. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  235. if (r)
  236. goto out;
  237. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  238. mmu_page_header_cache, 4);
  239. out:
  240. return r;
  241. }
  242. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  243. {
  244. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  245. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  246. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  247. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  248. }
  249. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  250. size_t size)
  251. {
  252. void *p;
  253. BUG_ON(!mc->nobjs);
  254. p = mc->objects[--mc->nobjs];
  255. memset(p, 0, size);
  256. return p;
  257. }
  258. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  259. {
  260. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  261. sizeof(struct kvm_pte_chain));
  262. }
  263. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  264. {
  265. kfree(pc);
  266. }
  267. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  268. {
  269. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  270. sizeof(struct kvm_rmap_desc));
  271. }
  272. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  273. {
  274. kfree(rd);
  275. }
  276. /*
  277. * Take gfn and return the reverse mapping to it.
  278. * Note: gfn must be unaliased before this function get called
  279. */
  280. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  281. {
  282. struct kvm_memory_slot *slot;
  283. slot = gfn_to_memslot(kvm, gfn);
  284. return &slot->rmap[gfn - slot->base_gfn];
  285. }
  286. /*
  287. * Reverse mapping data structures:
  288. *
  289. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  290. * that points to page_address(page).
  291. *
  292. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  293. * containing more mappings.
  294. */
  295. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  296. {
  297. struct kvm_mmu_page *sp;
  298. struct kvm_rmap_desc *desc;
  299. unsigned long *rmapp;
  300. int i;
  301. if (!is_rmap_pte(*spte))
  302. return;
  303. gfn = unalias_gfn(vcpu->kvm, gfn);
  304. sp = page_header(__pa(spte));
  305. sp->gfns[spte - sp->spt] = gfn;
  306. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  307. if (!*rmapp) {
  308. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  309. *rmapp = (unsigned long)spte;
  310. } else if (!(*rmapp & 1)) {
  311. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  312. desc = mmu_alloc_rmap_desc(vcpu);
  313. desc->shadow_ptes[0] = (u64 *)*rmapp;
  314. desc->shadow_ptes[1] = spte;
  315. *rmapp = (unsigned long)desc | 1;
  316. } else {
  317. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  318. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  319. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  320. desc = desc->more;
  321. if (desc->shadow_ptes[RMAP_EXT-1]) {
  322. desc->more = mmu_alloc_rmap_desc(vcpu);
  323. desc = desc->more;
  324. }
  325. for (i = 0; desc->shadow_ptes[i]; ++i)
  326. ;
  327. desc->shadow_ptes[i] = spte;
  328. }
  329. }
  330. static void rmap_desc_remove_entry(unsigned long *rmapp,
  331. struct kvm_rmap_desc *desc,
  332. int i,
  333. struct kvm_rmap_desc *prev_desc)
  334. {
  335. int j;
  336. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  337. ;
  338. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  339. desc->shadow_ptes[j] = NULL;
  340. if (j != 0)
  341. return;
  342. if (!prev_desc && !desc->more)
  343. *rmapp = (unsigned long)desc->shadow_ptes[0];
  344. else
  345. if (prev_desc)
  346. prev_desc->more = desc->more;
  347. else
  348. *rmapp = (unsigned long)desc->more | 1;
  349. mmu_free_rmap_desc(desc);
  350. }
  351. static void rmap_remove(struct kvm *kvm, u64 *spte)
  352. {
  353. struct kvm_rmap_desc *desc;
  354. struct kvm_rmap_desc *prev_desc;
  355. struct kvm_mmu_page *sp;
  356. struct page *page;
  357. unsigned long *rmapp;
  358. int i;
  359. if (!is_rmap_pte(*spte))
  360. return;
  361. sp = page_header(__pa(spte));
  362. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  363. mark_page_accessed(page);
  364. if (is_writeble_pte(*spte))
  365. kvm_release_page_dirty(page);
  366. else
  367. kvm_release_page_clean(page);
  368. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
  369. if (!*rmapp) {
  370. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  371. BUG();
  372. } else if (!(*rmapp & 1)) {
  373. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  374. if ((u64 *)*rmapp != spte) {
  375. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  376. spte, *spte);
  377. BUG();
  378. }
  379. *rmapp = 0;
  380. } else {
  381. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  382. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  383. prev_desc = NULL;
  384. while (desc) {
  385. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  386. if (desc->shadow_ptes[i] == spte) {
  387. rmap_desc_remove_entry(rmapp,
  388. desc, i,
  389. prev_desc);
  390. return;
  391. }
  392. prev_desc = desc;
  393. desc = desc->more;
  394. }
  395. BUG();
  396. }
  397. }
  398. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  399. {
  400. struct kvm_rmap_desc *desc;
  401. struct kvm_rmap_desc *prev_desc;
  402. u64 *prev_spte;
  403. int i;
  404. if (!*rmapp)
  405. return NULL;
  406. else if (!(*rmapp & 1)) {
  407. if (!spte)
  408. return (u64 *)*rmapp;
  409. return NULL;
  410. }
  411. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  412. prev_desc = NULL;
  413. prev_spte = NULL;
  414. while (desc) {
  415. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  416. if (prev_spte == spte)
  417. return desc->shadow_ptes[i];
  418. prev_spte = desc->shadow_ptes[i];
  419. }
  420. desc = desc->more;
  421. }
  422. return NULL;
  423. }
  424. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  425. {
  426. unsigned long *rmapp;
  427. u64 *spte;
  428. gfn = unalias_gfn(kvm, gfn);
  429. rmapp = gfn_to_rmap(kvm, gfn);
  430. spte = rmap_next(kvm, rmapp, NULL);
  431. while (spte) {
  432. BUG_ON(!spte);
  433. BUG_ON(!(*spte & PT_PRESENT_MASK));
  434. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  435. if (is_writeble_pte(*spte))
  436. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  437. kvm_flush_remote_tlbs(kvm);
  438. spte = rmap_next(kvm, rmapp, spte);
  439. }
  440. }
  441. #ifdef MMU_DEBUG
  442. static int is_empty_shadow_page(u64 *spt)
  443. {
  444. u64 *pos;
  445. u64 *end;
  446. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  447. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  448. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  449. pos, *pos);
  450. return 0;
  451. }
  452. return 1;
  453. }
  454. #endif
  455. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  456. {
  457. ASSERT(is_empty_shadow_page(sp->spt));
  458. list_del(&sp->link);
  459. __free_page(virt_to_page(sp->spt));
  460. __free_page(virt_to_page(sp->gfns));
  461. kfree(sp);
  462. ++kvm->n_free_mmu_pages;
  463. }
  464. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  465. {
  466. return gfn;
  467. }
  468. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  469. u64 *parent_pte)
  470. {
  471. struct kvm_mmu_page *sp;
  472. if (!vcpu->kvm->n_free_mmu_pages)
  473. return NULL;
  474. sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp);
  475. sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  476. sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  477. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  478. list_add(&sp->link, &vcpu->kvm->active_mmu_pages);
  479. ASSERT(is_empty_shadow_page(sp->spt));
  480. sp->slot_bitmap = 0;
  481. sp->multimapped = 0;
  482. sp->parent_pte = parent_pte;
  483. --vcpu->kvm->n_free_mmu_pages;
  484. return sp;
  485. }
  486. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  487. struct kvm_mmu_page *sp, u64 *parent_pte)
  488. {
  489. struct kvm_pte_chain *pte_chain;
  490. struct hlist_node *node;
  491. int i;
  492. if (!parent_pte)
  493. return;
  494. if (!sp->multimapped) {
  495. u64 *old = sp->parent_pte;
  496. if (!old) {
  497. sp->parent_pte = parent_pte;
  498. return;
  499. }
  500. sp->multimapped = 1;
  501. pte_chain = mmu_alloc_pte_chain(vcpu);
  502. INIT_HLIST_HEAD(&sp->parent_ptes);
  503. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  504. pte_chain->parent_ptes[0] = old;
  505. }
  506. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  507. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  508. continue;
  509. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  510. if (!pte_chain->parent_ptes[i]) {
  511. pte_chain->parent_ptes[i] = parent_pte;
  512. return;
  513. }
  514. }
  515. pte_chain = mmu_alloc_pte_chain(vcpu);
  516. BUG_ON(!pte_chain);
  517. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  518. pte_chain->parent_ptes[0] = parent_pte;
  519. }
  520. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  521. u64 *parent_pte)
  522. {
  523. struct kvm_pte_chain *pte_chain;
  524. struct hlist_node *node;
  525. int i;
  526. if (!sp->multimapped) {
  527. BUG_ON(sp->parent_pte != parent_pte);
  528. sp->parent_pte = NULL;
  529. return;
  530. }
  531. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  532. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  533. if (!pte_chain->parent_ptes[i])
  534. break;
  535. if (pte_chain->parent_ptes[i] != parent_pte)
  536. continue;
  537. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  538. && pte_chain->parent_ptes[i + 1]) {
  539. pte_chain->parent_ptes[i]
  540. = pte_chain->parent_ptes[i + 1];
  541. ++i;
  542. }
  543. pte_chain->parent_ptes[i] = NULL;
  544. if (i == 0) {
  545. hlist_del(&pte_chain->link);
  546. mmu_free_pte_chain(pte_chain);
  547. if (hlist_empty(&sp->parent_ptes)) {
  548. sp->multimapped = 0;
  549. sp->parent_pte = NULL;
  550. }
  551. }
  552. return;
  553. }
  554. BUG();
  555. }
  556. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  557. {
  558. unsigned index;
  559. struct hlist_head *bucket;
  560. struct kvm_mmu_page *sp;
  561. struct hlist_node *node;
  562. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  563. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  564. bucket = &kvm->mmu_page_hash[index];
  565. hlist_for_each_entry(sp, node, bucket, hash_link)
  566. if (sp->gfn == gfn && !sp->role.metaphysical) {
  567. pgprintk("%s: found role %x\n",
  568. __FUNCTION__, sp->role.word);
  569. return sp;
  570. }
  571. return NULL;
  572. }
  573. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  574. gfn_t gfn,
  575. gva_t gaddr,
  576. unsigned level,
  577. int metaphysical,
  578. unsigned hugepage_access,
  579. u64 *parent_pte)
  580. {
  581. union kvm_mmu_page_role role;
  582. unsigned index;
  583. unsigned quadrant;
  584. struct hlist_head *bucket;
  585. struct kvm_mmu_page *sp;
  586. struct hlist_node *node;
  587. role.word = 0;
  588. role.glevels = vcpu->mmu.root_level;
  589. role.level = level;
  590. role.metaphysical = metaphysical;
  591. role.hugepage_access = hugepage_access;
  592. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  593. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  594. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  595. role.quadrant = quadrant;
  596. }
  597. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  598. gfn, role.word);
  599. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  600. bucket = &vcpu->kvm->mmu_page_hash[index];
  601. hlist_for_each_entry(sp, node, bucket, hash_link)
  602. if (sp->gfn == gfn && sp->role.word == role.word) {
  603. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  604. pgprintk("%s: found\n", __FUNCTION__);
  605. return sp;
  606. }
  607. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  608. if (!sp)
  609. return sp;
  610. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  611. sp->gfn = gfn;
  612. sp->role = role;
  613. hlist_add_head(&sp->hash_link, bucket);
  614. vcpu->mmu.prefetch_page(vcpu, sp);
  615. if (!metaphysical)
  616. rmap_write_protect(vcpu->kvm, gfn);
  617. return sp;
  618. }
  619. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  620. struct kvm_mmu_page *sp)
  621. {
  622. unsigned i;
  623. u64 *pt;
  624. u64 ent;
  625. pt = sp->spt;
  626. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  627. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  628. if (is_shadow_present_pte(pt[i]))
  629. rmap_remove(kvm, &pt[i]);
  630. pt[i] = shadow_trap_nonpresent_pte;
  631. }
  632. kvm_flush_remote_tlbs(kvm);
  633. return;
  634. }
  635. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  636. ent = pt[i];
  637. pt[i] = shadow_trap_nonpresent_pte;
  638. if (!is_shadow_present_pte(ent))
  639. continue;
  640. ent &= PT64_BASE_ADDR_MASK;
  641. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  642. }
  643. kvm_flush_remote_tlbs(kvm);
  644. }
  645. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  646. {
  647. mmu_page_remove_parent_pte(sp, parent_pte);
  648. }
  649. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  650. {
  651. int i;
  652. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  653. if (kvm->vcpus[i])
  654. kvm->vcpus[i]->last_pte_updated = NULL;
  655. }
  656. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  657. {
  658. u64 *parent_pte;
  659. ++kvm->stat.mmu_shadow_zapped;
  660. while (sp->multimapped || sp->parent_pte) {
  661. if (!sp->multimapped)
  662. parent_pte = sp->parent_pte;
  663. else {
  664. struct kvm_pte_chain *chain;
  665. chain = container_of(sp->parent_ptes.first,
  666. struct kvm_pte_chain, link);
  667. parent_pte = chain->parent_ptes[0];
  668. }
  669. BUG_ON(!parent_pte);
  670. kvm_mmu_put_page(sp, parent_pte);
  671. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  672. }
  673. kvm_mmu_page_unlink_children(kvm, sp);
  674. if (!sp->root_count) {
  675. hlist_del(&sp->hash_link);
  676. kvm_mmu_free_page(kvm, sp);
  677. } else
  678. list_move(&sp->link, &kvm->active_mmu_pages);
  679. kvm_mmu_reset_last_pte_updated(kvm);
  680. }
  681. /*
  682. * Changing the number of mmu pages allocated to the vm
  683. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  684. */
  685. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  686. {
  687. /*
  688. * If we set the number of mmu pages to be smaller be than the
  689. * number of actived pages , we must to free some mmu pages before we
  690. * change the value
  691. */
  692. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  693. kvm_nr_mmu_pages) {
  694. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  695. - kvm->n_free_mmu_pages;
  696. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  697. struct kvm_mmu_page *page;
  698. page = container_of(kvm->active_mmu_pages.prev,
  699. struct kvm_mmu_page, link);
  700. kvm_mmu_zap_page(kvm, page);
  701. n_used_mmu_pages--;
  702. }
  703. kvm->n_free_mmu_pages = 0;
  704. }
  705. else
  706. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  707. - kvm->n_alloc_mmu_pages;
  708. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  709. }
  710. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  711. {
  712. unsigned index;
  713. struct hlist_head *bucket;
  714. struct kvm_mmu_page *sp;
  715. struct hlist_node *node, *n;
  716. int r;
  717. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  718. r = 0;
  719. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  720. bucket = &kvm->mmu_page_hash[index];
  721. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  722. if (sp->gfn == gfn && !sp->role.metaphysical) {
  723. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  724. sp->role.word);
  725. kvm_mmu_zap_page(kvm, sp);
  726. r = 1;
  727. }
  728. return r;
  729. }
  730. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  731. {
  732. struct kvm_mmu_page *sp;
  733. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  734. pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
  735. kvm_mmu_zap_page(kvm, sp);
  736. }
  737. }
  738. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  739. {
  740. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  741. struct kvm_mmu_page *sp = page_header(__pa(pte));
  742. __set_bit(slot, &sp->slot_bitmap);
  743. }
  744. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  745. {
  746. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  747. if (gpa == UNMAPPED_GVA)
  748. return NULL;
  749. return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  750. }
  751. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  752. {
  753. }
  754. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, struct page *page)
  755. {
  756. int level = PT32E_ROOT_LEVEL;
  757. hpa_t table_addr = vcpu->mmu.root_hpa;
  758. for (; ; level--) {
  759. u32 index = PT64_INDEX(v, level);
  760. u64 *table;
  761. u64 pte;
  762. ASSERT(VALID_PAGE(table_addr));
  763. table = __va(table_addr);
  764. if (level == 1) {
  765. int was_rmapped;
  766. pte = table[index];
  767. was_rmapped = is_rmap_pte(pte);
  768. if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
  769. kvm_release_page_clean(page);
  770. return 0;
  771. }
  772. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  773. page_header_update_slot(vcpu->kvm, table,
  774. v >> PAGE_SHIFT);
  775. table[index] = page_to_phys(page)
  776. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  777. | PT_USER_MASK;
  778. if (!was_rmapped)
  779. rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
  780. else
  781. kvm_release_page_clean(page);
  782. return 0;
  783. }
  784. if (table[index] == shadow_trap_nonpresent_pte) {
  785. struct kvm_mmu_page *new_table;
  786. gfn_t pseudo_gfn;
  787. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  788. >> PAGE_SHIFT;
  789. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  790. v, level - 1,
  791. 1, 3, &table[index]);
  792. if (!new_table) {
  793. pgprintk("nonpaging_map: ENOMEM\n");
  794. kvm_release_page_clean(page);
  795. return -ENOMEM;
  796. }
  797. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  798. | PT_WRITABLE_MASK | PT_USER_MASK;
  799. }
  800. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  801. }
  802. }
  803. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  804. struct kvm_mmu_page *sp)
  805. {
  806. int i;
  807. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  808. sp->spt[i] = shadow_trap_nonpresent_pte;
  809. }
  810. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  811. {
  812. int i;
  813. struct kvm_mmu_page *sp;
  814. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  815. return;
  816. #ifdef CONFIG_X86_64
  817. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  818. hpa_t root = vcpu->mmu.root_hpa;
  819. sp = page_header(root);
  820. --sp->root_count;
  821. vcpu->mmu.root_hpa = INVALID_PAGE;
  822. return;
  823. }
  824. #endif
  825. for (i = 0; i < 4; ++i) {
  826. hpa_t root = vcpu->mmu.pae_root[i];
  827. if (root) {
  828. root &= PT64_BASE_ADDR_MASK;
  829. sp = page_header(root);
  830. --sp->root_count;
  831. }
  832. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  833. }
  834. vcpu->mmu.root_hpa = INVALID_PAGE;
  835. }
  836. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  837. {
  838. int i;
  839. gfn_t root_gfn;
  840. struct kvm_mmu_page *sp;
  841. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  842. #ifdef CONFIG_X86_64
  843. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  844. hpa_t root = vcpu->mmu.root_hpa;
  845. ASSERT(!VALID_PAGE(root));
  846. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  847. PT64_ROOT_LEVEL, 0, 0, NULL);
  848. root = __pa(sp->spt);
  849. ++sp->root_count;
  850. vcpu->mmu.root_hpa = root;
  851. return;
  852. }
  853. #endif
  854. for (i = 0; i < 4; ++i) {
  855. hpa_t root = vcpu->mmu.pae_root[i];
  856. ASSERT(!VALID_PAGE(root));
  857. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  858. if (!is_present_pte(vcpu->pdptrs[i])) {
  859. vcpu->mmu.pae_root[i] = 0;
  860. continue;
  861. }
  862. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  863. } else if (vcpu->mmu.root_level == 0)
  864. root_gfn = 0;
  865. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  866. PT32_ROOT_LEVEL, !is_paging(vcpu),
  867. 0, NULL);
  868. root = __pa(sp->spt);
  869. ++sp->root_count;
  870. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  871. }
  872. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  873. }
  874. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  875. {
  876. return vaddr;
  877. }
  878. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  879. u32 error_code)
  880. {
  881. struct page *page;
  882. int r;
  883. r = mmu_topup_memory_caches(vcpu);
  884. if (r)
  885. return r;
  886. ASSERT(vcpu);
  887. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  888. page = gfn_to_page(vcpu->kvm, gva >> PAGE_SHIFT);
  889. if (is_error_page(page)) {
  890. kvm_release_page_clean(page);
  891. return 1;
  892. }
  893. return nonpaging_map(vcpu, gva & PAGE_MASK, page);
  894. }
  895. static void nonpaging_free(struct kvm_vcpu *vcpu)
  896. {
  897. mmu_free_roots(vcpu);
  898. }
  899. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  900. {
  901. struct kvm_mmu *context = &vcpu->mmu;
  902. context->new_cr3 = nonpaging_new_cr3;
  903. context->page_fault = nonpaging_page_fault;
  904. context->gva_to_gpa = nonpaging_gva_to_gpa;
  905. context->free = nonpaging_free;
  906. context->prefetch_page = nonpaging_prefetch_page;
  907. context->root_level = 0;
  908. context->shadow_root_level = PT32E_ROOT_LEVEL;
  909. context->root_hpa = INVALID_PAGE;
  910. return 0;
  911. }
  912. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  913. {
  914. ++vcpu->stat.tlb_flush;
  915. kvm_x86_ops->tlb_flush(vcpu);
  916. }
  917. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  918. {
  919. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  920. mmu_free_roots(vcpu);
  921. }
  922. static void inject_page_fault(struct kvm_vcpu *vcpu,
  923. u64 addr,
  924. u32 err_code)
  925. {
  926. kvm_inject_page_fault(vcpu, addr, err_code);
  927. }
  928. static void paging_free(struct kvm_vcpu *vcpu)
  929. {
  930. nonpaging_free(vcpu);
  931. }
  932. #define PTTYPE 64
  933. #include "paging_tmpl.h"
  934. #undef PTTYPE
  935. #define PTTYPE 32
  936. #include "paging_tmpl.h"
  937. #undef PTTYPE
  938. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  939. {
  940. struct kvm_mmu *context = &vcpu->mmu;
  941. ASSERT(is_pae(vcpu));
  942. context->new_cr3 = paging_new_cr3;
  943. context->page_fault = paging64_page_fault;
  944. context->gva_to_gpa = paging64_gva_to_gpa;
  945. context->prefetch_page = paging64_prefetch_page;
  946. context->free = paging_free;
  947. context->root_level = level;
  948. context->shadow_root_level = level;
  949. context->root_hpa = INVALID_PAGE;
  950. return 0;
  951. }
  952. static int paging64_init_context(struct kvm_vcpu *vcpu)
  953. {
  954. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  955. }
  956. static int paging32_init_context(struct kvm_vcpu *vcpu)
  957. {
  958. struct kvm_mmu *context = &vcpu->mmu;
  959. context->new_cr3 = paging_new_cr3;
  960. context->page_fault = paging32_page_fault;
  961. context->gva_to_gpa = paging32_gva_to_gpa;
  962. context->free = paging_free;
  963. context->prefetch_page = paging32_prefetch_page;
  964. context->root_level = PT32_ROOT_LEVEL;
  965. context->shadow_root_level = PT32E_ROOT_LEVEL;
  966. context->root_hpa = INVALID_PAGE;
  967. return 0;
  968. }
  969. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  970. {
  971. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  972. }
  973. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  974. {
  975. ASSERT(vcpu);
  976. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  977. if (!is_paging(vcpu))
  978. return nonpaging_init_context(vcpu);
  979. else if (is_long_mode(vcpu))
  980. return paging64_init_context(vcpu);
  981. else if (is_pae(vcpu))
  982. return paging32E_init_context(vcpu);
  983. else
  984. return paging32_init_context(vcpu);
  985. }
  986. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  987. {
  988. ASSERT(vcpu);
  989. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  990. vcpu->mmu.free(vcpu);
  991. vcpu->mmu.root_hpa = INVALID_PAGE;
  992. }
  993. }
  994. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  995. {
  996. destroy_kvm_mmu(vcpu);
  997. return init_kvm_mmu(vcpu);
  998. }
  999. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1000. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1001. {
  1002. int r;
  1003. mutex_lock(&vcpu->kvm->lock);
  1004. r = mmu_topup_memory_caches(vcpu);
  1005. if (r)
  1006. goto out;
  1007. mmu_alloc_roots(vcpu);
  1008. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1009. kvm_mmu_flush_tlb(vcpu);
  1010. out:
  1011. mutex_unlock(&vcpu->kvm->lock);
  1012. return r;
  1013. }
  1014. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1015. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1016. {
  1017. mmu_free_roots(vcpu);
  1018. }
  1019. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1020. struct kvm_mmu_page *sp,
  1021. u64 *spte)
  1022. {
  1023. u64 pte;
  1024. struct kvm_mmu_page *child;
  1025. pte = *spte;
  1026. if (is_shadow_present_pte(pte)) {
  1027. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1028. rmap_remove(vcpu->kvm, spte);
  1029. else {
  1030. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1031. mmu_page_remove_parent_pte(child, spte);
  1032. }
  1033. }
  1034. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1035. }
  1036. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1037. struct kvm_mmu_page *sp,
  1038. u64 *spte,
  1039. const void *new, int bytes,
  1040. int offset_in_pte)
  1041. {
  1042. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1043. ++vcpu->kvm->stat.mmu_pde_zapped;
  1044. return;
  1045. }
  1046. ++vcpu->kvm->stat.mmu_pte_updated;
  1047. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1048. paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1049. else
  1050. paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1051. }
  1052. static bool need_remote_flush(u64 old, u64 new)
  1053. {
  1054. if (!is_shadow_present_pte(old))
  1055. return false;
  1056. if (!is_shadow_present_pte(new))
  1057. return true;
  1058. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1059. return true;
  1060. old ^= PT64_NX_MASK;
  1061. new ^= PT64_NX_MASK;
  1062. return (old & ~new & PT64_PERM_MASK) != 0;
  1063. }
  1064. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1065. {
  1066. if (need_remote_flush(old, new))
  1067. kvm_flush_remote_tlbs(vcpu->kvm);
  1068. else
  1069. kvm_mmu_flush_tlb(vcpu);
  1070. }
  1071. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1072. {
  1073. u64 *spte = vcpu->last_pte_updated;
  1074. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1075. }
  1076. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1077. const u8 *new, int bytes)
  1078. {
  1079. gfn_t gfn = gpa >> PAGE_SHIFT;
  1080. struct kvm_mmu_page *sp;
  1081. struct hlist_node *node, *n;
  1082. struct hlist_head *bucket;
  1083. unsigned index;
  1084. u64 entry;
  1085. u64 *spte;
  1086. unsigned offset = offset_in_page(gpa);
  1087. unsigned pte_size;
  1088. unsigned page_offset;
  1089. unsigned misaligned;
  1090. unsigned quadrant;
  1091. int level;
  1092. int flooded = 0;
  1093. int npte;
  1094. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1095. ++vcpu->kvm->stat.mmu_pte_write;
  1096. kvm_mmu_audit(vcpu, "pre pte write");
  1097. if (gfn == vcpu->last_pt_write_gfn
  1098. && !last_updated_pte_accessed(vcpu)) {
  1099. ++vcpu->last_pt_write_count;
  1100. if (vcpu->last_pt_write_count >= 3)
  1101. flooded = 1;
  1102. } else {
  1103. vcpu->last_pt_write_gfn = gfn;
  1104. vcpu->last_pt_write_count = 1;
  1105. vcpu->last_pte_updated = NULL;
  1106. }
  1107. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1108. bucket = &vcpu->kvm->mmu_page_hash[index];
  1109. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1110. if (sp->gfn != gfn || sp->role.metaphysical)
  1111. continue;
  1112. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1113. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1114. misaligned |= bytes < 4;
  1115. if (misaligned || flooded) {
  1116. /*
  1117. * Misaligned accesses are too much trouble to fix
  1118. * up; also, they usually indicate a page is not used
  1119. * as a page table.
  1120. *
  1121. * If we're seeing too many writes to a page,
  1122. * it may no longer be a page table, or we may be
  1123. * forking, in which case it is better to unmap the
  1124. * page.
  1125. */
  1126. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1127. gpa, bytes, sp->role.word);
  1128. kvm_mmu_zap_page(vcpu->kvm, sp);
  1129. ++vcpu->kvm->stat.mmu_flooded;
  1130. continue;
  1131. }
  1132. page_offset = offset;
  1133. level = sp->role.level;
  1134. npte = 1;
  1135. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1136. page_offset <<= 1; /* 32->64 */
  1137. /*
  1138. * A 32-bit pde maps 4MB while the shadow pdes map
  1139. * only 2MB. So we need to double the offset again
  1140. * and zap two pdes instead of one.
  1141. */
  1142. if (level == PT32_ROOT_LEVEL) {
  1143. page_offset &= ~7; /* kill rounding error */
  1144. page_offset <<= 1;
  1145. npte = 2;
  1146. }
  1147. quadrant = page_offset >> PAGE_SHIFT;
  1148. page_offset &= ~PAGE_MASK;
  1149. if (quadrant != sp->role.quadrant)
  1150. continue;
  1151. }
  1152. spte = &sp->spt[page_offset / sizeof(*spte)];
  1153. while (npte--) {
  1154. entry = *spte;
  1155. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1156. mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
  1157. page_offset & (pte_size - 1));
  1158. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1159. ++spte;
  1160. }
  1161. }
  1162. kvm_mmu_audit(vcpu, "post pte write");
  1163. }
  1164. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1165. {
  1166. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1167. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1168. }
  1169. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1170. {
  1171. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1172. struct kvm_mmu_page *sp;
  1173. sp = container_of(vcpu->kvm->active_mmu_pages.prev,
  1174. struct kvm_mmu_page, link);
  1175. kvm_mmu_zap_page(vcpu->kvm, sp);
  1176. ++vcpu->kvm->stat.mmu_recycled;
  1177. }
  1178. }
  1179. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1180. {
  1181. int r;
  1182. enum emulation_result er;
  1183. mutex_lock(&vcpu->kvm->lock);
  1184. r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
  1185. if (r < 0)
  1186. goto out;
  1187. if (!r) {
  1188. r = 1;
  1189. goto out;
  1190. }
  1191. r = mmu_topup_memory_caches(vcpu);
  1192. if (r)
  1193. goto out;
  1194. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1195. mutex_unlock(&vcpu->kvm->lock);
  1196. switch (er) {
  1197. case EMULATE_DONE:
  1198. return 1;
  1199. case EMULATE_DO_MMIO:
  1200. ++vcpu->stat.mmio_exits;
  1201. return 0;
  1202. case EMULATE_FAIL:
  1203. kvm_report_emulation_failure(vcpu, "pagetable");
  1204. return 1;
  1205. default:
  1206. BUG();
  1207. }
  1208. out:
  1209. mutex_unlock(&vcpu->kvm->lock);
  1210. return r;
  1211. }
  1212. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1213. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1214. {
  1215. struct kvm_mmu_page *sp;
  1216. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1217. sp = container_of(vcpu->kvm->active_mmu_pages.next,
  1218. struct kvm_mmu_page, link);
  1219. kvm_mmu_zap_page(vcpu->kvm, sp);
  1220. }
  1221. free_page((unsigned long)vcpu->mmu.pae_root);
  1222. }
  1223. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1224. {
  1225. struct page *page;
  1226. int i;
  1227. ASSERT(vcpu);
  1228. if (vcpu->kvm->n_requested_mmu_pages)
  1229. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1230. else
  1231. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1232. /*
  1233. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1234. * Therefore we need to allocate shadow page tables in the first
  1235. * 4GB of memory, which happens to fit the DMA32 zone.
  1236. */
  1237. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1238. if (!page)
  1239. goto error_1;
  1240. vcpu->mmu.pae_root = page_address(page);
  1241. for (i = 0; i < 4; ++i)
  1242. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1243. return 0;
  1244. error_1:
  1245. free_mmu_pages(vcpu);
  1246. return -ENOMEM;
  1247. }
  1248. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1249. {
  1250. ASSERT(vcpu);
  1251. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1252. return alloc_mmu_pages(vcpu);
  1253. }
  1254. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1255. {
  1256. ASSERT(vcpu);
  1257. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1258. return init_kvm_mmu(vcpu);
  1259. }
  1260. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1261. {
  1262. ASSERT(vcpu);
  1263. destroy_kvm_mmu(vcpu);
  1264. free_mmu_pages(vcpu);
  1265. mmu_free_memory_caches(vcpu);
  1266. }
  1267. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1268. {
  1269. struct kvm_mmu_page *sp;
  1270. list_for_each_entry(sp, &kvm->active_mmu_pages, link) {
  1271. int i;
  1272. u64 *pt;
  1273. if (!test_bit(slot, &sp->slot_bitmap))
  1274. continue;
  1275. pt = sp->spt;
  1276. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1277. /* avoid RMW */
  1278. if (pt[i] & PT_WRITABLE_MASK)
  1279. pt[i] &= ~PT_WRITABLE_MASK;
  1280. }
  1281. }
  1282. void kvm_mmu_zap_all(struct kvm *kvm)
  1283. {
  1284. struct kvm_mmu_page *sp, *node;
  1285. list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link)
  1286. kvm_mmu_zap_page(kvm, sp);
  1287. kvm_flush_remote_tlbs(kvm);
  1288. }
  1289. void kvm_mmu_module_exit(void)
  1290. {
  1291. if (pte_chain_cache)
  1292. kmem_cache_destroy(pte_chain_cache);
  1293. if (rmap_desc_cache)
  1294. kmem_cache_destroy(rmap_desc_cache);
  1295. if (mmu_page_header_cache)
  1296. kmem_cache_destroy(mmu_page_header_cache);
  1297. }
  1298. int kvm_mmu_module_init(void)
  1299. {
  1300. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1301. sizeof(struct kvm_pte_chain),
  1302. 0, 0, NULL);
  1303. if (!pte_chain_cache)
  1304. goto nomem;
  1305. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1306. sizeof(struct kvm_rmap_desc),
  1307. 0, 0, NULL);
  1308. if (!rmap_desc_cache)
  1309. goto nomem;
  1310. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1311. sizeof(struct kvm_mmu_page),
  1312. 0, 0, NULL);
  1313. if (!mmu_page_header_cache)
  1314. goto nomem;
  1315. return 0;
  1316. nomem:
  1317. kvm_mmu_module_exit();
  1318. return -ENOMEM;
  1319. }
  1320. /*
  1321. * Caculate mmu pages needed for kvm.
  1322. */
  1323. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1324. {
  1325. int i;
  1326. unsigned int nr_mmu_pages;
  1327. unsigned int nr_pages = 0;
  1328. for (i = 0; i < kvm->nmemslots; i++)
  1329. nr_pages += kvm->memslots[i].npages;
  1330. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1331. nr_mmu_pages = max(nr_mmu_pages,
  1332. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1333. return nr_mmu_pages;
  1334. }
  1335. #ifdef AUDIT
  1336. static const char *audit_msg;
  1337. static gva_t canonicalize(gva_t gva)
  1338. {
  1339. #ifdef CONFIG_X86_64
  1340. gva = (long long)(gva << 16) >> 16;
  1341. #endif
  1342. return gva;
  1343. }
  1344. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1345. gva_t va, int level)
  1346. {
  1347. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1348. int i;
  1349. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1350. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1351. u64 ent = pt[i];
  1352. if (ent == shadow_trap_nonpresent_pte)
  1353. continue;
  1354. va = canonicalize(va);
  1355. if (level > 1) {
  1356. if (ent == shadow_notrap_nonpresent_pte)
  1357. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1358. " in nonleaf level: levels %d gva %lx"
  1359. " level %d pte %llx\n", audit_msg,
  1360. vcpu->mmu.root_level, va, level, ent);
  1361. audit_mappings_page(vcpu, ent, va, level - 1);
  1362. } else {
  1363. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1364. struct page *page = gpa_to_page(vcpu, gpa);
  1365. hpa_t hpa = page_to_phys(page);
  1366. if (is_shadow_present_pte(ent)
  1367. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1368. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1369. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1370. audit_msg, vcpu->mmu.root_level,
  1371. va, gpa, hpa, ent,
  1372. is_shadow_present_pte(ent));
  1373. else if (ent == shadow_notrap_nonpresent_pte
  1374. && !is_error_hpa(hpa))
  1375. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1376. " valid guest gva %lx\n", audit_msg, va);
  1377. kvm_release_page_clean(page);
  1378. }
  1379. }
  1380. }
  1381. static void audit_mappings(struct kvm_vcpu *vcpu)
  1382. {
  1383. unsigned i;
  1384. if (vcpu->mmu.root_level == 4)
  1385. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1386. else
  1387. for (i = 0; i < 4; ++i)
  1388. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1389. audit_mappings_page(vcpu,
  1390. vcpu->mmu.pae_root[i],
  1391. i << 30,
  1392. 2);
  1393. }
  1394. static int count_rmaps(struct kvm_vcpu *vcpu)
  1395. {
  1396. int nmaps = 0;
  1397. int i, j, k;
  1398. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1399. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1400. struct kvm_rmap_desc *d;
  1401. for (j = 0; j < m->npages; ++j) {
  1402. unsigned long *rmapp = &m->rmap[j];
  1403. if (!*rmapp)
  1404. continue;
  1405. if (!(*rmapp & 1)) {
  1406. ++nmaps;
  1407. continue;
  1408. }
  1409. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1410. while (d) {
  1411. for (k = 0; k < RMAP_EXT; ++k)
  1412. if (d->shadow_ptes[k])
  1413. ++nmaps;
  1414. else
  1415. break;
  1416. d = d->more;
  1417. }
  1418. }
  1419. }
  1420. return nmaps;
  1421. }
  1422. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1423. {
  1424. int nmaps = 0;
  1425. struct kvm_mmu_page *sp;
  1426. int i;
  1427. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1428. u64 *pt = sp->spt;
  1429. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1430. continue;
  1431. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1432. u64 ent = pt[i];
  1433. if (!(ent & PT_PRESENT_MASK))
  1434. continue;
  1435. if (!(ent & PT_WRITABLE_MASK))
  1436. continue;
  1437. ++nmaps;
  1438. }
  1439. }
  1440. return nmaps;
  1441. }
  1442. static void audit_rmap(struct kvm_vcpu *vcpu)
  1443. {
  1444. int n_rmap = count_rmaps(vcpu);
  1445. int n_actual = count_writable_mappings(vcpu);
  1446. if (n_rmap != n_actual)
  1447. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1448. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1449. }
  1450. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1451. {
  1452. struct kvm_mmu_page *sp;
  1453. struct kvm_memory_slot *slot;
  1454. unsigned long *rmapp;
  1455. gfn_t gfn;
  1456. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1457. if (sp->role.metaphysical)
  1458. continue;
  1459. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  1460. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  1461. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1462. if (*rmapp)
  1463. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1464. " mappings: gfn %lx role %x\n",
  1465. __FUNCTION__, audit_msg, sp->gfn,
  1466. sp->role.word);
  1467. }
  1468. }
  1469. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1470. {
  1471. int olddbg = dbg;
  1472. dbg = 0;
  1473. audit_msg = msg;
  1474. audit_rmap(vcpu);
  1475. audit_write_protection(vcpu);
  1476. audit_mappings(vcpu);
  1477. dbg = olddbg;
  1478. }
  1479. #endif