fsl_soc.c 17 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/phy.h>
  25. #include <linux/fsl_devices.h>
  26. #include <linux/fs_enet_pd.h>
  27. #include <linux/fs_uart_pd.h>
  28. #include <asm/system.h>
  29. #include <asm/atomic.h>
  30. #include <asm/io.h>
  31. #include <asm/irq.h>
  32. #include <asm/time.h>
  33. #include <asm/prom.h>
  34. #include <sysdev/fsl_soc.h>
  35. #include <mm/mmu_decl.h>
  36. #include <asm/cpm2.h>
  37. extern void init_fcc_ioports(struct fs_platform_info*);
  38. extern void init_scc_ioports(struct fs_uart_platform_info*);
  39. static phys_addr_t immrbase = -1;
  40. phys_addr_t get_immrbase(void)
  41. {
  42. struct device_node *soc;
  43. if (immrbase != -1)
  44. return immrbase;
  45. soc = of_find_node_by_type(NULL, "soc");
  46. if (soc) {
  47. unsigned int size;
  48. const void *prop = get_property(soc, "reg", &size);
  49. if (prop)
  50. immrbase = of_translate_address(soc, prop);
  51. of_node_put(soc);
  52. };
  53. return immrbase;
  54. }
  55. EXPORT_SYMBOL(get_immrbase);
  56. #ifdef CONFIG_CPM2
  57. static u32 brgfreq = -1;
  58. u32 get_brgfreq(void)
  59. {
  60. struct device_node *node;
  61. if (brgfreq != -1)
  62. return brgfreq;
  63. node = of_find_node_by_type(NULL, "cpm");
  64. if (node) {
  65. unsigned int size;
  66. const unsigned int *prop = get_property(node, "brg-frequency",
  67. &size);
  68. if (prop)
  69. brgfreq = *prop;
  70. of_node_put(node);
  71. };
  72. return brgfreq;
  73. }
  74. EXPORT_SYMBOL(get_brgfreq);
  75. static u32 fs_baudrate = -1;
  76. u32 get_baudrate(void)
  77. {
  78. struct device_node *node;
  79. if (fs_baudrate != -1)
  80. return fs_baudrate;
  81. node = of_find_node_by_type(NULL, "serial");
  82. if (node) {
  83. unsigned int size;
  84. const unsigned int *prop = get_property(node, "current-speed",
  85. &size);
  86. if (prop)
  87. fs_baudrate = *prop;
  88. of_node_put(node);
  89. };
  90. return fs_baudrate;
  91. }
  92. EXPORT_SYMBOL(get_baudrate);
  93. #endif /* CONFIG_CPM2 */
  94. static int __init gfar_mdio_of_init(void)
  95. {
  96. struct device_node *np;
  97. unsigned int i;
  98. struct platform_device *mdio_dev;
  99. struct resource res;
  100. int ret;
  101. for (np = NULL, i = 0;
  102. (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL;
  103. i++) {
  104. int k;
  105. struct device_node *child = NULL;
  106. struct gianfar_mdio_data mdio_data;
  107. memset(&res, 0, sizeof(res));
  108. memset(&mdio_data, 0, sizeof(mdio_data));
  109. ret = of_address_to_resource(np, 0, &res);
  110. if (ret)
  111. goto err;
  112. mdio_dev =
  113. platform_device_register_simple("fsl-gianfar_mdio",
  114. res.start, &res, 1);
  115. if (IS_ERR(mdio_dev)) {
  116. ret = PTR_ERR(mdio_dev);
  117. goto err;
  118. }
  119. for (k = 0; k < 32; k++)
  120. mdio_data.irq[k] = PHY_POLL;
  121. while ((child = of_get_next_child(np, child)) != NULL) {
  122. int irq = irq_of_parse_and_map(child, 0);
  123. if (irq != NO_IRQ) {
  124. const u32 *id = get_property(child, "reg", NULL);
  125. mdio_data.irq[*id] = irq;
  126. }
  127. }
  128. ret =
  129. platform_device_add_data(mdio_dev, &mdio_data,
  130. sizeof(struct gianfar_mdio_data));
  131. if (ret)
  132. goto unreg;
  133. }
  134. return 0;
  135. unreg:
  136. platform_device_unregister(mdio_dev);
  137. err:
  138. return ret;
  139. }
  140. arch_initcall(gfar_mdio_of_init);
  141. static const char *gfar_tx_intr = "tx";
  142. static const char *gfar_rx_intr = "rx";
  143. static const char *gfar_err_intr = "error";
  144. static int __init gfar_of_init(void)
  145. {
  146. struct device_node *np;
  147. unsigned int i;
  148. struct platform_device *gfar_dev;
  149. struct resource res;
  150. int ret;
  151. for (np = NULL, i = 0;
  152. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  153. i++) {
  154. struct resource r[4];
  155. struct device_node *phy, *mdio;
  156. struct gianfar_platform_data gfar_data;
  157. const unsigned int *id;
  158. const char *model;
  159. const void *mac_addr;
  160. const phandle *ph;
  161. int n_res = 2;
  162. memset(r, 0, sizeof(r));
  163. memset(&gfar_data, 0, sizeof(gfar_data));
  164. ret = of_address_to_resource(np, 0, &r[0]);
  165. if (ret)
  166. goto err;
  167. of_irq_to_resource(np, 0, &r[1]);
  168. model = get_property(np, "model", NULL);
  169. /* If we aren't the FEC we have multiple interrupts */
  170. if (model && strcasecmp(model, "FEC")) {
  171. r[1].name = gfar_tx_intr;
  172. r[2].name = gfar_rx_intr;
  173. of_irq_to_resource(np, 1, &r[2]);
  174. r[3].name = gfar_err_intr;
  175. of_irq_to_resource(np, 2, &r[3]);
  176. n_res += 2;
  177. }
  178. gfar_dev =
  179. platform_device_register_simple("fsl-gianfar", i, &r[0],
  180. n_res);
  181. if (IS_ERR(gfar_dev)) {
  182. ret = PTR_ERR(gfar_dev);
  183. goto err;
  184. }
  185. mac_addr = get_property(np, "local-mac-address", NULL);
  186. if (mac_addr == NULL)
  187. mac_addr = get_property(np, "mac-address", NULL);
  188. if (mac_addr == NULL) {
  189. /* Obsolete */
  190. mac_addr = get_property(np, "address", NULL);
  191. }
  192. if (mac_addr)
  193. memcpy(gfar_data.mac_addr, mac_addr, 6);
  194. if (model && !strcasecmp(model, "TSEC"))
  195. gfar_data.device_flags =
  196. FSL_GIANFAR_DEV_HAS_GIGABIT |
  197. FSL_GIANFAR_DEV_HAS_COALESCE |
  198. FSL_GIANFAR_DEV_HAS_RMON |
  199. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  200. if (model && !strcasecmp(model, "eTSEC"))
  201. gfar_data.device_flags =
  202. FSL_GIANFAR_DEV_HAS_GIGABIT |
  203. FSL_GIANFAR_DEV_HAS_COALESCE |
  204. FSL_GIANFAR_DEV_HAS_RMON |
  205. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  206. FSL_GIANFAR_DEV_HAS_CSUM |
  207. FSL_GIANFAR_DEV_HAS_VLAN |
  208. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  209. ph = get_property(np, "phy-handle", NULL);
  210. phy = of_find_node_by_phandle(*ph);
  211. if (phy == NULL) {
  212. ret = -ENODEV;
  213. goto unreg;
  214. }
  215. mdio = of_get_parent(phy);
  216. id = get_property(phy, "reg", NULL);
  217. ret = of_address_to_resource(mdio, 0, &res);
  218. if (ret) {
  219. of_node_put(phy);
  220. of_node_put(mdio);
  221. goto unreg;
  222. }
  223. gfar_data.phy_id = *id;
  224. gfar_data.bus_id = res.start;
  225. of_node_put(phy);
  226. of_node_put(mdio);
  227. ret =
  228. platform_device_add_data(gfar_dev, &gfar_data,
  229. sizeof(struct
  230. gianfar_platform_data));
  231. if (ret)
  232. goto unreg;
  233. }
  234. return 0;
  235. unreg:
  236. platform_device_unregister(gfar_dev);
  237. err:
  238. return ret;
  239. }
  240. arch_initcall(gfar_of_init);
  241. static int __init fsl_i2c_of_init(void)
  242. {
  243. struct device_node *np;
  244. unsigned int i;
  245. struct platform_device *i2c_dev;
  246. int ret;
  247. for (np = NULL, i = 0;
  248. (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL;
  249. i++) {
  250. struct resource r[2];
  251. struct fsl_i2c_platform_data i2c_data;
  252. const unsigned char *flags = NULL;
  253. memset(&r, 0, sizeof(r));
  254. memset(&i2c_data, 0, sizeof(i2c_data));
  255. ret = of_address_to_resource(np, 0, &r[0]);
  256. if (ret)
  257. goto err;
  258. of_irq_to_resource(np, 0, &r[1]);
  259. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  260. if (IS_ERR(i2c_dev)) {
  261. ret = PTR_ERR(i2c_dev);
  262. goto err;
  263. }
  264. i2c_data.device_flags = 0;
  265. flags = get_property(np, "dfsrr", NULL);
  266. if (flags)
  267. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  268. flags = get_property(np, "fsl5200-clocking", NULL);
  269. if (flags)
  270. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  271. ret =
  272. platform_device_add_data(i2c_dev, &i2c_data,
  273. sizeof(struct
  274. fsl_i2c_platform_data));
  275. if (ret)
  276. goto unreg;
  277. }
  278. return 0;
  279. unreg:
  280. platform_device_unregister(i2c_dev);
  281. err:
  282. return ret;
  283. }
  284. arch_initcall(fsl_i2c_of_init);
  285. #ifdef CONFIG_PPC_83xx
  286. static int __init mpc83xx_wdt_init(void)
  287. {
  288. struct resource r;
  289. struct device_node *soc, *np;
  290. struct platform_device *dev;
  291. const unsigned int *freq;
  292. int ret;
  293. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  294. if (!np) {
  295. ret = -ENODEV;
  296. goto nodev;
  297. }
  298. soc = of_find_node_by_type(NULL, "soc");
  299. if (!soc) {
  300. ret = -ENODEV;
  301. goto nosoc;
  302. }
  303. freq = get_property(soc, "bus-frequency", NULL);
  304. if (!freq) {
  305. ret = -ENODEV;
  306. goto err;
  307. }
  308. memset(&r, 0, sizeof(r));
  309. ret = of_address_to_resource(np, 0, &r);
  310. if (ret)
  311. goto err;
  312. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  313. if (IS_ERR(dev)) {
  314. ret = PTR_ERR(dev);
  315. goto err;
  316. }
  317. ret = platform_device_add_data(dev, freq, sizeof(int));
  318. if (ret)
  319. goto unreg;
  320. of_node_put(soc);
  321. of_node_put(np);
  322. return 0;
  323. unreg:
  324. platform_device_unregister(dev);
  325. err:
  326. of_node_put(soc);
  327. nosoc:
  328. of_node_put(np);
  329. nodev:
  330. return ret;
  331. }
  332. arch_initcall(mpc83xx_wdt_init);
  333. #endif
  334. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  335. {
  336. if (!phy_type)
  337. return FSL_USB2_PHY_NONE;
  338. if (!strcasecmp(phy_type, "ulpi"))
  339. return FSL_USB2_PHY_ULPI;
  340. if (!strcasecmp(phy_type, "utmi"))
  341. return FSL_USB2_PHY_UTMI;
  342. if (!strcasecmp(phy_type, "utmi_wide"))
  343. return FSL_USB2_PHY_UTMI_WIDE;
  344. if (!strcasecmp(phy_type, "serial"))
  345. return FSL_USB2_PHY_SERIAL;
  346. return FSL_USB2_PHY_NONE;
  347. }
  348. static int __init fsl_usb_of_init(void)
  349. {
  350. struct device_node *np;
  351. unsigned int i;
  352. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr = NULL;
  353. int ret;
  354. for (np = NULL, i = 0;
  355. (np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL;
  356. i++) {
  357. struct resource r[2];
  358. struct fsl_usb2_platform_data usb_data;
  359. const unsigned char *prop = NULL;
  360. memset(&r, 0, sizeof(r));
  361. memset(&usb_data, 0, sizeof(usb_data));
  362. ret = of_address_to_resource(np, 0, &r[0]);
  363. if (ret)
  364. goto err;
  365. of_irq_to_resource(np, 0, &r[1]);
  366. usb_dev_mph =
  367. platform_device_register_simple("fsl-ehci", i, r, 2);
  368. if (IS_ERR(usb_dev_mph)) {
  369. ret = PTR_ERR(usb_dev_mph);
  370. goto err;
  371. }
  372. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  373. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  374. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  375. prop = get_property(np, "port0", NULL);
  376. if (prop)
  377. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  378. prop = get_property(np, "port1", NULL);
  379. if (prop)
  380. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  381. prop = get_property(np, "phy_type", NULL);
  382. usb_data.phy_mode = determine_usb_phy(prop);
  383. ret =
  384. platform_device_add_data(usb_dev_mph, &usb_data,
  385. sizeof(struct
  386. fsl_usb2_platform_data));
  387. if (ret)
  388. goto unreg_mph;
  389. }
  390. for (np = NULL;
  391. (np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL;
  392. i++) {
  393. struct resource r[2];
  394. struct fsl_usb2_platform_data usb_data;
  395. const unsigned char *prop = NULL;
  396. memset(&r, 0, sizeof(r));
  397. memset(&usb_data, 0, sizeof(usb_data));
  398. ret = of_address_to_resource(np, 0, &r[0]);
  399. if (ret)
  400. goto unreg_mph;
  401. of_irq_to_resource(np, 0, &r[1]);
  402. usb_dev_dr =
  403. platform_device_register_simple("fsl-ehci", i, r, 2);
  404. if (IS_ERR(usb_dev_dr)) {
  405. ret = PTR_ERR(usb_dev_dr);
  406. goto err;
  407. }
  408. usb_dev_dr->dev.coherent_dma_mask = 0xffffffffUL;
  409. usb_dev_dr->dev.dma_mask = &usb_dev_dr->dev.coherent_dma_mask;
  410. usb_data.operating_mode = FSL_USB2_DR_HOST;
  411. prop = get_property(np, "phy_type", NULL);
  412. usb_data.phy_mode = determine_usb_phy(prop);
  413. ret =
  414. platform_device_add_data(usb_dev_dr, &usb_data,
  415. sizeof(struct
  416. fsl_usb2_platform_data));
  417. if (ret)
  418. goto unreg_dr;
  419. }
  420. return 0;
  421. unreg_dr:
  422. if (usb_dev_dr)
  423. platform_device_unregister(usb_dev_dr);
  424. unreg_mph:
  425. if (usb_dev_mph)
  426. platform_device_unregister(usb_dev_mph);
  427. err:
  428. return ret;
  429. }
  430. arch_initcall(fsl_usb_of_init);
  431. #ifdef CONFIG_CPM2
  432. static const char fcc_regs[] = "fcc_regs";
  433. static const char fcc_regs_c[] = "fcc_regs_c";
  434. static const char fcc_pram[] = "fcc_pram";
  435. static char bus_id[9][BUS_ID_SIZE];
  436. static int __init fs_enet_of_init(void)
  437. {
  438. struct device_node *np;
  439. unsigned int i;
  440. struct platform_device *fs_enet_dev;
  441. struct resource res;
  442. int ret;
  443. for (np = NULL, i = 0;
  444. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  445. i++) {
  446. struct resource r[4];
  447. struct device_node *phy, *mdio;
  448. struct fs_platform_info fs_enet_data;
  449. const unsigned int *id, *phy_addr, *phy_irq;
  450. const void *mac_addr;
  451. const phandle *ph;
  452. const char *model;
  453. memset(r, 0, sizeof(r));
  454. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  455. ret = of_address_to_resource(np, 0, &r[0]);
  456. if (ret)
  457. goto err;
  458. r[0].name = fcc_regs;
  459. ret = of_address_to_resource(np, 1, &r[1]);
  460. if (ret)
  461. goto err;
  462. r[1].name = fcc_pram;
  463. ret = of_address_to_resource(np, 2, &r[2]);
  464. if (ret)
  465. goto err;
  466. r[2].name = fcc_regs_c;
  467. fs_enet_data.fcc_regs_c = r[2].start;
  468. of_irq_to_resource(np, 0, &r[3]);
  469. fs_enet_dev =
  470. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  471. if (IS_ERR(fs_enet_dev)) {
  472. ret = PTR_ERR(fs_enet_dev);
  473. goto err;
  474. }
  475. model = get_property(np, "model", NULL);
  476. if (model == NULL) {
  477. ret = -ENODEV;
  478. goto unreg;
  479. }
  480. mac_addr = get_property(np, "mac-address", NULL);
  481. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  482. ph = get_property(np, "phy-handle", NULL);
  483. phy = of_find_node_by_phandle(*ph);
  484. if (phy == NULL) {
  485. ret = -ENODEV;
  486. goto unreg;
  487. }
  488. phy_addr = get_property(phy, "reg", NULL);
  489. fs_enet_data.phy_addr = *phy_addr;
  490. phy_irq = get_property(phy, "interrupts", NULL);
  491. id = get_property(np, "device-id", NULL);
  492. fs_enet_data.fs_no = *id;
  493. strcpy(fs_enet_data.fs_type, model);
  494. mdio = of_get_parent(phy);
  495. ret = of_address_to_resource(mdio, 0, &res);
  496. if (ret) {
  497. of_node_put(phy);
  498. of_node_put(mdio);
  499. goto unreg;
  500. }
  501. fs_enet_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL));
  502. fs_enet_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL));
  503. if (strstr(model, "FCC")) {
  504. int fcc_index = *id - 1;
  505. const unsigned char *mdio_bb_prop;
  506. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  507. fs_enet_data.rx_ring = 32;
  508. fs_enet_data.tx_ring = 32;
  509. fs_enet_data.rx_copybreak = 240;
  510. fs_enet_data.use_napi = 0;
  511. fs_enet_data.napi_weight = 17;
  512. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  513. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  514. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  515. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  516. (u32)res.start, fs_enet_data.phy_addr);
  517. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  518. fs_enet_data.init_ioports = init_fcc_ioports;
  519. mdio_bb_prop = get_property(phy, "bitbang", NULL);
  520. if (mdio_bb_prop) {
  521. struct platform_device *fs_enet_mdio_bb_dev;
  522. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  523. fs_enet_mdio_bb_dev =
  524. platform_device_register_simple("fsl-bb-mdio",
  525. i, NULL, 0);
  526. memset(&fs_enet_mdio_bb_data, 0,
  527. sizeof(struct fs_mii_bb_platform_info));
  528. fs_enet_mdio_bb_data.mdio_dat.bit =
  529. mdio_bb_prop[0];
  530. fs_enet_mdio_bb_data.mdio_dir.bit =
  531. mdio_bb_prop[1];
  532. fs_enet_mdio_bb_data.mdc_dat.bit =
  533. mdio_bb_prop[2];
  534. fs_enet_mdio_bb_data.mdio_port =
  535. mdio_bb_prop[3];
  536. fs_enet_mdio_bb_data.mdc_port =
  537. mdio_bb_prop[4];
  538. fs_enet_mdio_bb_data.delay =
  539. mdio_bb_prop[5];
  540. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  541. fs_enet_mdio_bb_data.irq[1] = -1;
  542. fs_enet_mdio_bb_data.irq[2] = -1;
  543. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  544. fs_enet_mdio_bb_data.irq[31] = -1;
  545. fs_enet_mdio_bb_data.mdio_dat.offset =
  546. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  547. fs_enet_mdio_bb_data.mdio_dir.offset =
  548. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  549. fs_enet_mdio_bb_data.mdc_dat.offset =
  550. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  551. ret = platform_device_add_data(
  552. fs_enet_mdio_bb_dev,
  553. &fs_enet_mdio_bb_data,
  554. sizeof(struct fs_mii_bb_platform_info));
  555. if (ret)
  556. goto unreg;
  557. }
  558. of_node_put(phy);
  559. of_node_put(mdio);
  560. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  561. sizeof(struct
  562. fs_platform_info));
  563. if (ret)
  564. goto unreg;
  565. }
  566. }
  567. return 0;
  568. unreg:
  569. platform_device_unregister(fs_enet_dev);
  570. err:
  571. return ret;
  572. }
  573. arch_initcall(fs_enet_of_init);
  574. static const char scc_regs[] = "regs";
  575. static const char scc_pram[] = "pram";
  576. static int __init cpm_uart_of_init(void)
  577. {
  578. struct device_node *np;
  579. unsigned int i;
  580. struct platform_device *cpm_uart_dev;
  581. int ret;
  582. for (np = NULL, i = 0;
  583. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  584. i++) {
  585. struct resource r[3];
  586. struct fs_uart_platform_info cpm_uart_data;
  587. const int *id;
  588. const char *model;
  589. memset(r, 0, sizeof(r));
  590. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  591. ret = of_address_to_resource(np, 0, &r[0]);
  592. if (ret)
  593. goto err;
  594. r[0].name = scc_regs;
  595. ret = of_address_to_resource(np, 1, &r[1]);
  596. if (ret)
  597. goto err;
  598. r[1].name = scc_pram;
  599. of_irq_to_resource(np, 0, &r[2]);
  600. cpm_uart_dev =
  601. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  602. if (IS_ERR(cpm_uart_dev)) {
  603. ret = PTR_ERR(cpm_uart_dev);
  604. goto err;
  605. }
  606. id = get_property(np, "device-id", NULL);
  607. cpm_uart_data.fs_no = *id;
  608. model = (char*)get_property(np, "model", NULL);
  609. strcpy(cpm_uart_data.fs_type, model);
  610. cpm_uart_data.uart_clk = ppc_proc_freq;
  611. cpm_uart_data.tx_num_fifo = 4;
  612. cpm_uart_data.tx_buf_size = 32;
  613. cpm_uart_data.rx_num_fifo = 4;
  614. cpm_uart_data.rx_buf_size = 32;
  615. cpm_uart_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL));
  616. cpm_uart_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL));
  617. ret =
  618. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  619. sizeof(struct
  620. fs_uart_platform_info));
  621. if (ret)
  622. goto unreg;
  623. }
  624. return 0;
  625. unreg:
  626. platform_device_unregister(cpm_uart_dev);
  627. err:
  628. return ret;
  629. }
  630. arch_initcall(cpm_uart_of_init);
  631. #endif /* CONFIG_CPM2 */