ipath_rc.c 49 KB

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  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include "ipath_verbs.h"
  34. #include "ipath_kernel.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  38. u32 psn, u32 pmtu)
  39. {
  40. u32 len;
  41. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  42. ss->sge = wqe->sg_list[0];
  43. ss->sg_list = wqe->sg_list + 1;
  44. ss->num_sge = wqe->wr.num_sge;
  45. ipath_skip_sge(ss, len);
  46. return wqe->length - len;
  47. }
  48. /**
  49. * ipath_init_restart- initialize the qp->s_sge after a restart
  50. * @qp: the QP who's SGE we're restarting
  51. * @wqe: the work queue to initialize the QP's SGE from
  52. *
  53. * The QP s_lock should be held and interrupts disabled.
  54. */
  55. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  56. {
  57. struct ipath_ibdev *dev;
  58. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  59. ib_mtu_enum_to_int(qp->path_mtu));
  60. dev = to_idev(qp->ibqp.device);
  61. spin_lock(&dev->pending_lock);
  62. if (list_empty(&qp->timerwait))
  63. list_add_tail(&qp->timerwait,
  64. &dev->pending[dev->pending_index]);
  65. spin_unlock(&dev->pending_lock);
  66. }
  67. /**
  68. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  69. * @qp: a pointer to the QP
  70. * @ohdr: a pointer to the IB header being constructed
  71. * @pmtu: the path MTU
  72. *
  73. * Return 1 if constructed; otherwise, return 0.
  74. * Note that we are in the responder's side of the QP context.
  75. * Note the QP s_lock must be held.
  76. */
  77. static int ipath_make_rc_ack(struct ipath_qp *qp,
  78. struct ipath_other_headers *ohdr,
  79. u32 pmtu, u32 *bth0p, u32 *bth2p)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  87. hwords = 5;
  88. switch (qp->s_ack_state) {
  89. case OP(RDMA_READ_RESPONSE_LAST):
  90. case OP(RDMA_READ_RESPONSE_ONLY):
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. qp->s_ack_state = OP(ACKNOWLEDGE);
  93. /* FALLTHROUGH */
  94. case OP(ACKNOWLEDGE):
  95. /* Check for no next entry in the queue. */
  96. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  97. if (qp->s_flags & IPATH_S_ACK_PENDING)
  98. goto normal;
  99. goto bail;
  100. }
  101. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  102. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  103. /* Copy SGE state in case we need to resend */
  104. qp->s_ack_rdma_sge = e->rdma_sge;
  105. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  106. len = e->rdma_sge.sge.sge_length;
  107. if (len > pmtu) {
  108. len = pmtu;
  109. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  110. } else {
  111. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  112. if (++qp->s_tail_ack_queue >
  113. IPATH_MAX_RDMA_ATOMIC)
  114. qp->s_tail_ack_queue = 0;
  115. }
  116. ohdr->u.aeth = ipath_compute_aeth(qp);
  117. hwords++;
  118. qp->s_ack_rdma_psn = e->psn;
  119. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  120. } else {
  121. /* COMPARE_SWAP or FETCH_ADD */
  122. qp->s_cur_sge = NULL;
  123. len = 0;
  124. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  125. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  126. ohdr->u.at.atomic_ack_eth[0] =
  127. cpu_to_be32(e->atomic_data >> 32);
  128. ohdr->u.at.atomic_ack_eth[1] =
  129. cpu_to_be32(e->atomic_data);
  130. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  131. bth2 = e->psn;
  132. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  133. qp->s_tail_ack_queue = 0;
  134. }
  135. bth0 = qp->s_ack_state << 24;
  136. break;
  137. case OP(RDMA_READ_RESPONSE_FIRST):
  138. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  139. /* FALLTHROUGH */
  140. case OP(RDMA_READ_RESPONSE_MIDDLE):
  141. len = qp->s_ack_rdma_sge.sge.sge_length;
  142. if (len > pmtu)
  143. len = pmtu;
  144. else {
  145. ohdr->u.aeth = ipath_compute_aeth(qp);
  146. hwords++;
  147. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  148. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  149. qp->s_tail_ack_queue = 0;
  150. }
  151. bth0 = qp->s_ack_state << 24;
  152. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  153. break;
  154. default:
  155. normal:
  156. /*
  157. * Send a regular ACK.
  158. * Set the s_ack_state so we wait until after sending
  159. * the ACK before setting s_ack_state to ACKNOWLEDGE
  160. * (see above).
  161. */
  162. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  163. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  164. qp->s_cur_sge = NULL;
  165. if (qp->s_nak_state)
  166. ohdr->u.aeth =
  167. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  168. (qp->s_nak_state <<
  169. IPATH_AETH_CREDIT_SHIFT));
  170. else
  171. ohdr->u.aeth = ipath_compute_aeth(qp);
  172. hwords++;
  173. len = 0;
  174. bth0 = OP(ACKNOWLEDGE) << 24;
  175. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  176. }
  177. qp->s_hdrwords = hwords;
  178. qp->s_cur_size = len;
  179. *bth0p = bth0;
  180. *bth2p = bth2;
  181. return 1;
  182. bail:
  183. return 0;
  184. }
  185. /**
  186. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  187. * @qp: a pointer to the QP
  188. * @ohdr: a pointer to the IB header being constructed
  189. * @pmtu: the path MTU
  190. * @bth0p: pointer to the BTH opcode word
  191. * @bth2p: pointer to the BTH PSN word
  192. *
  193. * Return 1 if constructed; otherwise, return 0.
  194. * Note the QP s_lock must be held and interrupts disabled.
  195. */
  196. int ipath_make_rc_req(struct ipath_qp *qp,
  197. struct ipath_other_headers *ohdr,
  198. u32 pmtu, u32 *bth0p, u32 *bth2p)
  199. {
  200. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  201. struct ipath_sge_state *ss;
  202. struct ipath_swqe *wqe;
  203. u32 hwords;
  204. u32 len;
  205. u32 bth0;
  206. u32 bth2;
  207. char newreq;
  208. /* Sending responses has higher priority over sending requests. */
  209. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  210. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  211. qp->s_ack_state != IB_OPCODE_RC_ACKNOWLEDGE) &&
  212. ipath_make_rc_ack(qp, ohdr, pmtu, bth0p, bth2p))
  213. goto done;
  214. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  215. qp->s_rnr_timeout || qp->s_wait_credit)
  216. goto bail;
  217. /* Limit the number of packets sent without an ACK. */
  218. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
  219. qp->s_wait_credit = 1;
  220. dev->n_rc_stalls++;
  221. goto bail;
  222. }
  223. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  224. hwords = 5;
  225. bth0 = 0;
  226. /* Send a request. */
  227. wqe = get_swqe_ptr(qp, qp->s_cur);
  228. switch (qp->s_state) {
  229. default:
  230. /*
  231. * Resend an old request or start a new one.
  232. *
  233. * We keep track of the current SWQE so that
  234. * we don't reset the "furthest progress" state
  235. * if we need to back up.
  236. */
  237. newreq = 0;
  238. if (qp->s_cur == qp->s_tail) {
  239. /* Check if send work queue is empty. */
  240. if (qp->s_tail == qp->s_head)
  241. goto bail;
  242. /*
  243. * If a fence is requested, wait for previous
  244. * RDMA read and atomic operations to finish.
  245. */
  246. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  247. qp->s_num_rd_atomic) {
  248. qp->s_flags |= IPATH_S_FENCE_PENDING;
  249. goto bail;
  250. }
  251. wqe->psn = qp->s_next_psn;
  252. newreq = 1;
  253. }
  254. /*
  255. * Note that we have to be careful not to modify the
  256. * original work request since we may need to resend
  257. * it.
  258. */
  259. len = wqe->length;
  260. ss = &qp->s_sge;
  261. bth2 = 0;
  262. switch (wqe->wr.opcode) {
  263. case IB_WR_SEND:
  264. case IB_WR_SEND_WITH_IMM:
  265. /* If no credit, return. */
  266. if (qp->s_lsn != (u32) -1 &&
  267. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  268. goto bail;
  269. wqe->lpsn = wqe->psn;
  270. if (len > pmtu) {
  271. wqe->lpsn += (len - 1) / pmtu;
  272. qp->s_state = OP(SEND_FIRST);
  273. len = pmtu;
  274. break;
  275. }
  276. if (wqe->wr.opcode == IB_WR_SEND)
  277. qp->s_state = OP(SEND_ONLY);
  278. else {
  279. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  280. /* Immediate data comes after the BTH */
  281. ohdr->u.imm_data = wqe->wr.imm_data;
  282. hwords += 1;
  283. }
  284. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  285. bth0 |= 1 << 23;
  286. bth2 = 1 << 31; /* Request ACK. */
  287. if (++qp->s_cur == qp->s_size)
  288. qp->s_cur = 0;
  289. break;
  290. case IB_WR_RDMA_WRITE:
  291. if (newreq && qp->s_lsn != (u32) -1)
  292. qp->s_lsn++;
  293. /* FALLTHROUGH */
  294. case IB_WR_RDMA_WRITE_WITH_IMM:
  295. /* If no credit, return. */
  296. if (qp->s_lsn != (u32) -1 &&
  297. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  298. goto bail;
  299. ohdr->u.rc.reth.vaddr =
  300. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  301. ohdr->u.rc.reth.rkey =
  302. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  303. ohdr->u.rc.reth.length = cpu_to_be32(len);
  304. hwords += sizeof(struct ib_reth) / sizeof(u32);
  305. wqe->lpsn = wqe->psn;
  306. if (len > pmtu) {
  307. wqe->lpsn += (len - 1) / pmtu;
  308. qp->s_state = OP(RDMA_WRITE_FIRST);
  309. len = pmtu;
  310. break;
  311. }
  312. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  313. qp->s_state = OP(RDMA_WRITE_ONLY);
  314. else {
  315. qp->s_state =
  316. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  317. /* Immediate data comes after RETH */
  318. ohdr->u.rc.imm_data = wqe->wr.imm_data;
  319. hwords += 1;
  320. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  321. bth0 |= 1 << 23;
  322. }
  323. bth2 = 1 << 31; /* Request ACK. */
  324. if (++qp->s_cur == qp->s_size)
  325. qp->s_cur = 0;
  326. break;
  327. case IB_WR_RDMA_READ:
  328. /*
  329. * Don't allow more operations to be started
  330. * than the QP limits allow.
  331. */
  332. if (newreq) {
  333. if (qp->s_num_rd_atomic >=
  334. qp->s_max_rd_atomic) {
  335. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  336. goto bail;
  337. }
  338. qp->s_num_rd_atomic++;
  339. if (qp->s_lsn != (u32) -1)
  340. qp->s_lsn++;
  341. /*
  342. * Adjust s_next_psn to count the
  343. * expected number of responses.
  344. */
  345. if (len > pmtu)
  346. qp->s_next_psn += (len - 1) / pmtu;
  347. wqe->lpsn = qp->s_next_psn++;
  348. }
  349. ohdr->u.rc.reth.vaddr =
  350. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  351. ohdr->u.rc.reth.rkey =
  352. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  353. ohdr->u.rc.reth.length = cpu_to_be32(len);
  354. qp->s_state = OP(RDMA_READ_REQUEST);
  355. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  356. ss = NULL;
  357. len = 0;
  358. if (++qp->s_cur == qp->s_size)
  359. qp->s_cur = 0;
  360. break;
  361. case IB_WR_ATOMIC_CMP_AND_SWP:
  362. case IB_WR_ATOMIC_FETCH_AND_ADD:
  363. /*
  364. * Don't allow more operations to be started
  365. * than the QP limits allow.
  366. */
  367. if (newreq) {
  368. if (qp->s_num_rd_atomic >=
  369. qp->s_max_rd_atomic) {
  370. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  371. goto bail;
  372. }
  373. qp->s_num_rd_atomic++;
  374. if (qp->s_lsn != (u32) -1)
  375. qp->s_lsn++;
  376. wqe->lpsn = wqe->psn;
  377. }
  378. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  379. qp->s_state = OP(COMPARE_SWAP);
  380. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  381. wqe->wr.wr.atomic.swap);
  382. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  383. wqe->wr.wr.atomic.compare_add);
  384. } else {
  385. qp->s_state = OP(FETCH_ADD);
  386. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  387. wqe->wr.wr.atomic.compare_add);
  388. ohdr->u.atomic_eth.compare_data = 0;
  389. }
  390. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  391. wqe->wr.wr.atomic.remote_addr >> 32);
  392. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  393. wqe->wr.wr.atomic.remote_addr);
  394. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  395. wqe->wr.wr.atomic.rkey);
  396. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  397. ss = NULL;
  398. len = 0;
  399. if (++qp->s_cur == qp->s_size)
  400. qp->s_cur = 0;
  401. break;
  402. default:
  403. goto bail;
  404. }
  405. qp->s_sge.sge = wqe->sg_list[0];
  406. qp->s_sge.sg_list = wqe->sg_list + 1;
  407. qp->s_sge.num_sge = wqe->wr.num_sge;
  408. qp->s_len = wqe->length;
  409. if (newreq) {
  410. qp->s_tail++;
  411. if (qp->s_tail >= qp->s_size)
  412. qp->s_tail = 0;
  413. }
  414. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  415. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  416. qp->s_psn = wqe->lpsn + 1;
  417. else {
  418. qp->s_psn++;
  419. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  420. qp->s_next_psn = qp->s_psn;
  421. }
  422. /*
  423. * Put the QP on the pending list so lost ACKs will cause
  424. * a retry. More than one request can be pending so the
  425. * QP may already be on the dev->pending list.
  426. */
  427. spin_lock(&dev->pending_lock);
  428. if (list_empty(&qp->timerwait))
  429. list_add_tail(&qp->timerwait,
  430. &dev->pending[dev->pending_index]);
  431. spin_unlock(&dev->pending_lock);
  432. break;
  433. case OP(RDMA_READ_RESPONSE_FIRST):
  434. /*
  435. * This case can only happen if a send is restarted.
  436. * See ipath_restart_rc().
  437. */
  438. ipath_init_restart(qp, wqe);
  439. /* FALLTHROUGH */
  440. case OP(SEND_FIRST):
  441. qp->s_state = OP(SEND_MIDDLE);
  442. /* FALLTHROUGH */
  443. case OP(SEND_MIDDLE):
  444. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  445. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  446. qp->s_next_psn = qp->s_psn;
  447. ss = &qp->s_sge;
  448. len = qp->s_len;
  449. if (len > pmtu) {
  450. len = pmtu;
  451. break;
  452. }
  453. if (wqe->wr.opcode == IB_WR_SEND)
  454. qp->s_state = OP(SEND_LAST);
  455. else {
  456. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  457. /* Immediate data comes after the BTH */
  458. ohdr->u.imm_data = wqe->wr.imm_data;
  459. hwords += 1;
  460. }
  461. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  462. bth0 |= 1 << 23;
  463. bth2 |= 1 << 31; /* Request ACK. */
  464. qp->s_cur++;
  465. if (qp->s_cur >= qp->s_size)
  466. qp->s_cur = 0;
  467. break;
  468. case OP(RDMA_READ_RESPONSE_LAST):
  469. /*
  470. * This case can only happen if a RDMA write is restarted.
  471. * See ipath_restart_rc().
  472. */
  473. ipath_init_restart(qp, wqe);
  474. /* FALLTHROUGH */
  475. case OP(RDMA_WRITE_FIRST):
  476. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  477. /* FALLTHROUGH */
  478. case OP(RDMA_WRITE_MIDDLE):
  479. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  480. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  481. qp->s_next_psn = qp->s_psn;
  482. ss = &qp->s_sge;
  483. len = qp->s_len;
  484. if (len > pmtu) {
  485. len = pmtu;
  486. break;
  487. }
  488. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  489. qp->s_state = OP(RDMA_WRITE_LAST);
  490. else {
  491. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  492. /* Immediate data comes after the BTH */
  493. ohdr->u.imm_data = wqe->wr.imm_data;
  494. hwords += 1;
  495. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  496. bth0 |= 1 << 23;
  497. }
  498. bth2 |= 1 << 31; /* Request ACK. */
  499. qp->s_cur++;
  500. if (qp->s_cur >= qp->s_size)
  501. qp->s_cur = 0;
  502. break;
  503. case OP(RDMA_READ_RESPONSE_MIDDLE):
  504. /*
  505. * This case can only happen if a RDMA read is restarted.
  506. * See ipath_restart_rc().
  507. */
  508. ipath_init_restart(qp, wqe);
  509. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  510. ohdr->u.rc.reth.vaddr =
  511. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  512. ohdr->u.rc.reth.rkey =
  513. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  514. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  515. qp->s_state = OP(RDMA_READ_REQUEST);
  516. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  517. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  518. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  519. qp->s_next_psn = qp->s_psn;
  520. ss = NULL;
  521. len = 0;
  522. qp->s_cur++;
  523. if (qp->s_cur == qp->s_size)
  524. qp->s_cur = 0;
  525. break;
  526. }
  527. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  528. bth2 |= 1 << 31; /* Request ACK. */
  529. qp->s_len -= len;
  530. qp->s_hdrwords = hwords;
  531. qp->s_cur_sge = ss;
  532. qp->s_cur_size = len;
  533. *bth0p = bth0 | (qp->s_state << 24);
  534. *bth2p = bth2;
  535. done:
  536. return 1;
  537. bail:
  538. return 0;
  539. }
  540. /**
  541. * send_rc_ack - Construct an ACK packet and send it
  542. * @qp: a pointer to the QP
  543. *
  544. * This is called from ipath_rc_rcv() and only uses the receive
  545. * side QP state.
  546. * Note that RDMA reads and atomics are handled in the
  547. * send side QP state and tasklet.
  548. */
  549. static void send_rc_ack(struct ipath_qp *qp)
  550. {
  551. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  552. u16 lrh0;
  553. u32 bth0;
  554. u32 hwords;
  555. struct ipath_ib_header hdr;
  556. struct ipath_other_headers *ohdr;
  557. unsigned long flags;
  558. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  559. if (qp->r_head_ack_queue != qp->s_tail_ack_queue)
  560. goto queue_ack;
  561. /* Construct the header. */
  562. ohdr = &hdr.u.oth;
  563. lrh0 = IPATH_LRH_BTH;
  564. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  565. hwords = 6;
  566. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  567. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  568. &qp->remote_ah_attr.grh,
  569. hwords, 0);
  570. ohdr = &hdr.u.l.oth;
  571. lrh0 = IPATH_LRH_GRH;
  572. }
  573. /* read pkey_index w/o lock (its atomic) */
  574. bth0 = ipath_get_pkey(dev->dd, qp->s_pkey_index) |
  575. OP(ACKNOWLEDGE) << 24;
  576. if (qp->r_nak_state)
  577. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  578. (qp->r_nak_state <<
  579. IPATH_AETH_CREDIT_SHIFT));
  580. else
  581. ohdr->u.aeth = ipath_compute_aeth(qp);
  582. lrh0 |= qp->remote_ah_attr.sl << 4;
  583. hdr.lrh[0] = cpu_to_be16(lrh0);
  584. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  585. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  586. hdr.lrh[3] = cpu_to_be16(dev->dd->ipath_lid);
  587. ohdr->bth[0] = cpu_to_be32(bth0);
  588. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  589. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  590. /*
  591. * If we can send the ACK, clear the ACK state.
  592. */
  593. if (ipath_verbs_send(dev->dd, hwords, (u32 *) &hdr, 0, NULL) == 0) {
  594. dev->n_unicast_xmit++;
  595. goto done;
  596. }
  597. /*
  598. * We are out of PIO buffers at the moment.
  599. * Pass responsibility for sending the ACK to the
  600. * send tasklet so that when a PIO buffer becomes
  601. * available, the ACK is sent ahead of other outgoing
  602. * packets.
  603. */
  604. dev->n_rc_qacks++;
  605. queue_ack:
  606. spin_lock_irqsave(&qp->s_lock, flags);
  607. qp->s_flags |= IPATH_S_ACK_PENDING;
  608. qp->s_nak_state = qp->r_nak_state;
  609. qp->s_ack_psn = qp->r_ack_psn;
  610. spin_unlock_irqrestore(&qp->s_lock, flags);
  611. /* Call ipath_do_rc_send() in another thread. */
  612. tasklet_hi_schedule(&qp->s_task);
  613. done:
  614. return;
  615. }
  616. /**
  617. * reset_psn - reset the QP state to send starting from PSN
  618. * @qp: the QP
  619. * @psn: the packet sequence number to restart at
  620. *
  621. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  622. * for the given QP.
  623. * Called at interrupt level with the QP s_lock held.
  624. */
  625. static void reset_psn(struct ipath_qp *qp, u32 psn)
  626. {
  627. u32 n = qp->s_last;
  628. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  629. u32 opcode;
  630. qp->s_cur = n;
  631. /*
  632. * If we are starting the request from the beginning,
  633. * let the normal send code handle initialization.
  634. */
  635. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  636. qp->s_state = OP(SEND_LAST);
  637. goto done;
  638. }
  639. /* Find the work request opcode corresponding to the given PSN. */
  640. opcode = wqe->wr.opcode;
  641. for (;;) {
  642. int diff;
  643. if (++n == qp->s_size)
  644. n = 0;
  645. if (n == qp->s_tail)
  646. break;
  647. wqe = get_swqe_ptr(qp, n);
  648. diff = ipath_cmp24(psn, wqe->psn);
  649. if (diff < 0)
  650. break;
  651. qp->s_cur = n;
  652. /*
  653. * If we are starting the request from the beginning,
  654. * let the normal send code handle initialization.
  655. */
  656. if (diff == 0) {
  657. qp->s_state = OP(SEND_LAST);
  658. goto done;
  659. }
  660. opcode = wqe->wr.opcode;
  661. }
  662. /*
  663. * Set the state to restart in the middle of a request.
  664. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  665. * See ipath_do_rc_send().
  666. */
  667. switch (opcode) {
  668. case IB_WR_SEND:
  669. case IB_WR_SEND_WITH_IMM:
  670. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  671. break;
  672. case IB_WR_RDMA_WRITE:
  673. case IB_WR_RDMA_WRITE_WITH_IMM:
  674. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  675. break;
  676. case IB_WR_RDMA_READ:
  677. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  678. break;
  679. default:
  680. /*
  681. * This case shouldn't happen since its only
  682. * one PSN per req.
  683. */
  684. qp->s_state = OP(SEND_LAST);
  685. }
  686. done:
  687. qp->s_psn = psn;
  688. }
  689. /**
  690. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  691. * @qp: the QP to restart
  692. * @psn: packet sequence number for the request
  693. * @wc: the work completion request
  694. *
  695. * The QP s_lock should be held and interrupts disabled.
  696. */
  697. void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
  698. {
  699. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  700. struct ipath_ibdev *dev;
  701. if (qp->s_retry == 0) {
  702. wc->wr_id = wqe->wr.wr_id;
  703. wc->status = IB_WC_RETRY_EXC_ERR;
  704. wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  705. wc->vendor_err = 0;
  706. wc->byte_len = 0;
  707. wc->qp = &qp->ibqp;
  708. wc->src_qp = qp->remote_qpn;
  709. wc->pkey_index = 0;
  710. wc->slid = qp->remote_ah_attr.dlid;
  711. wc->sl = qp->remote_ah_attr.sl;
  712. wc->dlid_path_bits = 0;
  713. wc->port_num = 0;
  714. ipath_sqerror_qp(qp, wc);
  715. goto bail;
  716. }
  717. qp->s_retry--;
  718. /*
  719. * Remove the QP from the timeout queue.
  720. * Note: it may already have been removed by ipath_ib_timer().
  721. */
  722. dev = to_idev(qp->ibqp.device);
  723. spin_lock(&dev->pending_lock);
  724. if (!list_empty(&qp->timerwait))
  725. list_del_init(&qp->timerwait);
  726. spin_unlock(&dev->pending_lock);
  727. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  728. dev->n_rc_resends++;
  729. else
  730. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  731. reset_psn(qp, psn);
  732. tasklet_hi_schedule(&qp->s_task);
  733. bail:
  734. return;
  735. }
  736. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  737. {
  738. if (qp->s_wait_credit) {
  739. qp->s_wait_credit = 0;
  740. tasklet_hi_schedule(&qp->s_task);
  741. }
  742. qp->s_last_psn = psn;
  743. }
  744. /**
  745. * do_rc_ack - process an incoming RC ACK
  746. * @qp: the QP the ACK came in on
  747. * @psn: the packet sequence number of the ACK
  748. * @opcode: the opcode of the request that resulted in the ACK
  749. *
  750. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  751. * for the given QP.
  752. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  753. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  754. */
  755. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode)
  756. {
  757. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  758. struct ib_wc wc;
  759. struct ipath_swqe *wqe;
  760. int ret = 0;
  761. u32 ack_psn;
  762. /*
  763. * Remove the QP from the timeout queue (or RNR timeout queue).
  764. * If ipath_ib_timer() has already removed it,
  765. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  766. * just won't find anything to restart if we ACK everything.
  767. */
  768. spin_lock(&dev->pending_lock);
  769. if (!list_empty(&qp->timerwait))
  770. list_del_init(&qp->timerwait);
  771. spin_unlock(&dev->pending_lock);
  772. /*
  773. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  774. * requests and implicitly NAK RDMA read and atomic requests issued
  775. * before the NAK'ed request. The MSN won't include the NAK'ed
  776. * request but will include an ACK'ed request(s).
  777. */
  778. ack_psn = psn;
  779. if (aeth >> 29)
  780. ack_psn--;
  781. wqe = get_swqe_ptr(qp, qp->s_last);
  782. /*
  783. * The MSN might be for a later WQE than the PSN indicates so
  784. * only complete WQEs that the PSN finishes.
  785. */
  786. while (ipath_cmp24(ack_psn, wqe->lpsn) >= 0) {
  787. /*
  788. * If this request is a RDMA read or atomic, and the ACK is
  789. * for a later operation, this ACK NAKs the RDMA read or
  790. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  791. * can ACK a RDMA read and likewise for atomic ops. Note
  792. * that the NAK case can only happen if relaxed ordering is
  793. * used and requests are sent after an RDMA read or atomic
  794. * is sent but before the response is received.
  795. */
  796. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  797. (opcode != OP(RDMA_READ_RESPONSE_LAST) ||
  798. ipath_cmp24(ack_psn, wqe->lpsn) != 0)) ||
  799. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  800. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  801. (opcode != OP(ATOMIC_ACKNOWLEDGE) ||
  802. ipath_cmp24(wqe->psn, psn) != 0))) {
  803. /*
  804. * The last valid PSN seen is the previous
  805. * request's.
  806. */
  807. update_last_psn(qp, wqe->psn - 1);
  808. /* Retry this request. */
  809. ipath_restart_rc(qp, wqe->psn, &wc);
  810. /*
  811. * No need to process the ACK/NAK since we are
  812. * restarting an earlier request.
  813. */
  814. goto bail;
  815. }
  816. if (qp->s_num_rd_atomic &&
  817. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  818. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  819. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  820. qp->s_num_rd_atomic--;
  821. /* Restart sending task if fence is complete */
  822. if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  823. !qp->s_num_rd_atomic) {
  824. qp->s_flags &= ~IPATH_S_FENCE_PENDING;
  825. tasklet_hi_schedule(&qp->s_task);
  826. } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
  827. qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
  828. tasklet_hi_schedule(&qp->s_task);
  829. }
  830. }
  831. /* Post a send completion queue entry if requested. */
  832. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  833. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  834. wc.wr_id = wqe->wr.wr_id;
  835. wc.status = IB_WC_SUCCESS;
  836. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  837. wc.vendor_err = 0;
  838. wc.byte_len = wqe->length;
  839. wc.imm_data = 0;
  840. wc.qp = &qp->ibqp;
  841. wc.src_qp = qp->remote_qpn;
  842. wc.wc_flags = 0;
  843. wc.pkey_index = 0;
  844. wc.slid = qp->remote_ah_attr.dlid;
  845. wc.sl = qp->remote_ah_attr.sl;
  846. wc.dlid_path_bits = 0;
  847. wc.port_num = 0;
  848. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  849. }
  850. qp->s_retry = qp->s_retry_cnt;
  851. /*
  852. * If we are completing a request which is in the process of
  853. * being resent, we can stop resending it since we know the
  854. * responder has already seen it.
  855. */
  856. if (qp->s_last == qp->s_cur) {
  857. if (++qp->s_cur >= qp->s_size)
  858. qp->s_cur = 0;
  859. qp->s_last = qp->s_cur;
  860. if (qp->s_last == qp->s_tail)
  861. break;
  862. wqe = get_swqe_ptr(qp, qp->s_cur);
  863. qp->s_state = OP(SEND_LAST);
  864. qp->s_psn = wqe->psn;
  865. } else {
  866. if (++qp->s_last >= qp->s_size)
  867. qp->s_last = 0;
  868. if (qp->s_last == qp->s_tail)
  869. break;
  870. wqe = get_swqe_ptr(qp, qp->s_last);
  871. }
  872. }
  873. switch (aeth >> 29) {
  874. case 0: /* ACK */
  875. dev->n_rc_acks++;
  876. /* If this is a partial ACK, reset the retransmit timer. */
  877. if (qp->s_last != qp->s_tail) {
  878. spin_lock(&dev->pending_lock);
  879. list_add_tail(&qp->timerwait,
  880. &dev->pending[dev->pending_index]);
  881. spin_unlock(&dev->pending_lock);
  882. /*
  883. * If we get a partial ACK for a resent operation,
  884. * we can stop resending the earlier packets and
  885. * continue with the next packet the receiver wants.
  886. */
  887. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  888. reset_psn(qp, psn + 1);
  889. tasklet_hi_schedule(&qp->s_task);
  890. }
  891. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  892. qp->s_state = OP(SEND_LAST);
  893. qp->s_psn = psn + 1;
  894. }
  895. ipath_get_credit(qp, aeth);
  896. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  897. qp->s_retry = qp->s_retry_cnt;
  898. update_last_psn(qp, psn);
  899. ret = 1;
  900. goto bail;
  901. case 1: /* RNR NAK */
  902. dev->n_rnr_naks++;
  903. if (qp->s_last == qp->s_tail)
  904. goto bail;
  905. if (qp->s_rnr_retry == 0) {
  906. wc.status = IB_WC_RNR_RETRY_EXC_ERR;
  907. goto class_b;
  908. }
  909. if (qp->s_rnr_retry_cnt < 7)
  910. qp->s_rnr_retry--;
  911. /* The last valid PSN is the previous PSN. */
  912. update_last_psn(qp, psn - 1);
  913. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  914. dev->n_rc_resends++;
  915. else
  916. dev->n_rc_resends +=
  917. (qp->s_psn - psn) & IPATH_PSN_MASK;
  918. reset_psn(qp, psn);
  919. qp->s_rnr_timeout =
  920. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  921. IPATH_AETH_CREDIT_MASK];
  922. ipath_insert_rnr_queue(qp);
  923. goto bail;
  924. case 3: /* NAK */
  925. if (qp->s_last == qp->s_tail)
  926. goto bail;
  927. /* The last valid PSN is the previous PSN. */
  928. update_last_psn(qp, psn - 1);
  929. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  930. IPATH_AETH_CREDIT_MASK) {
  931. case 0: /* PSN sequence error */
  932. dev->n_seq_naks++;
  933. /*
  934. * Back up to the responder's expected PSN.
  935. * Note that we might get a NAK in the middle of an
  936. * RDMA READ response which terminates the RDMA
  937. * READ.
  938. */
  939. ipath_restart_rc(qp, psn, &wc);
  940. break;
  941. case 1: /* Invalid Request */
  942. wc.status = IB_WC_REM_INV_REQ_ERR;
  943. dev->n_other_naks++;
  944. goto class_b;
  945. case 2: /* Remote Access Error */
  946. wc.status = IB_WC_REM_ACCESS_ERR;
  947. dev->n_other_naks++;
  948. goto class_b;
  949. case 3: /* Remote Operation Error */
  950. wc.status = IB_WC_REM_OP_ERR;
  951. dev->n_other_naks++;
  952. class_b:
  953. wc.wr_id = wqe->wr.wr_id;
  954. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  955. wc.vendor_err = 0;
  956. wc.byte_len = 0;
  957. wc.qp = &qp->ibqp;
  958. wc.src_qp = qp->remote_qpn;
  959. wc.pkey_index = 0;
  960. wc.slid = qp->remote_ah_attr.dlid;
  961. wc.sl = qp->remote_ah_attr.sl;
  962. wc.dlid_path_bits = 0;
  963. wc.port_num = 0;
  964. ipath_sqerror_qp(qp, &wc);
  965. break;
  966. default:
  967. /* Ignore other reserved NAK error codes */
  968. goto reserved;
  969. }
  970. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  971. goto bail;
  972. default: /* 2: reserved */
  973. reserved:
  974. /* Ignore reserved NAK codes. */
  975. goto bail;
  976. }
  977. bail:
  978. return ret;
  979. }
  980. /**
  981. * ipath_rc_rcv_resp - process an incoming RC response packet
  982. * @dev: the device this packet came in on
  983. * @ohdr: the other headers for this packet
  984. * @data: the packet data
  985. * @tlen: the packet length
  986. * @qp: the QP for this packet
  987. * @opcode: the opcode for this packet
  988. * @psn: the packet sequence number for this packet
  989. * @hdrsize: the header length
  990. * @pmtu: the path MTU
  991. * @header_in_data: true if part of the header data is in the data buffer
  992. *
  993. * This is called from ipath_rc_rcv() to process an incoming RC response
  994. * packet for the given QP.
  995. * Called at interrupt level.
  996. */
  997. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  998. struct ipath_other_headers *ohdr,
  999. void *data, u32 tlen,
  1000. struct ipath_qp *qp,
  1001. u32 opcode,
  1002. u32 psn, u32 hdrsize, u32 pmtu,
  1003. int header_in_data)
  1004. {
  1005. struct ipath_swqe *wqe;
  1006. unsigned long flags;
  1007. struct ib_wc wc;
  1008. int diff;
  1009. u32 pad;
  1010. u32 aeth;
  1011. spin_lock_irqsave(&qp->s_lock, flags);
  1012. /* Ignore invalid responses. */
  1013. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1014. goto ack_done;
  1015. /* Ignore duplicate responses. */
  1016. diff = ipath_cmp24(psn, qp->s_last_psn);
  1017. if (unlikely(diff <= 0)) {
  1018. /* Update credits for "ghost" ACKs */
  1019. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1020. if (!header_in_data)
  1021. aeth = be32_to_cpu(ohdr->u.aeth);
  1022. else {
  1023. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1024. data += sizeof(__be32);
  1025. }
  1026. if ((aeth >> 29) == 0)
  1027. ipath_get_credit(qp, aeth);
  1028. }
  1029. goto ack_done;
  1030. }
  1031. if (unlikely(qp->s_last == qp->s_tail))
  1032. goto ack_done;
  1033. wqe = get_swqe_ptr(qp, qp->s_last);
  1034. switch (opcode) {
  1035. case OP(ACKNOWLEDGE):
  1036. case OP(ATOMIC_ACKNOWLEDGE):
  1037. case OP(RDMA_READ_RESPONSE_FIRST):
  1038. if (!header_in_data)
  1039. aeth = be32_to_cpu(ohdr->u.aeth);
  1040. else {
  1041. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1042. data += sizeof(__be32);
  1043. }
  1044. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1045. u64 val;
  1046. if (!header_in_data) {
  1047. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1048. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1049. be32_to_cpu(p[1]);
  1050. } else
  1051. val = be64_to_cpu(((__be64 *) data)[0]);
  1052. *(u64 *) wqe->sg_list[0].vaddr = val;
  1053. }
  1054. if (!do_rc_ack(qp, aeth, psn, opcode) ||
  1055. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1056. goto ack_done;
  1057. hdrsize += 4;
  1058. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1059. goto ack_op_err;
  1060. /*
  1061. * If this is a response to a resent RDMA read, we
  1062. * have to be careful to copy the data to the right
  1063. * location.
  1064. */
  1065. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1066. wqe, psn, pmtu);
  1067. goto read_middle;
  1068. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1069. /* no AETH, no ACK */
  1070. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1071. dev->n_rdma_seq++;
  1072. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1073. goto ack_done;
  1074. }
  1075. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1076. goto ack_op_err;
  1077. read_middle:
  1078. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1079. goto ack_len_err;
  1080. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1081. goto ack_len_err;
  1082. /* We got a response so update the timeout. */
  1083. spin_lock(&dev->pending_lock);
  1084. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1085. list_move_tail(&qp->timerwait,
  1086. &dev->pending[dev->pending_index]);
  1087. spin_unlock(&dev->pending_lock);
  1088. /*
  1089. * Update the RDMA receive state but do the copy w/o
  1090. * holding the locks and blocking interrupts.
  1091. */
  1092. qp->s_rdma_read_len -= pmtu;
  1093. update_last_psn(qp, psn);
  1094. spin_unlock_irqrestore(&qp->s_lock, flags);
  1095. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1096. goto bail;
  1097. case OP(RDMA_READ_RESPONSE_ONLY):
  1098. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1099. dev->n_rdma_seq++;
  1100. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1101. goto ack_done;
  1102. }
  1103. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1104. goto ack_op_err;
  1105. /* Get the number of bytes the message was padded by. */
  1106. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1107. /*
  1108. * Check that the data size is >= 0 && <= pmtu.
  1109. * Remember to account for the AETH header (4) and
  1110. * ICRC (4).
  1111. */
  1112. if (unlikely(tlen < (hdrsize + pad + 8)))
  1113. goto ack_len_err;
  1114. /*
  1115. * If this is a response to a resent RDMA read, we
  1116. * have to be careful to copy the data to the right
  1117. * location.
  1118. */
  1119. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1120. wqe, psn, pmtu);
  1121. goto read_last;
  1122. case OP(RDMA_READ_RESPONSE_LAST):
  1123. /* ACKs READ req. */
  1124. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1125. dev->n_rdma_seq++;
  1126. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1127. goto ack_done;
  1128. }
  1129. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1130. goto ack_op_err;
  1131. /* Get the number of bytes the message was padded by. */
  1132. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1133. /*
  1134. * Check that the data size is >= 1 && <= pmtu.
  1135. * Remember to account for the AETH header (4) and
  1136. * ICRC (4).
  1137. */
  1138. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1139. goto ack_len_err;
  1140. read_last:
  1141. tlen -= hdrsize + pad + 8;
  1142. if (unlikely(tlen != qp->s_rdma_read_len))
  1143. goto ack_len_err;
  1144. if (!header_in_data)
  1145. aeth = be32_to_cpu(ohdr->u.aeth);
  1146. else {
  1147. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1148. data += sizeof(__be32);
  1149. }
  1150. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1151. (void) do_rc_ack(qp, aeth, psn, OP(RDMA_READ_RESPONSE_LAST));
  1152. goto ack_done;
  1153. }
  1154. ack_done:
  1155. spin_unlock_irqrestore(&qp->s_lock, flags);
  1156. goto bail;
  1157. ack_op_err:
  1158. wc.status = IB_WC_LOC_QP_OP_ERR;
  1159. goto ack_err;
  1160. ack_len_err:
  1161. wc.status = IB_WC_LOC_LEN_ERR;
  1162. ack_err:
  1163. wc.wr_id = wqe->wr.wr_id;
  1164. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  1165. wc.vendor_err = 0;
  1166. wc.byte_len = 0;
  1167. wc.imm_data = 0;
  1168. wc.qp = &qp->ibqp;
  1169. wc.src_qp = qp->remote_qpn;
  1170. wc.wc_flags = 0;
  1171. wc.pkey_index = 0;
  1172. wc.slid = qp->remote_ah_attr.dlid;
  1173. wc.sl = qp->remote_ah_attr.sl;
  1174. wc.dlid_path_bits = 0;
  1175. wc.port_num = 0;
  1176. ipath_sqerror_qp(qp, &wc);
  1177. bail:
  1178. return;
  1179. }
  1180. /**
  1181. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1182. * @dev: the device this packet came in on
  1183. * @ohdr: the other headers for this packet
  1184. * @data: the packet data
  1185. * @qp: the QP for this packet
  1186. * @opcode: the opcode for this packet
  1187. * @psn: the packet sequence number for this packet
  1188. * @diff: the difference between the PSN and the expected PSN
  1189. * @header_in_data: true if part of the header data is in the data buffer
  1190. *
  1191. * This is called from ipath_rc_rcv() to process an unexpected
  1192. * incoming RC packet for the given QP.
  1193. * Called at interrupt level.
  1194. * Return 1 if no more processing is needed; otherwise return 0 to
  1195. * schedule a response to be sent.
  1196. */
  1197. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1198. struct ipath_other_headers *ohdr,
  1199. void *data,
  1200. struct ipath_qp *qp,
  1201. u32 opcode,
  1202. u32 psn,
  1203. int diff,
  1204. int header_in_data)
  1205. {
  1206. struct ipath_ack_entry *e;
  1207. u8 i, prev;
  1208. int old_req;
  1209. unsigned long flags;
  1210. if (diff > 0) {
  1211. /*
  1212. * Packet sequence error.
  1213. * A NAK will ACK earlier sends and RDMA writes.
  1214. * Don't queue the NAK if we already sent one.
  1215. */
  1216. if (!qp->r_nak_state) {
  1217. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1218. /* Use the expected PSN. */
  1219. qp->r_ack_psn = qp->r_psn;
  1220. goto send_ack;
  1221. }
  1222. goto done;
  1223. }
  1224. /*
  1225. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1226. * write or atomic op. Don't NAK errors, just silently drop
  1227. * the duplicate request. Note that r_sge, r_len, and
  1228. * r_rcv_len may be in use so don't modify them.
  1229. *
  1230. * We are supposed to ACK the earliest duplicate PSN but we
  1231. * can coalesce an outstanding duplicate ACK. We have to
  1232. * send the earliest so that RDMA reads can be restarted at
  1233. * the requester's expected PSN.
  1234. *
  1235. * First, find where this duplicate PSN falls within the
  1236. * ACKs previously sent.
  1237. */
  1238. psn &= IPATH_PSN_MASK;
  1239. e = NULL;
  1240. old_req = 1;
  1241. spin_lock_irqsave(&qp->s_lock, flags);
  1242. for (i = qp->r_head_ack_queue; ; i = prev) {
  1243. if (i == qp->s_tail_ack_queue)
  1244. old_req = 0;
  1245. if (i)
  1246. prev = i - 1;
  1247. else
  1248. prev = IPATH_MAX_RDMA_ATOMIC;
  1249. if (prev == qp->r_head_ack_queue) {
  1250. e = NULL;
  1251. break;
  1252. }
  1253. e = &qp->s_ack_queue[prev];
  1254. if (!e->opcode) {
  1255. e = NULL;
  1256. break;
  1257. }
  1258. if (ipath_cmp24(psn, e->psn) >= 0)
  1259. break;
  1260. }
  1261. switch (opcode) {
  1262. case OP(RDMA_READ_REQUEST): {
  1263. struct ib_reth *reth;
  1264. u32 offset;
  1265. u32 len;
  1266. /*
  1267. * If we didn't find the RDMA read request in the ack queue,
  1268. * or the send tasklet is already backed up to send an
  1269. * earlier entry, we can ignore this request.
  1270. */
  1271. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1272. goto unlock_done;
  1273. /* RETH comes after BTH */
  1274. if (!header_in_data)
  1275. reth = &ohdr->u.rc.reth;
  1276. else {
  1277. reth = (struct ib_reth *)data;
  1278. data += sizeof(*reth);
  1279. }
  1280. /*
  1281. * Address range must be a subset of the original
  1282. * request and start on pmtu boundaries.
  1283. * We reuse the old ack_queue slot since the requester
  1284. * should not back up and request an earlier PSN for the
  1285. * same request.
  1286. */
  1287. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1288. ib_mtu_enum_to_int(qp->path_mtu);
  1289. len = be32_to_cpu(reth->length);
  1290. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1291. goto unlock_done;
  1292. if (len != 0) {
  1293. u32 rkey = be32_to_cpu(reth->rkey);
  1294. u64 vaddr = be64_to_cpu(reth->vaddr);
  1295. int ok;
  1296. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1297. len, vaddr, rkey,
  1298. IB_ACCESS_REMOTE_READ);
  1299. if (unlikely(!ok))
  1300. goto unlock_done;
  1301. } else {
  1302. e->rdma_sge.sg_list = NULL;
  1303. e->rdma_sge.num_sge = 0;
  1304. e->rdma_sge.sge.mr = NULL;
  1305. e->rdma_sge.sge.vaddr = NULL;
  1306. e->rdma_sge.sge.length = 0;
  1307. e->rdma_sge.sge.sge_length = 0;
  1308. }
  1309. e->psn = psn;
  1310. qp->s_ack_state = OP(ACKNOWLEDGE);
  1311. qp->s_tail_ack_queue = prev;
  1312. break;
  1313. }
  1314. case OP(COMPARE_SWAP):
  1315. case OP(FETCH_ADD): {
  1316. /*
  1317. * If we didn't find the atomic request in the ack queue
  1318. * or the send tasklet is already backed up to send an
  1319. * earlier entry, we can ignore this request.
  1320. */
  1321. if (!e || e->opcode != (u8) opcode || old_req)
  1322. goto unlock_done;
  1323. qp->s_ack_state = OP(ACKNOWLEDGE);
  1324. qp->s_tail_ack_queue = prev;
  1325. break;
  1326. }
  1327. default:
  1328. if (old_req)
  1329. goto unlock_done;
  1330. /*
  1331. * Resend the most recent ACK if this request is
  1332. * after all the previous RDMA reads and atomics.
  1333. */
  1334. if (i == qp->r_head_ack_queue) {
  1335. spin_unlock_irqrestore(&qp->s_lock, flags);
  1336. qp->r_nak_state = 0;
  1337. qp->r_ack_psn = qp->r_psn - 1;
  1338. goto send_ack;
  1339. }
  1340. /*
  1341. * Resend the RDMA read or atomic op which
  1342. * ACKs this duplicate request.
  1343. */
  1344. qp->s_ack_state = OP(ACKNOWLEDGE);
  1345. qp->s_tail_ack_queue = i;
  1346. break;
  1347. }
  1348. qp->r_nak_state = 0;
  1349. spin_unlock_irq(&qp->s_lock);
  1350. tasklet_hi_schedule(&qp->s_task);
  1351. unlock_done:
  1352. spin_unlock_irqrestore(&qp->s_lock, flags);
  1353. done:
  1354. return 1;
  1355. send_ack:
  1356. return 0;
  1357. }
  1358. static void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1359. {
  1360. unsigned long flags;
  1361. spin_lock_irqsave(&qp->s_lock, flags);
  1362. qp->state = IB_QPS_ERR;
  1363. ipath_error_qp(qp, err);
  1364. spin_unlock_irqrestore(&qp->s_lock, flags);
  1365. }
  1366. /**
  1367. * ipath_rc_rcv - process an incoming RC packet
  1368. * @dev: the device this packet came in on
  1369. * @hdr: the header of this packet
  1370. * @has_grh: true if the header has a GRH
  1371. * @data: the packet data
  1372. * @tlen: the packet length
  1373. * @qp: the QP for this packet
  1374. *
  1375. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1376. * for the given QP.
  1377. * Called at interrupt level.
  1378. */
  1379. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1380. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1381. {
  1382. struct ipath_other_headers *ohdr;
  1383. u32 opcode;
  1384. u32 hdrsize;
  1385. u32 psn;
  1386. u32 pad;
  1387. struct ib_wc wc;
  1388. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1389. int diff;
  1390. struct ib_reth *reth;
  1391. int header_in_data;
  1392. /* Validate the SLID. See Ch. 9.6.1.5 */
  1393. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1394. goto done;
  1395. /* Check for GRH */
  1396. if (!has_grh) {
  1397. ohdr = &hdr->u.oth;
  1398. hdrsize = 8 + 12; /* LRH + BTH */
  1399. psn = be32_to_cpu(ohdr->bth[2]);
  1400. header_in_data = 0;
  1401. } else {
  1402. ohdr = &hdr->u.l.oth;
  1403. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1404. /*
  1405. * The header with GRH is 60 bytes and the core driver sets
  1406. * the eager header buffer size to 56 bytes so the last 4
  1407. * bytes of the BTH header (PSN) is in the data buffer.
  1408. */
  1409. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1410. if (header_in_data) {
  1411. psn = be32_to_cpu(((__be32 *) data)[0]);
  1412. data += sizeof(__be32);
  1413. } else
  1414. psn = be32_to_cpu(ohdr->bth[2]);
  1415. }
  1416. /*
  1417. * Process responses (ACKs) before anything else. Note that the
  1418. * packet sequence number will be for something in the send work
  1419. * queue rather than the expected receive packet sequence number.
  1420. * In other words, this QP is the requester.
  1421. */
  1422. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1423. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1424. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1425. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1426. hdrsize, pmtu, header_in_data);
  1427. goto done;
  1428. }
  1429. /* Compute 24 bits worth of difference. */
  1430. diff = ipath_cmp24(psn, qp->r_psn);
  1431. if (unlikely(diff)) {
  1432. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1433. psn, diff, header_in_data))
  1434. goto done;
  1435. goto send_ack;
  1436. }
  1437. /* Check for opcode sequence errors. */
  1438. switch (qp->r_state) {
  1439. case OP(SEND_FIRST):
  1440. case OP(SEND_MIDDLE):
  1441. if (opcode == OP(SEND_MIDDLE) ||
  1442. opcode == OP(SEND_LAST) ||
  1443. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1444. break;
  1445. nack_inv:
  1446. ipath_rc_error(qp, IB_WC_REM_INV_REQ_ERR);
  1447. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1448. qp->r_ack_psn = qp->r_psn;
  1449. goto send_ack;
  1450. case OP(RDMA_WRITE_FIRST):
  1451. case OP(RDMA_WRITE_MIDDLE):
  1452. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1453. opcode == OP(RDMA_WRITE_LAST) ||
  1454. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1455. break;
  1456. goto nack_inv;
  1457. default:
  1458. if (opcode == OP(SEND_MIDDLE) ||
  1459. opcode == OP(SEND_LAST) ||
  1460. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1461. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1462. opcode == OP(RDMA_WRITE_LAST) ||
  1463. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1464. goto nack_inv;
  1465. /*
  1466. * Note that it is up to the requester to not send a new
  1467. * RDMA read or atomic operation before receiving an ACK
  1468. * for the previous operation.
  1469. */
  1470. break;
  1471. }
  1472. wc.imm_data = 0;
  1473. wc.wc_flags = 0;
  1474. /* OK, process the packet. */
  1475. switch (opcode) {
  1476. case OP(SEND_FIRST):
  1477. if (!ipath_get_rwqe(qp, 0)) {
  1478. rnr_nak:
  1479. /*
  1480. * A RNR NAK will ACK earlier sends and RDMA writes.
  1481. * Don't queue the NAK if a RDMA read or atomic
  1482. * is pending though.
  1483. */
  1484. if (qp->r_nak_state)
  1485. goto done;
  1486. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1487. qp->r_ack_psn = qp->r_psn;
  1488. goto send_ack;
  1489. }
  1490. qp->r_rcv_len = 0;
  1491. /* FALLTHROUGH */
  1492. case OP(SEND_MIDDLE):
  1493. case OP(RDMA_WRITE_MIDDLE):
  1494. send_middle:
  1495. /* Check for invalid length PMTU or posted rwqe len. */
  1496. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1497. goto nack_inv;
  1498. qp->r_rcv_len += pmtu;
  1499. if (unlikely(qp->r_rcv_len > qp->r_len))
  1500. goto nack_inv;
  1501. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1502. break;
  1503. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1504. /* consume RWQE */
  1505. if (!ipath_get_rwqe(qp, 1))
  1506. goto rnr_nak;
  1507. goto send_last_imm;
  1508. case OP(SEND_ONLY):
  1509. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1510. if (!ipath_get_rwqe(qp, 0))
  1511. goto rnr_nak;
  1512. qp->r_rcv_len = 0;
  1513. if (opcode == OP(SEND_ONLY))
  1514. goto send_last;
  1515. /* FALLTHROUGH */
  1516. case OP(SEND_LAST_WITH_IMMEDIATE):
  1517. send_last_imm:
  1518. if (header_in_data) {
  1519. wc.imm_data = *(__be32 *) data;
  1520. data += sizeof(__be32);
  1521. } else {
  1522. /* Immediate data comes after BTH */
  1523. wc.imm_data = ohdr->u.imm_data;
  1524. }
  1525. hdrsize += 4;
  1526. wc.wc_flags = IB_WC_WITH_IMM;
  1527. /* FALLTHROUGH */
  1528. case OP(SEND_LAST):
  1529. case OP(RDMA_WRITE_LAST):
  1530. send_last:
  1531. /* Get the number of bytes the message was padded by. */
  1532. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1533. /* Check for invalid length. */
  1534. /* XXX LAST len should be >= 1 */
  1535. if (unlikely(tlen < (hdrsize + pad + 4)))
  1536. goto nack_inv;
  1537. /* Don't count the CRC. */
  1538. tlen -= (hdrsize + pad + 4);
  1539. wc.byte_len = tlen + qp->r_rcv_len;
  1540. if (unlikely(wc.byte_len > qp->r_len))
  1541. goto nack_inv;
  1542. ipath_copy_sge(&qp->r_sge, data, tlen);
  1543. qp->r_msn++;
  1544. if (!qp->r_wrid_valid)
  1545. break;
  1546. qp->r_wrid_valid = 0;
  1547. wc.wr_id = qp->r_wr_id;
  1548. wc.status = IB_WC_SUCCESS;
  1549. wc.opcode = IB_WC_RECV;
  1550. wc.vendor_err = 0;
  1551. wc.qp = &qp->ibqp;
  1552. wc.src_qp = qp->remote_qpn;
  1553. wc.pkey_index = 0;
  1554. wc.slid = qp->remote_ah_attr.dlid;
  1555. wc.sl = qp->remote_ah_attr.sl;
  1556. wc.dlid_path_bits = 0;
  1557. wc.port_num = 0;
  1558. /* Signal completion event if the solicited bit is set. */
  1559. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1560. (ohdr->bth[0] &
  1561. __constant_cpu_to_be32(1 << 23)) != 0);
  1562. break;
  1563. case OP(RDMA_WRITE_FIRST):
  1564. case OP(RDMA_WRITE_ONLY):
  1565. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1566. /* consume RWQE */
  1567. /* RETH comes after BTH */
  1568. if (!header_in_data)
  1569. reth = &ohdr->u.rc.reth;
  1570. else {
  1571. reth = (struct ib_reth *)data;
  1572. data += sizeof(*reth);
  1573. }
  1574. hdrsize += sizeof(*reth);
  1575. qp->r_len = be32_to_cpu(reth->length);
  1576. qp->r_rcv_len = 0;
  1577. if (qp->r_len != 0) {
  1578. u32 rkey = be32_to_cpu(reth->rkey);
  1579. u64 vaddr = be64_to_cpu(reth->vaddr);
  1580. int ok;
  1581. /* Check rkey & NAK */
  1582. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1583. qp->r_len, vaddr, rkey,
  1584. IB_ACCESS_REMOTE_WRITE);
  1585. if (unlikely(!ok))
  1586. goto nack_acc;
  1587. } else {
  1588. qp->r_sge.sg_list = NULL;
  1589. qp->r_sge.sge.mr = NULL;
  1590. qp->r_sge.sge.vaddr = NULL;
  1591. qp->r_sge.sge.length = 0;
  1592. qp->r_sge.sge.sge_length = 0;
  1593. }
  1594. if (unlikely(!(qp->qp_access_flags &
  1595. IB_ACCESS_REMOTE_WRITE)))
  1596. goto nack_acc;
  1597. if (opcode == OP(RDMA_WRITE_FIRST))
  1598. goto send_middle;
  1599. else if (opcode == OP(RDMA_WRITE_ONLY))
  1600. goto send_last;
  1601. if (!ipath_get_rwqe(qp, 1))
  1602. goto rnr_nak;
  1603. goto send_last_imm;
  1604. case OP(RDMA_READ_REQUEST): {
  1605. struct ipath_ack_entry *e;
  1606. u32 len;
  1607. u8 next;
  1608. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1609. goto nack_acc;
  1610. next = qp->r_head_ack_queue + 1;
  1611. if (next > IPATH_MAX_RDMA_ATOMIC)
  1612. next = 0;
  1613. if (unlikely(next == qp->s_tail_ack_queue))
  1614. goto nack_inv;
  1615. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1616. /* RETH comes after BTH */
  1617. if (!header_in_data)
  1618. reth = &ohdr->u.rc.reth;
  1619. else {
  1620. reth = (struct ib_reth *)data;
  1621. data += sizeof(*reth);
  1622. }
  1623. len = be32_to_cpu(reth->length);
  1624. if (len) {
  1625. u32 rkey = be32_to_cpu(reth->rkey);
  1626. u64 vaddr = be64_to_cpu(reth->vaddr);
  1627. int ok;
  1628. /* Check rkey & NAK */
  1629. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1630. rkey, IB_ACCESS_REMOTE_READ);
  1631. if (unlikely(!ok))
  1632. goto nack_acc;
  1633. /*
  1634. * Update the next expected PSN. We add 1 later
  1635. * below, so only add the remainder here.
  1636. */
  1637. if (len > pmtu)
  1638. qp->r_psn += (len - 1) / pmtu;
  1639. } else {
  1640. e->rdma_sge.sg_list = NULL;
  1641. e->rdma_sge.num_sge = 0;
  1642. e->rdma_sge.sge.mr = NULL;
  1643. e->rdma_sge.sge.vaddr = NULL;
  1644. e->rdma_sge.sge.length = 0;
  1645. e->rdma_sge.sge.sge_length = 0;
  1646. }
  1647. e->opcode = opcode;
  1648. e->psn = psn;
  1649. /*
  1650. * We need to increment the MSN here instead of when we
  1651. * finish sending the result since a duplicate request would
  1652. * increment it more than once.
  1653. */
  1654. qp->r_msn++;
  1655. qp->r_psn++;
  1656. qp->r_state = opcode;
  1657. qp->r_nak_state = 0;
  1658. barrier();
  1659. qp->r_head_ack_queue = next;
  1660. /* Call ipath_do_rc_send() in another thread. */
  1661. tasklet_hi_schedule(&qp->s_task);
  1662. goto done;
  1663. }
  1664. case OP(COMPARE_SWAP):
  1665. case OP(FETCH_ADD): {
  1666. struct ib_atomic_eth *ateth;
  1667. struct ipath_ack_entry *e;
  1668. u64 vaddr;
  1669. atomic64_t *maddr;
  1670. u64 sdata;
  1671. u32 rkey;
  1672. u8 next;
  1673. if (unlikely(!(qp->qp_access_flags &
  1674. IB_ACCESS_REMOTE_ATOMIC)))
  1675. goto nack_acc;
  1676. next = qp->r_head_ack_queue + 1;
  1677. if (next > IPATH_MAX_RDMA_ATOMIC)
  1678. next = 0;
  1679. if (unlikely(next == qp->s_tail_ack_queue))
  1680. goto nack_inv;
  1681. if (!header_in_data)
  1682. ateth = &ohdr->u.atomic_eth;
  1683. else
  1684. ateth = (struct ib_atomic_eth *)data;
  1685. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1686. be32_to_cpu(ateth->vaddr[1]);
  1687. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1688. goto nack_inv;
  1689. rkey = be32_to_cpu(ateth->rkey);
  1690. /* Check rkey & NAK */
  1691. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1692. sizeof(u64), vaddr, rkey,
  1693. IB_ACCESS_REMOTE_ATOMIC)))
  1694. goto nack_acc;
  1695. /* Perform atomic OP and save result. */
  1696. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1697. sdata = be64_to_cpu(ateth->swap_data);
  1698. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1699. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1700. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1701. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1702. be64_to_cpu(ateth->compare_data),
  1703. sdata);
  1704. e->opcode = opcode;
  1705. e->psn = psn & IPATH_PSN_MASK;
  1706. qp->r_msn++;
  1707. qp->r_psn++;
  1708. qp->r_state = opcode;
  1709. qp->r_nak_state = 0;
  1710. barrier();
  1711. qp->r_head_ack_queue = next;
  1712. /* Call ipath_do_rc_send() in another thread. */
  1713. tasklet_hi_schedule(&qp->s_task);
  1714. goto done;
  1715. }
  1716. default:
  1717. /* NAK unknown opcodes. */
  1718. goto nack_inv;
  1719. }
  1720. qp->r_psn++;
  1721. qp->r_state = opcode;
  1722. qp->r_ack_psn = psn;
  1723. qp->r_nak_state = 0;
  1724. /* Send an ACK if requested or required. */
  1725. if (psn & (1 << 31))
  1726. goto send_ack;
  1727. goto done;
  1728. nack_acc:
  1729. ipath_rc_error(qp, IB_WC_REM_ACCESS_ERR);
  1730. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1731. qp->r_ack_psn = qp->r_psn;
  1732. send_ack:
  1733. send_rc_ack(qp);
  1734. done:
  1735. return;
  1736. }