scan.c 13 KB

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  1. /*
  2. * Broadcom specific AMBA
  3. * Bus scanning
  4. *
  5. * Licensed under the GNU/GPL. See COPYING for details.
  6. */
  7. #include "scan.h"
  8. #include "bcma_private.h"
  9. #include <linux/bcma/bcma.h>
  10. #include <linux/bcma/bcma_regs.h>
  11. #include <linux/pci.h>
  12. #include <linux/io.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/slab.h>
  15. struct bcma_device_id_name {
  16. u16 id;
  17. const char *name;
  18. };
  19. static const struct bcma_device_id_name bcma_arm_device_names[] = {
  20. { BCMA_CORE_ARM_1176, "ARM 1176" },
  21. { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
  22. { BCMA_CORE_ARM_CM3, "ARM CM3" },
  23. };
  24. static const struct bcma_device_id_name bcma_bcm_device_names[] = {
  25. { BCMA_CORE_OOB_ROUTER, "OOB Router" },
  26. { BCMA_CORE_INVALID, "Invalid" },
  27. { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
  28. { BCMA_CORE_ILINE20, "ILine 20" },
  29. { BCMA_CORE_SRAM, "SRAM" },
  30. { BCMA_CORE_SDRAM, "SDRAM" },
  31. { BCMA_CORE_PCI, "PCI" },
  32. { BCMA_CORE_ETHERNET, "Fast Ethernet" },
  33. { BCMA_CORE_V90, "V90" },
  34. { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
  35. { BCMA_CORE_ADSL, "ADSL" },
  36. { BCMA_CORE_ILINE100, "ILine 100" },
  37. { BCMA_CORE_IPSEC, "IPSEC" },
  38. { BCMA_CORE_UTOPIA, "UTOPIA" },
  39. { BCMA_CORE_PCMCIA, "PCMCIA" },
  40. { BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
  41. { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
  42. { BCMA_CORE_OFDM, "OFDM" },
  43. { BCMA_CORE_EXTIF, "EXTIF" },
  44. { BCMA_CORE_80211, "IEEE 802.11" },
  45. { BCMA_CORE_PHY_A, "PHY A" },
  46. { BCMA_CORE_PHY_B, "PHY B" },
  47. { BCMA_CORE_PHY_G, "PHY G" },
  48. { BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
  49. { BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
  50. { BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
  51. { BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
  52. { BCMA_CORE_SDIO_HOST, "SDIO Host" },
  53. { BCMA_CORE_ROBOSWITCH, "Roboswitch" },
  54. { BCMA_CORE_PARA_ATA, "PATA" },
  55. { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
  56. { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
  57. { BCMA_CORE_PCIE, "PCIe" },
  58. { BCMA_CORE_PHY_N, "PHY N" },
  59. { BCMA_CORE_SRAM_CTL, "SRAM Controller" },
  60. { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
  61. { BCMA_CORE_PHY_LP, "PHY LP" },
  62. { BCMA_CORE_PMU, "PMU" },
  63. { BCMA_CORE_PHY_SSN, "PHY SSN" },
  64. { BCMA_CORE_SDIO_DEV, "SDIO Device" },
  65. { BCMA_CORE_PHY_HT, "PHY HT" },
  66. { BCMA_CORE_MAC_GBIT, "GBit MAC" },
  67. { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
  68. { BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
  69. { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
  70. { BCMA_CORE_SHARED_COMMON, "Common Shared" },
  71. { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
  72. { BCMA_CORE_SPI_HOST, "SPI Host" },
  73. { BCMA_CORE_I2S, "I2S" },
  74. { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  75. { BCMA_CORE_SHIM, "SHIM" },
  76. { BCMA_CORE_DEFAULT, "Default" },
  77. };
  78. static const struct bcma_device_id_name bcma_mips_device_names[] = {
  79. { BCMA_CORE_MIPS, "MIPS" },
  80. { BCMA_CORE_MIPS_3302, "MIPS 3302" },
  81. { BCMA_CORE_MIPS_74K, "MIPS 74K" },
  82. };
  83. static const char *bcma_device_name(const struct bcma_device_id *id)
  84. {
  85. const struct bcma_device_id_name *names;
  86. int size, i;
  87. /* search manufacturer specific names */
  88. switch (id->manuf) {
  89. case BCMA_MANUF_ARM:
  90. names = bcma_arm_device_names;
  91. size = ARRAY_SIZE(bcma_arm_device_names);
  92. break;
  93. case BCMA_MANUF_BCM:
  94. names = bcma_bcm_device_names;
  95. size = ARRAY_SIZE(bcma_bcm_device_names);
  96. break;
  97. case BCMA_MANUF_MIPS:
  98. names = bcma_mips_device_names;
  99. size = ARRAY_SIZE(bcma_mips_device_names);
  100. break;
  101. default:
  102. return "UNKNOWN";
  103. }
  104. for (i = 0; i < size; i++) {
  105. if (names[i].id == id->id)
  106. return names[i].name;
  107. }
  108. return "UNKNOWN";
  109. }
  110. static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
  111. u16 offset)
  112. {
  113. return readl(bus->mmio + offset);
  114. }
  115. static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
  116. {
  117. if (bus->hosttype == BCMA_HOSTTYPE_PCI)
  118. pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
  119. addr);
  120. }
  121. static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
  122. {
  123. u32 ent = readl(*eromptr);
  124. (*eromptr)++;
  125. return ent;
  126. }
  127. static void bcma_erom_push_ent(u32 **eromptr)
  128. {
  129. (*eromptr)--;
  130. }
  131. static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
  132. {
  133. u32 ent = bcma_erom_get_ent(bus, eromptr);
  134. if (!(ent & SCAN_ER_VALID))
  135. return -ENOENT;
  136. if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
  137. return -ENOENT;
  138. return ent;
  139. }
  140. static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
  141. {
  142. u32 ent = bcma_erom_get_ent(bus, eromptr);
  143. bcma_erom_push_ent(eromptr);
  144. return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
  145. }
  146. static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
  147. {
  148. u32 ent = bcma_erom_get_ent(bus, eromptr);
  149. bcma_erom_push_ent(eromptr);
  150. return (((ent & SCAN_ER_VALID)) &&
  151. ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
  152. ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  153. }
  154. static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
  155. {
  156. u32 ent;
  157. while (1) {
  158. ent = bcma_erom_get_ent(bus, eromptr);
  159. if ((ent & SCAN_ER_VALID) &&
  160. ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
  161. break;
  162. if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
  163. break;
  164. }
  165. bcma_erom_push_ent(eromptr);
  166. }
  167. static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
  168. {
  169. u32 ent = bcma_erom_get_ent(bus, eromptr);
  170. if (!(ent & SCAN_ER_VALID))
  171. return -ENOENT;
  172. if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
  173. return -ENOENT;
  174. return ent;
  175. }
  176. static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
  177. u32 type, u8 port)
  178. {
  179. u32 addrl, addrh, sizel, sizeh = 0;
  180. u32 size;
  181. u32 ent = bcma_erom_get_ent(bus, eromptr);
  182. if ((!(ent & SCAN_ER_VALID)) ||
  183. ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
  184. ((ent & SCAN_ADDR_TYPE) != type) ||
  185. (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
  186. bcma_erom_push_ent(eromptr);
  187. return -EINVAL;
  188. }
  189. addrl = ent & SCAN_ADDR_ADDR;
  190. if (ent & SCAN_ADDR_AG32)
  191. addrh = bcma_erom_get_ent(bus, eromptr);
  192. else
  193. addrh = 0;
  194. if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
  195. size = bcma_erom_get_ent(bus, eromptr);
  196. sizel = size & SCAN_SIZE_SZ;
  197. if (size & SCAN_SIZE_SG32)
  198. sizeh = bcma_erom_get_ent(bus, eromptr);
  199. } else
  200. sizel = SCAN_ADDR_SZ_BASE <<
  201. ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
  202. return addrl;
  203. }
  204. static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
  205. u16 index)
  206. {
  207. struct bcma_device *core;
  208. list_for_each_entry(core, &bus->cores, list) {
  209. if (core->core_index == index)
  210. return core;
  211. }
  212. return NULL;
  213. }
  214. static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
  215. {
  216. struct bcma_device *core;
  217. list_for_each_entry_reverse(core, &bus->cores, list) {
  218. if (core->id.id == coreid)
  219. return core;
  220. }
  221. return NULL;
  222. }
  223. static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
  224. struct bcma_device_id *match, int core_num,
  225. struct bcma_device *core)
  226. {
  227. s32 tmp;
  228. u8 i, j;
  229. s32 cia, cib;
  230. u8 ports[2], wrappers[2];
  231. /* get CIs */
  232. cia = bcma_erom_get_ci(bus, eromptr);
  233. if (cia < 0) {
  234. bcma_erom_push_ent(eromptr);
  235. if (bcma_erom_is_end(bus, eromptr))
  236. return -ESPIPE;
  237. return -EILSEQ;
  238. }
  239. cib = bcma_erom_get_ci(bus, eromptr);
  240. if (cib < 0)
  241. return -EILSEQ;
  242. /* parse CIs */
  243. core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
  244. core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
  245. core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
  246. ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
  247. ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
  248. wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
  249. wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
  250. core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
  251. if (((core->id.manuf == BCMA_MANUF_ARM) &&
  252. (core->id.id == 0xFFF)) ||
  253. (ports[1] == 0)) {
  254. bcma_erom_skip_component(bus, eromptr);
  255. return -ENXIO;
  256. }
  257. /* check if component is a core at all */
  258. if (wrappers[0] + wrappers[1] == 0) {
  259. /* we could save addrl of the router
  260. if (cid == BCMA_CORE_OOB_ROUTER)
  261. */
  262. bcma_erom_skip_component(bus, eromptr);
  263. return -ENXIO;
  264. }
  265. if (bcma_erom_is_bridge(bus, eromptr)) {
  266. bcma_erom_skip_component(bus, eromptr);
  267. return -ENXIO;
  268. }
  269. if (bcma_find_core_by_index(bus, core_num)) {
  270. bcma_erom_skip_component(bus, eromptr);
  271. return -ENODEV;
  272. }
  273. if (match && ((match->manuf != BCMA_ANY_MANUF &&
  274. match->manuf != core->id.manuf) ||
  275. (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
  276. (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
  277. (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
  278. )) {
  279. bcma_erom_skip_component(bus, eromptr);
  280. return -ENODEV;
  281. }
  282. /* get & parse master ports */
  283. for (i = 0; i < ports[0]; i++) {
  284. s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
  285. if (mst_port_d < 0)
  286. return -EILSEQ;
  287. }
  288. /* get & parse slave ports */
  289. for (i = 0; i < ports[1]; i++) {
  290. for (j = 0; ; j++) {
  291. tmp = bcma_erom_get_addr_desc(bus, eromptr,
  292. SCAN_ADDR_TYPE_SLAVE, i);
  293. if (tmp < 0) {
  294. /* no more entries for port _i_ */
  295. /* pr_debug("erom: slave port %d "
  296. * "has %d descriptors\n", i, j); */
  297. break;
  298. } else {
  299. if (i == 0 && j == 0)
  300. core->addr = tmp;
  301. }
  302. }
  303. }
  304. /* get & parse master wrappers */
  305. for (i = 0; i < wrappers[0]; i++) {
  306. for (j = 0; ; j++) {
  307. tmp = bcma_erom_get_addr_desc(bus, eromptr,
  308. SCAN_ADDR_TYPE_MWRAP, i);
  309. if (tmp < 0) {
  310. /* no more entries for port _i_ */
  311. /* pr_debug("erom: master wrapper %d "
  312. * "has %d descriptors\n", i, j); */
  313. break;
  314. } else {
  315. if (i == 0 && j == 0)
  316. core->wrap = tmp;
  317. }
  318. }
  319. }
  320. /* get & parse slave wrappers */
  321. for (i = 0; i < wrappers[1]; i++) {
  322. u8 hack = (ports[1] == 1) ? 0 : 1;
  323. for (j = 0; ; j++) {
  324. tmp = bcma_erom_get_addr_desc(bus, eromptr,
  325. SCAN_ADDR_TYPE_SWRAP, i + hack);
  326. if (tmp < 0) {
  327. /* no more entries for port _i_ */
  328. /* pr_debug("erom: master wrapper %d "
  329. * has %d descriptors\n", i, j); */
  330. break;
  331. } else {
  332. if (wrappers[0] == 0 && !i && !j)
  333. core->wrap = tmp;
  334. }
  335. }
  336. }
  337. if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
  338. core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
  339. if (!core->io_addr)
  340. return -ENOMEM;
  341. core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
  342. if (!core->io_wrap) {
  343. iounmap(core->io_addr);
  344. return -ENOMEM;
  345. }
  346. }
  347. return 0;
  348. }
  349. void bcma_init_bus(struct bcma_bus *bus)
  350. {
  351. s32 tmp;
  352. struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
  353. if (bus->init_done)
  354. return;
  355. INIT_LIST_HEAD(&bus->cores);
  356. bus->nr_cores = 0;
  357. bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
  358. tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
  359. chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
  360. chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
  361. chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
  362. pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
  363. chipinfo->id, chipinfo->rev, chipinfo->pkg);
  364. bus->init_done = true;
  365. }
  366. int bcma_bus_scan(struct bcma_bus *bus)
  367. {
  368. u32 erombase;
  369. u32 __iomem *eromptr, *eromend;
  370. int err, core_num = 0;
  371. bcma_init_bus(bus);
  372. erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
  373. if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
  374. eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
  375. if (!eromptr)
  376. return -ENOMEM;
  377. } else {
  378. eromptr = bus->mmio;
  379. }
  380. eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
  381. bcma_scan_switch_core(bus, erombase);
  382. while (eromptr < eromend) {
  383. struct bcma_device *other_core;
  384. struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
  385. if (!core)
  386. return -ENOMEM;
  387. INIT_LIST_HEAD(&core->list);
  388. core->bus = bus;
  389. err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
  390. if (err < 0) {
  391. kfree(core);
  392. if (err == -ENODEV) {
  393. core_num++;
  394. continue;
  395. } else if (err == -ENXIO) {
  396. continue;
  397. } else if (err == -ESPIPE) {
  398. break;
  399. }
  400. return err;
  401. }
  402. core->core_index = core_num++;
  403. bus->nr_cores++;
  404. other_core = bcma_find_core_reverse(bus, core->id.id);
  405. core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
  406. pr_info("Core %d found: %s "
  407. "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
  408. core->core_index, bcma_device_name(&core->id),
  409. core->id.manuf, core->id.id, core->id.rev,
  410. core->id.class);
  411. list_add(&core->list, &bus->cores);
  412. }
  413. if (bus->hosttype == BCMA_HOSTTYPE_SOC)
  414. iounmap(eromptr);
  415. return 0;
  416. }
  417. int __init bcma_bus_scan_early(struct bcma_bus *bus,
  418. struct bcma_device_id *match,
  419. struct bcma_device *core)
  420. {
  421. u32 erombase;
  422. u32 __iomem *eromptr, *eromend;
  423. int err = -ENODEV;
  424. int core_num = 0;
  425. erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
  426. if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
  427. eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
  428. if (!eromptr)
  429. return -ENOMEM;
  430. } else {
  431. eromptr = bus->mmio;
  432. }
  433. eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
  434. bcma_scan_switch_core(bus, erombase);
  435. while (eromptr < eromend) {
  436. memset(core, 0, sizeof(*core));
  437. INIT_LIST_HEAD(&core->list);
  438. core->bus = bus;
  439. err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
  440. if (err == -ENODEV) {
  441. core_num++;
  442. continue;
  443. } else if (err == -ENXIO)
  444. continue;
  445. else if (err == -ESPIPE)
  446. break;
  447. else if (err < 0)
  448. return err;
  449. core->core_index = core_num++;
  450. bus->nr_cores++;
  451. pr_info("Core %d found: %s "
  452. "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
  453. core->core_index, bcma_device_name(&core->id),
  454. core->id.manuf, core->id.id, core->id.rev,
  455. core->id.class);
  456. list_add(&core->list, &bus->cores);
  457. err = 0;
  458. break;
  459. }
  460. if (bus->hosttype == BCMA_HOSTTYPE_SOC)
  461. iounmap(eromptr);
  462. return err;
  463. }