fsl_soc.c 21 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. static u32 sysfreq = -1;
  67. u32 fsl_get_sys_freq(void)
  68. {
  69. struct device_node *soc;
  70. const u32 *prop;
  71. int size;
  72. if (sysfreq != -1)
  73. return sysfreq;
  74. soc = of_find_node_by_type(NULL, "soc");
  75. if (!soc)
  76. return -1;
  77. prop = of_get_property(soc, "clock-frequency", &size);
  78. if (!prop || size != sizeof(*prop) || *prop == 0)
  79. prop = of_get_property(soc, "bus-frequency", &size);
  80. if (prop && size == sizeof(*prop))
  81. sysfreq = *prop;
  82. of_node_put(soc);
  83. return sysfreq;
  84. }
  85. EXPORT_SYMBOL(fsl_get_sys_freq);
  86. #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
  87. static u32 brgfreq = -1;
  88. u32 get_brgfreq(void)
  89. {
  90. struct device_node *node;
  91. const unsigned int *prop;
  92. int size;
  93. if (brgfreq != -1)
  94. return brgfreq;
  95. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  96. if (node) {
  97. prop = of_get_property(node, "clock-frequency", &size);
  98. if (prop && size == 4)
  99. brgfreq = *prop;
  100. of_node_put(node);
  101. return brgfreq;
  102. }
  103. /* Legacy device binding -- will go away when no users are left. */
  104. node = of_find_node_by_type(NULL, "cpm");
  105. if (!node)
  106. node = of_find_compatible_node(NULL, NULL, "fsl,qe");
  107. if (!node)
  108. node = of_find_node_by_type(NULL, "qe");
  109. if (node) {
  110. prop = of_get_property(node, "brg-frequency", &size);
  111. if (prop && size == 4)
  112. brgfreq = *prop;
  113. if (brgfreq == -1 || brgfreq == 0) {
  114. prop = of_get_property(node, "bus-frequency", &size);
  115. if (prop && size == 4)
  116. brgfreq = *prop / 2;
  117. }
  118. of_node_put(node);
  119. }
  120. return brgfreq;
  121. }
  122. EXPORT_SYMBOL(get_brgfreq);
  123. static u32 fs_baudrate = -1;
  124. u32 get_baudrate(void)
  125. {
  126. struct device_node *node;
  127. if (fs_baudrate != -1)
  128. return fs_baudrate;
  129. node = of_find_node_by_type(NULL, "serial");
  130. if (node) {
  131. int size;
  132. const unsigned int *prop = of_get_property(node,
  133. "current-speed", &size);
  134. if (prop)
  135. fs_baudrate = *prop;
  136. of_node_put(node);
  137. }
  138. return fs_baudrate;
  139. }
  140. EXPORT_SYMBOL(get_baudrate);
  141. #endif /* CONFIG_CPM2 */
  142. #ifdef CONFIG_FIXED_PHY
  143. static int __init of_add_fixed_phys(void)
  144. {
  145. int ret;
  146. struct device_node *np;
  147. u32 *fixed_link;
  148. struct fixed_phy_status status = {};
  149. for_each_node_by_name(np, "ethernet") {
  150. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  151. if (!fixed_link)
  152. continue;
  153. status.link = 1;
  154. status.duplex = fixed_link[1];
  155. status.speed = fixed_link[2];
  156. status.pause = fixed_link[3];
  157. status.asym_pause = fixed_link[4];
  158. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  159. if (ret) {
  160. of_node_put(np);
  161. return ret;
  162. }
  163. }
  164. return 0;
  165. }
  166. arch_initcall(of_add_fixed_phys);
  167. #endif /* CONFIG_FIXED_PHY */
  168. static int __init gfar_mdio_of_init(void)
  169. {
  170. struct device_node *np = NULL;
  171. struct platform_device *mdio_dev;
  172. struct resource res;
  173. int ret;
  174. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  175. /* try the deprecated version */
  176. if (!np)
  177. np = of_find_compatible_node(np, "mdio", "gianfar");
  178. if (np) {
  179. int k;
  180. struct device_node *child = NULL;
  181. struct gianfar_mdio_data mdio_data;
  182. memset(&res, 0, sizeof(res));
  183. memset(&mdio_data, 0, sizeof(mdio_data));
  184. ret = of_address_to_resource(np, 0, &res);
  185. if (ret)
  186. goto err;
  187. mdio_dev =
  188. platform_device_register_simple("fsl-gianfar_mdio",
  189. res.start, &res, 1);
  190. if (IS_ERR(mdio_dev)) {
  191. ret = PTR_ERR(mdio_dev);
  192. goto err;
  193. }
  194. for (k = 0; k < 32; k++)
  195. mdio_data.irq[k] = PHY_POLL;
  196. while ((child = of_get_next_child(np, child)) != NULL) {
  197. int irq = irq_of_parse_and_map(child, 0);
  198. if (irq != NO_IRQ) {
  199. const u32 *id = of_get_property(child,
  200. "reg", NULL);
  201. mdio_data.irq[*id] = irq;
  202. }
  203. }
  204. ret =
  205. platform_device_add_data(mdio_dev, &mdio_data,
  206. sizeof(struct gianfar_mdio_data));
  207. if (ret)
  208. goto unreg;
  209. }
  210. of_node_put(np);
  211. return 0;
  212. unreg:
  213. platform_device_unregister(mdio_dev);
  214. err:
  215. of_node_put(np);
  216. return ret;
  217. }
  218. arch_initcall(gfar_mdio_of_init);
  219. static const char *gfar_tx_intr = "tx";
  220. static const char *gfar_rx_intr = "rx";
  221. static const char *gfar_err_intr = "error";
  222. static int __init gfar_of_init(void)
  223. {
  224. struct device_node *np;
  225. unsigned int i;
  226. struct platform_device *gfar_dev;
  227. struct resource res;
  228. int ret;
  229. for (np = NULL, i = 0;
  230. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  231. i++) {
  232. struct resource r[4];
  233. struct device_node *phy, *mdio;
  234. struct gianfar_platform_data gfar_data;
  235. const unsigned int *id;
  236. const char *model;
  237. const char *ctype;
  238. const void *mac_addr;
  239. const phandle *ph;
  240. int n_res = 2;
  241. memset(r, 0, sizeof(r));
  242. memset(&gfar_data, 0, sizeof(gfar_data));
  243. ret = of_address_to_resource(np, 0, &r[0]);
  244. if (ret)
  245. goto err;
  246. of_irq_to_resource(np, 0, &r[1]);
  247. model = of_get_property(np, "model", NULL);
  248. /* If we aren't the FEC we have multiple interrupts */
  249. if (model && strcasecmp(model, "FEC")) {
  250. r[1].name = gfar_tx_intr;
  251. r[2].name = gfar_rx_intr;
  252. of_irq_to_resource(np, 1, &r[2]);
  253. r[3].name = gfar_err_intr;
  254. of_irq_to_resource(np, 2, &r[3]);
  255. n_res += 2;
  256. }
  257. gfar_dev =
  258. platform_device_register_simple("fsl-gianfar", i, &r[0],
  259. n_res);
  260. if (IS_ERR(gfar_dev)) {
  261. ret = PTR_ERR(gfar_dev);
  262. goto err;
  263. }
  264. mac_addr = of_get_mac_address(np);
  265. if (mac_addr)
  266. memcpy(gfar_data.mac_addr, mac_addr, 6);
  267. if (model && !strcasecmp(model, "TSEC"))
  268. gfar_data.device_flags =
  269. FSL_GIANFAR_DEV_HAS_GIGABIT |
  270. FSL_GIANFAR_DEV_HAS_COALESCE |
  271. FSL_GIANFAR_DEV_HAS_RMON |
  272. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  273. if (model && !strcasecmp(model, "eTSEC"))
  274. gfar_data.device_flags =
  275. FSL_GIANFAR_DEV_HAS_GIGABIT |
  276. FSL_GIANFAR_DEV_HAS_COALESCE |
  277. FSL_GIANFAR_DEV_HAS_RMON |
  278. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  279. FSL_GIANFAR_DEV_HAS_CSUM |
  280. FSL_GIANFAR_DEV_HAS_VLAN |
  281. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  282. ctype = of_get_property(np, "phy-connection-type", NULL);
  283. /* We only care about rgmii-id. The rest are autodetected */
  284. if (ctype && !strcmp(ctype, "rgmii-id"))
  285. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  286. else
  287. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  288. ph = of_get_property(np, "phy-handle", NULL);
  289. if (ph == NULL) {
  290. u32 *fixed_link;
  291. fixed_link = (u32 *)of_get_property(np, "fixed-link",
  292. NULL);
  293. if (!fixed_link) {
  294. ret = -ENODEV;
  295. goto unreg;
  296. }
  297. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
  298. gfar_data.phy_id = fixed_link[0];
  299. } else {
  300. phy = of_find_node_by_phandle(*ph);
  301. if (phy == NULL) {
  302. ret = -ENODEV;
  303. goto unreg;
  304. }
  305. mdio = of_get_parent(phy);
  306. id = of_get_property(phy, "reg", NULL);
  307. ret = of_address_to_resource(mdio, 0, &res);
  308. if (ret) {
  309. of_node_put(phy);
  310. of_node_put(mdio);
  311. goto unreg;
  312. }
  313. gfar_data.phy_id = *id;
  314. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
  315. (unsigned long long)res.start);
  316. of_node_put(phy);
  317. of_node_put(mdio);
  318. }
  319. ret =
  320. platform_device_add_data(gfar_dev, &gfar_data,
  321. sizeof(struct
  322. gianfar_platform_data));
  323. if (ret)
  324. goto unreg;
  325. }
  326. return 0;
  327. unreg:
  328. platform_device_unregister(gfar_dev);
  329. err:
  330. return ret;
  331. }
  332. arch_initcall(gfar_of_init);
  333. #ifdef CONFIG_I2C_BOARDINFO
  334. #include <linux/i2c.h>
  335. struct i2c_driver_device {
  336. char *of_device;
  337. char *i2c_type;
  338. };
  339. static struct i2c_driver_device i2c_devices[] __initdata = {
  340. {"ricoh,rs5c372a", "rs5c372a"},
  341. {"ricoh,rs5c372b", "rs5c372b"},
  342. {"ricoh,rv5c386", "rv5c386"},
  343. {"ricoh,rv5c387a", "rv5c387a"},
  344. {"dallas,ds1307", "ds1307"},
  345. {"dallas,ds1337", "ds1337"},
  346. {"dallas,ds1338", "ds1338"},
  347. {"dallas,ds1339", "ds1339"},
  348. {"dallas,ds1340", "ds1340"},
  349. {"stm,m41t00", "m41t00"},
  350. {"dallas,ds1374", "rtc-ds1374"},
  351. };
  352. static int __init of_find_i2c_driver(struct device_node *node,
  353. struct i2c_board_info *info)
  354. {
  355. int i;
  356. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  357. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  358. continue;
  359. if (strlcpy(info->type, i2c_devices[i].i2c_type,
  360. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  361. return -ENOMEM;
  362. return 0;
  363. }
  364. return -ENODEV;
  365. }
  366. static void __init of_register_i2c_devices(struct device_node *adap_node,
  367. int bus_num)
  368. {
  369. struct device_node *node = NULL;
  370. while ((node = of_get_next_child(adap_node, node))) {
  371. struct i2c_board_info info = {};
  372. const u32 *addr;
  373. int len;
  374. addr = of_get_property(node, "reg", &len);
  375. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  376. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  377. continue;
  378. }
  379. info.irq = irq_of_parse_and_map(node, 0);
  380. if (info.irq == NO_IRQ)
  381. info.irq = -1;
  382. if (of_find_i2c_driver(node, &info) < 0)
  383. continue;
  384. info.addr = *addr;
  385. i2c_register_board_info(bus_num, &info, 1);
  386. }
  387. }
  388. static int __init fsl_i2c_of_init(void)
  389. {
  390. struct device_node *np;
  391. unsigned int i = 0;
  392. struct platform_device *i2c_dev;
  393. int ret;
  394. for_each_compatible_node(np, NULL, "fsl-i2c") {
  395. struct resource r[2];
  396. struct fsl_i2c_platform_data i2c_data;
  397. const unsigned char *flags = NULL;
  398. memset(&r, 0, sizeof(r));
  399. memset(&i2c_data, 0, sizeof(i2c_data));
  400. ret = of_address_to_resource(np, 0, &r[0]);
  401. if (ret)
  402. goto err;
  403. of_irq_to_resource(np, 0, &r[1]);
  404. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  405. if (IS_ERR(i2c_dev)) {
  406. ret = PTR_ERR(i2c_dev);
  407. goto err;
  408. }
  409. i2c_data.device_flags = 0;
  410. flags = of_get_property(np, "dfsrr", NULL);
  411. if (flags)
  412. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  413. flags = of_get_property(np, "fsl5200-clocking", NULL);
  414. if (flags)
  415. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  416. ret =
  417. platform_device_add_data(i2c_dev, &i2c_data,
  418. sizeof(struct
  419. fsl_i2c_platform_data));
  420. if (ret)
  421. goto unreg;
  422. of_register_i2c_devices(np, i++);
  423. }
  424. return 0;
  425. unreg:
  426. platform_device_unregister(i2c_dev);
  427. err:
  428. return ret;
  429. }
  430. arch_initcall(fsl_i2c_of_init);
  431. #endif
  432. #ifdef CONFIG_PPC_83xx
  433. static int __init mpc83xx_wdt_init(void)
  434. {
  435. struct resource r;
  436. struct device_node *np;
  437. struct platform_device *dev;
  438. u32 freq = fsl_get_sys_freq();
  439. int ret;
  440. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  441. if (!np) {
  442. ret = -ENODEV;
  443. goto nodev;
  444. }
  445. memset(&r, 0, sizeof(r));
  446. ret = of_address_to_resource(np, 0, &r);
  447. if (ret)
  448. goto err;
  449. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  450. if (IS_ERR(dev)) {
  451. ret = PTR_ERR(dev);
  452. goto err;
  453. }
  454. ret = platform_device_add_data(dev, &freq, sizeof(freq));
  455. if (ret)
  456. goto unreg;
  457. of_node_put(np);
  458. return 0;
  459. unreg:
  460. platform_device_unregister(dev);
  461. err:
  462. of_node_put(np);
  463. nodev:
  464. return ret;
  465. }
  466. arch_initcall(mpc83xx_wdt_init);
  467. #endif
  468. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  469. {
  470. if (!phy_type)
  471. return FSL_USB2_PHY_NONE;
  472. if (!strcasecmp(phy_type, "ulpi"))
  473. return FSL_USB2_PHY_ULPI;
  474. if (!strcasecmp(phy_type, "utmi"))
  475. return FSL_USB2_PHY_UTMI;
  476. if (!strcasecmp(phy_type, "utmi_wide"))
  477. return FSL_USB2_PHY_UTMI_WIDE;
  478. if (!strcasecmp(phy_type, "serial"))
  479. return FSL_USB2_PHY_SERIAL;
  480. return FSL_USB2_PHY_NONE;
  481. }
  482. static int __init fsl_usb_of_init(void)
  483. {
  484. struct device_node *np;
  485. unsigned int i = 0;
  486. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  487. *usb_dev_dr_client = NULL;
  488. int ret;
  489. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  490. struct resource r[2];
  491. struct fsl_usb2_platform_data usb_data;
  492. const unsigned char *prop = NULL;
  493. memset(&r, 0, sizeof(r));
  494. memset(&usb_data, 0, sizeof(usb_data));
  495. ret = of_address_to_resource(np, 0, &r[0]);
  496. if (ret)
  497. goto err;
  498. of_irq_to_resource(np, 0, &r[1]);
  499. usb_dev_mph =
  500. platform_device_register_simple("fsl-ehci", i, r, 2);
  501. if (IS_ERR(usb_dev_mph)) {
  502. ret = PTR_ERR(usb_dev_mph);
  503. goto err;
  504. }
  505. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  506. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  507. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  508. prop = of_get_property(np, "port0", NULL);
  509. if (prop)
  510. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  511. prop = of_get_property(np, "port1", NULL);
  512. if (prop)
  513. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  514. prop = of_get_property(np, "phy_type", NULL);
  515. usb_data.phy_mode = determine_usb_phy(prop);
  516. ret =
  517. platform_device_add_data(usb_dev_mph, &usb_data,
  518. sizeof(struct
  519. fsl_usb2_platform_data));
  520. if (ret)
  521. goto unreg_mph;
  522. i++;
  523. }
  524. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  525. struct resource r[2];
  526. struct fsl_usb2_platform_data usb_data;
  527. const unsigned char *prop = NULL;
  528. memset(&r, 0, sizeof(r));
  529. memset(&usb_data, 0, sizeof(usb_data));
  530. ret = of_address_to_resource(np, 0, &r[0]);
  531. if (ret)
  532. goto unreg_mph;
  533. of_irq_to_resource(np, 0, &r[1]);
  534. prop = of_get_property(np, "dr_mode", NULL);
  535. if (!prop || !strcmp(prop, "host")) {
  536. usb_data.operating_mode = FSL_USB2_DR_HOST;
  537. usb_dev_dr_host = platform_device_register_simple(
  538. "fsl-ehci", i, r, 2);
  539. if (IS_ERR(usb_dev_dr_host)) {
  540. ret = PTR_ERR(usb_dev_dr_host);
  541. goto err;
  542. }
  543. } else if (prop && !strcmp(prop, "peripheral")) {
  544. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  545. usb_dev_dr_client = platform_device_register_simple(
  546. "fsl-usb2-udc", i, r, 2);
  547. if (IS_ERR(usb_dev_dr_client)) {
  548. ret = PTR_ERR(usb_dev_dr_client);
  549. goto err;
  550. }
  551. } else if (prop && !strcmp(prop, "otg")) {
  552. usb_data.operating_mode = FSL_USB2_DR_OTG;
  553. usb_dev_dr_host = platform_device_register_simple(
  554. "fsl-ehci", i, r, 2);
  555. if (IS_ERR(usb_dev_dr_host)) {
  556. ret = PTR_ERR(usb_dev_dr_host);
  557. goto err;
  558. }
  559. usb_dev_dr_client = platform_device_register_simple(
  560. "fsl-usb2-udc", i, r, 2);
  561. if (IS_ERR(usb_dev_dr_client)) {
  562. ret = PTR_ERR(usb_dev_dr_client);
  563. goto err;
  564. }
  565. } else {
  566. ret = -EINVAL;
  567. goto err;
  568. }
  569. prop = of_get_property(np, "phy_type", NULL);
  570. usb_data.phy_mode = determine_usb_phy(prop);
  571. if (usb_dev_dr_host) {
  572. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  573. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  574. dev.coherent_dma_mask;
  575. if ((ret = platform_device_add_data(usb_dev_dr_host,
  576. &usb_data, sizeof(struct
  577. fsl_usb2_platform_data))))
  578. goto unreg_dr;
  579. }
  580. if (usb_dev_dr_client) {
  581. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  582. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  583. dev.coherent_dma_mask;
  584. if ((ret = platform_device_add_data(usb_dev_dr_client,
  585. &usb_data, sizeof(struct
  586. fsl_usb2_platform_data))))
  587. goto unreg_dr;
  588. }
  589. i++;
  590. }
  591. return 0;
  592. unreg_dr:
  593. if (usb_dev_dr_host)
  594. platform_device_unregister(usb_dev_dr_host);
  595. if (usb_dev_dr_client)
  596. platform_device_unregister(usb_dev_dr_client);
  597. unreg_mph:
  598. if (usb_dev_mph)
  599. platform_device_unregister(usb_dev_mph);
  600. err:
  601. return ret;
  602. }
  603. arch_initcall(fsl_usb_of_init);
  604. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  605. struct spi_board_info *board_infos,
  606. unsigned int num_board_infos,
  607. void (*activate_cs)(u8 cs, u8 polarity),
  608. void (*deactivate_cs)(u8 cs, u8 polarity))
  609. {
  610. struct device_node *np;
  611. unsigned int i = 0;
  612. for_each_compatible_node(np, type, compatible) {
  613. int ret;
  614. unsigned int j;
  615. const void *prop;
  616. struct resource res[2];
  617. struct platform_device *pdev;
  618. struct fsl_spi_platform_data pdata = {
  619. .activate_cs = activate_cs,
  620. .deactivate_cs = deactivate_cs,
  621. };
  622. memset(res, 0, sizeof(res));
  623. pdata.sysclk = sysclk;
  624. prop = of_get_property(np, "reg", NULL);
  625. if (!prop)
  626. goto err;
  627. pdata.bus_num = *(u32 *)prop;
  628. prop = of_get_property(np, "cell-index", NULL);
  629. if (prop)
  630. i = *(u32 *)prop;
  631. prop = of_get_property(np, "mode", NULL);
  632. if (prop && !strcmp(prop, "cpu-qe"))
  633. pdata.qe_mode = 1;
  634. for (j = 0; j < num_board_infos; j++) {
  635. if (board_infos[j].bus_num == pdata.bus_num)
  636. pdata.max_chipselect++;
  637. }
  638. if (!pdata.max_chipselect)
  639. continue;
  640. ret = of_address_to_resource(np, 0, &res[0]);
  641. if (ret)
  642. goto err;
  643. ret = of_irq_to_resource(np, 0, &res[1]);
  644. if (ret == NO_IRQ)
  645. goto err;
  646. pdev = platform_device_alloc("mpc83xx_spi", i);
  647. if (!pdev)
  648. goto err;
  649. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  650. if (ret)
  651. goto unreg;
  652. ret = platform_device_add_resources(pdev, res,
  653. ARRAY_SIZE(res));
  654. if (ret)
  655. goto unreg;
  656. ret = platform_device_add(pdev);
  657. if (ret)
  658. goto unreg;
  659. goto next;
  660. unreg:
  661. platform_device_del(pdev);
  662. err:
  663. pr_err("%s: registration failed\n", np->full_name);
  664. next:
  665. i++;
  666. }
  667. return i;
  668. }
  669. int __init fsl_spi_init(struct spi_board_info *board_infos,
  670. unsigned int num_board_infos,
  671. void (*activate_cs)(u8 cs, u8 polarity),
  672. void (*deactivate_cs)(u8 cs, u8 polarity))
  673. {
  674. u32 sysclk = -1;
  675. int ret;
  676. #ifdef CONFIG_QUICC_ENGINE
  677. /* SPI controller is either clocked from QE or SoC clock */
  678. sysclk = get_brgfreq();
  679. #endif
  680. if (sysclk == -1) {
  681. sysclk = fsl_get_sys_freq();
  682. if (sysclk == -1)
  683. return -ENODEV;
  684. }
  685. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  686. num_board_infos, activate_cs, deactivate_cs);
  687. if (!ret)
  688. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  689. num_board_infos, activate_cs, deactivate_cs);
  690. return spi_register_board_info(board_infos, num_board_infos);
  691. }
  692. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  693. static __be32 __iomem *rstcr;
  694. static int __init setup_rstcr(void)
  695. {
  696. struct device_node *np;
  697. np = of_find_node_by_name(NULL, "global-utilities");
  698. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  699. const u32 *prop = of_get_property(np, "reg", NULL);
  700. if (prop) {
  701. /* map reset control register
  702. * 0xE00B0 is offset of reset control register
  703. */
  704. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  705. if (!rstcr)
  706. printk (KERN_EMERG "Error: reset control "
  707. "register not mapped!\n");
  708. }
  709. } else
  710. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  711. if (np)
  712. of_node_put(np);
  713. return 0;
  714. }
  715. arch_initcall(setup_rstcr);
  716. void fsl_rstcr_restart(char *cmd)
  717. {
  718. local_irq_disable();
  719. if (rstcr)
  720. /* set reset control register */
  721. out_be32(rstcr, 0x2); /* HRESET_REQ */
  722. while (1) ;
  723. }
  724. #endif
  725. #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
  726. struct platform_diu_data_ops diu_ops = {
  727. .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */
  728. };
  729. EXPORT_SYMBOL(diu_ops);
  730. int __init preallocate_diu_videomemory(void)
  731. {
  732. pr_debug("diu_size=%lu\n", diu_ops.diu_size);
  733. diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0);
  734. if (!diu_ops.diu_mem) {
  735. printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n",
  736. diu_ops.diu_size);
  737. return -ENOMEM;
  738. }
  739. pr_debug("diu_mem=%p\n", diu_ops.diu_mem);
  740. rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block),
  741. diu_ops.diu_rh_block);
  742. return rh_attach_region(&diu_ops.diu_rh_info,
  743. (unsigned long) diu_ops.diu_mem,
  744. diu_ops.diu_size);
  745. }
  746. static int __init early_parse_diufb(char *p)
  747. {
  748. if (!p)
  749. return 1;
  750. diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8);
  751. pr_debug("diu_size=%lu\n", diu_ops.diu_size);
  752. return 0;
  753. }
  754. early_param("diufb", early_parse_diufb);
  755. #endif