tda18271-fe.c 28 KB

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  1. /*
  2. tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
  3. Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/videodev2.h>
  18. #include "tda18271-priv.h"
  19. int tda18271_debug;
  20. module_param_named(debug, tda18271_debug, int, 0644);
  21. MODULE_PARM_DESC(debug, "set debug level "
  22. "(info=1, map=2, reg=4, adv=8 (or-able))");
  23. static LIST_HEAD(tda18271_list);
  24. static DEFINE_MUTEX(tda18271_list_mutex);
  25. /*---------------------------------------------------------------------*/
  26. static int tda18271_ir_cal_init(struct dvb_frontend *fe)
  27. {
  28. struct tda18271_priv *priv = fe->tuner_priv;
  29. unsigned char *regs = priv->tda18271_regs;
  30. tda18271_read_regs(fe);
  31. /* test IR_CAL_OK to see if we need init */
  32. if ((regs[R_EP1] & 0x08) == 0)
  33. tda18271_init_regs(fe);
  34. return 0;
  35. }
  36. /* ------------------------------------------------------------------ */
  37. static int tda18271_channel_configuration(struct dvb_frontend *fe,
  38. u32 ifc, u32 freq, u32 bw, u8 std,
  39. int radio)
  40. {
  41. struct tda18271_priv *priv = fe->tuner_priv;
  42. unsigned char *regs = priv->tda18271_regs;
  43. u32 N;
  44. /* update TV broadcast parameters */
  45. /* set standard */
  46. regs[R_EP3] &= ~0x1f; /* clear std bits */
  47. regs[R_EP3] |= std;
  48. /* set cal mode to normal */
  49. regs[R_EP4] &= ~0x03;
  50. /* update IF output level & IF notch frequency */
  51. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  52. switch (priv->mode) {
  53. case TDA18271_ANALOG:
  54. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  55. break;
  56. case TDA18271_DIGITAL:
  57. regs[R_EP4] |= 0x04; /* IF level = 1 */
  58. regs[R_MPD] |= 0x80; /* IF notch = 1 */
  59. break;
  60. }
  61. if (radio)
  62. regs[R_EP4] |= 0x80;
  63. else
  64. regs[R_EP4] &= ~0x80;
  65. /* update RF_TOP / IF_TOP */
  66. switch (priv->mode) {
  67. case TDA18271_ANALOG:
  68. regs[R_EB22] = 0x2c;
  69. break;
  70. case TDA18271_DIGITAL:
  71. regs[R_EB22] = 0x37;
  72. break;
  73. }
  74. tda18271_write_regs(fe, R_EB22, 1);
  75. /* --------------------------------------------------------------- */
  76. /* disable Power Level Indicator */
  77. regs[R_EP1] |= 0x40;
  78. /* frequency dependent parameters */
  79. tda18271_calc_ir_measure(fe, &freq);
  80. tda18271_calc_bp_filter(fe, &freq);
  81. tda18271_calc_rf_band(fe, &freq);
  82. tda18271_calc_gain_taper(fe, &freq);
  83. /* --------------------------------------------------------------- */
  84. /* dual tuner and agc1 extra configuration */
  85. /* main vco when Master, cal vco when slave */
  86. regs[R_EB1] |= 0x04; /* FIXME: assumes master */
  87. /* agc1 always active */
  88. regs[R_EB1] &= ~0x02;
  89. /* agc1 has priority on agc2 */
  90. regs[R_EB1] &= ~0x01;
  91. tda18271_write_regs(fe, R_EB1, 1);
  92. /* --------------------------------------------------------------- */
  93. N = freq + ifc;
  94. /* FIXME: assumes master */
  95. tda18271_calc_main_pll(fe, N);
  96. tda18271_write_regs(fe, R_MPD, 4);
  97. tda18271_write_regs(fe, R_TM, 7);
  98. /* main pll charge pump source */
  99. regs[R_EB4] |= 0x20;
  100. tda18271_write_regs(fe, R_EB4, 1);
  101. msleep(1);
  102. /* normal operation for the main pll */
  103. regs[R_EB4] &= ~0x20;
  104. tda18271_write_regs(fe, R_EB4, 1);
  105. msleep(5);
  106. return 0;
  107. }
  108. static int tda18271_read_thermometer(struct dvb_frontend *fe)
  109. {
  110. struct tda18271_priv *priv = fe->tuner_priv;
  111. unsigned char *regs = priv->tda18271_regs;
  112. int tm;
  113. /* switch thermometer on */
  114. regs[R_TM] |= 0x10;
  115. tda18271_write_regs(fe, R_TM, 1);
  116. /* read thermometer info */
  117. tda18271_read_regs(fe);
  118. if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
  119. (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
  120. if ((regs[R_TM] & 0x20) == 0x20)
  121. regs[R_TM] &= ~0x20;
  122. else
  123. regs[R_TM] |= 0x20;
  124. tda18271_write_regs(fe, R_TM, 1);
  125. msleep(10); /* temperature sensing */
  126. /* read thermometer info */
  127. tda18271_read_regs(fe);
  128. }
  129. tm = tda18271_lookup_thermometer(fe);
  130. /* switch thermometer off */
  131. regs[R_TM] &= ~0x10;
  132. tda18271_write_regs(fe, R_TM, 1);
  133. /* set CAL mode to normal */
  134. regs[R_EP4] &= ~0x03;
  135. tda18271_write_regs(fe, R_EP4, 1);
  136. return tm;
  137. }
  138. static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
  139. u32 freq)
  140. {
  141. struct tda18271_priv *priv = fe->tuner_priv;
  142. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  143. unsigned char *regs = priv->tda18271_regs;
  144. int tm_current, rfcal_comp, approx, i;
  145. u8 dc_over_dt, rf_tab;
  146. /* power up */
  147. regs[R_EP3] &= ~0xe0; /* sm = 0, sm_lt = 0, sm_xt = 0 */
  148. tda18271_write_regs(fe, R_EP3, 1);
  149. /* read die current temperature */
  150. tm_current = tda18271_read_thermometer(fe);
  151. /* frequency dependent parameters */
  152. tda18271_calc_rf_cal(fe, &freq);
  153. rf_tab = regs[R_EB14];
  154. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  155. if (i < 0)
  156. return -EINVAL;
  157. if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
  158. approx = map[i].rf_a1 *
  159. (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
  160. } else {
  161. approx = map[i].rf_a2 *
  162. (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
  163. }
  164. if (approx < 0)
  165. approx = 0;
  166. if (approx > 255)
  167. approx = 255;
  168. tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
  169. /* calculate temperature compensation */
  170. rfcal_comp = dc_over_dt * (tm_current - priv->tm_rfcal);
  171. regs[R_EB14] = approx + rfcal_comp;
  172. tda18271_write_regs(fe, R_EB14, 1);
  173. return 0;
  174. }
  175. static int tda18271_por(struct dvb_frontend *fe)
  176. {
  177. struct tda18271_priv *priv = fe->tuner_priv;
  178. unsigned char *regs = priv->tda18271_regs;
  179. /* power up detector 1 */
  180. regs[R_EB12] &= ~0x20;
  181. tda18271_write_regs(fe, R_EB12, 1);
  182. regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
  183. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  184. tda18271_write_regs(fe, R_EB18, 1);
  185. regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
  186. /* POR mode */
  187. regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
  188. regs[R_EP3] |= 0x80; /* sm = 1, sm_lt = 0, sm_xt = 0 */
  189. tda18271_write_regs(fe, R_EP3, 1);
  190. /* disable 1.5 MHz low pass filter */
  191. regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
  192. regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
  193. tda18271_write_regs(fe, R_EB21, 3);
  194. return 0;
  195. }
  196. static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
  197. {
  198. struct tda18271_priv *priv = fe->tuner_priv;
  199. unsigned char *regs = priv->tda18271_regs;
  200. u32 N;
  201. /* set CAL mode to normal */
  202. regs[R_EP4] &= ~0x03;
  203. tda18271_write_regs(fe, R_EP4, 1);
  204. /* switch off agc1 */
  205. regs[R_EP3] |= 0x40; /* sm_lt = 1 */
  206. regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
  207. tda18271_write_regs(fe, R_EB18, 1);
  208. /* frequency dependent parameters */
  209. tda18271_calc_bp_filter(fe, &freq);
  210. tda18271_calc_gain_taper(fe, &freq);
  211. tda18271_calc_rf_band(fe, &freq);
  212. tda18271_calc_km(fe, &freq);
  213. tda18271_write_regs(fe, R_EP1, 3);
  214. tda18271_write_regs(fe, R_EB13, 1);
  215. /* main pll charge pump source */
  216. regs[R_EB4] |= 0x20;
  217. tda18271_write_regs(fe, R_EB4, 1);
  218. /* cal pll charge pump source */
  219. regs[R_EB7] |= 0x20;
  220. tda18271_write_regs(fe, R_EB7, 1);
  221. /* force dcdc converter to 0 V */
  222. regs[R_EB14] = 0x00;
  223. tda18271_write_regs(fe, R_EB14, 1);
  224. /* disable plls lock */
  225. regs[R_EB20] &= ~0x20;
  226. tda18271_write_regs(fe, R_EB20, 1);
  227. /* set CAL mode to RF tracking filter calibration */
  228. regs[R_EP4] |= 0x03;
  229. tda18271_write_regs(fe, R_EP4, 2);
  230. /* --------------------------------------------------------------- */
  231. /* set the internal calibration signal */
  232. N = freq;
  233. tda18271_calc_main_pll(fe, N);
  234. tda18271_write_regs(fe, R_MPD, 4);
  235. /* downconvert internal calibration */
  236. N += 1000000;
  237. tda18271_calc_main_pll(fe, N);
  238. tda18271_write_regs(fe, R_MPD, 4);
  239. msleep(5);
  240. tda18271_write_regs(fe, R_EP2, 1);
  241. tda18271_write_regs(fe, R_EP1, 1);
  242. tda18271_write_regs(fe, R_EP2, 1);
  243. tda18271_write_regs(fe, R_EP1, 1);
  244. /* --------------------------------------------------------------- */
  245. /* normal operation for the main pll */
  246. regs[R_EB4] &= ~0x20;
  247. tda18271_write_regs(fe, R_EB4, 1);
  248. /* normal operation for the cal pll */
  249. regs[R_EB7] &= ~0x20;
  250. tda18271_write_regs(fe, R_EB7, 1);
  251. msleep(5); /* plls locking */
  252. /* launch the rf tracking filters calibration */
  253. regs[R_EB20] |= 0x20;
  254. tda18271_write_regs(fe, R_EB20, 1);
  255. msleep(60); /* calibration */
  256. /* --------------------------------------------------------------- */
  257. /* set CAL mode to normal */
  258. regs[R_EP4] &= ~0x03;
  259. /* switch on agc1 */
  260. regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
  261. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  262. tda18271_write_regs(fe, R_EB18, 1);
  263. tda18271_write_regs(fe, R_EP3, 2);
  264. /* synchronization */
  265. tda18271_write_regs(fe, R_EP1, 1);
  266. /* get calibration result */
  267. tda18271_read_extended(fe);
  268. return regs[R_EB14];
  269. }
  270. static int tda18271_powerscan(struct dvb_frontend *fe,
  271. u32 *freq_in, u32 *freq_out)
  272. {
  273. struct tda18271_priv *priv = fe->tuner_priv;
  274. unsigned char *regs = priv->tda18271_regs;
  275. int sgn, bcal, count, wait;
  276. u8 cid_target;
  277. u16 count_limit;
  278. u32 freq;
  279. freq = *freq_in;
  280. tda18271_calc_rf_band(fe, &freq);
  281. tda18271_calc_rf_cal(fe, &freq);
  282. tda18271_calc_gain_taper(fe, &freq);
  283. tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
  284. tda18271_write_regs(fe, R_EP2, 1);
  285. tda18271_write_regs(fe, R_EB14, 1);
  286. /* downconvert frequency */
  287. freq += 1000000;
  288. tda18271_calc_main_pll(fe, freq);
  289. tda18271_write_regs(fe, R_MPD, 4);
  290. msleep(5); /* pll locking */
  291. /* detection mode */
  292. regs[R_EP4] &= ~0x03;
  293. regs[R_EP4] |= 0x01;
  294. tda18271_write_regs(fe, R_EP4, 1);
  295. /* launch power detection measurement */
  296. tda18271_write_regs(fe, R_EP2, 1);
  297. /* read power detection info, stored in EB10 */
  298. tda18271_read_extended(fe);
  299. /* algorithm initialization */
  300. sgn = 1;
  301. *freq_out = *freq_in;
  302. bcal = 0;
  303. count = 0;
  304. wait = false;
  305. while ((regs[R_EB10] & 0x3f) < cid_target) {
  306. /* downconvert updated freq to 1 MHz */
  307. freq = *freq_in + (sgn * count) + 1000000;
  308. tda18271_calc_main_pll(fe, freq);
  309. tda18271_write_regs(fe, R_MPD, 4);
  310. if (wait) {
  311. msleep(5); /* pll locking */
  312. wait = false;
  313. } else
  314. udelay(100); /* pll locking */
  315. /* launch power detection measurement */
  316. tda18271_write_regs(fe, R_EP2, 1);
  317. /* read power detection info, stored in EB10 */
  318. tda18271_read_extended(fe);
  319. count += 200;
  320. if (count < count_limit)
  321. continue;
  322. if (sgn <= 0)
  323. break;
  324. sgn = -1 * sgn;
  325. count = 200;
  326. wait = true;
  327. }
  328. if ((regs[R_EB10] & 0x3f) >= cid_target) {
  329. bcal = 1;
  330. *freq_out = freq - 1000000;
  331. } else
  332. bcal = 0;
  333. tda_dbg("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
  334. bcal, *freq_in, *freq_out, freq);
  335. return bcal;
  336. }
  337. static int tda18271_powerscan_init(struct dvb_frontend *fe)
  338. {
  339. struct tda18271_priv *priv = fe->tuner_priv;
  340. unsigned char *regs = priv->tda18271_regs;
  341. /* set standard to digital */
  342. regs[R_EP3] &= ~0x1f; /* clear std bits */
  343. regs[R_EP3] |= 0x12;
  344. /* set cal mode to normal */
  345. regs[R_EP4] &= ~0x03;
  346. /* update IF output level & IF notch frequency */
  347. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  348. tda18271_write_regs(fe, R_EP3, 2);
  349. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  350. tda18271_write_regs(fe, R_EB18, 1);
  351. regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
  352. /* 1.5 MHz low pass filter */
  353. regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
  354. regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
  355. tda18271_write_regs(fe, R_EB21, 3);
  356. return 0;
  357. }
  358. static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
  359. {
  360. struct tda18271_priv *priv = fe->tuner_priv;
  361. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  362. unsigned char *regs = priv->tda18271_regs;
  363. int bcal, rf, i;
  364. #define RF1 0
  365. #define RF2 1
  366. #define RF3 2
  367. u32 rf_default[3];
  368. u32 rf_freq[3];
  369. u8 prog_cal[3];
  370. u8 prog_tab[3];
  371. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  372. if (i < 0)
  373. return i;
  374. rf_default[RF1] = 1000 * map[i].rf1_def;
  375. rf_default[RF2] = 1000 * map[i].rf2_def;
  376. rf_default[RF3] = 1000 * map[i].rf3_def;
  377. for (rf = RF1; rf <= RF3; rf++) {
  378. if (0 == rf_default[rf])
  379. return 0;
  380. tda_dbg("freq = %d, rf = %d\n", freq, rf);
  381. /* look for optimized calibration frequency */
  382. bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
  383. tda18271_calc_rf_cal(fe, &rf_freq[rf]);
  384. prog_tab[rf] = regs[R_EB14];
  385. if (1 == bcal)
  386. prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
  387. else
  388. prog_cal[rf] = prog_tab[rf];
  389. switch (rf) {
  390. case RF1:
  391. map[i].rf_a1 = 0;
  392. map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
  393. map[i].rf1 = rf_freq[RF1] / 1000;
  394. break;
  395. case RF2:
  396. map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
  397. prog_cal[RF1] + prog_tab[RF1]) /
  398. ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
  399. map[i].rf2 = rf_freq[RF2] / 1000;
  400. break;
  401. case RF3:
  402. map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
  403. prog_cal[RF2] + prog_tab[RF2]) /
  404. ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
  405. map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
  406. map[i].rf3 = rf_freq[RF3] / 1000;
  407. break;
  408. default:
  409. BUG();
  410. }
  411. }
  412. return 0;
  413. }
  414. static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
  415. {
  416. struct tda18271_priv *priv = fe->tuner_priv;
  417. unsigned int i;
  418. tda_info("tda18271: performing RF tracking filter calibration\n");
  419. /* wait for die temperature stabilization */
  420. msleep(200);
  421. tda18271_powerscan_init(fe);
  422. /* rf band calibration */
  423. for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
  424. tda18271_rf_tracking_filters_init(fe, 1000 *
  425. priv->rf_cal_state[i].rfmax);
  426. priv->tm_rfcal = tda18271_read_thermometer(fe);
  427. return 0;
  428. }
  429. /* ------------------------------------------------------------------ */
  430. static int tda18271_rf_cal_init(struct dvb_frontend *fe)
  431. {
  432. struct tda18271_priv *priv = fe->tuner_priv;
  433. if (priv->cal_initialized)
  434. return 0;
  435. tda18271_calc_rf_filter_curve(fe);
  436. tda18271_por(fe);
  437. priv->cal_initialized = true;
  438. return 0;
  439. }
  440. static int tda18271_init(struct dvb_frontend *fe)
  441. {
  442. struct tda18271_priv *priv = fe->tuner_priv;
  443. mutex_lock(&priv->lock);
  444. /* initialization */
  445. tda18271_ir_cal_init(fe);
  446. if (priv->id == TDA18271HDC2)
  447. tda18271_rf_cal_init(fe);
  448. mutex_unlock(&priv->lock);
  449. return 0;
  450. }
  451. static int tda18271c2_tune(struct dvb_frontend *fe,
  452. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  453. {
  454. struct tda18271_priv *priv = fe->tuner_priv;
  455. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  456. tda18271_init(fe);
  457. mutex_lock(&priv->lock);
  458. tda18271_rf_tracking_filters_correction(fe, freq);
  459. tda18271_channel_configuration(fe, ifc, freq, bw, std, radio);
  460. mutex_unlock(&priv->lock);
  461. return 0;
  462. }
  463. /* ------------------------------------------------------------------ */
  464. static int tda18271c1_tune(struct dvb_frontend *fe,
  465. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  466. {
  467. struct tda18271_priv *priv = fe->tuner_priv;
  468. unsigned char *regs = priv->tda18271_regs;
  469. u32 N = 0;
  470. tda18271_init(fe);
  471. mutex_lock(&priv->lock);
  472. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  473. /* RF tracking filter calibration */
  474. /* calculate bp filter */
  475. tda18271_calc_bp_filter(fe, &freq);
  476. tda18271_write_regs(fe, R_EP1, 1);
  477. regs[R_EB4] &= 0x07;
  478. regs[R_EB4] |= 0x60;
  479. tda18271_write_regs(fe, R_EB4, 1);
  480. regs[R_EB7] = 0x60;
  481. tda18271_write_regs(fe, R_EB7, 1);
  482. regs[R_EB14] = 0x00;
  483. tda18271_write_regs(fe, R_EB14, 1);
  484. regs[R_EB20] = 0xcc;
  485. tda18271_write_regs(fe, R_EB20, 1);
  486. /* set cal mode to RF tracking filter calibration */
  487. regs[R_EP4] |= 0x03;
  488. /* calculate cal pll */
  489. switch (priv->mode) {
  490. case TDA18271_ANALOG:
  491. N = freq - 1250000;
  492. break;
  493. case TDA18271_DIGITAL:
  494. N = freq + bw / 2;
  495. break;
  496. }
  497. tda18271_calc_cal_pll(fe, N);
  498. /* calculate main pll */
  499. switch (priv->mode) {
  500. case TDA18271_ANALOG:
  501. N = freq - 250000;
  502. break;
  503. case TDA18271_DIGITAL:
  504. N = freq + bw / 2 + 1000000;
  505. break;
  506. }
  507. tda18271_calc_main_pll(fe, N);
  508. tda18271_write_regs(fe, R_EP3, 11);
  509. msleep(5); /* RF tracking filter calibration initialization */
  510. /* search for K,M,CO for RF calibration */
  511. tda18271_calc_km(fe, &freq);
  512. tda18271_write_regs(fe, R_EB13, 1);
  513. /* search for rf band */
  514. tda18271_calc_rf_band(fe, &freq);
  515. /* search for gain taper */
  516. tda18271_calc_gain_taper(fe, &freq);
  517. tda18271_write_regs(fe, R_EP2, 1);
  518. tda18271_write_regs(fe, R_EP1, 1);
  519. tda18271_write_regs(fe, R_EP2, 1);
  520. tda18271_write_regs(fe, R_EP1, 1);
  521. regs[R_EB4] &= 0x07;
  522. regs[R_EB4] |= 0x40;
  523. tda18271_write_regs(fe, R_EB4, 1);
  524. regs[R_EB7] = 0x40;
  525. tda18271_write_regs(fe, R_EB7, 1);
  526. msleep(10);
  527. regs[R_EB20] = 0xec;
  528. tda18271_write_regs(fe, R_EB20, 1);
  529. msleep(60); /* RF tracking filter calibration completion */
  530. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  531. tda18271_write_regs(fe, R_EP4, 1);
  532. tda18271_write_regs(fe, R_EP1, 1);
  533. /* RF tracking filter correction for VHF_Low band */
  534. if (0 == tda18271_calc_rf_cal(fe, &freq))
  535. tda18271_write_regs(fe, R_EB14, 1);
  536. /* Channel Configuration */
  537. switch (priv->mode) {
  538. case TDA18271_ANALOG:
  539. regs[R_EB22] = 0x2c;
  540. break;
  541. case TDA18271_DIGITAL:
  542. regs[R_EB22] = 0x37;
  543. break;
  544. }
  545. tda18271_write_regs(fe, R_EB22, 1);
  546. regs[R_EP1] |= 0x40; /* set dis power level on */
  547. /* set standard */
  548. regs[R_EP3] &= ~0x1f; /* clear std bits */
  549. /* see table 22 */
  550. regs[R_EP3] |= std;
  551. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  552. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  553. switch (priv->mode) {
  554. case TDA18271_ANALOG:
  555. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  556. break;
  557. case TDA18271_DIGITAL:
  558. regs[R_EP4] |= 0x04;
  559. regs[R_MPD] |= 0x80;
  560. break;
  561. }
  562. if (radio)
  563. regs[R_EP4] |= 0x80;
  564. else
  565. regs[R_EP4] &= ~0x80;
  566. /* image rejection validity */
  567. tda18271_calc_ir_measure(fe, &freq);
  568. /* calculate MAIN PLL */
  569. N = freq + ifc;
  570. tda18271_calc_main_pll(fe, N);
  571. tda18271_write_regs(fe, R_TM, 15);
  572. msleep(5);
  573. mutex_unlock(&priv->lock);
  574. return 0;
  575. }
  576. static inline int tda18271_tune(struct dvb_frontend *fe,
  577. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  578. {
  579. struct tda18271_priv *priv = fe->tuner_priv;
  580. int ret = -EINVAL;
  581. switch (priv->id) {
  582. case TDA18271HDC1:
  583. ret = tda18271c1_tune(fe, ifc, freq, bw, std, radio);
  584. break;
  585. case TDA18271HDC2:
  586. ret = tda18271c2_tune(fe, ifc, freq, bw, std, radio);
  587. break;
  588. }
  589. return ret;
  590. }
  591. /* ------------------------------------------------------------------ */
  592. static int tda18271_set_params(struct dvb_frontend *fe,
  593. struct dvb_frontend_parameters *params)
  594. {
  595. struct tda18271_priv *priv = fe->tuner_priv;
  596. struct tda18271_std_map *std_map = &priv->std;
  597. int ret;
  598. u8 std;
  599. u16 sgIF;
  600. u32 bw, freq = params->frequency;
  601. priv->mode = TDA18271_DIGITAL;
  602. /* see table 22 */
  603. if (fe->ops.info.type == FE_ATSC) {
  604. switch (params->u.vsb.modulation) {
  605. case VSB_8:
  606. case VSB_16:
  607. std = std_map->atsc_6.std_bits;
  608. sgIF = std_map->atsc_6.if_freq;
  609. break;
  610. case QAM_64:
  611. case QAM_256:
  612. std = std_map->qam_6.std_bits;
  613. sgIF = std_map->qam_6.if_freq;
  614. break;
  615. default:
  616. tda_warn("modulation not set!\n");
  617. return -EINVAL;
  618. }
  619. #if 0
  620. /* userspace request is already center adjusted */
  621. freq += 1750000; /* Adjust to center (+1.75MHZ) */
  622. #endif
  623. bw = 6000000;
  624. } else if (fe->ops.info.type == FE_OFDM) {
  625. switch (params->u.ofdm.bandwidth) {
  626. case BANDWIDTH_6_MHZ:
  627. bw = 6000000;
  628. std = std_map->dvbt_6.std_bits;
  629. sgIF = std_map->dvbt_6.if_freq;
  630. break;
  631. case BANDWIDTH_7_MHZ:
  632. bw = 7000000;
  633. std = std_map->dvbt_7.std_bits;
  634. sgIF = std_map->dvbt_7.if_freq;
  635. break;
  636. case BANDWIDTH_8_MHZ:
  637. bw = 8000000;
  638. std = std_map->dvbt_8.std_bits;
  639. sgIF = std_map->dvbt_8.if_freq;
  640. break;
  641. default:
  642. tda_warn("bandwidth not set!\n");
  643. return -EINVAL;
  644. }
  645. } else {
  646. tda_warn("modulation type not supported!\n");
  647. return -EINVAL;
  648. }
  649. ret = tda18271_tune(fe, sgIF * 1000, freq, bw, std, 0);
  650. if (ret < 0)
  651. goto fail;
  652. priv->frequency = freq;
  653. priv->bandwidth = (fe->ops.info.type == FE_OFDM) ?
  654. params->u.ofdm.bandwidth : 0;
  655. fail:
  656. return ret;
  657. }
  658. static int tda18271_set_analog_params(struct dvb_frontend *fe,
  659. struct analog_parameters *params)
  660. {
  661. struct tda18271_priv *priv = fe->tuner_priv;
  662. struct tda18271_std_map *std_map = &priv->std;
  663. char *mode;
  664. int ret, radio = 0;
  665. u8 std;
  666. u16 sgIF;
  667. u32 freq = params->frequency * 62500;
  668. priv->mode = TDA18271_ANALOG;
  669. if (params->mode == V4L2_TUNER_RADIO) {
  670. radio = 1;
  671. freq = freq / 1000;
  672. std = std_map->fm_radio.std_bits;
  673. sgIF = std_map->fm_radio.if_freq;
  674. mode = "fm";
  675. } else if (params->std & V4L2_STD_MN) {
  676. std = std_map->atv_mn.std_bits;
  677. sgIF = std_map->atv_mn.if_freq;
  678. mode = "MN";
  679. } else if (params->std & V4L2_STD_B) {
  680. std = std_map->atv_b.std_bits;
  681. sgIF = std_map->atv_b.if_freq;
  682. mode = "B";
  683. } else if (params->std & V4L2_STD_GH) {
  684. std = std_map->atv_gh.std_bits;
  685. sgIF = std_map->atv_gh.if_freq;
  686. mode = "GH";
  687. } else if (params->std & V4L2_STD_PAL_I) {
  688. std = std_map->atv_i.std_bits;
  689. sgIF = std_map->atv_i.if_freq;
  690. mode = "I";
  691. } else if (params->std & V4L2_STD_DK) {
  692. std = std_map->atv_dk.std_bits;
  693. sgIF = std_map->atv_dk.if_freq;
  694. mode = "DK";
  695. } else if (params->std & V4L2_STD_SECAM_L) {
  696. std = std_map->atv_l.std_bits;
  697. sgIF = std_map->atv_l.if_freq;
  698. mode = "L";
  699. } else if (params->std & V4L2_STD_SECAM_LC) {
  700. std = std_map->atv_lc.std_bits;
  701. sgIF = std_map->atv_lc.if_freq;
  702. mode = "L'";
  703. } else {
  704. std = std_map->atv_i.std_bits;
  705. sgIF = std_map->atv_i.if_freq;
  706. mode = "xx";
  707. }
  708. tda_dbg("setting tda18271 to system %s\n", mode);
  709. ret = tda18271_tune(fe, sgIF * 1000, freq, 0, std, radio);
  710. if (ret < 0)
  711. goto fail;
  712. priv->frequency = freq;
  713. priv->bandwidth = 0;
  714. fail:
  715. return ret;
  716. }
  717. static int tda18271_release(struct dvb_frontend *fe)
  718. {
  719. struct tda18271_priv *priv = fe->tuner_priv;
  720. mutex_lock(&tda18271_list_mutex);
  721. priv->count--;
  722. if (!priv->count) {
  723. tda_dbg("destroying instance @ %d-%04x\n",
  724. i2c_adapter_id(priv->i2c_adap),
  725. priv->i2c_addr);
  726. list_del(&priv->tda18271_list);
  727. kfree(priv);
  728. }
  729. mutex_unlock(&tda18271_list_mutex);
  730. fe->tuner_priv = NULL;
  731. return 0;
  732. }
  733. static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  734. {
  735. struct tda18271_priv *priv = fe->tuner_priv;
  736. *frequency = priv->frequency;
  737. return 0;
  738. }
  739. static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  740. {
  741. struct tda18271_priv *priv = fe->tuner_priv;
  742. *bandwidth = priv->bandwidth;
  743. return 0;
  744. }
  745. /* ------------------------------------------------------------------ */
  746. #define tda18271_update_std(std_cfg, name) do { \
  747. if (map->std_cfg.if_freq + map->std_cfg.std_bits > 0) { \
  748. tda_dbg("Using custom std config for %s\n", name); \
  749. memcpy(&std->std_cfg, &map->std_cfg, \
  750. sizeof(struct tda18271_std_map_item)); \
  751. } } while (0)
  752. #define tda18271_dump_std_item(std_cfg, name) do { \
  753. tda_dbg("(%s) if freq = %d, std bits = 0x%02x\n", \
  754. name, std->std_cfg.if_freq, std->std_cfg.std_bits); \
  755. } while (0)
  756. static int tda18271_dump_std_map(struct dvb_frontend *fe)
  757. {
  758. struct tda18271_priv *priv = fe->tuner_priv;
  759. struct tda18271_std_map *std = &priv->std;
  760. tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
  761. tda18271_dump_std_item(fm_radio, "fm");
  762. tda18271_dump_std_item(atv_b, "pal b");
  763. tda18271_dump_std_item(atv_dk, "pal dk");
  764. tda18271_dump_std_item(atv_gh, "pal gh");
  765. tda18271_dump_std_item(atv_i, "pal i");
  766. tda18271_dump_std_item(atv_l, "pal l");
  767. tda18271_dump_std_item(atv_lc, "pal l'");
  768. tda18271_dump_std_item(atv_mn, "atv mn");
  769. tda18271_dump_std_item(atsc_6, "atsc 6");
  770. tda18271_dump_std_item(dvbt_6, "dvbt 6");
  771. tda18271_dump_std_item(dvbt_7, "dvbt 7");
  772. tda18271_dump_std_item(dvbt_8, "dvbt 8");
  773. tda18271_dump_std_item(qam_6, "qam 6");
  774. tda18271_dump_std_item(qam_8, "qam 8");
  775. return 0;
  776. }
  777. static int tda18271_update_std_map(struct dvb_frontend *fe,
  778. struct tda18271_std_map *map)
  779. {
  780. struct tda18271_priv *priv = fe->tuner_priv;
  781. struct tda18271_std_map *std = &priv->std;
  782. if (!map)
  783. return -EINVAL;
  784. tda18271_update_std(fm_radio, "fm");
  785. tda18271_update_std(atv_b, "atv b");
  786. tda18271_update_std(atv_dk, "atv dk");
  787. tda18271_update_std(atv_gh, "atv gh");
  788. tda18271_update_std(atv_i, "atv i");
  789. tda18271_update_std(atv_l, "atv l");
  790. tda18271_update_std(atv_lc, "atv l'");
  791. tda18271_update_std(atv_mn, "atv mn");
  792. tda18271_update_std(atsc_6, "atsc 6");
  793. tda18271_update_std(dvbt_6, "dvbt 6");
  794. tda18271_update_std(dvbt_7, "dvbt 7");
  795. tda18271_update_std(dvbt_8, "dvbt 8");
  796. tda18271_update_std(qam_6, "qam 6");
  797. tda18271_update_std(qam_8, "qam 8");
  798. return 0;
  799. }
  800. static int tda18271_get_id(struct dvb_frontend *fe)
  801. {
  802. struct tda18271_priv *priv = fe->tuner_priv;
  803. unsigned char *regs = priv->tda18271_regs;
  804. char *name;
  805. int ret = 0;
  806. mutex_lock(&priv->lock);
  807. tda18271_read_regs(fe);
  808. mutex_unlock(&priv->lock);
  809. switch (regs[R_ID] & 0x7f) {
  810. case 3:
  811. name = "TDA18271HD/C1";
  812. priv->id = TDA18271HDC1;
  813. break;
  814. case 4:
  815. name = "TDA18271HD/C2";
  816. priv->id = TDA18271HDC2;
  817. break;
  818. default:
  819. name = "Unknown device";
  820. ret = -EINVAL;
  821. break;
  822. }
  823. tda_info("%s detected @ %d-%04x%s\n", name,
  824. i2c_adapter_id(priv->i2c_adap), priv->i2c_addr,
  825. (0 == ret) ? "" : ", device not supported.");
  826. return ret;
  827. }
  828. static struct dvb_tuner_ops tda18271_tuner_ops = {
  829. .info = {
  830. .name = "NXP TDA18271HD",
  831. .frequency_min = 45000000,
  832. .frequency_max = 864000000,
  833. .frequency_step = 62500
  834. },
  835. .init = tda18271_init,
  836. .set_params = tda18271_set_params,
  837. .set_analog_params = tda18271_set_analog_params,
  838. .release = tda18271_release,
  839. .get_frequency = tda18271_get_frequency,
  840. .get_bandwidth = tda18271_get_bandwidth,
  841. };
  842. struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
  843. struct i2c_adapter *i2c,
  844. struct tda18271_config *cfg)
  845. {
  846. struct tda18271_priv *priv = NULL;
  847. int state_found = 0;
  848. mutex_lock(&tda18271_list_mutex);
  849. list_for_each_entry(priv, &tda18271_list, tda18271_list) {
  850. if ((i2c_adapter_id(priv->i2c_adap) == i2c_adapter_id(i2c)) &&
  851. (priv->i2c_addr == addr)) {
  852. tda_dbg("attaching existing tuner @ %d-%04x\n",
  853. i2c_adapter_id(priv->i2c_adap),
  854. priv->i2c_addr);
  855. priv->count++;
  856. fe->tuner_priv = priv;
  857. state_found = 1;
  858. /* allow dvb driver to override i2c gate setting */
  859. if ((cfg) && (cfg->gate != TDA18271_GATE_ANALOG))
  860. priv->gate = cfg->gate;
  861. break;
  862. }
  863. }
  864. if (state_found == 0) {
  865. tda_dbg("creating new tuner instance @ %d-%04x\n",
  866. i2c_adapter_id(i2c), addr);
  867. priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
  868. if (priv == NULL) {
  869. mutex_unlock(&tda18271_list_mutex);
  870. return NULL;
  871. }
  872. priv->i2c_addr = addr;
  873. priv->i2c_adap = i2c;
  874. priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
  875. priv->cal_initialized = false;
  876. mutex_init(&priv->lock);
  877. priv->count++;
  878. fe->tuner_priv = priv;
  879. list_add_tail(&priv->tda18271_list, &tda18271_list);
  880. if (tda18271_get_id(fe) < 0)
  881. goto fail;
  882. if (tda18271_assign_map_layout(fe) < 0)
  883. goto fail;
  884. mutex_lock(&priv->lock);
  885. tda18271_init_regs(fe);
  886. mutex_unlock(&priv->lock);
  887. }
  888. /* override default std map with values in config struct */
  889. if ((cfg) && (cfg->std_map))
  890. tda18271_update_std_map(fe, cfg->std_map);
  891. mutex_unlock(&tda18271_list_mutex);
  892. memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
  893. sizeof(struct dvb_tuner_ops));
  894. if (tda18271_debug & DBG_MAP)
  895. tda18271_dump_std_map(fe);
  896. return fe;
  897. fail:
  898. mutex_unlock(&tda18271_list_mutex);
  899. tda18271_release(fe);
  900. return NULL;
  901. }
  902. EXPORT_SYMBOL_GPL(tda18271_attach);
  903. MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
  904. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  905. MODULE_LICENSE("GPL");
  906. MODULE_VERSION("0.2");
  907. /*
  908. * Overrides for Emacs so that we follow Linus's tabbing style.
  909. * ---------------------------------------------------------------------------
  910. * Local variables:
  911. * c-basic-offset: 8
  912. * End:
  913. */