board-cm-t35.c 19 KB

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  1. /*
  2. * CompuLab CM-T35/CM-T3730 modules support
  3. *
  4. * Copyright (C) 2009-2011 CompuLab, Ltd.
  5. * Authors: Mike Rapoport <mike@compulab.co.il>
  6. * Igor Grinberg <grinberg@compulab.co.il>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/input.h>
  22. #include <linux/input/matrix_keypad.h>
  23. #include <linux/delay.h>
  24. #include <linux/gpio.h>
  25. #include <linux/i2c/at24.h>
  26. #include <linux/i2c/twl.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/spi/tdo24m.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/map.h>
  34. #include <plat/board.h>
  35. #include <plat/common.h>
  36. #include <plat/nand.h>
  37. #include <plat/gpmc.h>
  38. #include <plat/usb.h>
  39. #include <video/omapdss.h>
  40. #include <video/omap-panel-generic-dpi.h>
  41. #include <plat/mcspi.h>
  42. #include <mach/hardware.h>
  43. #include "mux.h"
  44. #include "sdram-micron-mt46h32m32lf-6.h"
  45. #include "hsmmc.h"
  46. #include "common-board-devices.h"
  47. #define CM_T35_GPIO_PENDOWN 57
  48. #define CM_T35_SMSC911X_CS 5
  49. #define CM_T35_SMSC911X_GPIO 163
  50. #define SB_T35_SMSC911X_CS 4
  51. #define SB_T35_SMSC911X_GPIO 65
  52. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  53. #include <linux/smsc911x.h>
  54. #include <plat/gpmc-smsc911x.h>
  55. static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
  56. .id = 0,
  57. .cs = CM_T35_SMSC911X_CS,
  58. .gpio_irq = CM_T35_SMSC911X_GPIO,
  59. .gpio_reset = -EINVAL,
  60. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  61. };
  62. static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
  63. .id = 1,
  64. .cs = SB_T35_SMSC911X_CS,
  65. .gpio_irq = SB_T35_SMSC911X_GPIO,
  66. .gpio_reset = -EINVAL,
  67. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  68. };
  69. static void __init cm_t35_init_ethernet(void)
  70. {
  71. gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
  72. gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
  73. }
  74. #else
  75. static inline void __init cm_t35_init_ethernet(void) { return; }
  76. #endif
  77. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  78. #include <linux/leds.h>
  79. static struct gpio_led cm_t35_leds[] = {
  80. [0] = {
  81. .gpio = 186,
  82. .name = "cm-t35:green",
  83. .default_trigger = "heartbeat",
  84. .active_low = 0,
  85. },
  86. };
  87. static struct gpio_led_platform_data cm_t35_led_pdata = {
  88. .num_leds = ARRAY_SIZE(cm_t35_leds),
  89. .leds = cm_t35_leds,
  90. };
  91. static struct platform_device cm_t35_led_device = {
  92. .name = "leds-gpio",
  93. .id = -1,
  94. .dev = {
  95. .platform_data = &cm_t35_led_pdata,
  96. },
  97. };
  98. static void __init cm_t35_init_led(void)
  99. {
  100. platform_device_register(&cm_t35_led_device);
  101. }
  102. #else
  103. static inline void cm_t35_init_led(void) {}
  104. #endif
  105. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  106. #include <linux/mtd/mtd.h>
  107. #include <linux/mtd/nand.h>
  108. #include <linux/mtd/partitions.h>
  109. static struct mtd_partition cm_t35_nand_partitions[] = {
  110. {
  111. .name = "xloader",
  112. .offset = 0, /* Offset = 0x00000 */
  113. .size = 4 * NAND_BLOCK_SIZE,
  114. .mask_flags = MTD_WRITEABLE
  115. },
  116. {
  117. .name = "uboot",
  118. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  119. .size = 15 * NAND_BLOCK_SIZE,
  120. },
  121. {
  122. .name = "uboot environment",
  123. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  124. .size = 2 * NAND_BLOCK_SIZE,
  125. },
  126. {
  127. .name = "linux",
  128. .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
  129. .size = 32 * NAND_BLOCK_SIZE,
  130. },
  131. {
  132. .name = "rootfs",
  133. .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
  134. .size = MTDPART_SIZ_FULL,
  135. },
  136. };
  137. static struct omap_nand_platform_data cm_t35_nand_data = {
  138. .parts = cm_t35_nand_partitions,
  139. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  140. .cs = 0,
  141. };
  142. static void __init cm_t35_init_nand(void)
  143. {
  144. if (gpmc_nand_init(&cm_t35_nand_data) < 0)
  145. pr_err("CM-T35: Unable to register NAND device\n");
  146. }
  147. #else
  148. static inline void cm_t35_init_nand(void) {}
  149. #endif
  150. #define CM_T35_LCD_EN_GPIO 157
  151. #define CM_T35_LCD_BL_GPIO 58
  152. #define CM_T35_DVI_EN_GPIO 54
  153. static int lcd_enabled;
  154. static int dvi_enabled;
  155. static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
  156. {
  157. if (dvi_enabled) {
  158. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  159. return -EINVAL;
  160. }
  161. gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
  162. gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
  163. lcd_enabled = 1;
  164. return 0;
  165. }
  166. static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
  167. {
  168. lcd_enabled = 0;
  169. gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
  170. gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
  171. }
  172. static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
  173. {
  174. if (lcd_enabled) {
  175. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  176. return -EINVAL;
  177. }
  178. gpio_set_value(CM_T35_DVI_EN_GPIO, 0);
  179. dvi_enabled = 1;
  180. return 0;
  181. }
  182. static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
  183. {
  184. gpio_set_value(CM_T35_DVI_EN_GPIO, 1);
  185. dvi_enabled = 0;
  186. }
  187. static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
  188. {
  189. return 0;
  190. }
  191. static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
  192. {
  193. }
  194. static struct panel_generic_dpi_data lcd_panel = {
  195. .name = "toppoly_tdo35s",
  196. .platform_enable = cm_t35_panel_enable_lcd,
  197. .platform_disable = cm_t35_panel_disable_lcd,
  198. };
  199. static struct omap_dss_device cm_t35_lcd_device = {
  200. .name = "lcd",
  201. .type = OMAP_DISPLAY_TYPE_DPI,
  202. .driver_name = "generic_dpi_panel",
  203. .data = &lcd_panel,
  204. .phy.dpi.data_lines = 18,
  205. };
  206. static struct panel_generic_dpi_data dvi_panel = {
  207. .name = "generic",
  208. .platform_enable = cm_t35_panel_enable_dvi,
  209. .platform_disable = cm_t35_panel_disable_dvi,
  210. };
  211. static struct omap_dss_device cm_t35_dvi_device = {
  212. .name = "dvi",
  213. .type = OMAP_DISPLAY_TYPE_DPI,
  214. .driver_name = "generic_dpi_panel",
  215. .data = &dvi_panel,
  216. .phy.dpi.data_lines = 24,
  217. };
  218. static struct omap_dss_device cm_t35_tv_device = {
  219. .name = "tv",
  220. .driver_name = "venc",
  221. .type = OMAP_DISPLAY_TYPE_VENC,
  222. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  223. .platform_enable = cm_t35_panel_enable_tv,
  224. .platform_disable = cm_t35_panel_disable_tv,
  225. };
  226. static struct omap_dss_device *cm_t35_dss_devices[] = {
  227. &cm_t35_lcd_device,
  228. &cm_t35_dvi_device,
  229. &cm_t35_tv_device,
  230. };
  231. static struct omap_dss_board_info cm_t35_dss_data = {
  232. .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
  233. .devices = cm_t35_dss_devices,
  234. .default_device = &cm_t35_dvi_device,
  235. };
  236. static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
  237. .turbo_mode = 0,
  238. .single_channel = 1, /* 0: slave, 1: master */
  239. };
  240. static struct tdo24m_platform_data tdo24m_config = {
  241. .model = TDO35S,
  242. };
  243. static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
  244. {
  245. .modalias = "tdo24m",
  246. .bus_num = 4,
  247. .chip_select = 0,
  248. .max_speed_hz = 1000000,
  249. .controller_data = &tdo24m_mcspi_config,
  250. .platform_data = &tdo24m_config,
  251. },
  252. };
  253. static struct gpio cm_t35_dss_gpios[] __initdata = {
  254. { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
  255. { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
  256. { CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" },
  257. };
  258. static void __init cm_t35_init_display(void)
  259. {
  260. int err;
  261. spi_register_board_info(cm_t35_lcd_spi_board_info,
  262. ARRAY_SIZE(cm_t35_lcd_spi_board_info));
  263. err = gpio_request_array(cm_t35_dss_gpios,
  264. ARRAY_SIZE(cm_t35_dss_gpios));
  265. if (err) {
  266. pr_err("CM-T35: failed to request DSS control GPIOs\n");
  267. return;
  268. }
  269. gpio_export(CM_T35_LCD_EN_GPIO, 0);
  270. gpio_export(CM_T35_LCD_BL_GPIO, 0);
  271. gpio_export(CM_T35_DVI_EN_GPIO, 0);
  272. msleep(50);
  273. gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
  274. err = omap_display_init(&cm_t35_dss_data);
  275. if (err) {
  276. pr_err("CM-T35: failed to register DSS device\n");
  277. gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
  278. }
  279. }
  280. static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
  281. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  282. };
  283. static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
  284. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  285. };
  286. static struct regulator_consumer_supply cm_t35_vdac_supply[] = {
  287. REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
  288. };
  289. static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
  290. REGULATOR_SUPPLY("vdvi", "omapdss"),
  291. };
  292. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  293. static struct regulator_init_data cm_t35_vmmc1 = {
  294. .constraints = {
  295. .min_uV = 1850000,
  296. .max_uV = 3150000,
  297. .valid_modes_mask = REGULATOR_MODE_NORMAL
  298. | REGULATOR_MODE_STANDBY,
  299. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  300. | REGULATOR_CHANGE_MODE
  301. | REGULATOR_CHANGE_STATUS,
  302. },
  303. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
  304. .consumer_supplies = cm_t35_vmmc1_supply,
  305. };
  306. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  307. static struct regulator_init_data cm_t35_vsim = {
  308. .constraints = {
  309. .min_uV = 1800000,
  310. .max_uV = 3000000,
  311. .valid_modes_mask = REGULATOR_MODE_NORMAL
  312. | REGULATOR_MODE_STANDBY,
  313. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  314. | REGULATOR_CHANGE_MODE
  315. | REGULATOR_CHANGE_STATUS,
  316. },
  317. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
  318. .consumer_supplies = cm_t35_vsim_supply,
  319. };
  320. /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
  321. static struct regulator_init_data cm_t35_vdac = {
  322. .constraints = {
  323. .min_uV = 1800000,
  324. .max_uV = 1800000,
  325. .valid_modes_mask = REGULATOR_MODE_NORMAL
  326. | REGULATOR_MODE_STANDBY,
  327. .valid_ops_mask = REGULATOR_CHANGE_MODE
  328. | REGULATOR_CHANGE_STATUS,
  329. },
  330. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply),
  331. .consumer_supplies = cm_t35_vdac_supply,
  332. };
  333. /* VPLL2 for digital video outputs */
  334. static struct regulator_init_data cm_t35_vpll2 = {
  335. .constraints = {
  336. .name = "VDVI",
  337. .min_uV = 1800000,
  338. .max_uV = 1800000,
  339. .valid_modes_mask = REGULATOR_MODE_NORMAL
  340. | REGULATOR_MODE_STANDBY,
  341. .valid_ops_mask = REGULATOR_CHANGE_MODE
  342. | REGULATOR_CHANGE_STATUS,
  343. },
  344. .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply),
  345. .consumer_supplies = cm_t35_vdvi_supply,
  346. };
  347. static struct twl4030_usb_data cm_t35_usb_data = {
  348. .usb_mode = T2_USB_MODE_ULPI,
  349. };
  350. static uint32_t cm_t35_keymap[] = {
  351. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  352. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  353. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  354. };
  355. static struct matrix_keymap_data cm_t35_keymap_data = {
  356. .keymap = cm_t35_keymap,
  357. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  358. };
  359. static struct twl4030_keypad_data cm_t35_kp_data = {
  360. .keymap_data = &cm_t35_keymap_data,
  361. .rows = 3,
  362. .cols = 3,
  363. .rep = 1,
  364. };
  365. static struct omap2_hsmmc_info mmc[] = {
  366. {
  367. .mmc = 1,
  368. .caps = MMC_CAP_4_BIT_DATA,
  369. .gpio_cd = -EINVAL,
  370. .gpio_wp = -EINVAL,
  371. },
  372. {
  373. .mmc = 2,
  374. .caps = MMC_CAP_4_BIT_DATA,
  375. .transceiver = 1,
  376. .gpio_cd = -EINVAL,
  377. .gpio_wp = -EINVAL,
  378. .ocr_mask = 0x00100000, /* 3.3V */
  379. },
  380. {} /* Terminator */
  381. };
  382. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  383. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  384. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  385. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  386. .phy_reset = true,
  387. .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
  388. .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
  389. .reset_gpio_port[2] = -EINVAL
  390. };
  391. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  392. unsigned ngpio)
  393. {
  394. int wlan_rst = gpio + 2;
  395. if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
  396. gpio_export(wlan_rst, 0);
  397. udelay(10);
  398. gpio_set_value_cansleep(wlan_rst, 0);
  399. udelay(10);
  400. gpio_set_value_cansleep(wlan_rst, 1);
  401. } else {
  402. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  403. }
  404. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  405. mmc[0].gpio_cd = gpio + 0;
  406. omap2_hsmmc_init(mmc);
  407. return 0;
  408. }
  409. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  410. .gpio_base = OMAP_MAX_GPIO_LINES,
  411. .irq_base = TWL4030_GPIO_IRQ_BASE,
  412. .irq_end = TWL4030_GPIO_IRQ_END,
  413. .setup = cm_t35_twl_gpio_setup,
  414. };
  415. static struct twl4030_platform_data cm_t35_twldata = {
  416. .irq_base = TWL4030_IRQ_BASE,
  417. .irq_end = TWL4030_IRQ_END,
  418. /* platform_data for children goes here */
  419. .keypad = &cm_t35_kp_data,
  420. .usb = &cm_t35_usb_data,
  421. .gpio = &cm_t35_gpio_data,
  422. .vmmc1 = &cm_t35_vmmc1,
  423. .vsim = &cm_t35_vsim,
  424. .vdac = &cm_t35_vdac,
  425. .vpll2 = &cm_t35_vpll2,
  426. };
  427. static void __init cm_t35_init_i2c(void)
  428. {
  429. omap3_pmic_init("tps65930", &cm_t35_twldata);
  430. }
  431. static void __init cm_t35_init_early(void)
  432. {
  433. omap2_init_common_infrastructure();
  434. omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
  435. mt46h32m32lf6_sdrc_params);
  436. }
  437. #ifdef CONFIG_OMAP_MUX
  438. static struct omap_board_mux board_mux[] __initdata = {
  439. /* nCS and IRQ for CM-T35 ethernet */
  440. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  441. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  442. /* nCS and IRQ for SB-T35 ethernet */
  443. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  444. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  445. /* PENDOWN GPIO */
  446. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  447. /* mUSB */
  448. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  449. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  450. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  451. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  452. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  453. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  454. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  455. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  456. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  457. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  458. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  459. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  460. /* MMC 2 */
  461. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  462. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  463. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  464. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  465. /* McSPI 1 */
  466. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  467. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  468. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  469. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  470. /* McSPI 4 */
  471. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  472. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  473. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  474. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  475. /* McBSP 2 */
  476. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  477. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  478. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  479. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  480. /* serial ports */
  481. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  482. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  483. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  484. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  485. /* common DSS */
  486. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  487. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  488. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  489. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  490. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  491. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  492. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  493. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  494. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  495. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  496. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  497. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  498. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  499. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  500. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  501. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  502. /* display controls */
  503. OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  504. OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  505. OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  506. /* TPS IRQ */
  507. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  508. OMAP_PIN_INPUT_PULLUP),
  509. { .reg_offset = OMAP_MUX_TERMINATOR },
  510. };
  511. static void __init cm_t3x_common_dss_mux_init(int mux_mode)
  512. {
  513. omap_mux_init_signal("dss_data18", mux_mode);
  514. omap_mux_init_signal("dss_data19", mux_mode);
  515. omap_mux_init_signal("dss_data20", mux_mode);
  516. omap_mux_init_signal("dss_data21", mux_mode);
  517. omap_mux_init_signal("dss_data22", mux_mode);
  518. omap_mux_init_signal("dss_data23", mux_mode);
  519. }
  520. static void __init cm_t35_init_mux(void)
  521. {
  522. omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  523. omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  524. omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  525. omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  526. omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  527. omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  528. cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
  529. }
  530. static void __init cm_t3730_init_mux(void)
  531. {
  532. omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  533. omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  534. omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  535. omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  536. omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  537. omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  538. cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
  539. }
  540. #else
  541. static inline void cm_t35_init_mux(void) {}
  542. static inline void cm_t3730_init_mux(void) {}
  543. #endif
  544. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  545. };
  546. static void __init cm_t3x_common_init(void)
  547. {
  548. omap_board_config = cm_t35_config;
  549. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  550. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  551. omap_serial_init();
  552. cm_t35_init_i2c();
  553. omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
  554. cm_t35_init_ethernet();
  555. cm_t35_init_led();
  556. cm_t35_init_display();
  557. usb_musb_init(NULL);
  558. usbhs_init(&usbhs_bdata);
  559. }
  560. static void __init cm_t35_init(void)
  561. {
  562. cm_t3x_common_init();
  563. cm_t35_init_mux();
  564. cm_t35_init_nand();
  565. }
  566. static void __init cm_t3730_init(void)
  567. {
  568. cm_t3x_common_init();
  569. cm_t3730_init_mux();
  570. }
  571. MACHINE_START(CM_T35, "Compulab CM-T35")
  572. .boot_params = 0x80000100,
  573. .reserve = omap_reserve,
  574. .map_io = omap3_map_io,
  575. .init_early = cm_t35_init_early,
  576. .init_irq = omap3_init_irq,
  577. .init_machine = cm_t35_init,
  578. .timer = &omap3_timer,
  579. MACHINE_END
  580. MACHINE_START(CM_T3730, "Compulab CM-T3730")
  581. .boot_params = 0x80000100,
  582. .reserve = omap_reserve,
  583. .map_io = omap3_map_io,
  584. .init_early = cm_t35_init_early,
  585. .init_irq = omap3_init_irq,
  586. .init_machine = cm_t3730_init,
  587. .timer = &omap3_timer,
  588. MACHINE_END