ide.h 46 KB

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  1. #ifndef _IDE_H
  2. #define _IDE_H
  3. /*
  4. * linux/include/linux/ide.h
  5. *
  6. * Copyright (C) 1994-2002 Linus Torvalds & authors
  7. */
  8. #include <linux/init.h>
  9. #include <linux/ioport.h>
  10. #include <linux/ata.h>
  11. #include <linux/blkdev.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/bitops.h>
  15. #include <linux/bio.h>
  16. #include <linux/device.h>
  17. #include <linux/pci.h>
  18. #include <linux/completion.h>
  19. #include <linux/pm.h>
  20. #ifdef CONFIG_BLK_DEV_IDEACPI
  21. #include <acpi/acpi.h>
  22. #endif
  23. #include <asm/byteorder.h>
  24. #include <asm/system.h>
  25. #include <asm/io.h>
  26. #include <asm/mutex.h>
  27. #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
  28. # define SUPPORT_VLB_SYNC 0
  29. #else
  30. # define SUPPORT_VLB_SYNC 1
  31. #endif
  32. /*
  33. * Probably not wise to fiddle with these
  34. */
  35. #define IDE_DEFAULT_MAX_FAILURES 1
  36. #define ERROR_MAX 8 /* Max read/write errors per sector */
  37. #define ERROR_RESET 3 /* Reset controller every 4th retry */
  38. #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
  39. /*
  40. * Definitions for accessing IDE controller registers
  41. */
  42. #define IDE_NR_PORTS (10)
  43. struct ide_io_ports {
  44. unsigned long data_addr;
  45. union {
  46. unsigned long error_addr; /* read: error */
  47. unsigned long feature_addr; /* write: feature */
  48. };
  49. unsigned long nsect_addr;
  50. unsigned long lbal_addr;
  51. unsigned long lbam_addr;
  52. unsigned long lbah_addr;
  53. unsigned long device_addr;
  54. union {
  55. unsigned long status_addr; /*  read: status  */
  56. unsigned long command_addr; /* write: command */
  57. };
  58. unsigned long ctl_addr;
  59. unsigned long irq_addr;
  60. };
  61. #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
  62. #define BAD_R_STAT (ATA_BUSY | ATA_ERR)
  63. #define BAD_W_STAT (BAD_R_STAT | ATA_DF)
  64. #define BAD_STAT (BAD_R_STAT | ATA_DRQ)
  65. #define DRIVE_READY (ATA_DRDY | ATA_DSC)
  66. #define BAD_CRC (ATA_ABORTED | ATA_ICRC)
  67. #define SATA_NR_PORTS (3) /* 16 possible ?? */
  68. #define SATA_STATUS_OFFSET (0)
  69. #define SATA_ERROR_OFFSET (1)
  70. #define SATA_CONTROL_OFFSET (2)
  71. /*
  72. * Our Physical Region Descriptor (PRD) table should be large enough
  73. * to handle the biggest I/O request we are likely to see. Since requests
  74. * can have no more than 256 sectors, and since the typical blocksize is
  75. * two or more sectors, we could get by with a limit of 128 entries here for
  76. * the usual worst case. Most requests seem to include some contiguous blocks,
  77. * further reducing the number of table entries required.
  78. *
  79. * The driver reverts to PIO mode for individual requests that exceed
  80. * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
  81. * 100% of all crazy scenarios here is not necessary.
  82. *
  83. * As it turns out though, we must allocate a full 4KB page for this,
  84. * so the two PRD tables (ide0 & ide1) will each get half of that,
  85. * allowing each to have about 256 entries (8 bytes each) from this.
  86. */
  87. #define PRD_BYTES 8
  88. #define PRD_ENTRIES 256
  89. /*
  90. * Some more useful definitions
  91. */
  92. #define PARTN_BITS 6 /* number of minor dev bits for partitions */
  93. #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
  94. #define SECTOR_SIZE 512
  95. /*
  96. * Timeouts for various operations:
  97. */
  98. enum {
  99. /* spec allows up to 20ms */
  100. WAIT_DRQ = HZ / 10, /* 100ms */
  101. /* some laptops are very slow */
  102. WAIT_READY = 5 * HZ, /* 5s */
  103. /* should be less than 3ms (?), if all ATAPI CD is closed at boot */
  104. WAIT_PIDENTIFY = 10 * HZ, /* 10s */
  105. /* worst case when spinning up */
  106. WAIT_WORSTCASE = 30 * HZ, /* 30s */
  107. /* maximum wait for an IRQ to happen */
  108. WAIT_CMD = 10 * HZ, /* 10s */
  109. /* Some drives require a longer IRQ timeout. */
  110. WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */
  111. /*
  112. * Some drives (for example, Seagate STT3401A Travan) require a very
  113. * long timeout, because they don't return an interrupt or clear their
  114. * BSY bit until after the command completes (even retension commands).
  115. */
  116. WAIT_TAPE_CMD = 900 * HZ, /* 900s */
  117. /* minimum sleep time */
  118. WAIT_MIN_SLEEP = HZ / 50, /* 20ms */
  119. };
  120. /*
  121. * Op codes for special requests to be handled by ide_special_rq().
  122. * Values should be in the range of 0x20 to 0x3f.
  123. */
  124. #define REQ_DRIVE_RESET 0x20
  125. #define REQ_DEVSET_EXEC 0x21
  126. #define REQ_PARK_HEADS 0x22
  127. #define REQ_UNPARK_HEADS 0x23
  128. /*
  129. * Check for an interrupt and acknowledge the interrupt status
  130. */
  131. struct hwif_s;
  132. typedef int (ide_ack_intr_t)(struct hwif_s *);
  133. /*
  134. * hwif_chipset_t is used to keep track of the specific hardware
  135. * chipset used by each IDE interface, if known.
  136. */
  137. enum { ide_unknown, ide_generic, ide_pci,
  138. ide_cmd640, ide_dtc2278, ide_ali14xx,
  139. ide_qd65xx, ide_umc8672, ide_ht6560b,
  140. ide_4drives, ide_pmac, ide_acorn,
  141. ide_au1xxx, ide_palm3710
  142. };
  143. typedef u8 hwif_chipset_t;
  144. /*
  145. * Structure to hold all information about the location of this port
  146. */
  147. typedef struct hw_regs_s {
  148. union {
  149. struct ide_io_ports io_ports;
  150. unsigned long io_ports_array[IDE_NR_PORTS];
  151. };
  152. int irq; /* our irq number */
  153. ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
  154. hwif_chipset_t chipset;
  155. struct device *dev, *parent;
  156. unsigned long config;
  157. } hw_regs_t;
  158. static inline void ide_std_init_ports(hw_regs_t *hw,
  159. unsigned long io_addr,
  160. unsigned long ctl_addr)
  161. {
  162. unsigned int i;
  163. for (i = 0; i <= 7; i++)
  164. hw->io_ports_array[i] = io_addr++;
  165. hw->io_ports.ctl_addr = ctl_addr;
  166. }
  167. /* for IDE PCI controllers in legacy mode, temporary */
  168. static inline int __ide_default_irq(unsigned long base)
  169. {
  170. switch (base) {
  171. #ifdef CONFIG_IA64
  172. case 0x1f0: return isa_irq_to_vector(14);
  173. case 0x170: return isa_irq_to_vector(15);
  174. #else
  175. case 0x1f0: return 14;
  176. case 0x170: return 15;
  177. #endif
  178. }
  179. return 0;
  180. }
  181. #if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \
  182. defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \
  183. || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64)
  184. #include <asm/ide.h>
  185. #else
  186. #include <asm-generic/ide_iops.h>
  187. #endif
  188. #define MAX_HWIFS 10
  189. /* Currently only m68k, apus and m8xx need it */
  190. #ifndef IDE_ARCH_ACK_INTR
  191. # define ide_ack_intr(hwif) (1)
  192. #endif
  193. /* Currently only Atari needs it */
  194. #ifndef IDE_ARCH_LOCK
  195. # define ide_release_lock() do {} while (0)
  196. # define ide_get_lock(hdlr, data) do {} while (0)
  197. #endif /* IDE_ARCH_LOCK */
  198. /*
  199. * Now for the data we need to maintain per-drive: ide_drive_t
  200. */
  201. #define ide_scsi 0x21
  202. #define ide_disk 0x20
  203. #define ide_optical 0x7
  204. #define ide_cdrom 0x5
  205. #define ide_tape 0x1
  206. #define ide_floppy 0x0
  207. /*
  208. * Special Driver Flags
  209. *
  210. * set_geometry : respecify drive geometry
  211. * recalibrate : seek to cyl 0
  212. * set_multmode : set multmode count
  213. * reserved : unused
  214. */
  215. typedef union {
  216. unsigned all : 8;
  217. struct {
  218. unsigned set_geometry : 1;
  219. unsigned recalibrate : 1;
  220. unsigned set_multmode : 1;
  221. unsigned reserved : 5;
  222. } b;
  223. } special_t;
  224. /*
  225. * Status returned from various ide_ functions
  226. */
  227. typedef enum {
  228. ide_stopped, /* no drive operation was started */
  229. ide_started, /* a drive operation was started, handler was set */
  230. } ide_startstop_t;
  231. enum {
  232. IDE_TFLAG_LBA48 = (1 << 0),
  233. IDE_TFLAG_FLAGGED = (1 << 2),
  234. IDE_TFLAG_OUT_DATA = (1 << 3),
  235. IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
  236. IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
  237. IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
  238. IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
  239. IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
  240. IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
  241. IDE_TFLAG_OUT_HOB_NSECT |
  242. IDE_TFLAG_OUT_HOB_LBAL |
  243. IDE_TFLAG_OUT_HOB_LBAM |
  244. IDE_TFLAG_OUT_HOB_LBAH,
  245. IDE_TFLAG_OUT_FEATURE = (1 << 9),
  246. IDE_TFLAG_OUT_NSECT = (1 << 10),
  247. IDE_TFLAG_OUT_LBAL = (1 << 11),
  248. IDE_TFLAG_OUT_LBAM = (1 << 12),
  249. IDE_TFLAG_OUT_LBAH = (1 << 13),
  250. IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
  251. IDE_TFLAG_OUT_NSECT |
  252. IDE_TFLAG_OUT_LBAL |
  253. IDE_TFLAG_OUT_LBAM |
  254. IDE_TFLAG_OUT_LBAH,
  255. IDE_TFLAG_OUT_DEVICE = (1 << 14),
  256. IDE_TFLAG_WRITE = (1 << 15),
  257. IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
  258. IDE_TFLAG_IN_DATA = (1 << 17),
  259. IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
  260. IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
  261. IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
  262. IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
  263. IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
  264. IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
  265. IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
  266. IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
  267. IDE_TFLAG_IN_HOB_LBAM |
  268. IDE_TFLAG_IN_HOB_LBAH,
  269. IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
  270. IDE_TFLAG_IN_HOB_NSECT |
  271. IDE_TFLAG_IN_HOB_LBA,
  272. IDE_TFLAG_IN_FEATURE = (1 << 1),
  273. IDE_TFLAG_IN_NSECT = (1 << 25),
  274. IDE_TFLAG_IN_LBAL = (1 << 26),
  275. IDE_TFLAG_IN_LBAM = (1 << 27),
  276. IDE_TFLAG_IN_LBAH = (1 << 28),
  277. IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
  278. IDE_TFLAG_IN_LBAM |
  279. IDE_TFLAG_IN_LBAH,
  280. IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
  281. IDE_TFLAG_IN_LBA,
  282. IDE_TFLAG_IN_DEVICE = (1 << 29),
  283. IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
  284. IDE_TFLAG_IN_HOB,
  285. IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
  286. IDE_TFLAG_IN_TF,
  287. IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
  288. IDE_TFLAG_IN_DEVICE,
  289. /* force 16-bit I/O operations */
  290. IDE_TFLAG_IO_16BIT = (1 << 30),
  291. /* ide_task_t was allocated using kmalloc() */
  292. IDE_TFLAG_DYN = (1 << 31),
  293. };
  294. struct ide_taskfile {
  295. u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
  296. u8 hob_feature; /* 1-5: additional data to support LBA48 */
  297. u8 hob_nsect;
  298. u8 hob_lbal;
  299. u8 hob_lbam;
  300. u8 hob_lbah;
  301. u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
  302. union { /*  7: */
  303. u8 error; /* read: error */
  304. u8 feature; /* write: feature */
  305. };
  306. u8 nsect; /* 8: number of sectors */
  307. u8 lbal; /* 9: LBA low */
  308. u8 lbam; /* 10: LBA mid */
  309. u8 lbah; /* 11: LBA high */
  310. u8 device; /* 12: device select */
  311. union { /* 13: */
  312. u8 status; /*  read: status  */
  313. u8 command; /* write: command */
  314. };
  315. };
  316. typedef struct ide_task_s {
  317. union {
  318. struct ide_taskfile tf;
  319. u8 tf_array[14];
  320. };
  321. u32 tf_flags;
  322. int data_phase;
  323. struct request *rq; /* copy of request */
  324. void *special; /* valid_t generally */
  325. } ide_task_t;
  326. /* ATAPI packet command flags */
  327. enum {
  328. /* set when an error is considered normal - no retry (ide-tape) */
  329. PC_FLAG_ABORT = (1 << 0),
  330. PC_FLAG_SUPPRESS_ERROR = (1 << 1),
  331. PC_FLAG_WAIT_FOR_DSC = (1 << 2),
  332. PC_FLAG_DMA_OK = (1 << 3),
  333. PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
  334. PC_FLAG_DMA_ERROR = (1 << 5),
  335. PC_FLAG_WRITING = (1 << 6),
  336. /* command timed out */
  337. PC_FLAG_TIMEDOUT = (1 << 7),
  338. };
  339. /*
  340. * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes.
  341. * This is used for several packet commands (not for READ/WRITE commands).
  342. */
  343. #define IDE_PC_BUFFER_SIZE 256
  344. #define ATAPI_WAIT_PC (60 * HZ)
  345. struct ide_atapi_pc {
  346. /* actual packet bytes */
  347. u8 c[12];
  348. /* incremented on each retry */
  349. int retries;
  350. int error;
  351. /* bytes to transfer */
  352. int req_xfer;
  353. /* bytes actually transferred */
  354. int xferred;
  355. /* data buffer */
  356. u8 *buf;
  357. /* current buffer position */
  358. u8 *cur_pos;
  359. int buf_size;
  360. /* missing/available data on the current buffer */
  361. int b_count;
  362. /* the corresponding request */
  363. struct request *rq;
  364. unsigned long flags;
  365. /*
  366. * those are more or less driver-specific and some of them are subject
  367. * to change/removal later.
  368. */
  369. u8 pc_buf[IDE_PC_BUFFER_SIZE];
  370. /* idetape only */
  371. struct idetape_bh *bh;
  372. char *b_data;
  373. struct scatterlist *sg;
  374. unsigned int sg_cnt;
  375. unsigned long timeout;
  376. };
  377. struct ide_devset;
  378. struct ide_driver;
  379. #ifdef CONFIG_BLK_DEV_IDEACPI
  380. struct ide_acpi_drive_link;
  381. struct ide_acpi_hwif_link;
  382. #endif
  383. struct ide_drive_s;
  384. struct ide_disk_ops {
  385. int (*check)(struct ide_drive_s *, const char *);
  386. int (*get_capacity)(struct ide_drive_s *);
  387. void (*setup)(struct ide_drive_s *);
  388. void (*flush)(struct ide_drive_s *);
  389. int (*init_media)(struct ide_drive_s *, struct gendisk *);
  390. int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
  391. int);
  392. ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
  393. sector_t);
  394. int (*end_request)(struct ide_drive_s *, int, int);
  395. int (*ioctl)(struct ide_drive_s *, struct block_device *,
  396. fmode_t, unsigned int, unsigned long);
  397. };
  398. /* ATAPI device flags */
  399. enum {
  400. IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
  401. /* ide-cd */
  402. /* Drive cannot eject the disc. */
  403. IDE_AFLAG_NO_EJECT = (1 << 1),
  404. /* Drive is a pre ATAPI 1.2 drive. */
  405. IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
  406. /* TOC addresses are in BCD. */
  407. IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
  408. /* TOC track numbers are in BCD. */
  409. IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
  410. /*
  411. * Drive does not provide data in multiples of SECTOR_SIZE
  412. * when more than one interrupt is needed.
  413. */
  414. IDE_AFLAG_LIMIT_NFRAMES = (1 << 5),
  415. /* Saved TOC information is current. */
  416. IDE_AFLAG_TOC_VALID = (1 << 6),
  417. /* We think that the drive door is locked. */
  418. IDE_AFLAG_DOOR_LOCKED = (1 << 7),
  419. /* SET_CD_SPEED command is unsupported. */
  420. IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
  421. IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
  422. IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
  423. IDE_AFLAG_SANYO_3CD = (1 << 11),
  424. IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
  425. IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
  426. IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
  427. /* ide-floppy */
  428. /* Avoid commands not supported in Clik drive */
  429. IDE_AFLAG_CLIK_DRIVE = (1 << 15),
  430. /* Requires BH algorithm for packets */
  431. IDE_AFLAG_ZIP_DRIVE = (1 << 16),
  432. /* Supports format progress report */
  433. IDE_AFLAG_SRFP = (1 << 17),
  434. /* ide-tape */
  435. IDE_AFLAG_IGNORE_DSC = (1 << 18),
  436. /* 0 When the tape position is unknown */
  437. IDE_AFLAG_ADDRESS_VALID = (1 << 19),
  438. /* Device already opened */
  439. IDE_AFLAG_BUSY = (1 << 20),
  440. /* Attempt to auto-detect the current user block size */
  441. IDE_AFLAG_DETECT_BS = (1 << 21),
  442. /* Currently on a filemark */
  443. IDE_AFLAG_FILEMARK = (1 << 22),
  444. /* 0 = no tape is loaded, so we don't rewind after ejecting */
  445. IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
  446. IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
  447. };
  448. /* device flags */
  449. enum {
  450. /* restore settings after device reset */
  451. IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
  452. /* device is using DMA for read/write */
  453. IDE_DFLAG_USING_DMA = (1 << 1),
  454. /* okay to unmask other IRQs */
  455. IDE_DFLAG_UNMASK = (1 << 2),
  456. /* don't attempt flushes */
  457. IDE_DFLAG_NOFLUSH = (1 << 3),
  458. /* DSC overlap */
  459. IDE_DFLAG_DSC_OVERLAP = (1 << 4),
  460. /* give potential excess bandwidth */
  461. IDE_DFLAG_NICE1 = (1 << 5),
  462. /* device is physically present */
  463. IDE_DFLAG_PRESENT = (1 << 6),
  464. /* device ejected hint */
  465. IDE_DFLAG_DEAD = (1 << 7),
  466. /* id read from device (synthetic if not set) */
  467. IDE_DFLAG_ID_READ = (1 << 8),
  468. IDE_DFLAG_NOPROBE = (1 << 9),
  469. /* need to do check_media_change() */
  470. IDE_DFLAG_REMOVABLE = (1 << 10),
  471. /* needed for removable devices */
  472. IDE_DFLAG_ATTACH = (1 << 11),
  473. IDE_DFLAG_FORCED_GEOM = (1 << 12),
  474. /* disallow setting unmask bit */
  475. IDE_DFLAG_NO_UNMASK = (1 << 13),
  476. /* disallow enabling 32-bit I/O */
  477. IDE_DFLAG_NO_IO_32BIT = (1 << 14),
  478. /* for removable only: door lock/unlock works */
  479. IDE_DFLAG_DOORLOCKING = (1 << 15),
  480. /* disallow DMA */
  481. IDE_DFLAG_NODMA = (1 << 16),
  482. /* powermanagment told us not to do anything, so sleep nicely */
  483. IDE_DFLAG_BLOCKED = (1 << 17),
  484. /* sleeping & sleep field valid */
  485. IDE_DFLAG_SLEEPING = (1 << 18),
  486. IDE_DFLAG_POST_RESET = (1 << 19),
  487. IDE_DFLAG_UDMA33_WARNED = (1 << 20),
  488. IDE_DFLAG_LBA48 = (1 << 21),
  489. /* status of write cache */
  490. IDE_DFLAG_WCACHE = (1 << 22),
  491. /* used for ignoring ATA_DF */
  492. IDE_DFLAG_NOWERR = (1 << 23),
  493. /* retrying in PIO */
  494. IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
  495. IDE_DFLAG_LBA = (1 << 25),
  496. /* don't unload heads */
  497. IDE_DFLAG_NO_UNLOAD = (1 << 26),
  498. /* heads unloaded, please don't reset port */
  499. IDE_DFLAG_PARKED = (1 << 27),
  500. IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
  501. /* write protect */
  502. IDE_DFLAG_WP = (1 << 29),
  503. IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
  504. };
  505. struct ide_drive_s {
  506. char name[4]; /* drive name, such as "hda" */
  507. char driver_req[10]; /* requests specific driver */
  508. struct request_queue *queue; /* request queue */
  509. struct request *rq; /* current request */
  510. void *driver_data; /* extra driver data */
  511. u16 *id; /* identification info */
  512. #ifdef CONFIG_IDE_PROC_FS
  513. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  514. const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */
  515. #endif
  516. struct hwif_s *hwif; /* actually (ide_hwif_t *) */
  517. const struct ide_disk_ops *disk_ops;
  518. unsigned long dev_flags;
  519. unsigned long sleep; /* sleep until this time */
  520. unsigned long timeout; /* max time to wait for irq */
  521. special_t special; /* special action flags */
  522. u8 select; /* basic drive/head select reg value */
  523. u8 retry_pio; /* retrying dma capable host in pio */
  524. u8 waiting_for_dma; /* dma currently in progress */
  525. u8 dma; /* atapi dma flag */
  526. u8 quirk_list; /* considered quirky, set for a specific host */
  527. u8 init_speed; /* transfer rate set at boot */
  528. u8 current_speed; /* current transfer rate set */
  529. u8 desired_speed; /* desired transfer rate set */
  530. u8 dn; /* now wide spread use */
  531. u8 acoustic; /* acoustic management */
  532. u8 media; /* disk, cdrom, tape, floppy, ... */
  533. u8 ready_stat; /* min status value for drive ready */
  534. u8 mult_count; /* current multiple sector setting */
  535. u8 mult_req; /* requested multiple sector setting */
  536. u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
  537. u8 bad_wstat; /* used for ignoring ATA_DF */
  538. u8 head; /* "real" number of heads */
  539. u8 sect; /* "real" sectors per track */
  540. u8 bios_head; /* BIOS/fdisk/LILO number of heads */
  541. u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
  542. /* delay this long before sending packet command */
  543. u8 pc_delay;
  544. unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
  545. unsigned int cyl; /* "real" number of cyls */
  546. unsigned int drive_data; /* used by set_pio_mode/selectproc */
  547. unsigned int failures; /* current failure count */
  548. unsigned int max_failures; /* maximum allowed failure count */
  549. u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
  550. u64 capacity64; /* total number of sectors */
  551. int lun; /* logical unit */
  552. int crc_count; /* crc counter to reduce drive speed */
  553. unsigned long debug_mask; /* debugging levels switch */
  554. #ifdef CONFIG_BLK_DEV_IDEACPI
  555. struct ide_acpi_drive_link *acpidata;
  556. #endif
  557. struct list_head list;
  558. struct device gendev;
  559. struct completion gendev_rel_comp; /* to deal with device release() */
  560. /* current packet command */
  561. struct ide_atapi_pc *pc;
  562. /* callback for packet commands */
  563. void (*pc_callback)(struct ide_drive_s *, int);
  564. void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *);
  565. int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *,
  566. unsigned int, int);
  567. ide_startstop_t (*irq_handler)(struct ide_drive_s *);
  568. unsigned long atapi_flags;
  569. struct ide_atapi_pc request_sense_pc;
  570. struct request request_sense_rq;
  571. };
  572. typedef struct ide_drive_s ide_drive_t;
  573. #define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
  574. #define to_ide_drv(obj, cont_type) \
  575. container_of(obj, struct cont_type, kref)
  576. #define ide_drv_g(disk, cont_type) \
  577. container_of((disk)->private_data, struct cont_type, driver)
  578. struct ide_port_info;
  579. struct ide_tp_ops {
  580. void (*exec_command)(struct hwif_s *, u8);
  581. u8 (*read_status)(struct hwif_s *);
  582. u8 (*read_altstatus)(struct hwif_s *);
  583. void (*set_irq)(struct hwif_s *, int);
  584. void (*tf_load)(ide_drive_t *, struct ide_task_s *);
  585. void (*tf_read)(ide_drive_t *, struct ide_task_s *);
  586. void (*input_data)(ide_drive_t *, struct request *, void *,
  587. unsigned int);
  588. void (*output_data)(ide_drive_t *, struct request *, void *,
  589. unsigned int);
  590. };
  591. extern const struct ide_tp_ops default_tp_ops;
  592. /**
  593. * struct ide_port_ops - IDE port operations
  594. *
  595. * @init_dev: host specific initialization of a device
  596. * @set_pio_mode: routine to program host for PIO mode
  597. * @set_dma_mode: routine to program host for DMA mode
  598. * @selectproc: tweaks hardware to select drive
  599. * @reset_poll: chipset polling based on hba specifics
  600. * @pre_reset: chipset specific changes to default for device-hba resets
  601. * @resetproc: routine to reset controller after a disk reset
  602. * @maskproc: special host masking for drive selection
  603. * @quirkproc: check host's drive quirk list
  604. * @clear_irq: clear IRQ
  605. *
  606. * @mdma_filter: filter MDMA modes
  607. * @udma_filter: filter UDMA modes
  608. *
  609. * @cable_detect: detect cable type
  610. */
  611. struct ide_port_ops {
  612. void (*init_dev)(ide_drive_t *);
  613. void (*set_pio_mode)(ide_drive_t *, const u8);
  614. void (*set_dma_mode)(ide_drive_t *, const u8);
  615. void (*selectproc)(ide_drive_t *);
  616. int (*reset_poll)(ide_drive_t *);
  617. void (*pre_reset)(ide_drive_t *);
  618. void (*resetproc)(ide_drive_t *);
  619. void (*maskproc)(ide_drive_t *, int);
  620. void (*quirkproc)(ide_drive_t *);
  621. void (*clear_irq)(ide_drive_t *);
  622. u8 (*mdma_filter)(ide_drive_t *);
  623. u8 (*udma_filter)(ide_drive_t *);
  624. u8 (*cable_detect)(struct hwif_s *);
  625. };
  626. struct ide_dma_ops {
  627. void (*dma_host_set)(struct ide_drive_s *, int);
  628. int (*dma_setup)(struct ide_drive_s *);
  629. void (*dma_exec_cmd)(struct ide_drive_s *, u8);
  630. void (*dma_start)(struct ide_drive_s *);
  631. int (*dma_end)(struct ide_drive_s *);
  632. int (*dma_test_irq)(struct ide_drive_s *);
  633. void (*dma_lost_irq)(struct ide_drive_s *);
  634. void (*dma_timeout)(struct ide_drive_s *);
  635. /*
  636. * The following method is optional and only required to be
  637. * implemented for the SFF-8038i compatible controllers.
  638. */
  639. u8 (*dma_sff_read_status)(struct hwif_s *);
  640. };
  641. struct ide_host;
  642. typedef struct hwif_s {
  643. struct hwif_s *mate; /* other hwif from same PCI chip */
  644. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  645. struct ide_host *host;
  646. char name[6]; /* name of interface, eg. "ide0" */
  647. struct ide_io_ports io_ports;
  648. unsigned long sata_scr[SATA_NR_PORTS];
  649. ide_drive_t *devices[MAX_DRIVES + 1];
  650. u8 major; /* our major number */
  651. u8 index; /* 0 for ide0; 1 for ide1; ... */
  652. u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
  653. u32 host_flags;
  654. u8 pio_mask;
  655. u8 ultra_mask;
  656. u8 mwdma_mask;
  657. u8 swdma_mask;
  658. u8 cbl; /* cable type */
  659. hwif_chipset_t chipset; /* sub-module for tuning.. */
  660. struct device *dev;
  661. ide_ack_intr_t *ack_intr;
  662. void (*rw_disk)(ide_drive_t *, struct request *);
  663. const struct ide_tp_ops *tp_ops;
  664. const struct ide_port_ops *port_ops;
  665. const struct ide_dma_ops *dma_ops;
  666. /* dma physical region descriptor table (cpu view) */
  667. unsigned int *dmatable_cpu;
  668. /* dma physical region descriptor table (dma view) */
  669. dma_addr_t dmatable_dma;
  670. /* maximum number of PRD table entries */
  671. int prd_max_nents;
  672. /* PRD entry size in bytes */
  673. int prd_ent_size;
  674. /* Scatter-gather list used to build the above */
  675. struct scatterlist *sg_table;
  676. int sg_max_nents; /* Maximum number of entries in it */
  677. int sg_nents; /* Current number of entries in it */
  678. int sg_dma_direction; /* dma transfer direction */
  679. /* data phase of the active command (currently only valid for PIO/DMA) */
  680. int data_phase;
  681. struct ide_task_s task; /* current command */
  682. unsigned int nsect;
  683. unsigned int nleft;
  684. struct scatterlist *cursg;
  685. unsigned int cursg_ofs;
  686. int rqsize; /* max sectors per request */
  687. int irq; /* our irq number */
  688. unsigned long dma_base; /* base addr for dma ports */
  689. unsigned long config_data; /* for use by chipset-specific code */
  690. unsigned long select_data; /* for use by chipset-specific code */
  691. unsigned long extra_base; /* extra addr for dma ports */
  692. unsigned extra_ports; /* number of extra dma ports */
  693. unsigned present : 1; /* this interface exists */
  694. unsigned busy : 1; /* serializes devices on a port */
  695. struct device gendev;
  696. struct device *portdev;
  697. struct completion gendev_rel_comp; /* To deal with device release() */
  698. void *hwif_data; /* extra hwif data */
  699. #ifdef CONFIG_BLK_DEV_IDEACPI
  700. struct ide_acpi_hwif_link *acpidata;
  701. #endif
  702. /* IRQ handler, if active */
  703. ide_startstop_t (*handler)(ide_drive_t *);
  704. /* BOOL: polling active & poll_timeout field valid */
  705. unsigned int polling : 1;
  706. /* current drive */
  707. ide_drive_t *cur_dev;
  708. /* current request */
  709. struct request *rq;
  710. /* failsafe timer */
  711. struct timer_list timer;
  712. /* timeout value during long polls */
  713. unsigned long poll_timeout;
  714. /* queried upon timeouts */
  715. int (*expiry)(ide_drive_t *);
  716. int req_gen;
  717. int req_gen_timer;
  718. spinlock_t lock;
  719. } ____cacheline_internodealigned_in_smp ide_hwif_t;
  720. #define MAX_HOST_PORTS 4
  721. struct ide_host {
  722. ide_hwif_t *ports[MAX_HOST_PORTS + 1];
  723. unsigned int n_ports;
  724. struct device *dev[2];
  725. unsigned int (*init_chipset)(struct pci_dev *);
  726. unsigned long host_flags;
  727. void *host_priv;
  728. ide_hwif_t *cur_port; /* for hosts requiring serialization */
  729. /* used for hosts requiring serialization */
  730. volatile unsigned long host_busy;
  731. };
  732. #define IDE_HOST_BUSY 0
  733. /*
  734. * internal ide interrupt handler type
  735. */
  736. typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
  737. typedef int (ide_expiry_t)(ide_drive_t *);
  738. /* used by ide-cd, ide-floppy, etc. */
  739. typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
  740. extern struct mutex ide_setting_mtx;
  741. /*
  742. * configurable drive settings
  743. */
  744. #define DS_SYNC (1 << 0)
  745. struct ide_devset {
  746. int (*get)(ide_drive_t *);
  747. int (*set)(ide_drive_t *, int);
  748. unsigned int flags;
  749. };
  750. #define __DEVSET(_flags, _get, _set) { \
  751. .flags = _flags, \
  752. .get = _get, \
  753. .set = _set, \
  754. }
  755. #define ide_devset_get(name, field) \
  756. static int get_##name(ide_drive_t *drive) \
  757. { \
  758. return drive->field; \
  759. }
  760. #define ide_devset_set(name, field) \
  761. static int set_##name(ide_drive_t *drive, int arg) \
  762. { \
  763. drive->field = arg; \
  764. return 0; \
  765. }
  766. #define ide_devset_get_flag(name, flag) \
  767. static int get_##name(ide_drive_t *drive) \
  768. { \
  769. return !!(drive->dev_flags & flag); \
  770. }
  771. #define ide_devset_set_flag(name, flag) \
  772. static int set_##name(ide_drive_t *drive, int arg) \
  773. { \
  774. if (arg) \
  775. drive->dev_flags |= flag; \
  776. else \
  777. drive->dev_flags &= ~flag; \
  778. return 0; \
  779. }
  780. #define __IDE_DEVSET(_name, _flags, _get, _set) \
  781. const struct ide_devset ide_devset_##_name = \
  782. __DEVSET(_flags, _get, _set)
  783. #define IDE_DEVSET(_name, _flags, _get, _set) \
  784. static __IDE_DEVSET(_name, _flags, _get, _set)
  785. #define ide_devset_rw(_name, _func) \
  786. IDE_DEVSET(_name, 0, get_##_func, set_##_func)
  787. #define ide_devset_w(_name, _func) \
  788. IDE_DEVSET(_name, 0, NULL, set_##_func)
  789. #define ide_ext_devset_rw(_name, _func) \
  790. __IDE_DEVSET(_name, 0, get_##_func, set_##_func)
  791. #define ide_ext_devset_rw_sync(_name, _func) \
  792. __IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
  793. #define ide_decl_devset(_name) \
  794. extern const struct ide_devset ide_devset_##_name
  795. ide_decl_devset(io_32bit);
  796. ide_decl_devset(keepsettings);
  797. ide_decl_devset(pio_mode);
  798. ide_decl_devset(unmaskirq);
  799. ide_decl_devset(using_dma);
  800. #ifdef CONFIG_IDE_PROC_FS
  801. /*
  802. * /proc/ide interface
  803. */
  804. #define ide_devset_rw_field(_name, _field) \
  805. ide_devset_get(_name, _field); \
  806. ide_devset_set(_name, _field); \
  807. IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
  808. #define ide_devset_rw_flag(_name, _field) \
  809. ide_devset_get_flag(_name, _field); \
  810. ide_devset_set_flag(_name, _field); \
  811. IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
  812. struct ide_proc_devset {
  813. const char *name;
  814. const struct ide_devset *setting;
  815. int min, max;
  816. int (*mulf)(ide_drive_t *);
  817. int (*divf)(ide_drive_t *);
  818. };
  819. #define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
  820. .name = __stringify(_name), \
  821. .setting = &ide_devset_##_name, \
  822. .min = _min, \
  823. .max = _max, \
  824. .mulf = _mulf, \
  825. .divf = _divf, \
  826. }
  827. #define IDE_PROC_DEVSET(_name, _min, _max) \
  828. __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
  829. typedef struct {
  830. const char *name;
  831. mode_t mode;
  832. read_proc_t *read_proc;
  833. write_proc_t *write_proc;
  834. } ide_proc_entry_t;
  835. void proc_ide_create(void);
  836. void proc_ide_destroy(void);
  837. void ide_proc_register_port(ide_hwif_t *);
  838. void ide_proc_port_register_devices(ide_hwif_t *);
  839. void ide_proc_unregister_device(ide_drive_t *);
  840. void ide_proc_unregister_port(ide_hwif_t *);
  841. void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
  842. void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
  843. read_proc_t proc_ide_read_capacity;
  844. read_proc_t proc_ide_read_geometry;
  845. /*
  846. * Standard exit stuff:
  847. */
  848. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
  849. { \
  850. len -= off; \
  851. if (len < count) { \
  852. *eof = 1; \
  853. if (len <= 0) \
  854. return 0; \
  855. } else \
  856. len = count; \
  857. *start = page + off; \
  858. return len; \
  859. }
  860. #else
  861. static inline void proc_ide_create(void) { ; }
  862. static inline void proc_ide_destroy(void) { ; }
  863. static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
  864. static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
  865. static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
  866. static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
  867. static inline void ide_proc_register_driver(ide_drive_t *drive,
  868. struct ide_driver *driver) { ; }
  869. static inline void ide_proc_unregister_driver(ide_drive_t *drive,
  870. struct ide_driver *driver) { ; }
  871. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
  872. #endif
  873. enum {
  874. /* enter/exit functions */
  875. IDE_DBG_FUNC = (1 << 0),
  876. /* sense key/asc handling */
  877. IDE_DBG_SENSE = (1 << 1),
  878. /* packet commands handling */
  879. IDE_DBG_PC = (1 << 2),
  880. /* request handling */
  881. IDE_DBG_RQ = (1 << 3),
  882. /* driver probing/setup */
  883. IDE_DBG_PROBE = (1 << 4),
  884. };
  885. /* DRV_NAME has to be defined in the driver before using the macro below */
  886. #define __ide_debug_log(lvl, fmt, args...) \
  887. { \
  888. if (unlikely(drive->debug_mask & lvl)) \
  889. printk(KERN_INFO DRV_NAME ": " fmt, ## args); \
  890. }
  891. /*
  892. * Power Management state machine (rq->pm->pm_step).
  893. *
  894. * For each step, the core calls ide_start_power_step() first.
  895. * This can return:
  896. * - ide_stopped : In this case, the core calls us back again unless
  897. * step have been set to ide_power_state_completed.
  898. * - ide_started : In this case, the channel is left busy until an
  899. * async event (interrupt) occurs.
  900. * Typically, ide_start_power_step() will issue a taskfile request with
  901. * do_rw_taskfile().
  902. *
  903. * Upon reception of the interrupt, the core will call ide_complete_power_step()
  904. * with the error code if any. This routine should update the step value
  905. * and return. It should not start a new request. The core will call
  906. * ide_start_power_step() for the new step value, unless step have been
  907. * set to IDE_PM_COMPLETED.
  908. */
  909. enum {
  910. IDE_PM_START_SUSPEND,
  911. IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
  912. IDE_PM_STANDBY,
  913. IDE_PM_START_RESUME,
  914. IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
  915. IDE_PM_IDLE,
  916. IDE_PM_RESTORE_DMA,
  917. IDE_PM_COMPLETED,
  918. };
  919. int generic_ide_suspend(struct device *, pm_message_t);
  920. int generic_ide_resume(struct device *);
  921. void ide_complete_power_step(ide_drive_t *, struct request *);
  922. ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
  923. void ide_complete_pm_request(ide_drive_t *, struct request *);
  924. void ide_check_pm_state(ide_drive_t *, struct request *);
  925. /*
  926. * Subdrivers support.
  927. *
  928. * The gendriver.owner field should be set to the module owner of this driver.
  929. * The gendriver.name field should be set to the name of this driver
  930. */
  931. struct ide_driver {
  932. const char *version;
  933. ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
  934. int (*end_request)(ide_drive_t *, int, int);
  935. struct device_driver gen_driver;
  936. int (*probe)(ide_drive_t *);
  937. void (*remove)(ide_drive_t *);
  938. void (*resume)(ide_drive_t *);
  939. void (*shutdown)(ide_drive_t *);
  940. #ifdef CONFIG_IDE_PROC_FS
  941. ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
  942. const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
  943. #endif
  944. };
  945. #define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
  946. int ide_device_get(ide_drive_t *);
  947. void ide_device_put(ide_drive_t *);
  948. struct ide_ioctl_devset {
  949. unsigned int get_ioctl;
  950. unsigned int set_ioctl;
  951. const struct ide_devset *setting;
  952. };
  953. int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
  954. unsigned long, const struct ide_ioctl_devset *);
  955. int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
  956. extern int ide_vlb_clk;
  957. extern int ide_pci_clk;
  958. extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
  959. int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
  960. int uptodate, int nr_sectors);
  961. extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
  962. void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
  963. ide_expiry_t *);
  964. void ide_execute_pkt_cmd(ide_drive_t *);
  965. void ide_pad_transfer(ide_drive_t *, int, int);
  966. ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
  967. void ide_fix_driveid(u16 *);
  968. extern void ide_fixstring(u8 *, const int, const int);
  969. int ide_busy_sleep(ide_hwif_t *, unsigned long, int);
  970. int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
  971. extern ide_startstop_t ide_do_reset (ide_drive_t *);
  972. extern int ide_devset_execute(ide_drive_t *drive,
  973. const struct ide_devset *setting, int arg);
  974. extern void ide_do_drive_cmd(ide_drive_t *, struct request *);
  975. extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
  976. void ide_tf_dump(const char *, struct ide_taskfile *);
  977. void ide_exec_command(ide_hwif_t *, u8);
  978. u8 ide_read_status(ide_hwif_t *);
  979. u8 ide_read_altstatus(ide_hwif_t *);
  980. void ide_set_irq(ide_hwif_t *, int);
  981. void ide_tf_load(ide_drive_t *, ide_task_t *);
  982. void ide_tf_read(ide_drive_t *, ide_task_t *);
  983. void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int);
  984. void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int);
  985. int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int);
  986. extern void SELECT_DRIVE(ide_drive_t *);
  987. void SELECT_MASK(ide_drive_t *, int);
  988. u8 ide_read_error(ide_drive_t *);
  989. void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
  990. extern int drive_is_ready(ide_drive_t *);
  991. void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
  992. int ide_check_atapi_device(ide_drive_t *, const char *);
  993. void ide_init_pc(struct ide_atapi_pc *);
  994. /* Disk head parking */
  995. extern wait_queue_head_t ide_park_wq;
  996. ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
  997. char *buf);
  998. ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
  999. const char *buf, size_t len);
  1000. /*
  1001. * Special requests for ide-tape block device strategy routine.
  1002. *
  1003. * In order to service a character device command, we add special requests to
  1004. * the tail of our block device request queue and wait for their completion.
  1005. */
  1006. enum {
  1007. REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */
  1008. REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */
  1009. REQ_IDETAPE_READ = (1 << 2),
  1010. REQ_IDETAPE_WRITE = (1 << 3),
  1011. };
  1012. int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *);
  1013. int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
  1014. int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
  1015. int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
  1016. void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
  1017. void ide_retry_pc(ide_drive_t *, struct gendisk *);
  1018. int ide_cd_expiry(ide_drive_t *);
  1019. int ide_cd_get_xferlen(struct request *);
  1020. ide_startstop_t ide_issue_pc(ide_drive_t *);
  1021. ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
  1022. void task_end_request(ide_drive_t *, struct request *, u8);
  1023. int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
  1024. int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
  1025. int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
  1026. extern int ide_driveid_update(ide_drive_t *);
  1027. extern int ide_config_drive_speed(ide_drive_t *, u8);
  1028. extern u8 eighty_ninty_three (ide_drive_t *);
  1029. extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
  1030. extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
  1031. extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
  1032. extern void ide_timer_expiry(unsigned long);
  1033. extern irqreturn_t ide_intr(int irq, void *dev_id);
  1034. extern void do_ide_request(struct request_queue *);
  1035. void ide_init_disk(struct gendisk *, ide_drive_t *);
  1036. #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
  1037. extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
  1038. #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
  1039. #else
  1040. #define ide_pci_register_driver(d) pci_register_driver(d)
  1041. #endif
  1042. static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
  1043. {
  1044. if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
  1045. return 1;
  1046. return 0;
  1047. }
  1048. void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int,
  1049. hw_regs_t *, hw_regs_t **);
  1050. void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
  1051. #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
  1052. int ide_pci_set_master(struct pci_dev *, const char *);
  1053. unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
  1054. int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
  1055. int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
  1056. #else
  1057. static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
  1058. const struct ide_port_info *d)
  1059. {
  1060. return -EINVAL;
  1061. }
  1062. #endif
  1063. struct ide_pci_enablebit {
  1064. u8 reg; /* byte pci reg holding the enable-bit */
  1065. u8 mask; /* mask to isolate the enable-bit */
  1066. u8 val; /* value of masked reg when "enabled" */
  1067. };
  1068. enum {
  1069. /* Uses ISA control ports not PCI ones. */
  1070. IDE_HFLAG_ISA_PORTS = (1 << 0),
  1071. /* single port device */
  1072. IDE_HFLAG_SINGLE = (1 << 1),
  1073. /* don't use legacy PIO blacklist */
  1074. IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
  1075. /* set for the second port of QD65xx */
  1076. IDE_HFLAG_QD_2ND_PORT = (1 << 3),
  1077. /* use PIO8/9 for prefetch off/on */
  1078. IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
  1079. /* use PIO6/7 for fast-devsel off/on */
  1080. IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
  1081. /* use 100-102 and 200-202 PIO values to set DMA modes */
  1082. IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
  1083. /*
  1084. * keep DMA setting when programming PIO mode, may be used only
  1085. * for hosts which have separate PIO and DMA timings (ie. PMAC)
  1086. */
  1087. IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
  1088. /* program host for the transfer mode after programming device */
  1089. IDE_HFLAG_POST_SET_MODE = (1 << 8),
  1090. /* don't program host/device for the transfer mode ("smart" hosts) */
  1091. IDE_HFLAG_NO_SET_MODE = (1 << 9),
  1092. /* trust BIOS for programming chipset/device for DMA */
  1093. IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
  1094. /* host is CS5510/CS5520 */
  1095. IDE_HFLAG_CS5520 = (1 << 11),
  1096. /* ATAPI DMA is unsupported */
  1097. IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
  1098. /* set if host is a "non-bootable" controller */
  1099. IDE_HFLAG_NON_BOOTABLE = (1 << 13),
  1100. /* host doesn't support DMA */
  1101. IDE_HFLAG_NO_DMA = (1 << 14),
  1102. /* check if host is PCI IDE device before allowing DMA */
  1103. IDE_HFLAG_NO_AUTODMA = (1 << 15),
  1104. /* host uses MMIO */
  1105. IDE_HFLAG_MMIO = (1 << 16),
  1106. /* no LBA48 */
  1107. IDE_HFLAG_NO_LBA48 = (1 << 17),
  1108. /* no LBA48 DMA */
  1109. IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
  1110. /* data FIFO is cleared by an error */
  1111. IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
  1112. /* serialize ports */
  1113. IDE_HFLAG_SERIALIZE = (1 << 20),
  1114. /* use legacy IRQs */
  1115. IDE_HFLAG_LEGACY_IRQS = (1 << 21),
  1116. /* force use of legacy IRQs */
  1117. IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
  1118. /* host is TRM290 */
  1119. IDE_HFLAG_TRM290 = (1 << 23),
  1120. /* use 32-bit I/O ops */
  1121. IDE_HFLAG_IO_32BIT = (1 << 24),
  1122. /* unmask IRQs */
  1123. IDE_HFLAG_UNMASK_IRQS = (1 << 25),
  1124. IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
  1125. /* serialize ports if DMA is possible (for sl82c105) */
  1126. IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
  1127. /* force host out of "simplex" mode */
  1128. IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
  1129. /* DSC overlap is unsupported */
  1130. IDE_HFLAG_NO_DSC = (1 << 29),
  1131. /* never use 32-bit I/O ops */
  1132. IDE_HFLAG_NO_IO_32BIT = (1 << 30),
  1133. /* never unmask IRQs */
  1134. IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
  1135. };
  1136. #ifdef CONFIG_BLK_DEV_OFFBOARD
  1137. # define IDE_HFLAG_OFF_BOARD 0
  1138. #else
  1139. # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
  1140. #endif
  1141. struct ide_port_info {
  1142. char *name;
  1143. unsigned int (*init_chipset)(struct pci_dev *);
  1144. void (*init_iops)(ide_hwif_t *);
  1145. void (*init_hwif)(ide_hwif_t *);
  1146. int (*init_dma)(ide_hwif_t *,
  1147. const struct ide_port_info *);
  1148. const struct ide_tp_ops *tp_ops;
  1149. const struct ide_port_ops *port_ops;
  1150. const struct ide_dma_ops *dma_ops;
  1151. struct ide_pci_enablebit enablebits[2];
  1152. hwif_chipset_t chipset;
  1153. u16 max_sectors; /* if < than the default one */
  1154. u32 host_flags;
  1155. u8 pio_mask;
  1156. u8 swdma_mask;
  1157. u8 mwdma_mask;
  1158. u8 udma_mask;
  1159. };
  1160. int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
  1161. int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
  1162. const struct ide_port_info *, void *);
  1163. void ide_pci_remove(struct pci_dev *);
  1164. #ifdef CONFIG_PM
  1165. int ide_pci_suspend(struct pci_dev *, pm_message_t);
  1166. int ide_pci_resume(struct pci_dev *);
  1167. #else
  1168. #define ide_pci_suspend NULL
  1169. #define ide_pci_resume NULL
  1170. #endif
  1171. void ide_map_sg(ide_drive_t *, struct request *);
  1172. void ide_init_sg_cmd(ide_drive_t *, struct request *);
  1173. #define BAD_DMA_DRIVE 0
  1174. #define GOOD_DMA_DRIVE 1
  1175. struct drive_list_entry {
  1176. const char *id_model;
  1177. const char *id_firmware;
  1178. };
  1179. int ide_in_drive_list(u16 *, const struct drive_list_entry *);
  1180. #ifdef CONFIG_BLK_DEV_IDEDMA
  1181. int ide_dma_good_drive(ide_drive_t *);
  1182. int __ide_dma_bad_drive(ide_drive_t *);
  1183. int ide_id_dma_bug(ide_drive_t *);
  1184. u8 ide_find_dma_mode(ide_drive_t *, u8);
  1185. static inline u8 ide_max_dma_mode(ide_drive_t *drive)
  1186. {
  1187. return ide_find_dma_mode(drive, XFER_UDMA_6);
  1188. }
  1189. void ide_dma_off_quietly(ide_drive_t *);
  1190. void ide_dma_off(ide_drive_t *);
  1191. void ide_dma_on(ide_drive_t *);
  1192. int ide_set_dma(ide_drive_t *);
  1193. void ide_check_dma_crc(ide_drive_t *);
  1194. ide_startstop_t ide_dma_intr(ide_drive_t *);
  1195. int ide_allocate_dma_engine(ide_hwif_t *);
  1196. void ide_release_dma_engine(ide_hwif_t *);
  1197. int ide_build_sglist(ide_drive_t *, struct request *);
  1198. void ide_destroy_dmatable(ide_drive_t *);
  1199. #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
  1200. int config_drive_for_dma(ide_drive_t *);
  1201. extern int ide_build_dmatable(ide_drive_t *, struct request *);
  1202. void ide_dma_host_set(ide_drive_t *, int);
  1203. extern int ide_dma_setup(ide_drive_t *);
  1204. void ide_dma_exec_cmd(ide_drive_t *, u8);
  1205. extern void ide_dma_start(ide_drive_t *);
  1206. int ide_dma_end(ide_drive_t *);
  1207. int ide_dma_test_irq(ide_drive_t *);
  1208. u8 ide_dma_sff_read_status(ide_hwif_t *);
  1209. extern const struct ide_dma_ops sff_dma_ops;
  1210. #else
  1211. static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
  1212. #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
  1213. void ide_dma_lost_irq(ide_drive_t *);
  1214. void ide_dma_timeout(ide_drive_t *);
  1215. #else
  1216. static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
  1217. static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
  1218. static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
  1219. static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
  1220. static inline void ide_dma_off(ide_drive_t *drive) { ; }
  1221. static inline void ide_dma_on(ide_drive_t *drive) { ; }
  1222. static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
  1223. static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
  1224. static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
  1225. static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
  1226. #endif /* CONFIG_BLK_DEV_IDEDMA */
  1227. #ifdef CONFIG_BLK_DEV_IDEACPI
  1228. extern int ide_acpi_exec_tfs(ide_drive_t *drive);
  1229. extern void ide_acpi_get_timing(ide_hwif_t *hwif);
  1230. extern void ide_acpi_push_timing(ide_hwif_t *hwif);
  1231. extern void ide_acpi_init(ide_hwif_t *hwif);
  1232. void ide_acpi_port_init_devices(ide_hwif_t *);
  1233. extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
  1234. #else
  1235. static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
  1236. static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
  1237. static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
  1238. static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
  1239. static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
  1240. static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
  1241. #endif
  1242. void ide_register_region(struct gendisk *);
  1243. void ide_unregister_region(struct gendisk *);
  1244. void ide_undecoded_slave(ide_drive_t *);
  1245. void ide_port_apply_params(ide_hwif_t *);
  1246. int ide_sysfs_register_port(ide_hwif_t *);
  1247. struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **);
  1248. void ide_host_free(struct ide_host *);
  1249. int ide_host_register(struct ide_host *, const struct ide_port_info *,
  1250. hw_regs_t **);
  1251. int ide_host_add(const struct ide_port_info *, hw_regs_t **,
  1252. struct ide_host **);
  1253. void ide_host_remove(struct ide_host *);
  1254. int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
  1255. void ide_port_unregister_devices(ide_hwif_t *);
  1256. void ide_port_scan(ide_hwif_t *);
  1257. static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
  1258. {
  1259. return hwif->hwif_data;
  1260. }
  1261. static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
  1262. {
  1263. hwif->hwif_data = data;
  1264. }
  1265. const char *ide_xfer_verbose(u8 mode);
  1266. extern void ide_toggle_bounce(ide_drive_t *drive, int on);
  1267. extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
  1268. u64 ide_get_lba_addr(struct ide_taskfile *, int);
  1269. u8 ide_dump_status(ide_drive_t *, const char *, u8);
  1270. struct ide_timing {
  1271. u8 mode;
  1272. u8 setup; /* t1 */
  1273. u16 act8b; /* t2 for 8-bit io */
  1274. u16 rec8b; /* t2i for 8-bit io */
  1275. u16 cyc8b; /* t0 for 8-bit io */
  1276. u16 active; /* t2 or tD */
  1277. u16 recover; /* t2i or tK */
  1278. u16 cycle; /* t0 */
  1279. u16 udma; /* t2CYCTYP/2 */
  1280. };
  1281. enum {
  1282. IDE_TIMING_SETUP = (1 << 0),
  1283. IDE_TIMING_ACT8B = (1 << 1),
  1284. IDE_TIMING_REC8B = (1 << 2),
  1285. IDE_TIMING_CYC8B = (1 << 3),
  1286. IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
  1287. IDE_TIMING_CYC8B,
  1288. IDE_TIMING_ACTIVE = (1 << 4),
  1289. IDE_TIMING_RECOVER = (1 << 5),
  1290. IDE_TIMING_CYCLE = (1 << 6),
  1291. IDE_TIMING_UDMA = (1 << 7),
  1292. IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
  1293. IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
  1294. IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
  1295. };
  1296. struct ide_timing *ide_timing_find_mode(u8);
  1297. u16 ide_pio_cycle_time(ide_drive_t *, u8);
  1298. void ide_timing_merge(struct ide_timing *, struct ide_timing *,
  1299. struct ide_timing *, unsigned int);
  1300. int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
  1301. int ide_scan_pio_blacklist(char *);
  1302. u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
  1303. int ide_set_pio_mode(ide_drive_t *, u8);
  1304. int ide_set_dma_mode(ide_drive_t *, u8);
  1305. void ide_set_pio(ide_drive_t *, u8);
  1306. static inline void ide_set_max_pio(ide_drive_t *drive)
  1307. {
  1308. ide_set_pio(drive, 255);
  1309. }
  1310. char *ide_media_string(ide_drive_t *);
  1311. extern struct device_attribute ide_dev_attrs[];
  1312. extern struct bus_type ide_bus_type;
  1313. extern struct class *ide_port_class;
  1314. static inline void ide_dump_identify(u8 *id)
  1315. {
  1316. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
  1317. }
  1318. static inline int hwif_to_node(ide_hwif_t *hwif)
  1319. {
  1320. return hwif->dev ? dev_to_node(hwif->dev) : -1;
  1321. }
  1322. static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
  1323. {
  1324. ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
  1325. return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
  1326. }
  1327. #define ide_port_for_each_dev(i, dev, port) \
  1328. for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
  1329. #define ide_host_for_each_port(i, port, host) \
  1330. for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
  1331. #endif /* _IDE_H */