q40ints.c 8.0 KB

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  1. /*
  2. * arch/m68k/q40/q40ints.c
  3. *
  4. * Copyright (C) 1999,2001 Richard Zidlicky
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive
  8. * for more details.
  9. *
  10. * .. used to be loosely based on bvme6000ints.c
  11. *
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/ptrace.h>
  18. #include <asm/system.h>
  19. #include <asm/irq.h>
  20. #include <asm/traps.h>
  21. #include <asm/q40_master.h>
  22. #include <asm/q40ints.h>
  23. /*
  24. * Q40 IRQs are defined as follows:
  25. * 3,4,5,6,7,10,11,14,15 : ISA dev IRQs
  26. * 16-31: reserved
  27. * 32 : keyboard int
  28. * 33 : frame int (50/200 Hz periodic timer)
  29. * 34 : sample int (10/20 KHz periodic timer)
  30. *
  31. */
  32. static void q40_irq_handler(unsigned int, struct pt_regs *fp);
  33. static void q40_enable_irq(unsigned int);
  34. static void q40_disable_irq(unsigned int);
  35. unsigned short q40_ablecount[35];
  36. unsigned short q40_state[35];
  37. static unsigned int q40_irq_startup(unsigned int irq)
  38. {
  39. /* test for ISA ints not implemented by HW */
  40. switch (irq) {
  41. case 1: case 2: case 8: case 9:
  42. case 11: case 12: case 13:
  43. printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq);
  44. /* FIXME return -ENXIO; */
  45. }
  46. return 0;
  47. }
  48. static void q40_irq_shutdown(unsigned int irq)
  49. {
  50. }
  51. static struct irq_chip q40_irq_chip = {
  52. .name = "q40",
  53. .irq_startup = q40_irq_startup,
  54. .irq_shutdown = q40_irq_shutdown,
  55. .irq_enable = q40_enable_irq,
  56. .irq_disable = q40_disable_irq,
  57. };
  58. /*
  59. * void q40_init_IRQ (void)
  60. *
  61. * Parameters: None
  62. *
  63. * Returns: Nothing
  64. *
  65. * This function is called during kernel startup to initialize
  66. * the q40 IRQ handling routines.
  67. */
  68. static int disabled;
  69. void __init q40_init_IRQ(void)
  70. {
  71. m68k_setup_irq_chip(&q40_irq_chip, 1, Q40_IRQ_MAX);
  72. /* setup handler for ISA ints */
  73. m68k_setup_auto_interrupt(q40_irq_handler);
  74. m68k_irq_startup(IRQ_AUTO_2);
  75. m68k_irq_startup(IRQ_AUTO_4);
  76. /* now enable some ints.. */
  77. master_outb(1, EXT_ENABLE_REG); /* ISA IRQ 5-15 */
  78. /* make sure keyboard IRQ is disabled */
  79. master_outb(0, KEY_IRQ_ENABLE_REG);
  80. }
  81. /*
  82. * this stuff doesn't really belong here..
  83. */
  84. int ql_ticks; /* 200Hz ticks since last jiffie */
  85. static int sound_ticks;
  86. #define SVOL 45
  87. void q40_mksound(unsigned int hz, unsigned int ticks)
  88. {
  89. /* for now ignore hz, except that hz==0 switches off sound */
  90. /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
  91. if (hz == 0) {
  92. if (sound_ticks)
  93. sound_ticks = 1;
  94. *DAC_LEFT = 128;
  95. *DAC_RIGHT = 128;
  96. return;
  97. }
  98. /* sound itself is done in q40_timer_int */
  99. if (sound_ticks == 0)
  100. sound_ticks = 1000; /* pretty long beep */
  101. sound_ticks = ticks << 1;
  102. }
  103. static irq_handler_t q40_timer_routine;
  104. static irqreturn_t q40_timer_int (int irq, void * dev)
  105. {
  106. ql_ticks = ql_ticks ? 0 : 1;
  107. if (sound_ticks) {
  108. unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
  109. sound_ticks--;
  110. *DAC_LEFT=sval;
  111. *DAC_RIGHT=sval;
  112. }
  113. if (!ql_ticks)
  114. q40_timer_routine(irq, dev);
  115. return IRQ_HANDLED;
  116. }
  117. void q40_sched_init (irq_handler_t timer_routine)
  118. {
  119. int timer_irq;
  120. q40_timer_routine = timer_routine;
  121. timer_irq = Q40_IRQ_FRAME;
  122. if (request_irq(timer_irq, q40_timer_int, 0,
  123. "timer", q40_timer_int))
  124. panic("Couldn't register timer int");
  125. master_outb(-1, FRAME_CLEAR_REG);
  126. master_outb( 1, FRAME_RATE_REG);
  127. }
  128. /*
  129. * tables to translate bits into IRQ numbers
  130. * it is a good idea to order the entries by priority
  131. *
  132. */
  133. struct IRQ_TABLE{ unsigned mask; int irq ;};
  134. #if 0
  135. static struct IRQ_TABLE iirqs[]={
  136. {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  137. {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  138. {0,0}};
  139. #endif
  140. static struct IRQ_TABLE eirqs[] = {
  141. { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
  142. { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
  143. { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
  144. { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
  145. { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
  146. { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
  147. { .mask = Q40_IRQ5_MASK, .irq = 5 },
  148. { .mask = Q40_IRQ10_MASK, .irq = 10 },
  149. {0,0}
  150. };
  151. /* complain only this many times about spurious ints : */
  152. static int ccleirq=60; /* ISA dev IRQs*/
  153. /*static int cclirq=60;*/ /* internal */
  154. /* FIXME: add shared ints,mask,unmask,probing.... */
  155. #define IRQ_INPROGRESS 1
  156. /*static unsigned short saved_mask;*/
  157. //static int do_tint=0;
  158. #define DEBUG_Q40INT
  159. /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */
  160. static int mext_disabled=0; /* ext irq disabled by master chip? */
  161. static int aliased_irq=0; /* how many times inside handler ?*/
  162. /* got interrupt, dispatch to ISA or keyboard/timer IRQs */
  163. static void q40_irq_handler(unsigned int irq, struct pt_regs *fp)
  164. {
  165. unsigned mir, mer;
  166. int i;
  167. //repeat:
  168. mir = master_inb(IIRQ_REG);
  169. #ifdef CONFIG_BLK_DEV_FD
  170. if ((mir & Q40_IRQ_EXT_MASK) &&
  171. (master_inb(EIRQ_REG) & Q40_IRQ6_MASK)) {
  172. floppy_hardint();
  173. return;
  174. }
  175. #endif
  176. switch (irq) {
  177. case 4:
  178. case 6:
  179. __m68k_handle_int(Q40_IRQ_SAMPLE, fp);
  180. return;
  181. }
  182. if (mir & Q40_IRQ_FRAME_MASK) {
  183. __m68k_handle_int(Q40_IRQ_FRAME, fp);
  184. master_outb(-1, FRAME_CLEAR_REG);
  185. }
  186. if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
  187. mer = master_inb(EIRQ_REG);
  188. for (i = 0; eirqs[i].mask; i++) {
  189. if (mer & eirqs[i].mask) {
  190. irq = eirqs[i].irq;
  191. /*
  192. * There is a little mess wrt which IRQ really caused this irq request. The
  193. * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
  194. * are read - which is long after the request came in. In theory IRQs should
  195. * not just go away but they occasionally do
  196. */
  197. if (irq > 4 && irq <= 15 && mext_disabled) {
  198. /*aliased_irq++;*/
  199. goto iirq;
  200. }
  201. if (q40_state[irq] & IRQ_INPROGRESS) {
  202. /* some handlers do local_irq_enable() for irq latency reasons, */
  203. /* however reentering an active irq handler is not permitted */
  204. #ifdef IP_USE_DISABLE
  205. /* in theory this is the better way to do it because it still */
  206. /* lets through eg the serial irqs, unfortunately it crashes */
  207. disable_irq(irq);
  208. disabled = 1;
  209. #else
  210. /*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",
  211. irq, disabled ? "already" : "not yet"); */
  212. fp->sr = (((fp->sr) & (~0x700))+0x200);
  213. disabled = 1;
  214. #endif
  215. goto iirq;
  216. }
  217. q40_state[irq] |= IRQ_INPROGRESS;
  218. __m68k_handle_int(irq, fp);
  219. q40_state[irq] &= ~IRQ_INPROGRESS;
  220. /* naively enable everything, if that fails than */
  221. /* this function will be reentered immediately thus */
  222. /* getting another chance to disable the IRQ */
  223. if (disabled) {
  224. #ifdef IP_USE_DISABLE
  225. if (irq > 4) {
  226. disabled = 0;
  227. enable_irq(irq);
  228. }
  229. #else
  230. disabled = 0;
  231. /*printk("reenabling irq %d\n", irq); */
  232. #endif
  233. }
  234. // used to do 'goto repeat;' here, this delayed bh processing too long
  235. return;
  236. }
  237. }
  238. if (mer && ccleirq > 0 && !aliased_irq) {
  239. printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer);
  240. ccleirq--;
  241. }
  242. }
  243. iirq:
  244. mir = master_inb(IIRQ_REG);
  245. /* should test whether keyboard irq is really enabled, doing it in defhand */
  246. if (mir & Q40_IRQ_KEYB_MASK)
  247. __m68k_handle_int(Q40_IRQ_KEYBOARD, fp);
  248. return;
  249. }
  250. void q40_enable_irq(unsigned int irq)
  251. {
  252. if (irq >= 5 && irq <= 15) {
  253. mext_disabled--;
  254. if (mext_disabled > 0)
  255. printk("q40_enable_irq : nested disable/enable\n");
  256. if (mext_disabled == 0)
  257. master_outb(1, EXT_ENABLE_REG);
  258. }
  259. }
  260. void q40_disable_irq(unsigned int irq)
  261. {
  262. /* disable ISA iqs : only do something if the driver has been
  263. * verified to be Q40 "compatible" - right now IDE, NE2K
  264. * Any driver should not attempt to sleep across disable_irq !!
  265. */
  266. if (irq >= 5 && irq <= 15) {
  267. master_outb(0, EXT_ENABLE_REG);
  268. mext_disabled++;
  269. if (mext_disabled > 1)
  270. printk("disable_irq nesting count %d\n",mext_disabled);
  271. }
  272. }
  273. unsigned long q40_probe_irq_on(void)
  274. {
  275. printk("irq probing not working - reconfigure the driver to avoid this\n");
  276. return -1;
  277. }
  278. int q40_probe_irq_off(unsigned long irqs)
  279. {
  280. return -1;
  281. }