udc.c 44 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/chipidea.h>
  23. #include "ci.h"
  24. #include "udc.h"
  25. #include "bits.h"
  26. #include "debug.h"
  27. #include "otg.h"
  28. /* control endpoint description */
  29. static const struct usb_endpoint_descriptor
  30. ctrl_endpt_out_desc = {
  31. .bLength = USB_DT_ENDPOINT_SIZE,
  32. .bDescriptorType = USB_DT_ENDPOINT,
  33. .bEndpointAddress = USB_DIR_OUT,
  34. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  35. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  36. };
  37. static const struct usb_endpoint_descriptor
  38. ctrl_endpt_in_desc = {
  39. .bLength = USB_DT_ENDPOINT_SIZE,
  40. .bDescriptorType = USB_DT_ENDPOINT,
  41. .bEndpointAddress = USB_DIR_IN,
  42. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  43. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  44. };
  45. /**
  46. * hw_ep_bit: calculates the bit number
  47. * @num: endpoint number
  48. * @dir: endpoint direction
  49. *
  50. * This function returns bit number
  51. */
  52. static inline int hw_ep_bit(int num, int dir)
  53. {
  54. return num + (dir ? 16 : 0);
  55. }
  56. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  57. {
  58. int fill = 16 - ci->hw_ep_max / 2;
  59. if (n >= ci->hw_ep_max / 2)
  60. n += fill;
  61. return n;
  62. }
  63. /**
  64. * hw_device_state: enables/disables interrupts (execute without interruption)
  65. * @dma: 0 => disable, !0 => enable and set dma engine
  66. *
  67. * This function returns an error code
  68. */
  69. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  70. {
  71. if (dma) {
  72. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  73. /* interrupt, error, port change, reset, sleep/suspend */
  74. hw_write(ci, OP_USBINTR, ~0,
  75. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  76. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  77. } else {
  78. hw_write(ci, OP_USBINTR, ~0, 0);
  79. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  80. }
  81. return 0;
  82. }
  83. /**
  84. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  85. * @num: endpoint number
  86. * @dir: endpoint direction
  87. *
  88. * This function returns an error code
  89. */
  90. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  91. {
  92. int n = hw_ep_bit(num, dir);
  93. do {
  94. /* flush any pending transfer */
  95. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  96. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  97. cpu_relax();
  98. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  99. return 0;
  100. }
  101. /**
  102. * hw_ep_disable: disables endpoint (execute without interruption)
  103. * @num: endpoint number
  104. * @dir: endpoint direction
  105. *
  106. * This function returns an error code
  107. */
  108. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  109. {
  110. hw_ep_flush(ci, num, dir);
  111. hw_write(ci, OP_ENDPTCTRL + num,
  112. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  113. return 0;
  114. }
  115. /**
  116. * hw_ep_enable: enables endpoint (execute without interruption)
  117. * @num: endpoint number
  118. * @dir: endpoint direction
  119. * @type: endpoint type
  120. *
  121. * This function returns an error code
  122. */
  123. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  124. {
  125. u32 mask, data;
  126. if (dir) {
  127. mask = ENDPTCTRL_TXT; /* type */
  128. data = type << __ffs(mask);
  129. mask |= ENDPTCTRL_TXS; /* unstall */
  130. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  131. data |= ENDPTCTRL_TXR;
  132. mask |= ENDPTCTRL_TXE; /* enable */
  133. data |= ENDPTCTRL_TXE;
  134. } else {
  135. mask = ENDPTCTRL_RXT; /* type */
  136. data = type << __ffs(mask);
  137. mask |= ENDPTCTRL_RXS; /* unstall */
  138. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  139. data |= ENDPTCTRL_RXR;
  140. mask |= ENDPTCTRL_RXE; /* enable */
  141. data |= ENDPTCTRL_RXE;
  142. }
  143. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  144. return 0;
  145. }
  146. /**
  147. * hw_ep_get_halt: return endpoint halt status
  148. * @num: endpoint number
  149. * @dir: endpoint direction
  150. *
  151. * This function returns 1 if endpoint halted
  152. */
  153. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  154. {
  155. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  156. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  157. }
  158. /**
  159. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  160. * interruption)
  161. * @n: endpoint number
  162. *
  163. * This function returns setup status
  164. */
  165. static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n)
  166. {
  167. n = ep_to_bit(ci, n);
  168. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  169. }
  170. /**
  171. * hw_ep_prime: primes endpoint (execute without interruption)
  172. * @num: endpoint number
  173. * @dir: endpoint direction
  174. * @is_ctrl: true if control endpoint
  175. *
  176. * This function returns an error code
  177. */
  178. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  179. {
  180. int n = hw_ep_bit(num, dir);
  181. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  182. return -EAGAIN;
  183. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  184. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  185. cpu_relax();
  186. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  187. return -EAGAIN;
  188. /* status shoult be tested according with manual but it doesn't work */
  189. return 0;
  190. }
  191. /**
  192. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  193. * without interruption)
  194. * @num: endpoint number
  195. * @dir: endpoint direction
  196. * @value: true => stall, false => unstall
  197. *
  198. * This function returns an error code
  199. */
  200. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  201. {
  202. if (value != 0 && value != 1)
  203. return -EINVAL;
  204. do {
  205. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  206. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  207. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  208. /* data toggle - reserved for EP0 but it's in ESS */
  209. hw_write(ci, reg, mask_xs|mask_xr,
  210. value ? mask_xs : mask_xr);
  211. } while (value != hw_ep_get_halt(ci, num, dir));
  212. return 0;
  213. }
  214. /**
  215. * hw_is_port_high_speed: test if port is high speed
  216. *
  217. * This function returns true if high speed port
  218. */
  219. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  220. {
  221. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  222. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  223. }
  224. /**
  225. * hw_read_intr_enable: returns interrupt enable register
  226. *
  227. * This function returns register data
  228. */
  229. static u32 hw_read_intr_enable(struct ci_hdrc *ci)
  230. {
  231. return hw_read(ci, OP_USBINTR, ~0);
  232. }
  233. /**
  234. * hw_read_intr_status: returns interrupt status register
  235. *
  236. * This function returns register data
  237. */
  238. static u32 hw_read_intr_status(struct ci_hdrc *ci)
  239. {
  240. return hw_read(ci, OP_USBSTS, ~0);
  241. }
  242. /**
  243. * hw_test_and_clear_complete: test & clear complete status (execute without
  244. * interruption)
  245. * @n: endpoint number
  246. *
  247. * This function returns complete status
  248. */
  249. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  250. {
  251. n = ep_to_bit(ci, n);
  252. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  253. }
  254. /**
  255. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  256. * without interruption)
  257. *
  258. * This function returns active interrutps
  259. */
  260. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  261. {
  262. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  263. hw_write(ci, OP_USBSTS, ~0, reg);
  264. return reg;
  265. }
  266. /**
  267. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  268. * interruption)
  269. *
  270. * This function returns guard value
  271. */
  272. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  273. {
  274. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  275. }
  276. /**
  277. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  278. * interruption)
  279. *
  280. * This function returns guard value
  281. */
  282. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  283. {
  284. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  285. }
  286. /**
  287. * hw_usb_set_address: configures USB address (execute without interruption)
  288. * @value: new USB address
  289. *
  290. * This function explicitly sets the address, without the "USBADRA" (advance)
  291. * feature, which is not supported by older versions of the controller.
  292. */
  293. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  294. {
  295. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  296. value << __ffs(DEVICEADDR_USBADR));
  297. }
  298. /**
  299. * hw_usb_reset: restart device after a bus reset (execute without
  300. * interruption)
  301. *
  302. * This function returns an error code
  303. */
  304. static int hw_usb_reset(struct ci_hdrc *ci)
  305. {
  306. hw_usb_set_address(ci, 0);
  307. /* ESS flushes only at end?!? */
  308. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  309. /* clear setup token semaphores */
  310. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  311. /* clear complete status */
  312. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  313. /* wait until all bits cleared */
  314. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  315. udelay(10); /* not RTOS friendly */
  316. /* reset all endpoints ? */
  317. /* reset internal status and wait for further instructions
  318. no need to verify the port reset status (ESS does it) */
  319. return 0;
  320. }
  321. /******************************************************************************
  322. * UTIL block
  323. *****************************************************************************/
  324. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  325. unsigned length)
  326. {
  327. int i;
  328. u32 temp;
  329. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  330. GFP_ATOMIC);
  331. if (node == NULL)
  332. return -ENOMEM;
  333. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  334. &node->dma);
  335. if (node->ptr == NULL) {
  336. kfree(node);
  337. return -ENOMEM;
  338. }
  339. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  340. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  341. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  342. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  343. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  344. if (length) {
  345. node->ptr->page[0] = cpu_to_le32(temp);
  346. for (i = 1; i < TD_PAGE_COUNT; i++) {
  347. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  348. page &= ~TD_RESERVED_MASK;
  349. node->ptr->page[i] = cpu_to_le32(page);
  350. }
  351. }
  352. hwreq->req.actual += length;
  353. if (!list_empty(&hwreq->tds)) {
  354. /* get the last entry */
  355. lastnode = list_entry(hwreq->tds.prev,
  356. struct td_node, td);
  357. lastnode->ptr->next = cpu_to_le32(node->dma);
  358. }
  359. INIT_LIST_HEAD(&node->td);
  360. list_add_tail(&node->td, &hwreq->tds);
  361. return 0;
  362. }
  363. /**
  364. * _usb_addr: calculates endpoint address from direction & number
  365. * @ep: endpoint
  366. */
  367. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  368. {
  369. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  370. }
  371. /**
  372. * _hardware_queue: configures a request at hardware level
  373. * @gadget: gadget
  374. * @hwep: endpoint
  375. *
  376. * This function returns an error code
  377. */
  378. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  379. {
  380. struct ci_hdrc *ci = hwep->ci;
  381. int ret = 0;
  382. unsigned rest = hwreq->req.length;
  383. int pages = TD_PAGE_COUNT;
  384. struct td_node *firstnode, *lastnode;
  385. /* don't queue twice */
  386. if (hwreq->req.status == -EALREADY)
  387. return -EALREADY;
  388. hwreq->req.status = -EALREADY;
  389. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  390. if (ret)
  391. return ret;
  392. /*
  393. * The first buffer could be not page aligned.
  394. * In that case we have to span into one extra td.
  395. */
  396. if (hwreq->req.dma % PAGE_SIZE)
  397. pages--;
  398. if (rest == 0)
  399. add_td_to_list(hwep, hwreq, 0);
  400. while (rest > 0) {
  401. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  402. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  403. add_td_to_list(hwep, hwreq, count);
  404. rest -= count;
  405. }
  406. if (hwreq->req.zero && hwreq->req.length
  407. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  408. add_td_to_list(hwep, hwreq, 0);
  409. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  410. lastnode = list_entry(hwreq->tds.prev,
  411. struct td_node, td);
  412. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  413. if (!hwreq->req.no_interrupt)
  414. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  415. wmb();
  416. hwreq->req.actual = 0;
  417. if (!list_empty(&hwep->qh.queue)) {
  418. struct ci_hw_req *hwreqprev;
  419. int n = hw_ep_bit(hwep->num, hwep->dir);
  420. int tmp_stat;
  421. struct td_node *prevlastnode;
  422. u32 next = firstnode->dma & TD_ADDR_MASK;
  423. hwreqprev = list_entry(hwep->qh.queue.prev,
  424. struct ci_hw_req, queue);
  425. prevlastnode = list_entry(hwreqprev->tds.prev,
  426. struct td_node, td);
  427. prevlastnode->ptr->next = cpu_to_le32(next);
  428. wmb();
  429. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  430. goto done;
  431. do {
  432. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  433. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  434. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  435. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  436. if (tmp_stat)
  437. goto done;
  438. }
  439. /* QH configuration */
  440. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  441. hwep->qh.ptr->td.token &=
  442. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  443. if (hwep->type == USB_ENDPOINT_XFER_ISOC) {
  444. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  445. if (hwreq->req.length % hwep->ep.maxpacket)
  446. mul++;
  447. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  448. }
  449. wmb(); /* synchronize before ep prime */
  450. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  451. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  452. done:
  453. return ret;
  454. }
  455. /*
  456. * free_pending_td: remove a pending request for the endpoint
  457. * @hwep: endpoint
  458. */
  459. static void free_pending_td(struct ci_hw_ep *hwep)
  460. {
  461. struct td_node *pending = hwep->pending_td;
  462. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  463. hwep->pending_td = NULL;
  464. kfree(pending);
  465. }
  466. /**
  467. * _hardware_dequeue: handles a request at hardware level
  468. * @gadget: gadget
  469. * @hwep: endpoint
  470. *
  471. * This function returns an error code
  472. */
  473. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  474. {
  475. u32 tmptoken;
  476. struct td_node *node, *tmpnode;
  477. unsigned remaining_length;
  478. unsigned actual = hwreq->req.length;
  479. if (hwreq->req.status != -EALREADY)
  480. return -EINVAL;
  481. hwreq->req.status = 0;
  482. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  483. tmptoken = le32_to_cpu(node->ptr->token);
  484. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  485. hwreq->req.status = -EALREADY;
  486. return -EBUSY;
  487. }
  488. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  489. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  490. actual -= remaining_length;
  491. hwreq->req.status = tmptoken & TD_STATUS;
  492. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  493. hwreq->req.status = -EPIPE;
  494. break;
  495. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  496. hwreq->req.status = -EPROTO;
  497. break;
  498. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  499. hwreq->req.status = -EILSEQ;
  500. break;
  501. }
  502. if (remaining_length) {
  503. if (hwep->dir) {
  504. hwreq->req.status = -EPROTO;
  505. break;
  506. }
  507. }
  508. /*
  509. * As the hardware could still address the freed td
  510. * which will run the udc unusable, the cleanup of the
  511. * td has to be delayed by one.
  512. */
  513. if (hwep->pending_td)
  514. free_pending_td(hwep);
  515. hwep->pending_td = node;
  516. list_del_init(&node->td);
  517. }
  518. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  519. hwreq->req.actual += actual;
  520. if (hwreq->req.status)
  521. return hwreq->req.status;
  522. return hwreq->req.actual;
  523. }
  524. /**
  525. * _ep_nuke: dequeues all endpoint requests
  526. * @hwep: endpoint
  527. *
  528. * This function returns an error code
  529. * Caller must hold lock
  530. */
  531. static int _ep_nuke(struct ci_hw_ep *hwep)
  532. __releases(hwep->lock)
  533. __acquires(hwep->lock)
  534. {
  535. struct td_node *node, *tmpnode;
  536. if (hwep == NULL)
  537. return -EINVAL;
  538. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  539. while (!list_empty(&hwep->qh.queue)) {
  540. /* pop oldest request */
  541. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  542. struct ci_hw_req, queue);
  543. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  544. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  545. list_del_init(&node->td);
  546. node->ptr = NULL;
  547. kfree(node);
  548. }
  549. list_del_init(&hwreq->queue);
  550. hwreq->req.status = -ESHUTDOWN;
  551. if (hwreq->req.complete != NULL) {
  552. spin_unlock(hwep->lock);
  553. hwreq->req.complete(&hwep->ep, &hwreq->req);
  554. spin_lock(hwep->lock);
  555. }
  556. }
  557. if (hwep->pending_td)
  558. free_pending_td(hwep);
  559. return 0;
  560. }
  561. /**
  562. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  563. * @gadget: gadget
  564. *
  565. * This function returns an error code
  566. */
  567. static int _gadget_stop_activity(struct usb_gadget *gadget)
  568. {
  569. struct usb_ep *ep;
  570. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  571. unsigned long flags;
  572. spin_lock_irqsave(&ci->lock, flags);
  573. ci->gadget.speed = USB_SPEED_UNKNOWN;
  574. ci->remote_wakeup = 0;
  575. ci->suspended = 0;
  576. spin_unlock_irqrestore(&ci->lock, flags);
  577. /* flush all endpoints */
  578. gadget_for_each_ep(ep, gadget) {
  579. usb_ep_fifo_flush(ep);
  580. }
  581. usb_ep_fifo_flush(&ci->ep0out->ep);
  582. usb_ep_fifo_flush(&ci->ep0in->ep);
  583. /* make sure to disable all endpoints */
  584. gadget_for_each_ep(ep, gadget) {
  585. usb_ep_disable(ep);
  586. }
  587. if (ci->status != NULL) {
  588. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  589. ci->status = NULL;
  590. }
  591. return 0;
  592. }
  593. /******************************************************************************
  594. * ISR block
  595. *****************************************************************************/
  596. /**
  597. * isr_reset_handler: USB reset interrupt handler
  598. * @ci: UDC device
  599. *
  600. * This function resets USB engine after a bus reset occurred
  601. */
  602. static void isr_reset_handler(struct ci_hdrc *ci)
  603. __releases(ci->lock)
  604. __acquires(ci->lock)
  605. {
  606. int retval;
  607. spin_unlock(&ci->lock);
  608. if (ci->gadget.speed != USB_SPEED_UNKNOWN) {
  609. if (ci->driver)
  610. ci->driver->disconnect(&ci->gadget);
  611. }
  612. retval = _gadget_stop_activity(&ci->gadget);
  613. if (retval)
  614. goto done;
  615. retval = hw_usb_reset(ci);
  616. if (retval)
  617. goto done;
  618. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  619. if (ci->status == NULL)
  620. retval = -ENOMEM;
  621. done:
  622. spin_lock(&ci->lock);
  623. if (retval)
  624. dev_err(ci->dev, "error: %i\n", retval);
  625. }
  626. /**
  627. * isr_get_status_complete: get_status request complete function
  628. * @ep: endpoint
  629. * @req: request handled
  630. *
  631. * Caller must release lock
  632. */
  633. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  634. {
  635. if (ep == NULL || req == NULL)
  636. return;
  637. kfree(req->buf);
  638. usb_ep_free_request(ep, req);
  639. }
  640. /**
  641. * _ep_queue: queues (submits) an I/O request to an endpoint
  642. *
  643. * Caller must hold lock
  644. */
  645. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  646. gfp_t __maybe_unused gfp_flags)
  647. {
  648. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  649. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  650. struct ci_hdrc *ci = hwep->ci;
  651. int retval = 0;
  652. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  653. return -EINVAL;
  654. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  655. if (req->length)
  656. hwep = (ci->ep0_dir == RX) ?
  657. ci->ep0out : ci->ep0in;
  658. if (!list_empty(&hwep->qh.queue)) {
  659. _ep_nuke(hwep);
  660. retval = -EOVERFLOW;
  661. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  662. _usb_addr(hwep));
  663. }
  664. }
  665. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  666. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  667. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  668. return -EMSGSIZE;
  669. }
  670. /* first nuke then test link, e.g. previous status has not sent */
  671. if (!list_empty(&hwreq->queue)) {
  672. dev_err(hwep->ci->dev, "request already in queue\n");
  673. return -EBUSY;
  674. }
  675. /* push request */
  676. hwreq->req.status = -EINPROGRESS;
  677. hwreq->req.actual = 0;
  678. retval = _hardware_enqueue(hwep, hwreq);
  679. if (retval == -EALREADY)
  680. retval = 0;
  681. if (!retval)
  682. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  683. return retval;
  684. }
  685. /**
  686. * isr_get_status_response: get_status request response
  687. * @ci: ci struct
  688. * @setup: setup request packet
  689. *
  690. * This function returns an error code
  691. */
  692. static int isr_get_status_response(struct ci_hdrc *ci,
  693. struct usb_ctrlrequest *setup)
  694. __releases(hwep->lock)
  695. __acquires(hwep->lock)
  696. {
  697. struct ci_hw_ep *hwep = ci->ep0in;
  698. struct usb_request *req = NULL;
  699. gfp_t gfp_flags = GFP_ATOMIC;
  700. int dir, num, retval;
  701. if (hwep == NULL || setup == NULL)
  702. return -EINVAL;
  703. spin_unlock(hwep->lock);
  704. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  705. spin_lock(hwep->lock);
  706. if (req == NULL)
  707. return -ENOMEM;
  708. req->complete = isr_get_status_complete;
  709. req->length = 2;
  710. req->buf = kzalloc(req->length, gfp_flags);
  711. if (req->buf == NULL) {
  712. retval = -ENOMEM;
  713. goto err_free_req;
  714. }
  715. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  716. /* Assume that device is bus powered for now. */
  717. *(u16 *)req->buf = ci->remote_wakeup << 1;
  718. retval = 0;
  719. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  720. == USB_RECIP_ENDPOINT) {
  721. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  722. TX : RX;
  723. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  724. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  725. }
  726. /* else do nothing; reserved for future use */
  727. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  728. if (retval)
  729. goto err_free_buf;
  730. return 0;
  731. err_free_buf:
  732. kfree(req->buf);
  733. err_free_req:
  734. spin_unlock(hwep->lock);
  735. usb_ep_free_request(&hwep->ep, req);
  736. spin_lock(hwep->lock);
  737. return retval;
  738. }
  739. /**
  740. * isr_setup_status_complete: setup_status request complete function
  741. * @ep: endpoint
  742. * @req: request handled
  743. *
  744. * Caller must release lock. Put the port in test mode if test mode
  745. * feature is selected.
  746. */
  747. static void
  748. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  749. {
  750. struct ci_hdrc *ci = req->context;
  751. unsigned long flags;
  752. if (ci->setaddr) {
  753. hw_usb_set_address(ci, ci->address);
  754. ci->setaddr = false;
  755. }
  756. spin_lock_irqsave(&ci->lock, flags);
  757. if (ci->test_mode)
  758. hw_port_test_set(ci, ci->test_mode);
  759. spin_unlock_irqrestore(&ci->lock, flags);
  760. }
  761. /**
  762. * isr_setup_status_phase: queues the status phase of a setup transation
  763. * @ci: ci struct
  764. *
  765. * This function returns an error code
  766. */
  767. static int isr_setup_status_phase(struct ci_hdrc *ci)
  768. {
  769. int retval;
  770. struct ci_hw_ep *hwep;
  771. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  772. ci->status->context = ci;
  773. ci->status->complete = isr_setup_status_complete;
  774. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  775. return retval;
  776. }
  777. /**
  778. * isr_tr_complete_low: transaction complete low level handler
  779. * @hwep: endpoint
  780. *
  781. * This function returns an error code
  782. * Caller must hold lock
  783. */
  784. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  785. __releases(hwep->lock)
  786. __acquires(hwep->lock)
  787. {
  788. struct ci_hw_req *hwreq, *hwreqtemp;
  789. struct ci_hw_ep *hweptemp = hwep;
  790. int retval = 0;
  791. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  792. queue) {
  793. retval = _hardware_dequeue(hwep, hwreq);
  794. if (retval < 0)
  795. break;
  796. list_del_init(&hwreq->queue);
  797. if (hwreq->req.complete != NULL) {
  798. spin_unlock(hwep->lock);
  799. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  800. hwreq->req.length)
  801. hweptemp = hwep->ci->ep0in;
  802. hwreq->req.complete(&hweptemp->ep, &hwreq->req);
  803. spin_lock(hwep->lock);
  804. }
  805. }
  806. if (retval == -EBUSY)
  807. retval = 0;
  808. return retval;
  809. }
  810. /**
  811. * isr_tr_complete_handler: transaction complete interrupt handler
  812. * @ci: UDC descriptor
  813. *
  814. * This function handles traffic events
  815. */
  816. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  817. __releases(ci->lock)
  818. __acquires(ci->lock)
  819. {
  820. unsigned i;
  821. u8 tmode = 0;
  822. for (i = 0; i < ci->hw_ep_max; i++) {
  823. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  824. int type, num, dir, err = -EINVAL;
  825. struct usb_ctrlrequest req;
  826. if (hwep->ep.desc == NULL)
  827. continue; /* not configured */
  828. if (hw_test_and_clear_complete(ci, i)) {
  829. err = isr_tr_complete_low(hwep);
  830. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  831. if (err > 0) /* needs status phase */
  832. err = isr_setup_status_phase(ci);
  833. if (err < 0) {
  834. spin_unlock(&ci->lock);
  835. if (usb_ep_set_halt(&hwep->ep))
  836. dev_err(ci->dev,
  837. "error: ep_set_halt\n");
  838. spin_lock(&ci->lock);
  839. }
  840. }
  841. }
  842. if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
  843. !hw_test_and_clear_setup_status(ci, i))
  844. continue;
  845. if (i != 0) {
  846. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  847. continue;
  848. }
  849. /*
  850. * Flush data and handshake transactions of previous
  851. * setup packet.
  852. */
  853. _ep_nuke(ci->ep0out);
  854. _ep_nuke(ci->ep0in);
  855. /* read_setup_packet */
  856. do {
  857. hw_test_and_set_setup_guard(ci);
  858. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  859. } while (!hw_test_and_clear_setup_guard(ci));
  860. type = req.bRequestType;
  861. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  862. switch (req.bRequest) {
  863. case USB_REQ_CLEAR_FEATURE:
  864. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  865. le16_to_cpu(req.wValue) ==
  866. USB_ENDPOINT_HALT) {
  867. if (req.wLength != 0)
  868. break;
  869. num = le16_to_cpu(req.wIndex);
  870. dir = num & USB_ENDPOINT_DIR_MASK;
  871. num &= USB_ENDPOINT_NUMBER_MASK;
  872. if (dir) /* TX */
  873. num += ci->hw_ep_max/2;
  874. if (!ci->ci_hw_ep[num].wedge) {
  875. spin_unlock(&ci->lock);
  876. err = usb_ep_clear_halt(
  877. &ci->ci_hw_ep[num].ep);
  878. spin_lock(&ci->lock);
  879. if (err)
  880. break;
  881. }
  882. err = isr_setup_status_phase(ci);
  883. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  884. le16_to_cpu(req.wValue) ==
  885. USB_DEVICE_REMOTE_WAKEUP) {
  886. if (req.wLength != 0)
  887. break;
  888. ci->remote_wakeup = 0;
  889. err = isr_setup_status_phase(ci);
  890. } else {
  891. goto delegate;
  892. }
  893. break;
  894. case USB_REQ_GET_STATUS:
  895. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  896. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  897. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  898. goto delegate;
  899. if (le16_to_cpu(req.wLength) != 2 ||
  900. le16_to_cpu(req.wValue) != 0)
  901. break;
  902. err = isr_get_status_response(ci, &req);
  903. break;
  904. case USB_REQ_SET_ADDRESS:
  905. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  906. goto delegate;
  907. if (le16_to_cpu(req.wLength) != 0 ||
  908. le16_to_cpu(req.wIndex) != 0)
  909. break;
  910. ci->address = (u8)le16_to_cpu(req.wValue);
  911. ci->setaddr = true;
  912. err = isr_setup_status_phase(ci);
  913. break;
  914. case USB_REQ_SET_FEATURE:
  915. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  916. le16_to_cpu(req.wValue) ==
  917. USB_ENDPOINT_HALT) {
  918. if (req.wLength != 0)
  919. break;
  920. num = le16_to_cpu(req.wIndex);
  921. dir = num & USB_ENDPOINT_DIR_MASK;
  922. num &= USB_ENDPOINT_NUMBER_MASK;
  923. if (dir) /* TX */
  924. num += ci->hw_ep_max/2;
  925. spin_unlock(&ci->lock);
  926. err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
  927. spin_lock(&ci->lock);
  928. if (!err)
  929. isr_setup_status_phase(ci);
  930. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  931. if (req.wLength != 0)
  932. break;
  933. switch (le16_to_cpu(req.wValue)) {
  934. case USB_DEVICE_REMOTE_WAKEUP:
  935. ci->remote_wakeup = 1;
  936. err = isr_setup_status_phase(ci);
  937. break;
  938. case USB_DEVICE_TEST_MODE:
  939. tmode = le16_to_cpu(req.wIndex) >> 8;
  940. switch (tmode) {
  941. case TEST_J:
  942. case TEST_K:
  943. case TEST_SE0_NAK:
  944. case TEST_PACKET:
  945. case TEST_FORCE_EN:
  946. ci->test_mode = tmode;
  947. err = isr_setup_status_phase(
  948. ci);
  949. break;
  950. default:
  951. break;
  952. }
  953. default:
  954. goto delegate;
  955. }
  956. } else {
  957. goto delegate;
  958. }
  959. break;
  960. default:
  961. delegate:
  962. if (req.wLength == 0) /* no data phase */
  963. ci->ep0_dir = TX;
  964. spin_unlock(&ci->lock);
  965. err = ci->driver->setup(&ci->gadget, &req);
  966. spin_lock(&ci->lock);
  967. break;
  968. }
  969. if (err < 0) {
  970. spin_unlock(&ci->lock);
  971. if (usb_ep_set_halt(&hwep->ep))
  972. dev_err(ci->dev, "error: ep_set_halt\n");
  973. spin_lock(&ci->lock);
  974. }
  975. }
  976. }
  977. /******************************************************************************
  978. * ENDPT block
  979. *****************************************************************************/
  980. /**
  981. * ep_enable: configure endpoint, making it usable
  982. *
  983. * Check usb_ep_enable() at "usb_gadget.h" for details
  984. */
  985. static int ep_enable(struct usb_ep *ep,
  986. const struct usb_endpoint_descriptor *desc)
  987. {
  988. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  989. int retval = 0;
  990. unsigned long flags;
  991. u32 cap = 0;
  992. if (ep == NULL || desc == NULL)
  993. return -EINVAL;
  994. spin_lock_irqsave(hwep->lock, flags);
  995. /* only internal SW should enable ctrl endpts */
  996. hwep->ep.desc = desc;
  997. if (!list_empty(&hwep->qh.queue))
  998. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  999. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1000. hwep->num = usb_endpoint_num(desc);
  1001. hwep->type = usb_endpoint_type(desc);
  1002. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1003. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1004. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1005. cap |= QH_IOS;
  1006. if (hwep->num)
  1007. cap |= QH_ZLT;
  1008. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1009. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1010. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1011. /*
  1012. * Enable endpoints in the HW other than ep0 as ep0
  1013. * is always enabled
  1014. */
  1015. if (hwep->num)
  1016. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1017. hwep->type);
  1018. spin_unlock_irqrestore(hwep->lock, flags);
  1019. return retval;
  1020. }
  1021. /**
  1022. * ep_disable: endpoint is no longer usable
  1023. *
  1024. * Check usb_ep_disable() at "usb_gadget.h" for details
  1025. */
  1026. static int ep_disable(struct usb_ep *ep)
  1027. {
  1028. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1029. int direction, retval = 0;
  1030. unsigned long flags;
  1031. if (ep == NULL)
  1032. return -EINVAL;
  1033. else if (hwep->ep.desc == NULL)
  1034. return -EBUSY;
  1035. spin_lock_irqsave(hwep->lock, flags);
  1036. /* only internal SW should disable ctrl endpts */
  1037. direction = hwep->dir;
  1038. do {
  1039. retval |= _ep_nuke(hwep);
  1040. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1041. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1042. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1043. } while (hwep->dir != direction);
  1044. hwep->ep.desc = NULL;
  1045. spin_unlock_irqrestore(hwep->lock, flags);
  1046. return retval;
  1047. }
  1048. /**
  1049. * ep_alloc_request: allocate a request object to use with this endpoint
  1050. *
  1051. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1052. */
  1053. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1054. {
  1055. struct ci_hw_req *hwreq = NULL;
  1056. if (ep == NULL)
  1057. return NULL;
  1058. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1059. if (hwreq != NULL) {
  1060. INIT_LIST_HEAD(&hwreq->queue);
  1061. INIT_LIST_HEAD(&hwreq->tds);
  1062. }
  1063. return (hwreq == NULL) ? NULL : &hwreq->req;
  1064. }
  1065. /**
  1066. * ep_free_request: frees a request object
  1067. *
  1068. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1069. */
  1070. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1071. {
  1072. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1073. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1074. struct td_node *node, *tmpnode;
  1075. unsigned long flags;
  1076. if (ep == NULL || req == NULL) {
  1077. return;
  1078. } else if (!list_empty(&hwreq->queue)) {
  1079. dev_err(hwep->ci->dev, "freeing queued request\n");
  1080. return;
  1081. }
  1082. spin_lock_irqsave(hwep->lock, flags);
  1083. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1084. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1085. list_del_init(&node->td);
  1086. node->ptr = NULL;
  1087. kfree(node);
  1088. }
  1089. kfree(hwreq);
  1090. spin_unlock_irqrestore(hwep->lock, flags);
  1091. }
  1092. /**
  1093. * ep_queue: queues (submits) an I/O request to an endpoint
  1094. *
  1095. * Check usb_ep_queue()* at usb_gadget.h" for details
  1096. */
  1097. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1098. gfp_t __maybe_unused gfp_flags)
  1099. {
  1100. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1101. int retval = 0;
  1102. unsigned long flags;
  1103. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1104. return -EINVAL;
  1105. spin_lock_irqsave(hwep->lock, flags);
  1106. retval = _ep_queue(ep, req, gfp_flags);
  1107. spin_unlock_irqrestore(hwep->lock, flags);
  1108. return retval;
  1109. }
  1110. /**
  1111. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1112. *
  1113. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1114. */
  1115. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1116. {
  1117. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1118. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1119. unsigned long flags;
  1120. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1121. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1122. list_empty(&hwep->qh.queue))
  1123. return -EINVAL;
  1124. spin_lock_irqsave(hwep->lock, flags);
  1125. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1126. /* pop request */
  1127. list_del_init(&hwreq->queue);
  1128. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1129. req->status = -ECONNRESET;
  1130. if (hwreq->req.complete != NULL) {
  1131. spin_unlock(hwep->lock);
  1132. hwreq->req.complete(&hwep->ep, &hwreq->req);
  1133. spin_lock(hwep->lock);
  1134. }
  1135. spin_unlock_irqrestore(hwep->lock, flags);
  1136. return 0;
  1137. }
  1138. /**
  1139. * ep_set_halt: sets the endpoint halt feature
  1140. *
  1141. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1142. */
  1143. static int ep_set_halt(struct usb_ep *ep, int value)
  1144. {
  1145. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1146. int direction, retval = 0;
  1147. unsigned long flags;
  1148. if (ep == NULL || hwep->ep.desc == NULL)
  1149. return -EINVAL;
  1150. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  1151. return -EOPNOTSUPP;
  1152. spin_lock_irqsave(hwep->lock, flags);
  1153. #ifndef STALL_IN
  1154. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1155. if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
  1156. !list_empty(&hwep->qh.queue)) {
  1157. spin_unlock_irqrestore(hwep->lock, flags);
  1158. return -EAGAIN;
  1159. }
  1160. #endif
  1161. direction = hwep->dir;
  1162. do {
  1163. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  1164. if (!value)
  1165. hwep->wedge = 0;
  1166. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1167. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1168. } while (hwep->dir != direction);
  1169. spin_unlock_irqrestore(hwep->lock, flags);
  1170. return retval;
  1171. }
  1172. /**
  1173. * ep_set_wedge: sets the halt feature and ignores clear requests
  1174. *
  1175. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1176. */
  1177. static int ep_set_wedge(struct usb_ep *ep)
  1178. {
  1179. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1180. unsigned long flags;
  1181. if (ep == NULL || hwep->ep.desc == NULL)
  1182. return -EINVAL;
  1183. spin_lock_irqsave(hwep->lock, flags);
  1184. hwep->wedge = 1;
  1185. spin_unlock_irqrestore(hwep->lock, flags);
  1186. return usb_ep_set_halt(ep);
  1187. }
  1188. /**
  1189. * ep_fifo_flush: flushes contents of a fifo
  1190. *
  1191. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1192. */
  1193. static void ep_fifo_flush(struct usb_ep *ep)
  1194. {
  1195. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1196. unsigned long flags;
  1197. if (ep == NULL) {
  1198. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1199. return;
  1200. }
  1201. spin_lock_irqsave(hwep->lock, flags);
  1202. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1203. spin_unlock_irqrestore(hwep->lock, flags);
  1204. }
  1205. /**
  1206. * Endpoint-specific part of the API to the USB controller hardware
  1207. * Check "usb_gadget.h" for details
  1208. */
  1209. static const struct usb_ep_ops usb_ep_ops = {
  1210. .enable = ep_enable,
  1211. .disable = ep_disable,
  1212. .alloc_request = ep_alloc_request,
  1213. .free_request = ep_free_request,
  1214. .queue = ep_queue,
  1215. .dequeue = ep_dequeue,
  1216. .set_halt = ep_set_halt,
  1217. .set_wedge = ep_set_wedge,
  1218. .fifo_flush = ep_fifo_flush,
  1219. };
  1220. /******************************************************************************
  1221. * GADGET block
  1222. *****************************************************************************/
  1223. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1224. {
  1225. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1226. unsigned long flags;
  1227. int gadget_ready = 0;
  1228. spin_lock_irqsave(&ci->lock, flags);
  1229. ci->vbus_active = is_active;
  1230. if (ci->driver)
  1231. gadget_ready = 1;
  1232. spin_unlock_irqrestore(&ci->lock, flags);
  1233. if (gadget_ready) {
  1234. if (is_active) {
  1235. pm_runtime_get_sync(&_gadget->dev);
  1236. hw_device_reset(ci, USBMODE_CM_DC);
  1237. hw_device_state(ci, ci->ep0out->qh.dma);
  1238. dev_dbg(ci->dev, "Connected to host\n");
  1239. } else {
  1240. if (ci->driver)
  1241. ci->driver->disconnect(&ci->gadget);
  1242. hw_device_state(ci, 0);
  1243. if (ci->platdata->notify_event)
  1244. ci->platdata->notify_event(ci,
  1245. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1246. _gadget_stop_activity(&ci->gadget);
  1247. pm_runtime_put_sync(&_gadget->dev);
  1248. dev_dbg(ci->dev, "Disconnected from host\n");
  1249. }
  1250. }
  1251. return 0;
  1252. }
  1253. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1254. {
  1255. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1256. unsigned long flags;
  1257. int ret = 0;
  1258. spin_lock_irqsave(&ci->lock, flags);
  1259. if (!ci->remote_wakeup) {
  1260. ret = -EOPNOTSUPP;
  1261. goto out;
  1262. }
  1263. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1264. ret = -EINVAL;
  1265. goto out;
  1266. }
  1267. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1268. out:
  1269. spin_unlock_irqrestore(&ci->lock, flags);
  1270. return ret;
  1271. }
  1272. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1273. {
  1274. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1275. if (ci->transceiver)
  1276. return usb_phy_set_power(ci->transceiver, ma);
  1277. return -ENOTSUPP;
  1278. }
  1279. /* Change Data+ pullup status
  1280. * this func is used by usb_gadget_connect/disconnet
  1281. */
  1282. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1283. {
  1284. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1285. if (!ci->vbus_active)
  1286. return -EOPNOTSUPP;
  1287. if (is_on)
  1288. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1289. else
  1290. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1291. return 0;
  1292. }
  1293. static int ci_udc_start(struct usb_gadget *gadget,
  1294. struct usb_gadget_driver *driver);
  1295. static int ci_udc_stop(struct usb_gadget *gadget,
  1296. struct usb_gadget_driver *driver);
  1297. /**
  1298. * Device operations part of the API to the USB controller hardware,
  1299. * which don't involve endpoints (or i/o)
  1300. * Check "usb_gadget.h" for details
  1301. */
  1302. static const struct usb_gadget_ops usb_gadget_ops = {
  1303. .vbus_session = ci_udc_vbus_session,
  1304. .wakeup = ci_udc_wakeup,
  1305. .pullup = ci_udc_pullup,
  1306. .vbus_draw = ci_udc_vbus_draw,
  1307. .udc_start = ci_udc_start,
  1308. .udc_stop = ci_udc_stop,
  1309. };
  1310. static int init_eps(struct ci_hdrc *ci)
  1311. {
  1312. int retval = 0, i, j;
  1313. for (i = 0; i < ci->hw_ep_max/2; i++)
  1314. for (j = RX; j <= TX; j++) {
  1315. int k = i + j * ci->hw_ep_max/2;
  1316. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1317. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1318. (j == TX) ? "in" : "out");
  1319. hwep->ci = ci;
  1320. hwep->lock = &ci->lock;
  1321. hwep->td_pool = ci->td_pool;
  1322. hwep->ep.name = hwep->name;
  1323. hwep->ep.ops = &usb_ep_ops;
  1324. /*
  1325. * for ep0: maxP defined in desc, for other
  1326. * eps, maxP is set by epautoconfig() called
  1327. * by gadget layer
  1328. */
  1329. hwep->ep.maxpacket = (unsigned short)~0;
  1330. INIT_LIST_HEAD(&hwep->qh.queue);
  1331. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1332. &hwep->qh.dma);
  1333. if (hwep->qh.ptr == NULL)
  1334. retval = -ENOMEM;
  1335. else
  1336. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1337. /*
  1338. * set up shorthands for ep0 out and in endpoints,
  1339. * don't add to gadget's ep_list
  1340. */
  1341. if (i == 0) {
  1342. if (j == RX)
  1343. ci->ep0out = hwep;
  1344. else
  1345. ci->ep0in = hwep;
  1346. hwep->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1347. continue;
  1348. }
  1349. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1350. }
  1351. return retval;
  1352. }
  1353. static void destroy_eps(struct ci_hdrc *ci)
  1354. {
  1355. int i;
  1356. for (i = 0; i < ci->hw_ep_max; i++) {
  1357. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1358. if (hwep->pending_td)
  1359. free_pending_td(hwep);
  1360. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1361. }
  1362. }
  1363. /**
  1364. * ci_udc_start: register a gadget driver
  1365. * @gadget: our gadget
  1366. * @driver: the driver being registered
  1367. *
  1368. * Interrupts are enabled here.
  1369. */
  1370. static int ci_udc_start(struct usb_gadget *gadget,
  1371. struct usb_gadget_driver *driver)
  1372. {
  1373. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1374. unsigned long flags;
  1375. int retval = -ENOMEM;
  1376. if (driver->disconnect == NULL)
  1377. return -EINVAL;
  1378. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1379. retval = usb_ep_enable(&ci->ep0out->ep);
  1380. if (retval)
  1381. return retval;
  1382. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1383. retval = usb_ep_enable(&ci->ep0in->ep);
  1384. if (retval)
  1385. return retval;
  1386. ci->driver = driver;
  1387. pm_runtime_get_sync(&ci->gadget.dev);
  1388. if (ci->vbus_active) {
  1389. spin_lock_irqsave(&ci->lock, flags);
  1390. hw_device_reset(ci, USBMODE_CM_DC);
  1391. } else {
  1392. pm_runtime_put_sync(&ci->gadget.dev);
  1393. return retval;
  1394. }
  1395. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1396. spin_unlock_irqrestore(&ci->lock, flags);
  1397. if (retval)
  1398. pm_runtime_put_sync(&ci->gadget.dev);
  1399. return retval;
  1400. }
  1401. /**
  1402. * ci_udc_stop: unregister a gadget driver
  1403. */
  1404. static int ci_udc_stop(struct usb_gadget *gadget,
  1405. struct usb_gadget_driver *driver)
  1406. {
  1407. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1408. unsigned long flags;
  1409. spin_lock_irqsave(&ci->lock, flags);
  1410. if (ci->vbus_active) {
  1411. hw_device_state(ci, 0);
  1412. if (ci->platdata->notify_event)
  1413. ci->platdata->notify_event(ci,
  1414. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1415. spin_unlock_irqrestore(&ci->lock, flags);
  1416. _gadget_stop_activity(&ci->gadget);
  1417. spin_lock_irqsave(&ci->lock, flags);
  1418. pm_runtime_put(&ci->gadget.dev);
  1419. }
  1420. ci->driver = NULL;
  1421. spin_unlock_irqrestore(&ci->lock, flags);
  1422. return 0;
  1423. }
  1424. /******************************************************************************
  1425. * BUS block
  1426. *****************************************************************************/
  1427. /**
  1428. * udc_irq: ci interrupt handler
  1429. *
  1430. * This function returns IRQ_HANDLED if the IRQ has been handled
  1431. * It locks access to registers
  1432. */
  1433. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1434. {
  1435. irqreturn_t retval;
  1436. u32 intr;
  1437. if (ci == NULL)
  1438. return IRQ_HANDLED;
  1439. spin_lock(&ci->lock);
  1440. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1441. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1442. USBMODE_CM_DC) {
  1443. spin_unlock(&ci->lock);
  1444. return IRQ_NONE;
  1445. }
  1446. }
  1447. intr = hw_test_and_clear_intr_active(ci);
  1448. if (intr) {
  1449. /* order defines priority - do NOT change it */
  1450. if (USBi_URI & intr)
  1451. isr_reset_handler(ci);
  1452. if (USBi_PCI & intr) {
  1453. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1454. USB_SPEED_HIGH : USB_SPEED_FULL;
  1455. if (ci->suspended && ci->driver->resume) {
  1456. spin_unlock(&ci->lock);
  1457. ci->driver->resume(&ci->gadget);
  1458. spin_lock(&ci->lock);
  1459. ci->suspended = 0;
  1460. }
  1461. }
  1462. if (USBi_UI & intr)
  1463. isr_tr_complete_handler(ci);
  1464. if (USBi_SLI & intr) {
  1465. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1466. ci->driver->suspend) {
  1467. ci->suspended = 1;
  1468. spin_unlock(&ci->lock);
  1469. ci->driver->suspend(&ci->gadget);
  1470. spin_lock(&ci->lock);
  1471. }
  1472. }
  1473. retval = IRQ_HANDLED;
  1474. } else {
  1475. retval = IRQ_NONE;
  1476. }
  1477. spin_unlock(&ci->lock);
  1478. return retval;
  1479. }
  1480. /**
  1481. * udc_start: initialize gadget role
  1482. * @ci: chipidea controller
  1483. */
  1484. static int udc_start(struct ci_hdrc *ci)
  1485. {
  1486. struct device *dev = ci->dev;
  1487. int retval = 0;
  1488. spin_lock_init(&ci->lock);
  1489. ci->gadget.ops = &usb_gadget_ops;
  1490. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1491. ci->gadget.max_speed = USB_SPEED_HIGH;
  1492. ci->gadget.is_otg = 0;
  1493. ci->gadget.name = ci->platdata->name;
  1494. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1495. /* alloc resources */
  1496. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1497. sizeof(struct ci_hw_qh),
  1498. 64, CI_HDRC_PAGE_SIZE);
  1499. if (ci->qh_pool == NULL)
  1500. return -ENOMEM;
  1501. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1502. sizeof(struct ci_hw_td),
  1503. 64, CI_HDRC_PAGE_SIZE);
  1504. if (ci->td_pool == NULL) {
  1505. retval = -ENOMEM;
  1506. goto free_qh_pool;
  1507. }
  1508. retval = init_eps(ci);
  1509. if (retval)
  1510. goto free_pools;
  1511. ci->gadget.ep0 = &ci->ep0in->ep;
  1512. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1513. if (retval)
  1514. goto destroy_eps;
  1515. pm_runtime_no_callbacks(&ci->gadget.dev);
  1516. pm_runtime_enable(&ci->gadget.dev);
  1517. /* Update ci->vbus_active */
  1518. ci_handle_vbus_change(ci);
  1519. return retval;
  1520. destroy_eps:
  1521. destroy_eps(ci);
  1522. free_pools:
  1523. dma_pool_destroy(ci->td_pool);
  1524. free_qh_pool:
  1525. dma_pool_destroy(ci->qh_pool);
  1526. return retval;
  1527. }
  1528. /**
  1529. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1530. *
  1531. * No interrupts active, the IRQ has been released
  1532. */
  1533. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1534. {
  1535. if (!ci->roles[CI_ROLE_GADGET])
  1536. return;
  1537. usb_del_gadget_udc(&ci->gadget);
  1538. destroy_eps(ci);
  1539. dma_pool_destroy(ci->td_pool);
  1540. dma_pool_destroy(ci->qh_pool);
  1541. if (ci->transceiver) {
  1542. otg_set_peripheral(ci->transceiver->otg, NULL);
  1543. if (ci->global_phy)
  1544. usb_put_phy(ci->transceiver);
  1545. }
  1546. }
  1547. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1548. {
  1549. if (ci->is_otg) {
  1550. ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
  1551. ci_enable_otg_interrupt(ci, OTGSC_BSVIE);
  1552. }
  1553. return 0;
  1554. }
  1555. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1556. {
  1557. if (ci->is_otg) {
  1558. /* host doesn't care B_SESSION_VALID event */
  1559. ci_clear_otg_interrupt(ci, OTGSC_BSVIS);
  1560. ci_disable_otg_interrupt(ci, OTGSC_BSVIE);
  1561. }
  1562. }
  1563. /**
  1564. * ci_hdrc_gadget_init - initialize device related bits
  1565. * ci: the controller
  1566. *
  1567. * This function initializes the gadget, if the device is "device capable".
  1568. */
  1569. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1570. {
  1571. struct ci_role_driver *rdrv;
  1572. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1573. return -ENXIO;
  1574. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1575. if (!rdrv)
  1576. return -ENOMEM;
  1577. rdrv->start = udc_id_switch_for_device;
  1578. rdrv->stop = udc_id_switch_for_host;
  1579. rdrv->irq = udc_irq;
  1580. rdrv->name = "gadget";
  1581. ci->roles[CI_ROLE_GADGET] = rdrv;
  1582. return udc_start(ci);
  1583. }