omap-usb.txt 3.4 KB

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  1. OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
  2. OMAP MUSB GLUE
  3. - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
  4. - ti,hwmods : must be "usb_otg_hs"
  5. - multipoint : Should be "1" indicating the musb controller supports
  6. multipoint. This is a MUSB configuration-specific setting.
  7. - num-eps : Specifies the number of endpoints. This is also a
  8. MUSB configuration-specific setting. Should be set to "16"
  9. - ram-bits : Specifies the ram address size. Should be set to "12"
  10. - interface-type : This is a board specific setting to describe the type of
  11. interface between the controller and the phy. It should be "0" or "1"
  12. specifying ULPI and UTMI respectively.
  13. - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
  14. represents PERIPHERAL.
  15. - power : Should be "50". This signifies the controller can supply up to
  16. 100mA when operating in host mode.
  17. - usb-phy : the phandle for the PHY device
  18. - phys : the phandle for the PHY device (used by generic PHY framework)
  19. - phy-names : the names of the PHY corresponding to the PHYs present in the
  20. *phy* phandle.
  21. Optional properties:
  22. - ctrl-module : phandle of the control module this glue uses to write to
  23. mailbox
  24. SOC specific device node entry
  25. usb_otg_hs: usb_otg_hs@4a0ab000 {
  26. compatible = "ti,omap4-musb";
  27. ti,hwmods = "usb_otg_hs";
  28. multipoint = <1>;
  29. num-eps = <16>;
  30. ram-bits = <12>;
  31. ctrl-module = <&omap_control_usb>;
  32. phys = <&usb2_phy>;
  33. phy-names = "usb2-phy";
  34. };
  35. Board specific device node entry
  36. &usb_otg_hs {
  37. interface-type = <1>;
  38. mode = <3>;
  39. power = <50>;
  40. };
  41. OMAP DWC3 GLUE
  42. - compatible : Should be "ti,dwc3"
  43. - ti,hwmods : Should be "usb_otg_ss"
  44. - reg : Address and length of the register set for the device.
  45. - interrupts : The irq number of this device that is used to interrupt the
  46. MPU
  47. - #address-cells, #size-cells : Must be present if the device has sub-nodes
  48. - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
  49. It should be set to "1" for HW mode and "2" for SW mode.
  50. - ranges: the child address space are mapped 1:1 onto the parent address space
  51. Optional Properties:
  52. - extcon : phandle for the extcon device omap dwc3 uses to detect
  53. connect/disconnect events.
  54. - vbus-supply : phandle to the regulator device tree node if needed.
  55. Sub-nodes:
  56. The dwc3 core should be added as subnode to omap dwc3 glue.
  57. - dwc3 :
  58. The binding details of dwc3 can be found in:
  59. Documentation/devicetree/bindings/usb/dwc3.txt
  60. omap_dwc3 {
  61. compatible = "ti,dwc3";
  62. ti,hwmods = "usb_otg_ss";
  63. reg = <0x4a020000 0x1ff>;
  64. interrupts = <0 93 4>;
  65. #address-cells = <1>;
  66. #size-cells = <1>;
  67. utmi-mode = <2>;
  68. ranges;
  69. };
  70. OMAP CONTROL USB
  71. Required properties:
  72. - compatible: Should be one of
  73. "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
  74. "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
  75. e.g. USB2_PHY on OMAP5.
  76. "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
  77. e.g. USB3 PHY and SATA PHY on OMAP5.
  78. "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on
  79. DRA7 platform.
  80. - reg : Address and length of the register set for the device. It contains
  81. the address of "otghs_control" for control-phy-otghs or "power" register
  82. for other types.
  83. - reg-names: should be "otghs_control" control-phy-otghs and "power" for
  84. other types.
  85. omap_control_usb: omap-control-usb@4a002300 {
  86. compatible = "ti,control-phy-otghs";
  87. reg = <0x4a00233c 0x4>;
  88. reg-names = "otghs_control";
  89. };