core.h 24 KB

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  1. /*
  2. * core.h -- Core Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_CORE_H_
  13. #define __LINUX_MFD_WM8350_CORE_H_
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/mfd/wm8350/audio.h>
  18. #include <linux/mfd/wm8350/gpio.h>
  19. #include <linux/mfd/wm8350/pmic.h>
  20. #include <linux/mfd/wm8350/rtc.h>
  21. #include <linux/mfd/wm8350/supply.h>
  22. #include <linux/mfd/wm8350/wdt.h>
  23. /*
  24. * Register values.
  25. */
  26. #define WM8350_RESET_ID 0x00
  27. #define WM8350_ID 0x01
  28. #define WM8350_SYSTEM_CONTROL_1 0x03
  29. #define WM8350_SYSTEM_CONTROL_2 0x04
  30. #define WM8350_SYSTEM_HIBERNATE 0x05
  31. #define WM8350_INTERFACE_CONTROL 0x06
  32. #define WM8350_POWER_MGMT_1 0x08
  33. #define WM8350_POWER_MGMT_2 0x09
  34. #define WM8350_POWER_MGMT_3 0x0A
  35. #define WM8350_POWER_MGMT_4 0x0B
  36. #define WM8350_POWER_MGMT_5 0x0C
  37. #define WM8350_POWER_MGMT_6 0x0D
  38. #define WM8350_POWER_MGMT_7 0x0E
  39. #define WM8350_SYSTEM_INTERRUPTS 0x18
  40. #define WM8350_INT_STATUS_1 0x19
  41. #define WM8350_INT_STATUS_2 0x1A
  42. #define WM8350_POWER_UP_INT_STATUS 0x1B
  43. #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
  44. #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
  45. #define WM8350_GPIO_INT_STATUS 0x1E
  46. #define WM8350_COMPARATOR_INT_STATUS 0x1F
  47. #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
  48. #define WM8350_INT_STATUS_1_MASK 0x21
  49. #define WM8350_INT_STATUS_2_MASK 0x22
  50. #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
  51. #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
  52. #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
  53. #define WM8350_GPIO_INT_STATUS_MASK 0x26
  54. #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
  55. #define WM8350_MAX_REGISTER 0xFF
  56. /*
  57. * Field Definitions.
  58. */
  59. /*
  60. * R0 (0x00) - Reset/ID
  61. */
  62. #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
  63. /*
  64. * R1 (0x01) - ID
  65. */
  66. #define WM8350_CHIP_REV_MASK 0x7000
  67. #define WM8350_CONF_STS_MASK 0x0C00
  68. #define WM8350_CUST_ID_MASK 0x00FF
  69. /*
  70. * R3 (0x03) - System Control 1
  71. */
  72. #define WM8350_CHIP_ON 0x8000
  73. #define WM8350_POWERCYCLE 0x2000
  74. #define WM8350_VCC_FAULT_OV 0x1000
  75. #define WM8350_REG_RSTB_TIME_MASK 0x0C00
  76. #define WM8350_BG_SLEEP 0x0200
  77. #define WM8350_MEM_VALID 0x0020
  78. #define WM8350_CHIP_SET_UP 0x0010
  79. #define WM8350_ON_DEB_T 0x0008
  80. #define WM8350_ON_POL 0x0002
  81. #define WM8350_IRQ_POL 0x0001
  82. /*
  83. * R4 (0x04) - System Control 2
  84. */
  85. #define WM8350_USB_SUSPEND_8MA 0x8000
  86. #define WM8350_USB_SUSPEND 0x4000
  87. #define WM8350_USB_MSTR 0x2000
  88. #define WM8350_USB_MSTR_SRC 0x1000
  89. #define WM8350_USB_500MA 0x0800
  90. #define WM8350_USB_NOLIM 0x0400
  91. /*
  92. * R5 (0x05) - System Hibernate
  93. */
  94. #define WM8350_HIBERNATE 0x8000
  95. #define WM8350_WDOG_HIB_MODE 0x0080
  96. #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
  97. #define WM8350_REG_RESET_HIB_MODE 0x0020
  98. #define WM8350_RST_HIB_MODE 0x0010
  99. #define WM8350_IRQ_HIB_MODE 0x0008
  100. #define WM8350_MEMRST_HIB_MODE 0x0004
  101. #define WM8350_PCCOMP_HIB_MODE 0x0002
  102. #define WM8350_TEMPMON_HIB_MODE 0x0001
  103. /*
  104. * R6 (0x06) - Interface Control
  105. */
  106. #define WM8350_USE_DEV_PINS 0x8000
  107. #define WM8350_USE_DEV_PINS_MASK 0x8000
  108. #define WM8350_USE_DEV_PINS_SHIFT 15
  109. #define WM8350_DEV_ADDR_MASK 0x6000
  110. #define WM8350_DEV_ADDR_SHIFT 13
  111. #define WM8350_CONFIG_DONE 0x1000
  112. #define WM8350_CONFIG_DONE_MASK 0x1000
  113. #define WM8350_CONFIG_DONE_SHIFT 12
  114. #define WM8350_RECONFIG_AT_ON 0x0800
  115. #define WM8350_RECONFIG_AT_ON_MASK 0x0800
  116. #define WM8350_RECONFIG_AT_ON_SHIFT 11
  117. #define WM8350_AUTOINC 0x0200
  118. #define WM8350_AUTOINC_MASK 0x0200
  119. #define WM8350_AUTOINC_SHIFT 9
  120. #define WM8350_ARA 0x0100
  121. #define WM8350_ARA_MASK 0x0100
  122. #define WM8350_ARA_SHIFT 8
  123. #define WM8350_SPI_CFG 0x0008
  124. #define WM8350_SPI_CFG_MASK 0x0008
  125. #define WM8350_SPI_CFG_SHIFT 3
  126. #define WM8350_SPI_4WIRE 0x0004
  127. #define WM8350_SPI_4WIRE_MASK 0x0004
  128. #define WM8350_SPI_4WIRE_SHIFT 2
  129. #define WM8350_SPI_3WIRE 0x0002
  130. #define WM8350_SPI_3WIRE_MASK 0x0002
  131. #define WM8350_SPI_3WIRE_SHIFT 1
  132. /* Bit values for R06 (0x06) */
  133. #define WM8350_USE_DEV_PINS_PRIMARY 0
  134. #define WM8350_USE_DEV_PINS_DEV 1
  135. #define WM8350_DEV_ADDR_34 0
  136. #define WM8350_DEV_ADDR_36 1
  137. #define WM8350_DEV_ADDR_3C 2
  138. #define WM8350_DEV_ADDR_3E 3
  139. #define WM8350_CONFIG_DONE_OFF 0
  140. #define WM8350_CONFIG_DONE_DONE 1
  141. #define WM8350_RECONFIG_AT_ON_OFF 0
  142. #define WM8350_RECONFIG_AT_ON_ON 1
  143. #define WM8350_AUTOINC_OFF 0
  144. #define WM8350_AUTOINC_ON 1
  145. #define WM8350_ARA_OFF 0
  146. #define WM8350_ARA_ON 1
  147. #define WM8350_SPI_CFG_CMOS 0
  148. #define WM8350_SPI_CFG_OD 1
  149. #define WM8350_SPI_4WIRE_3WIRE 0
  150. #define WM8350_SPI_4WIRE_4WIRE 1
  151. #define WM8350_SPI_3WIRE_I2C 0
  152. #define WM8350_SPI_3WIRE_SPI 1
  153. /*
  154. * R8 (0x08) - Power mgmt (1)
  155. */
  156. #define WM8350_CODEC_ISEL_MASK 0xC000
  157. #define WM8350_VBUFEN 0x2000
  158. #define WM8350_OUTPUT_DRAIN_EN 0x0400
  159. #define WM8350_MIC_DET_ENA 0x0100
  160. #define WM8350_BIASEN 0x0020
  161. #define WM8350_MICBEN 0x0010
  162. #define WM8350_VMIDEN 0x0004
  163. #define WM8350_VMID_MASK 0x0003
  164. #define WM8350_VMID_SHIFT 0
  165. /*
  166. * R9 (0x09) - Power mgmt (2)
  167. */
  168. #define WM8350_IN3R_ENA 0x0800
  169. #define WM8350_IN3L_ENA 0x0400
  170. #define WM8350_INR_ENA 0x0200
  171. #define WM8350_INL_ENA 0x0100
  172. #define WM8350_MIXINR_ENA 0x0080
  173. #define WM8350_MIXINL_ENA 0x0040
  174. #define WM8350_OUT4_ENA 0x0020
  175. #define WM8350_OUT3_ENA 0x0010
  176. #define WM8350_MIXOUTR_ENA 0x0002
  177. #define WM8350_MIXOUTL_ENA 0x0001
  178. /*
  179. * R10 (0x0A) - Power mgmt (3)
  180. */
  181. #define WM8350_IN3R_TO_OUT2R 0x0080
  182. #define WM8350_OUT2R_ENA 0x0008
  183. #define WM8350_OUT2L_ENA 0x0004
  184. #define WM8350_OUT1R_ENA 0x0002
  185. #define WM8350_OUT1L_ENA 0x0001
  186. /*
  187. * R11 (0x0B) - Power mgmt (4)
  188. */
  189. #define WM8350_SYSCLK_ENA 0x4000
  190. #define WM8350_ADC_HPF_ENA 0x2000
  191. #define WM8350_FLL_ENA 0x0800
  192. #define WM8350_FLL_OSC_ENA 0x0400
  193. #define WM8350_TOCLK_ENA 0x0100
  194. #define WM8350_DACR_ENA 0x0020
  195. #define WM8350_DACL_ENA 0x0010
  196. #define WM8350_ADCR_ENA 0x0008
  197. #define WM8350_ADCL_ENA 0x0004
  198. /*
  199. * R12 (0x0C) - Power mgmt (5)
  200. */
  201. #define WM8350_CODEC_ENA 0x1000
  202. #define WM8350_RTC_TICK_ENA 0x0800
  203. #define WM8350_OSC32K_ENA 0x0400
  204. #define WM8350_CHG_ENA 0x0200
  205. #define WM8350_ACC_DET_ENA 0x0100
  206. #define WM8350_AUXADC_ENA 0x0080
  207. #define WM8350_DCMP4_ENA 0x0008
  208. #define WM8350_DCMP3_ENA 0x0004
  209. #define WM8350_DCMP2_ENA 0x0002
  210. #define WM8350_DCMP1_ENA 0x0001
  211. /*
  212. * R13 (0x0D) - Power mgmt (6)
  213. */
  214. #define WM8350_LS_ENA 0x8000
  215. #define WM8350_LDO4_ENA 0x0800
  216. #define WM8350_LDO3_ENA 0x0400
  217. #define WM8350_LDO2_ENA 0x0200
  218. #define WM8350_LDO1_ENA 0x0100
  219. #define WM8350_DC6_ENA 0x0020
  220. #define WM8350_DC5_ENA 0x0010
  221. #define WM8350_DC4_ENA 0x0008
  222. #define WM8350_DC3_ENA 0x0004
  223. #define WM8350_DC2_ENA 0x0002
  224. #define WM8350_DC1_ENA 0x0001
  225. /*
  226. * R14 (0x0E) - Power mgmt (7)
  227. */
  228. #define WM8350_CS2_ENA 0x0002
  229. #define WM8350_CS1_ENA 0x0001
  230. /*
  231. * R24 (0x18) - System Interrupts
  232. */
  233. #define WM8350_OC_INT 0x2000
  234. #define WM8350_UV_INT 0x1000
  235. #define WM8350_PUTO_INT 0x0800
  236. #define WM8350_CS_INT 0x0200
  237. #define WM8350_EXT_INT 0x0100
  238. #define WM8350_CODEC_INT 0x0080
  239. #define WM8350_GP_INT 0x0040
  240. #define WM8350_AUXADC_INT 0x0020
  241. #define WM8350_RTC_INT 0x0010
  242. #define WM8350_SYS_INT 0x0008
  243. #define WM8350_CHG_INT 0x0004
  244. #define WM8350_USB_INT 0x0002
  245. #define WM8350_WKUP_INT 0x0001
  246. /*
  247. * R25 (0x19) - Interrupt Status 1
  248. */
  249. #define WM8350_CHG_BAT_HOT_EINT 0x8000
  250. #define WM8350_CHG_BAT_COLD_EINT 0x4000
  251. #define WM8350_CHG_BAT_FAIL_EINT 0x2000
  252. #define WM8350_CHG_TO_EINT 0x1000
  253. #define WM8350_CHG_END_EINT 0x0800
  254. #define WM8350_CHG_START_EINT 0x0400
  255. #define WM8350_CHG_FAST_RDY_EINT 0x0200
  256. #define WM8350_RTC_PER_EINT 0x0080
  257. #define WM8350_RTC_SEC_EINT 0x0040
  258. #define WM8350_RTC_ALM_EINT 0x0020
  259. #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
  260. #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
  261. #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
  262. /*
  263. * R26 (0x1A) - Interrupt Status 2
  264. */
  265. #define WM8350_CS1_EINT 0x2000
  266. #define WM8350_CS2_EINT 0x1000
  267. #define WM8350_USB_LIMIT_EINT 0x0400
  268. #define WM8350_AUXADC_DATARDY_EINT 0x0100
  269. #define WM8350_AUXADC_DCOMP4_EINT 0x0080
  270. #define WM8350_AUXADC_DCOMP3_EINT 0x0040
  271. #define WM8350_AUXADC_DCOMP2_EINT 0x0020
  272. #define WM8350_AUXADC_DCOMP1_EINT 0x0010
  273. #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
  274. #define WM8350_SYS_CHIP_GT115_EINT 0x0004
  275. #define WM8350_SYS_CHIP_GT140_EINT 0x0002
  276. #define WM8350_SYS_WDOG_TO_EINT 0x0001
  277. /*
  278. * R27 (0x1B) - Power Up Interrupt Status
  279. */
  280. #define WM8350_PUTO_LDO4_EINT 0x0800
  281. #define WM8350_PUTO_LDO3_EINT 0x0400
  282. #define WM8350_PUTO_LDO2_EINT 0x0200
  283. #define WM8350_PUTO_LDO1_EINT 0x0100
  284. #define WM8350_PUTO_DC6_EINT 0x0020
  285. #define WM8350_PUTO_DC5_EINT 0x0010
  286. #define WM8350_PUTO_DC4_EINT 0x0008
  287. #define WM8350_PUTO_DC3_EINT 0x0004
  288. #define WM8350_PUTO_DC2_EINT 0x0002
  289. #define WM8350_PUTO_DC1_EINT 0x0001
  290. /*
  291. * R28 (0x1C) - Under Voltage Interrupt status
  292. */
  293. #define WM8350_UV_LDO4_EINT 0x0800
  294. #define WM8350_UV_LDO3_EINT 0x0400
  295. #define WM8350_UV_LDO2_EINT 0x0200
  296. #define WM8350_UV_LDO1_EINT 0x0100
  297. #define WM8350_UV_DC6_EINT 0x0020
  298. #define WM8350_UV_DC5_EINT 0x0010
  299. #define WM8350_UV_DC4_EINT 0x0008
  300. #define WM8350_UV_DC3_EINT 0x0004
  301. #define WM8350_UV_DC2_EINT 0x0002
  302. #define WM8350_UV_DC1_EINT 0x0001
  303. /*
  304. * R29 (0x1D) - Over Current Interrupt status
  305. */
  306. #define WM8350_OC_LS_EINT 0x8000
  307. /*
  308. * R30 (0x1E) - GPIO Interrupt Status
  309. */
  310. #define WM8350_GP12_EINT 0x1000
  311. #define WM8350_GP11_EINT 0x0800
  312. #define WM8350_GP10_EINT 0x0400
  313. #define WM8350_GP9_EINT 0x0200
  314. #define WM8350_GP8_EINT 0x0100
  315. #define WM8350_GP7_EINT 0x0080
  316. #define WM8350_GP6_EINT 0x0040
  317. #define WM8350_GP5_EINT 0x0020
  318. #define WM8350_GP4_EINT 0x0010
  319. #define WM8350_GP3_EINT 0x0008
  320. #define WM8350_GP2_EINT 0x0004
  321. #define WM8350_GP1_EINT 0x0002
  322. #define WM8350_GP0_EINT 0x0001
  323. /*
  324. * R31 (0x1F) - Comparator Interrupt Status
  325. */
  326. #define WM8350_EXT_USB_FB_EINT 0x8000
  327. #define WM8350_EXT_WALL_FB_EINT 0x4000
  328. #define WM8350_EXT_BAT_FB_EINT 0x2000
  329. #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
  330. #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
  331. #define WM8350_CODEC_MICSCD_EINT 0x0200
  332. #define WM8350_CODEC_MICD_EINT 0x0100
  333. #define WM8350_WKUP_OFF_STATE_EINT 0x0040
  334. #define WM8350_WKUP_HIB_STATE_EINT 0x0020
  335. #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
  336. #define WM8350_WKUP_WDOG_RST_EINT 0x0008
  337. #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
  338. #define WM8350_WKUP_ONKEY_EINT 0x0002
  339. #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
  340. /*
  341. * R32 (0x20) - System Interrupts Mask
  342. */
  343. #define WM8350_IM_OC_INT 0x2000
  344. #define WM8350_IM_UV_INT 0x1000
  345. #define WM8350_IM_PUTO_INT 0x0800
  346. #define WM8350_IM_SPARE_INT 0x0400
  347. #define WM8350_IM_CS_INT 0x0200
  348. #define WM8350_IM_EXT_INT 0x0100
  349. #define WM8350_IM_CODEC_INT 0x0080
  350. #define WM8350_IM_GP_INT 0x0040
  351. #define WM8350_IM_AUXADC_INT 0x0020
  352. #define WM8350_IM_RTC_INT 0x0010
  353. #define WM8350_IM_SYS_INT 0x0008
  354. #define WM8350_IM_CHG_INT 0x0004
  355. #define WM8350_IM_USB_INT 0x0002
  356. #define WM8350_IM_WKUP_INT 0x0001
  357. /*
  358. * R33 (0x21) - Interrupt Status 1 Mask
  359. */
  360. #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
  361. #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
  362. #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
  363. #define WM8350_IM_CHG_TO_EINT 0x1000
  364. #define WM8350_IM_CHG_END_EINT 0x0800
  365. #define WM8350_IM_CHG_START_EINT 0x0400
  366. #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
  367. #define WM8350_IM_RTC_PER_EINT 0x0080
  368. #define WM8350_IM_RTC_SEC_EINT 0x0040
  369. #define WM8350_IM_RTC_ALM_EINT 0x0020
  370. #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
  371. #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
  372. #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
  373. /*
  374. * R34 (0x22) - Interrupt Status 2 Mask
  375. */
  376. #define WM8350_IM_SPARE2_EINT 0x8000
  377. #define WM8350_IM_SPARE1_EINT 0x4000
  378. #define WM8350_IM_CS1_EINT 0x2000
  379. #define WM8350_IM_CS2_EINT 0x1000
  380. #define WM8350_IM_USB_LIMIT_EINT 0x0400
  381. #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
  382. #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
  383. #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
  384. #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
  385. #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
  386. #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
  387. #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
  388. #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
  389. #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
  390. /*
  391. * R35 (0x23) - Power Up Interrupt Status Mask
  392. */
  393. #define WM8350_IM_PUTO_LDO4_EINT 0x0800
  394. #define WM8350_IM_PUTO_LDO3_EINT 0x0400
  395. #define WM8350_IM_PUTO_LDO2_EINT 0x0200
  396. #define WM8350_IM_PUTO_LDO1_EINT 0x0100
  397. #define WM8350_IM_PUTO_DC6_EINT 0x0020
  398. #define WM8350_IM_PUTO_DC5_EINT 0x0010
  399. #define WM8350_IM_PUTO_DC4_EINT 0x0008
  400. #define WM8350_IM_PUTO_DC3_EINT 0x0004
  401. #define WM8350_IM_PUTO_DC2_EINT 0x0002
  402. #define WM8350_IM_PUTO_DC1_EINT 0x0001
  403. /*
  404. * R36 (0x24) - Under Voltage Interrupt status Mask
  405. */
  406. #define WM8350_IM_UV_LDO4_EINT 0x0800
  407. #define WM8350_IM_UV_LDO3_EINT 0x0400
  408. #define WM8350_IM_UV_LDO2_EINT 0x0200
  409. #define WM8350_IM_UV_LDO1_EINT 0x0100
  410. #define WM8350_IM_UV_DC6_EINT 0x0020
  411. #define WM8350_IM_UV_DC5_EINT 0x0010
  412. #define WM8350_IM_UV_DC4_EINT 0x0008
  413. #define WM8350_IM_UV_DC3_EINT 0x0004
  414. #define WM8350_IM_UV_DC2_EINT 0x0002
  415. #define WM8350_IM_UV_DC1_EINT 0x0001
  416. /*
  417. * R37 (0x25) - Over Current Interrupt status Mask
  418. */
  419. #define WM8350_IM_OC_LS_EINT 0x8000
  420. /*
  421. * R38 (0x26) - GPIO Interrupt Status Mask
  422. */
  423. #define WM8350_IM_GP12_EINT 0x1000
  424. #define WM8350_IM_GP11_EINT 0x0800
  425. #define WM8350_IM_GP10_EINT 0x0400
  426. #define WM8350_IM_GP9_EINT 0x0200
  427. #define WM8350_IM_GP8_EINT 0x0100
  428. #define WM8350_IM_GP7_EINT 0x0080
  429. #define WM8350_IM_GP6_EINT 0x0040
  430. #define WM8350_IM_GP5_EINT 0x0020
  431. #define WM8350_IM_GP4_EINT 0x0010
  432. #define WM8350_IM_GP3_EINT 0x0008
  433. #define WM8350_IM_GP2_EINT 0x0004
  434. #define WM8350_IM_GP1_EINT 0x0002
  435. #define WM8350_IM_GP0_EINT 0x0001
  436. /*
  437. * R39 (0x27) - Comparator Interrupt Status Mask
  438. */
  439. #define WM8350_IM_EXT_USB_FB_EINT 0x8000
  440. #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
  441. #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
  442. #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
  443. #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
  444. #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
  445. #define WM8350_IM_CODEC_MICD_EINT 0x0100
  446. #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
  447. #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
  448. #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
  449. #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
  450. #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
  451. #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
  452. #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
  453. /*
  454. * R220 (0xDC) - RAM BIST 1
  455. */
  456. #define WM8350_READ_STATUS 0x0800
  457. #define WM8350_TSTRAM_CLK 0x0100
  458. #define WM8350_TSTRAM_CLK_ENA 0x0080
  459. #define WM8350_STARTSEQ 0x0040
  460. #define WM8350_READ_SRC 0x0020
  461. #define WM8350_COUNT_DIR 0x0010
  462. #define WM8350_TSTRAM_MODE_MASK 0x000E
  463. #define WM8350_TSTRAM_ENA 0x0001
  464. /*
  465. * R225 (0xE1) - DCDC/LDO status
  466. */
  467. #define WM8350_LS_STS 0x8000
  468. #define WM8350_LDO4_STS 0x0800
  469. #define WM8350_LDO3_STS 0x0400
  470. #define WM8350_LDO2_STS 0x0200
  471. #define WM8350_LDO1_STS 0x0100
  472. #define WM8350_DC6_STS 0x0020
  473. #define WM8350_DC5_STS 0x0010
  474. #define WM8350_DC4_STS 0x0008
  475. #define WM8350_DC3_STS 0x0004
  476. #define WM8350_DC2_STS 0x0002
  477. #define WM8350_DC1_STS 0x0001
  478. /* WM8350 wake up conditions */
  479. #define WM8350_IRQ_WKUP_OFF_STATE 43
  480. #define WM8350_IRQ_WKUP_HIB_STATE 44
  481. #define WM8350_IRQ_WKUP_CONV_FAULT 45
  482. #define WM8350_IRQ_WKUP_WDOG_RST 46
  483. #define WM8350_IRQ_WKUP_GP_PWR_ON 47
  484. #define WM8350_IRQ_WKUP_ONKEY 48
  485. #define WM8350_IRQ_WKUP_GP_WAKEUP 49
  486. /* wm8350 chip revisions */
  487. #define WM8350_REV_E 0x4
  488. #define WM8350_REV_F 0x5
  489. #define WM8350_REV_G 0x6
  490. #define WM8350_NUM_IRQ 63
  491. struct wm8350_reg_access {
  492. u16 readable; /* Mask of readable bits */
  493. u16 writable; /* Mask of writable bits */
  494. u16 vol; /* Mask of volatile bits */
  495. };
  496. extern const struct wm8350_reg_access wm8350_reg_io_map[];
  497. extern const u16 wm8350_mode0_defaults[];
  498. extern const u16 wm8350_mode1_defaults[];
  499. extern const u16 wm8350_mode2_defaults[];
  500. extern const u16 wm8350_mode3_defaults[];
  501. struct wm8350;
  502. struct wm8350_irq {
  503. void (*handler) (struct wm8350 *, int, void *);
  504. void *data;
  505. };
  506. struct wm8350 {
  507. int rev; /* chip revision */
  508. struct device *dev;
  509. /* device IO */
  510. union {
  511. struct i2c_client *i2c_client;
  512. struct spi_device *spi_device;
  513. };
  514. int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
  515. int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
  516. void *src);
  517. u16 *reg_cache;
  518. /* Interrupt handling */
  519. struct work_struct irq_work;
  520. struct mutex irq_mutex; /* IRQ table mutex */
  521. struct wm8350_irq irq[WM8350_NUM_IRQ];
  522. int chip_irq;
  523. /* Client devices */
  524. struct wm8350_codec codec;
  525. struct wm8350_gpio gpio;
  526. struct wm8350_pmic pmic;
  527. struct wm8350_power power;
  528. struct wm8350_rtc rtc;
  529. struct wm8350_wdt wdt;
  530. };
  531. /**
  532. * Data to be supplied by the platform to initialise the WM8350.
  533. *
  534. * @init: Function called during driver initialisation. Should be
  535. * used by the platform to configure GPIO functions and similar.
  536. */
  537. struct wm8350_platform_data {
  538. int (*init)(struct wm8350 *wm8350);
  539. };
  540. /*
  541. * WM8350 device initialisation and exit.
  542. */
  543. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  544. struct wm8350_platform_data *pdata);
  545. void wm8350_device_exit(struct wm8350 *wm8350);
  546. /*
  547. * WM8350 device IO
  548. */
  549. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  550. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  551. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
  552. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
  553. int wm8350_reg_lock(struct wm8350 *wm8350);
  554. int wm8350_reg_unlock(struct wm8350 *wm8350);
  555. int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
  556. int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
  557. /*
  558. * WM8350 internal interrupts
  559. */
  560. int wm8350_register_irq(struct wm8350 *wm8350, int irq,
  561. void (*handler) (struct wm8350 *, int, void *),
  562. void *data);
  563. int wm8350_free_irq(struct wm8350 *wm8350, int irq);
  564. int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
  565. int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
  566. #endif