rt2x00queue.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193
  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the
  16. Free Software Foundation, Inc.,
  17. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. /*
  20. Module: rt2x00lib
  21. Abstract: rt2x00 queue specific routines.
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/dma-mapping.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00lib.h"
  29. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
  30. {
  31. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  32. struct sk_buff *skb;
  33. struct skb_frame_desc *skbdesc;
  34. unsigned int frame_size;
  35. unsigned int head_size = 0;
  36. unsigned int tail_size = 0;
  37. /*
  38. * The frame size includes descriptor size, because the
  39. * hardware directly receive the frame into the skbuffer.
  40. */
  41. frame_size = entry->queue->data_size + entry->queue->desc_size;
  42. /*
  43. * The payload should be aligned to a 4-byte boundary,
  44. * this means we need at least 3 bytes for moving the frame
  45. * into the correct offset.
  46. */
  47. head_size = 4;
  48. /*
  49. * For IV/EIV/ICV assembly we must make sure there is
  50. * at least 8 bytes bytes available in headroom for IV/EIV
  51. * and 8 bytes for ICV data as tailroon.
  52. */
  53. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  54. head_size += 8;
  55. tail_size += 8;
  56. }
  57. /*
  58. * Allocate skbuffer.
  59. */
  60. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  61. if (!skb)
  62. return NULL;
  63. /*
  64. * Make sure we not have a frame with the requested bytes
  65. * available in the head and tail.
  66. */
  67. skb_reserve(skb, head_size);
  68. skb_put(skb, frame_size);
  69. /*
  70. * Populate skbdesc.
  71. */
  72. skbdesc = get_skb_frame_desc(skb);
  73. memset(skbdesc, 0, sizeof(*skbdesc));
  74. skbdesc->entry = entry;
  75. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  76. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  77. skb->data,
  78. skb->len,
  79. DMA_FROM_DEVICE);
  80. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  81. }
  82. return skb;
  83. }
  84. void rt2x00queue_map_txskb(struct queue_entry *entry)
  85. {
  86. struct device *dev = entry->queue->rt2x00dev->dev;
  87. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  88. skbdesc->skb_dma =
  89. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  90. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  91. }
  92. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  93. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  94. {
  95. struct device *dev = entry->queue->rt2x00dev->dev;
  96. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  97. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  98. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  99. DMA_FROM_DEVICE);
  100. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  101. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  102. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  103. DMA_TO_DEVICE);
  104. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  108. void rt2x00queue_free_skb(struct queue_entry *entry)
  109. {
  110. if (!entry->skb)
  111. return;
  112. rt2x00queue_unmap_skb(entry);
  113. dev_kfree_skb_any(entry->skb);
  114. entry->skb = NULL;
  115. }
  116. void rt2x00queue_align_frame(struct sk_buff *skb)
  117. {
  118. unsigned int frame_length = skb->len;
  119. unsigned int align = ALIGN_SIZE(skb, 0);
  120. if (!align)
  121. return;
  122. skb_push(skb, align);
  123. memmove(skb->data, skb->data + align, frame_length);
  124. skb_trim(skb, frame_length);
  125. }
  126. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  127. {
  128. unsigned int frame_length = skb->len;
  129. unsigned int align = ALIGN_SIZE(skb, header_length);
  130. if (!align)
  131. return;
  132. skb_push(skb, align);
  133. memmove(skb->data, skb->data + align, frame_length);
  134. skb_trim(skb, frame_length);
  135. }
  136. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  137. {
  138. unsigned int payload_length = skb->len - header_length;
  139. unsigned int header_align = ALIGN_SIZE(skb, 0);
  140. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  141. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  142. /*
  143. * Adjust the header alignment if the payload needs to be moved more
  144. * than the header.
  145. */
  146. if (payload_align > header_align)
  147. header_align += 4;
  148. /* There is nothing to do if no alignment is needed */
  149. if (!header_align)
  150. return;
  151. /* Reserve the amount of space needed in front of the frame */
  152. skb_push(skb, header_align);
  153. /*
  154. * Move the header.
  155. */
  156. memmove(skb->data, skb->data + header_align, header_length);
  157. /* Move the payload, if present and if required */
  158. if (payload_length && payload_align)
  159. memmove(skb->data + header_length + l2pad,
  160. skb->data + header_length + l2pad + payload_align,
  161. payload_length);
  162. /* Trim the skb to the correct size */
  163. skb_trim(skb, header_length + l2pad + payload_length);
  164. }
  165. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  166. {
  167. /*
  168. * L2 padding is only present if the skb contains more than just the
  169. * IEEE 802.11 header.
  170. */
  171. unsigned int l2pad = (skb->len > header_length) ?
  172. L2PAD_SIZE(header_length) : 0;
  173. if (!l2pad)
  174. return;
  175. memmove(skb->data + l2pad, skb->data, header_length);
  176. skb_pull(skb, l2pad);
  177. }
  178. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  179. struct txentry_desc *txdesc)
  180. {
  181. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  182. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  183. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  184. unsigned long irqflags;
  185. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  186. return;
  187. /*
  188. * Hardware should insert sequence counter.
  189. * FIXME: We insert a software sequence counter first for
  190. * hardware that doesn't support hardware sequence counting.
  191. *
  192. * This is wrong because beacons are not getting sequence
  193. * numbers assigned properly.
  194. *
  195. * A secondary problem exists for drivers that cannot toggle
  196. * sequence counting per-frame, since those will override the
  197. * sequence counter given by mac80211.
  198. */
  199. spin_lock_irqsave(&intf->seqlock, irqflags);
  200. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  201. intf->seqno += 0x10;
  202. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  203. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  204. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  205. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  206. }
  207. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  208. struct txentry_desc *txdesc,
  209. const struct rt2x00_rate *hwrate)
  210. {
  211. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  212. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  213. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  214. unsigned int data_length;
  215. unsigned int duration;
  216. unsigned int residual;
  217. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  218. data_length = entry->skb->len + 4;
  219. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  220. /*
  221. * PLCP setup
  222. * Length calculation depends on OFDM/CCK rate.
  223. */
  224. txdesc->signal = hwrate->plcp;
  225. txdesc->service = 0x04;
  226. if (hwrate->flags & DEV_RATE_OFDM) {
  227. txdesc->length_high = (data_length >> 6) & 0x3f;
  228. txdesc->length_low = data_length & 0x3f;
  229. } else {
  230. /*
  231. * Convert length to microseconds.
  232. */
  233. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  234. duration = GET_DURATION(data_length, hwrate->bitrate);
  235. if (residual != 0) {
  236. duration++;
  237. /*
  238. * Check if we need to set the Length Extension
  239. */
  240. if (hwrate->bitrate == 110 && residual <= 30)
  241. txdesc->service |= 0x80;
  242. }
  243. txdesc->length_high = (duration >> 8) & 0xff;
  244. txdesc->length_low = duration & 0xff;
  245. /*
  246. * When preamble is enabled we should set the
  247. * preamble bit for the signal.
  248. */
  249. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  250. txdesc->signal |= 0x08;
  251. }
  252. }
  253. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  254. struct txentry_desc *txdesc)
  255. {
  256. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  257. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  258. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  259. struct ieee80211_rate *rate =
  260. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  261. const struct rt2x00_rate *hwrate;
  262. memset(txdesc, 0, sizeof(*txdesc));
  263. /*
  264. * Header and frame information.
  265. */
  266. txdesc->length = entry->skb->len;
  267. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  268. /*
  269. * Check whether this frame is to be acked.
  270. */
  271. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  272. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  273. /*
  274. * Check if this is a RTS/CTS frame
  275. */
  276. if (ieee80211_is_rts(hdr->frame_control) ||
  277. ieee80211_is_cts(hdr->frame_control)) {
  278. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  279. if (ieee80211_is_rts(hdr->frame_control))
  280. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  281. else
  282. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  283. if (tx_info->control.rts_cts_rate_idx >= 0)
  284. rate =
  285. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  286. }
  287. /*
  288. * Determine retry information.
  289. */
  290. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  291. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  292. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  293. /*
  294. * Check if more fragments are pending
  295. */
  296. if (ieee80211_has_morefrags(hdr->frame_control)) {
  297. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  298. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  299. }
  300. /*
  301. * Check if more frames (!= fragments) are pending
  302. */
  303. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  304. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  305. /*
  306. * Beacons and probe responses require the tsf timestamp
  307. * to be inserted into the frame.
  308. */
  309. if (ieee80211_is_beacon(hdr->frame_control) ||
  310. ieee80211_is_probe_resp(hdr->frame_control))
  311. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  312. /*
  313. * Determine with what IFS priority this frame should be send.
  314. * Set ifs to IFS_SIFS when the this is not the first fragment,
  315. * or this fragment came after RTS/CTS.
  316. */
  317. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  318. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  319. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  320. txdesc->ifs = IFS_BACKOFF;
  321. } else
  322. txdesc->ifs = IFS_SIFS;
  323. /*
  324. * Determine rate modulation.
  325. */
  326. hwrate = rt2x00_get_rate(rate->hw_value);
  327. txdesc->rate_mode = RATE_MODE_CCK;
  328. if (hwrate->flags & DEV_RATE_OFDM)
  329. txdesc->rate_mode = RATE_MODE_OFDM;
  330. /*
  331. * Apply TX descriptor handling by components
  332. */
  333. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  334. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  335. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  336. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  337. }
  338. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  339. struct txentry_desc *txdesc)
  340. {
  341. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  342. /*
  343. * This should not happen, we already checked the entry
  344. * was ours. When the hardware disagrees there has been
  345. * a queue corruption!
  346. */
  347. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  348. rt2x00dev->ops->lib->get_entry_state(entry))) {
  349. ERROR(rt2x00dev,
  350. "Corrupt queue %d, accessing entry which is not ours.\n"
  351. "Please file bug report to %s.\n",
  352. entry->queue->qid, DRV_PROJECT);
  353. return -EINVAL;
  354. }
  355. /*
  356. * Add the requested extra tx headroom in front of the skb.
  357. */
  358. skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
  359. memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
  360. /*
  361. * Call the driver's write_tx_data function, if it exists.
  362. */
  363. if (rt2x00dev->ops->lib->write_tx_data)
  364. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  365. /*
  366. * Map the skb to DMA.
  367. */
  368. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
  369. rt2x00queue_map_txskb(entry);
  370. return 0;
  371. }
  372. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  373. struct txentry_desc *txdesc)
  374. {
  375. struct data_queue *queue = entry->queue;
  376. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  377. /*
  378. * All processing on the frame has been completed, this means
  379. * it is now ready to be dumped to userspace through debugfs.
  380. */
  381. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  382. }
  383. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  384. struct txentry_desc *txdesc)
  385. {
  386. /*
  387. * Check if we need to kick the queue, there are however a few rules
  388. * 1) Don't kick unless this is the last in frame in a burst.
  389. * When the burst flag is set, this frame is always followed
  390. * by another frame which in some way are related to eachother.
  391. * This is true for fragments, RTS or CTS-to-self frames.
  392. * 2) Rule 1 can be broken when the available entries
  393. * in the queue are less then a certain threshold.
  394. */
  395. if (rt2x00queue_threshold(queue) ||
  396. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  397. queue->rt2x00dev->ops->lib->kick_queue(queue);
  398. }
  399. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  400. bool local)
  401. {
  402. struct ieee80211_tx_info *tx_info;
  403. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  404. struct txentry_desc txdesc;
  405. struct skb_frame_desc *skbdesc;
  406. u8 rate_idx, rate_flags;
  407. if (unlikely(rt2x00queue_full(queue)))
  408. return -ENOBUFS;
  409. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  410. &entry->flags))) {
  411. ERROR(queue->rt2x00dev,
  412. "Arrived at non-free entry in the non-full queue %d.\n"
  413. "Please file bug report to %s.\n",
  414. queue->qid, DRV_PROJECT);
  415. return -EINVAL;
  416. }
  417. /*
  418. * Copy all TX descriptor information into txdesc,
  419. * after that we are free to use the skb->cb array
  420. * for our information.
  421. */
  422. entry->skb = skb;
  423. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  424. /*
  425. * All information is retrieved from the skb->cb array,
  426. * now we should claim ownership of the driver part of that
  427. * array, preserving the bitrate index and flags.
  428. */
  429. tx_info = IEEE80211_SKB_CB(skb);
  430. rate_idx = tx_info->control.rates[0].idx;
  431. rate_flags = tx_info->control.rates[0].flags;
  432. skbdesc = get_skb_frame_desc(skb);
  433. memset(skbdesc, 0, sizeof(*skbdesc));
  434. skbdesc->entry = entry;
  435. skbdesc->tx_rate_idx = rate_idx;
  436. skbdesc->tx_rate_flags = rate_flags;
  437. if (local)
  438. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  439. /*
  440. * When hardware encryption is supported, and this frame
  441. * is to be encrypted, we should strip the IV/EIV data from
  442. * the frame so we can provide it to the driver separately.
  443. */
  444. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  445. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  446. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  447. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  448. else
  449. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  450. }
  451. /*
  452. * When DMA allocation is required we should guarentee to the
  453. * driver that the DMA is aligned to a 4-byte boundary.
  454. * However some drivers require L2 padding to pad the payload
  455. * rather then the header. This could be a requirement for
  456. * PCI and USB devices, while header alignment only is valid
  457. * for PCI devices.
  458. */
  459. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  460. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  461. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  462. rt2x00queue_align_frame(entry->skb);
  463. /*
  464. * It could be possible that the queue was corrupted and this
  465. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  466. * this frame will simply be dropped.
  467. */
  468. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  469. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  470. entry->skb = NULL;
  471. return -EIO;
  472. }
  473. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  474. rt2x00queue_index_inc(queue, Q_INDEX);
  475. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  476. rt2x00queue_kick_tx_queue(queue, &txdesc);
  477. return 0;
  478. }
  479. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  480. struct ieee80211_vif *vif)
  481. {
  482. struct rt2x00_intf *intf = vif_to_intf(vif);
  483. if (unlikely(!intf->beacon))
  484. return -ENOBUFS;
  485. mutex_lock(&intf->beacon_skb_mutex);
  486. /*
  487. * Clean up the beacon skb.
  488. */
  489. rt2x00queue_free_skb(intf->beacon);
  490. /*
  491. * Clear beacon (single bssid devices don't need to clear the beacon
  492. * since the beacon queue will get stopped anyway).
  493. */
  494. if (rt2x00dev->ops->lib->clear_beacon)
  495. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  496. mutex_unlock(&intf->beacon_skb_mutex);
  497. return 0;
  498. }
  499. int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
  500. struct ieee80211_vif *vif)
  501. {
  502. struct rt2x00_intf *intf = vif_to_intf(vif);
  503. struct skb_frame_desc *skbdesc;
  504. struct txentry_desc txdesc;
  505. if (unlikely(!intf->beacon))
  506. return -ENOBUFS;
  507. /*
  508. * Clean up the beacon skb.
  509. */
  510. rt2x00queue_free_skb(intf->beacon);
  511. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  512. if (!intf->beacon->skb)
  513. return -ENOMEM;
  514. /*
  515. * Copy all TX descriptor information into txdesc,
  516. * after that we are free to use the skb->cb array
  517. * for our information.
  518. */
  519. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  520. /*
  521. * Fill in skb descriptor
  522. */
  523. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  524. memset(skbdesc, 0, sizeof(*skbdesc));
  525. skbdesc->entry = intf->beacon;
  526. /*
  527. * Send beacon to hardware.
  528. */
  529. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  530. return 0;
  531. }
  532. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  533. struct ieee80211_vif *vif)
  534. {
  535. struct rt2x00_intf *intf = vif_to_intf(vif);
  536. int ret;
  537. mutex_lock(&intf->beacon_skb_mutex);
  538. ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
  539. mutex_unlock(&intf->beacon_skb_mutex);
  540. return ret;
  541. }
  542. void rt2x00queue_for_each_entry(struct data_queue *queue,
  543. enum queue_index start,
  544. enum queue_index end,
  545. void (*fn)(struct queue_entry *entry))
  546. {
  547. unsigned long irqflags;
  548. unsigned int index_start;
  549. unsigned int index_end;
  550. unsigned int i;
  551. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  552. ERROR(queue->rt2x00dev,
  553. "Entry requested from invalid index range (%d - %d)\n",
  554. start, end);
  555. return;
  556. }
  557. /*
  558. * Only protect the range we are going to loop over,
  559. * if during our loop a extra entry is set to pending
  560. * it should not be kicked during this run, since it
  561. * is part of another TX operation.
  562. */
  563. spin_lock_irqsave(&queue->index_lock, irqflags);
  564. index_start = queue->index[start];
  565. index_end = queue->index[end];
  566. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  567. /*
  568. * Start from the TX done pointer, this guarentees that we will
  569. * send out all frames in the correct order.
  570. */
  571. if (index_start < index_end) {
  572. for (i = index_start; i < index_end; i++)
  573. fn(&queue->entries[i]);
  574. } else {
  575. for (i = index_start; i < queue->limit; i++)
  576. fn(&queue->entries[i]);
  577. for (i = 0; i < index_end; i++)
  578. fn(&queue->entries[i]);
  579. }
  580. }
  581. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  582. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  583. const enum data_queue_qid queue)
  584. {
  585. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  586. if (queue == QID_RX)
  587. return rt2x00dev->rx;
  588. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  589. return &rt2x00dev->tx[queue];
  590. if (!rt2x00dev->bcn)
  591. return NULL;
  592. if (queue == QID_BEACON)
  593. return &rt2x00dev->bcn[0];
  594. else if (queue == QID_ATIM && atim)
  595. return &rt2x00dev->bcn[1];
  596. return NULL;
  597. }
  598. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  599. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  600. enum queue_index index)
  601. {
  602. struct queue_entry *entry;
  603. unsigned long irqflags;
  604. if (unlikely(index >= Q_INDEX_MAX)) {
  605. ERROR(queue->rt2x00dev,
  606. "Entry requested from invalid index type (%d)\n", index);
  607. return NULL;
  608. }
  609. spin_lock_irqsave(&queue->index_lock, irqflags);
  610. entry = &queue->entries[queue->index[index]];
  611. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  612. return entry;
  613. }
  614. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  615. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  616. {
  617. unsigned long irqflags;
  618. if (unlikely(index >= Q_INDEX_MAX)) {
  619. ERROR(queue->rt2x00dev,
  620. "Index change on invalid index type (%d)\n", index);
  621. return;
  622. }
  623. spin_lock_irqsave(&queue->index_lock, irqflags);
  624. queue->index[index]++;
  625. if (queue->index[index] >= queue->limit)
  626. queue->index[index] = 0;
  627. queue->last_action[index] = jiffies;
  628. if (index == Q_INDEX) {
  629. queue->length++;
  630. } else if (index == Q_INDEX_DONE) {
  631. queue->length--;
  632. queue->count++;
  633. }
  634. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  635. }
  636. void rt2x00queue_pause_queue(struct data_queue *queue)
  637. {
  638. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  639. !test_bit(QUEUE_STARTED, &queue->flags) ||
  640. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  641. return;
  642. switch (queue->qid) {
  643. case QID_AC_VO:
  644. case QID_AC_VI:
  645. case QID_AC_BE:
  646. case QID_AC_BK:
  647. /*
  648. * For TX queues, we have to disable the queue
  649. * inside mac80211.
  650. */
  651. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  652. break;
  653. default:
  654. break;
  655. }
  656. }
  657. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  658. void rt2x00queue_unpause_queue(struct data_queue *queue)
  659. {
  660. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  661. !test_bit(QUEUE_STARTED, &queue->flags) ||
  662. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  663. return;
  664. switch (queue->qid) {
  665. case QID_AC_VO:
  666. case QID_AC_VI:
  667. case QID_AC_BE:
  668. case QID_AC_BK:
  669. /*
  670. * For TX queues, we have to enable the queue
  671. * inside mac80211.
  672. */
  673. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  674. break;
  675. case QID_RX:
  676. /*
  677. * For RX we need to kick the queue now in order to
  678. * receive frames.
  679. */
  680. queue->rt2x00dev->ops->lib->kick_queue(queue);
  681. default:
  682. break;
  683. }
  684. }
  685. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  686. void rt2x00queue_start_queue(struct data_queue *queue)
  687. {
  688. mutex_lock(&queue->status_lock);
  689. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  690. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  691. mutex_unlock(&queue->status_lock);
  692. return;
  693. }
  694. set_bit(QUEUE_PAUSED, &queue->flags);
  695. queue->rt2x00dev->ops->lib->start_queue(queue);
  696. rt2x00queue_unpause_queue(queue);
  697. mutex_unlock(&queue->status_lock);
  698. }
  699. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  700. void rt2x00queue_stop_queue(struct data_queue *queue)
  701. {
  702. mutex_lock(&queue->status_lock);
  703. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  704. mutex_unlock(&queue->status_lock);
  705. return;
  706. }
  707. rt2x00queue_pause_queue(queue);
  708. queue->rt2x00dev->ops->lib->stop_queue(queue);
  709. mutex_unlock(&queue->status_lock);
  710. }
  711. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  712. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  713. {
  714. unsigned int i;
  715. bool started;
  716. bool tx_queue =
  717. (queue->qid == QID_AC_VO) ||
  718. (queue->qid == QID_AC_VI) ||
  719. (queue->qid == QID_AC_BE) ||
  720. (queue->qid == QID_AC_BK);
  721. mutex_lock(&queue->status_lock);
  722. /*
  723. * If the queue has been started, we must stop it temporarily
  724. * to prevent any new frames to be queued on the device. If
  725. * we are not dropping the pending frames, the queue must
  726. * only be stopped in the software and not the hardware,
  727. * otherwise the queue will never become empty on its own.
  728. */
  729. started = test_bit(QUEUE_STARTED, &queue->flags);
  730. if (started) {
  731. /*
  732. * Pause the queue
  733. */
  734. rt2x00queue_pause_queue(queue);
  735. /*
  736. * If we are not supposed to drop any pending
  737. * frames, this means we must force a start (=kick)
  738. * to the queue to make sure the hardware will
  739. * start transmitting.
  740. */
  741. if (!drop && tx_queue)
  742. queue->rt2x00dev->ops->lib->kick_queue(queue);
  743. }
  744. /*
  745. * Check if driver supports flushing, we can only guarentee
  746. * full support for flushing if the driver is able
  747. * to cancel all pending frames (drop = true).
  748. */
  749. if (drop && queue->rt2x00dev->ops->lib->flush_queue)
  750. queue->rt2x00dev->ops->lib->flush_queue(queue);
  751. /*
  752. * When we don't want to drop any frames, or when
  753. * the driver doesn't fully flush the queue correcly,
  754. * we must wait for the queue to become empty.
  755. */
  756. for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
  757. msleep(10);
  758. /*
  759. * The queue flush has failed...
  760. */
  761. if (unlikely(!rt2x00queue_empty(queue)))
  762. WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
  763. /*
  764. * Restore the queue to the previous status
  765. */
  766. if (started)
  767. rt2x00queue_unpause_queue(queue);
  768. mutex_unlock(&queue->status_lock);
  769. }
  770. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  771. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  772. {
  773. struct data_queue *queue;
  774. /*
  775. * rt2x00queue_start_queue will call ieee80211_wake_queue
  776. * for each queue after is has been properly initialized.
  777. */
  778. tx_queue_for_each(rt2x00dev, queue)
  779. rt2x00queue_start_queue(queue);
  780. rt2x00queue_start_queue(rt2x00dev->rx);
  781. }
  782. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  783. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  784. {
  785. struct data_queue *queue;
  786. /*
  787. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  788. * as well, but we are completely shutting doing everything
  789. * now, so it is much safer to stop all TX queues at once,
  790. * and use rt2x00queue_stop_queue for cleaning up.
  791. */
  792. ieee80211_stop_queues(rt2x00dev->hw);
  793. tx_queue_for_each(rt2x00dev, queue)
  794. rt2x00queue_stop_queue(queue);
  795. rt2x00queue_stop_queue(rt2x00dev->rx);
  796. }
  797. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  798. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  799. {
  800. struct data_queue *queue;
  801. tx_queue_for_each(rt2x00dev, queue)
  802. rt2x00queue_flush_queue(queue, drop);
  803. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  804. }
  805. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  806. static void rt2x00queue_reset(struct data_queue *queue)
  807. {
  808. unsigned long irqflags;
  809. unsigned int i;
  810. spin_lock_irqsave(&queue->index_lock, irqflags);
  811. queue->count = 0;
  812. queue->length = 0;
  813. for (i = 0; i < Q_INDEX_MAX; i++) {
  814. queue->index[i] = 0;
  815. queue->last_action[i] = jiffies;
  816. }
  817. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  818. }
  819. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  820. {
  821. struct data_queue *queue;
  822. unsigned int i;
  823. queue_for_each(rt2x00dev, queue) {
  824. rt2x00queue_reset(queue);
  825. for (i = 0; i < queue->limit; i++)
  826. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  827. }
  828. }
  829. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  830. const struct data_queue_desc *qdesc)
  831. {
  832. struct queue_entry *entries;
  833. unsigned int entry_size;
  834. unsigned int i;
  835. rt2x00queue_reset(queue);
  836. queue->limit = qdesc->entry_num;
  837. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  838. queue->data_size = qdesc->data_size;
  839. queue->desc_size = qdesc->desc_size;
  840. /*
  841. * Allocate all queue entries.
  842. */
  843. entry_size = sizeof(*entries) + qdesc->priv_size;
  844. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  845. if (!entries)
  846. return -ENOMEM;
  847. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  848. (((char *)(__base)) + ((__limit) * (__esize)) + \
  849. ((__index) * (__psize)))
  850. for (i = 0; i < queue->limit; i++) {
  851. entries[i].flags = 0;
  852. entries[i].queue = queue;
  853. entries[i].skb = NULL;
  854. entries[i].entry_idx = i;
  855. entries[i].priv_data =
  856. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  857. sizeof(*entries), qdesc->priv_size);
  858. }
  859. #undef QUEUE_ENTRY_PRIV_OFFSET
  860. queue->entries = entries;
  861. return 0;
  862. }
  863. static void rt2x00queue_free_skbs(struct data_queue *queue)
  864. {
  865. unsigned int i;
  866. if (!queue->entries)
  867. return;
  868. for (i = 0; i < queue->limit; i++) {
  869. rt2x00queue_free_skb(&queue->entries[i]);
  870. }
  871. }
  872. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  873. {
  874. unsigned int i;
  875. struct sk_buff *skb;
  876. for (i = 0; i < queue->limit; i++) {
  877. skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
  878. if (!skb)
  879. return -ENOMEM;
  880. queue->entries[i].skb = skb;
  881. }
  882. return 0;
  883. }
  884. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  885. {
  886. struct data_queue *queue;
  887. int status;
  888. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  889. if (status)
  890. goto exit;
  891. tx_queue_for_each(rt2x00dev, queue) {
  892. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  893. if (status)
  894. goto exit;
  895. }
  896. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  897. if (status)
  898. goto exit;
  899. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  900. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  901. rt2x00dev->ops->atim);
  902. if (status)
  903. goto exit;
  904. }
  905. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  906. if (status)
  907. goto exit;
  908. return 0;
  909. exit:
  910. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  911. rt2x00queue_uninitialize(rt2x00dev);
  912. return status;
  913. }
  914. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  915. {
  916. struct data_queue *queue;
  917. rt2x00queue_free_skbs(rt2x00dev->rx);
  918. queue_for_each(rt2x00dev, queue) {
  919. kfree(queue->entries);
  920. queue->entries = NULL;
  921. }
  922. }
  923. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  924. struct data_queue *queue, enum data_queue_qid qid)
  925. {
  926. mutex_init(&queue->status_lock);
  927. spin_lock_init(&queue->index_lock);
  928. queue->rt2x00dev = rt2x00dev;
  929. queue->qid = qid;
  930. queue->txop = 0;
  931. queue->aifs = 2;
  932. queue->cw_min = 5;
  933. queue->cw_max = 10;
  934. }
  935. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  936. {
  937. struct data_queue *queue;
  938. enum data_queue_qid qid;
  939. unsigned int req_atim =
  940. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  941. /*
  942. * We need the following queues:
  943. * RX: 1
  944. * TX: ops->tx_queues
  945. * Beacon: 1
  946. * Atim: 1 (if required)
  947. */
  948. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  949. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  950. if (!queue) {
  951. ERROR(rt2x00dev, "Queue allocation failed.\n");
  952. return -ENOMEM;
  953. }
  954. /*
  955. * Initialize pointers
  956. */
  957. rt2x00dev->rx = queue;
  958. rt2x00dev->tx = &queue[1];
  959. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  960. /*
  961. * Initialize queue parameters.
  962. * RX: qid = QID_RX
  963. * TX: qid = QID_AC_VO + index
  964. * TX: cw_min: 2^5 = 32.
  965. * TX: cw_max: 2^10 = 1024.
  966. * BCN: qid = QID_BEACON
  967. * ATIM: qid = QID_ATIM
  968. */
  969. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  970. qid = QID_AC_VO;
  971. tx_queue_for_each(rt2x00dev, queue)
  972. rt2x00queue_init(rt2x00dev, queue, qid++);
  973. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  974. if (req_atim)
  975. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  976. return 0;
  977. }
  978. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  979. {
  980. kfree(rt2x00dev->rx);
  981. rt2x00dev->rx = NULL;
  982. rt2x00dev->tx = NULL;
  983. rt2x00dev->bcn = NULL;
  984. }