mpt2sas_base.c 130 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int missing_delay[2] = {-1, -1};
  74. module_param_array(missing_delay, int, NULL, 0);
  75. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  76. static int mpt2sas_fwfault_debug;
  77. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  78. "and halt firmware - (default=0)");
  79. static int disable_discovery = -1;
  80. module_param(disable_discovery, int, 0);
  81. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  82. /* diag_buffer_enable is bitwise
  83. * bit 0 set = TRACE
  84. * bit 1 set = SNAPSHOT
  85. * bit 2 set = EXTENDED
  86. *
  87. * Either bit can be set, or both
  88. */
  89. static int diag_buffer_enable;
  90. module_param(diag_buffer_enable, int, 0);
  91. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  92. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  93. /**
  94. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  95. *
  96. */
  97. static int
  98. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  99. {
  100. int ret = param_set_int(val, kp);
  101. struct MPT2SAS_ADAPTER *ioc;
  102. if (ret)
  103. return ret;
  104. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  105. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  106. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  107. return 0;
  108. }
  109. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  110. param_get_int, &mpt2sas_fwfault_debug, 0644);
  111. /**
  112. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  113. * @arg: input argument, used to derive ioc
  114. *
  115. * Return 0 if controller is removed from pci subsystem.
  116. * Return -1 for other case.
  117. */
  118. static int mpt2sas_remove_dead_ioc_func(void *arg)
  119. {
  120. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  121. struct pci_dev *pdev;
  122. if ((ioc == NULL))
  123. return -1;
  124. pdev = ioc->pdev;
  125. if ((pdev == NULL))
  126. return -1;
  127. pci_remove_bus_device(pdev);
  128. return 0;
  129. }
  130. /**
  131. * _base_fault_reset_work - workq handling ioc fault conditions
  132. * @work: input argument, used to derive ioc
  133. * Context: sleep.
  134. *
  135. * Return nothing.
  136. */
  137. static void
  138. _base_fault_reset_work(struct work_struct *work)
  139. {
  140. struct MPT2SAS_ADAPTER *ioc =
  141. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  142. unsigned long flags;
  143. u32 doorbell;
  144. int rc;
  145. struct task_struct *p;
  146. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  147. if (ioc->shost_recovery)
  148. goto rearm_timer;
  149. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  150. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  151. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  152. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  153. ioc->name, __func__);
  154. /*
  155. * Call _scsih_flush_pending_cmds callback so that we flush all
  156. * pending commands back to OS. This call is required to aovid
  157. * deadlock at block layer. Dead IOC will fail to do diag reset,
  158. * and this call is safe since dead ioc will never return any
  159. * command back from HW.
  160. */
  161. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  162. /*
  163. * Set remove_host flag early since kernel thread will
  164. * take some time to execute.
  165. */
  166. ioc->remove_host = 1;
  167. /*Remove the Dead Host */
  168. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  169. "mpt2sas_dead_ioc_%d", ioc->id);
  170. if (IS_ERR(p)) {
  171. printk(MPT2SAS_ERR_FMT
  172. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  173. ioc->name, __func__);
  174. } else {
  175. printk(MPT2SAS_ERR_FMT
  176. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  177. ioc->name, __func__);
  178. }
  179. return; /* don't rearm timer */
  180. }
  181. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  182. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  183. FORCE_BIG_HAMMER);
  184. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  185. __func__, (rc == 0) ? "success" : "failed");
  186. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  187. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  188. mpt2sas_base_fault_info(ioc, doorbell &
  189. MPI2_DOORBELL_DATA_MASK);
  190. }
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. rearm_timer:
  193. if (ioc->fault_reset_work_q)
  194. queue_delayed_work(ioc->fault_reset_work_q,
  195. &ioc->fault_reset_work,
  196. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  197. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  198. }
  199. /**
  200. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  201. * @ioc: per adapter object
  202. * Context: sleep.
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  208. {
  209. unsigned long flags;
  210. if (ioc->fault_reset_work_q)
  211. return;
  212. /* initialize fault polling */
  213. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  214. snprintf(ioc->fault_reset_work_q_name,
  215. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  216. ioc->fault_reset_work_q =
  217. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  218. if (!ioc->fault_reset_work_q) {
  219. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  220. ioc->name, __func__, __LINE__);
  221. return;
  222. }
  223. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  224. if (ioc->fault_reset_work_q)
  225. queue_delayed_work(ioc->fault_reset_work_q,
  226. &ioc->fault_reset_work,
  227. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  228. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  229. }
  230. /**
  231. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  232. * @ioc: per adapter object
  233. * Context: sleep.
  234. *
  235. * Return nothing.
  236. */
  237. void
  238. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  239. {
  240. unsigned long flags;
  241. struct workqueue_struct *wq;
  242. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  243. wq = ioc->fault_reset_work_q;
  244. ioc->fault_reset_work_q = NULL;
  245. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  246. if (wq) {
  247. if (!cancel_delayed_work(&ioc->fault_reset_work))
  248. flush_workqueue(wq);
  249. destroy_workqueue(wq);
  250. }
  251. }
  252. /**
  253. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  254. * @ioc: per adapter object
  255. * @fault_code: fault code
  256. *
  257. * Return nothing.
  258. */
  259. void
  260. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  261. {
  262. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  263. ioc->name, fault_code);
  264. }
  265. /**
  266. * mpt2sas_halt_firmware - halt's mpt controller firmware
  267. * @ioc: per adapter object
  268. *
  269. * For debugging timeout related issues. Writing 0xCOFFEE00
  270. * to the doorbell register will halt controller firmware. With
  271. * the purpose to stop both driver and firmware, the enduser can
  272. * obtain a ring buffer from controller UART.
  273. */
  274. void
  275. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  276. {
  277. u32 doorbell;
  278. if (!ioc->fwfault_debug)
  279. return;
  280. dump_stack();
  281. doorbell = readl(&ioc->chip->Doorbell);
  282. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  283. mpt2sas_base_fault_info(ioc , doorbell);
  284. else {
  285. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  286. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  287. "timeout\n", ioc->name);
  288. }
  289. panic("panic in %s\n", __func__);
  290. }
  291. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  292. /**
  293. * _base_sas_ioc_info - verbose translation of the ioc status
  294. * @ioc: per adapter object
  295. * @mpi_reply: reply mf payload returned from firmware
  296. * @request_hdr: request mf
  297. *
  298. * Return nothing.
  299. */
  300. static void
  301. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  302. MPI2RequestHeader_t *request_hdr)
  303. {
  304. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  305. MPI2_IOCSTATUS_MASK;
  306. char *desc = NULL;
  307. u16 frame_sz;
  308. char *func_str = NULL;
  309. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  310. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  311. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  312. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  313. return;
  314. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  315. return;
  316. switch (ioc_status) {
  317. /****************************************************************************
  318. * Common IOCStatus values for all replies
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  321. desc = "invalid function";
  322. break;
  323. case MPI2_IOCSTATUS_BUSY:
  324. desc = "busy";
  325. break;
  326. case MPI2_IOCSTATUS_INVALID_SGL:
  327. desc = "invalid sgl";
  328. break;
  329. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  330. desc = "internal error";
  331. break;
  332. case MPI2_IOCSTATUS_INVALID_VPID:
  333. desc = "invalid vpid";
  334. break;
  335. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  336. desc = "insufficient resources";
  337. break;
  338. case MPI2_IOCSTATUS_INVALID_FIELD:
  339. desc = "invalid field";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_STATE:
  342. desc = "invalid state";
  343. break;
  344. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  345. desc = "op state not supported";
  346. break;
  347. /****************************************************************************
  348. * Config IOCStatus values
  349. ****************************************************************************/
  350. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  351. desc = "config invalid action";
  352. break;
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  354. desc = "config invalid type";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  357. desc = "config invalid page";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  360. desc = "config invalid data";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  363. desc = "config no defaults";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  366. desc = "config cant commit";
  367. break;
  368. /****************************************************************************
  369. * SCSI IO Reply
  370. ****************************************************************************/
  371. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  372. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  373. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  374. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  375. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  376. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  377. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  378. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  379. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  380. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  381. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  383. break;
  384. /****************************************************************************
  385. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  388. desc = "eedp guard error";
  389. break;
  390. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  391. desc = "eedp ref tag error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  394. desc = "eedp app tag error";
  395. break;
  396. /****************************************************************************
  397. * SCSI Target values
  398. ****************************************************************************/
  399. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  400. desc = "target invalid io index";
  401. break;
  402. case MPI2_IOCSTATUS_TARGET_ABORTED:
  403. desc = "target aborted";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  406. desc = "target no conn retryable";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  409. desc = "target no connection";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  412. desc = "target xfer count mismatch";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  415. desc = "target data offset error";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  418. desc = "target too much write data";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  421. desc = "target iu too short";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  424. desc = "target ack nak timeout";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  427. desc = "target nak received";
  428. break;
  429. /****************************************************************************
  430. * Serial Attached SCSI values
  431. ****************************************************************************/
  432. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  433. desc = "smp request failed";
  434. break;
  435. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  436. desc = "smp data overrun";
  437. break;
  438. /****************************************************************************
  439. * Diagnostic Buffer Post / Diagnostic Release values
  440. ****************************************************************************/
  441. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  442. desc = "diagnostic released";
  443. break;
  444. default:
  445. break;
  446. }
  447. if (!desc)
  448. return;
  449. switch (request_hdr->Function) {
  450. case MPI2_FUNCTION_CONFIG:
  451. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  452. func_str = "config_page";
  453. break;
  454. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  455. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  456. func_str = "task_mgmt";
  457. break;
  458. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  459. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  460. func_str = "sas_iounit_ctl";
  461. break;
  462. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  463. frame_sz = sizeof(Mpi2SepRequest_t);
  464. func_str = "enclosure";
  465. break;
  466. case MPI2_FUNCTION_IOC_INIT:
  467. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  468. func_str = "ioc_init";
  469. break;
  470. case MPI2_FUNCTION_PORT_ENABLE:
  471. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  472. func_str = "port_enable";
  473. break;
  474. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  475. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  476. func_str = "smp_passthru";
  477. break;
  478. default:
  479. frame_sz = 32;
  480. func_str = "unknown";
  481. break;
  482. }
  483. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  484. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  485. _debug_dump_mf(request_hdr, frame_sz/4);
  486. }
  487. /**
  488. * _base_display_event_data - verbose translation of firmware asyn events
  489. * @ioc: per adapter object
  490. * @mpi_reply: reply mf payload returned from firmware
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  496. Mpi2EventNotificationReply_t *mpi_reply)
  497. {
  498. char *desc = NULL;
  499. u16 event;
  500. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  501. return;
  502. event = le16_to_cpu(mpi_reply->Event);
  503. switch (event) {
  504. case MPI2_EVENT_LOG_DATA:
  505. desc = "Log Data";
  506. break;
  507. case MPI2_EVENT_STATE_CHANGE:
  508. desc = "Status Change";
  509. break;
  510. case MPI2_EVENT_HARD_RESET_RECEIVED:
  511. desc = "Hard Reset Received";
  512. break;
  513. case MPI2_EVENT_EVENT_CHANGE:
  514. desc = "Event Change";
  515. break;
  516. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  517. desc = "Device Status Change";
  518. break;
  519. case MPI2_EVENT_IR_OPERATION_STATUS:
  520. if (!ioc->hide_ir_msg)
  521. desc = "IR Operation Status";
  522. break;
  523. case MPI2_EVENT_SAS_DISCOVERY:
  524. {
  525. Mpi2EventDataSasDiscovery_t *event_data =
  526. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  527. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  528. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  529. "start" : "stop");
  530. if (event_data->DiscoveryStatus)
  531. printk("discovery_status(0x%08x)",
  532. le32_to_cpu(event_data->DiscoveryStatus));
  533. printk("\n");
  534. return;
  535. }
  536. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  537. desc = "SAS Broadcast Primitive";
  538. break;
  539. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  540. desc = "SAS Init Device Status Change";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  543. desc = "SAS Init Table Overflow";
  544. break;
  545. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  546. desc = "SAS Topology Change List";
  547. break;
  548. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  549. desc = "SAS Enclosure Device Status Change";
  550. break;
  551. case MPI2_EVENT_IR_VOLUME:
  552. if (!ioc->hide_ir_msg)
  553. desc = "IR Volume";
  554. break;
  555. case MPI2_EVENT_IR_PHYSICAL_DISK:
  556. if (!ioc->hide_ir_msg)
  557. desc = "IR Physical Disk";
  558. break;
  559. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  560. if (!ioc->hide_ir_msg)
  561. desc = "IR Configuration Change List";
  562. break;
  563. case MPI2_EVENT_LOG_ENTRY_ADDED:
  564. if (!ioc->hide_ir_msg)
  565. desc = "Log Entry Added";
  566. break;
  567. }
  568. if (!desc)
  569. return;
  570. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  571. }
  572. #endif
  573. /**
  574. * _base_sas_log_info - verbose translation of firmware log info
  575. * @ioc: per adapter object
  576. * @log_info: log info
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  582. {
  583. union loginfo_type {
  584. u32 loginfo;
  585. struct {
  586. u32 subcode:16;
  587. u32 code:8;
  588. u32 originator:4;
  589. u32 bus_type:4;
  590. } dw;
  591. };
  592. union loginfo_type sas_loginfo;
  593. char *originator_str = NULL;
  594. sas_loginfo.loginfo = log_info;
  595. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  596. return;
  597. /* each nexus loss loginfo */
  598. if (log_info == 0x31170000)
  599. return;
  600. /* eat the loginfos associated with task aborts */
  601. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  602. 0x31140000 || log_info == 0x31130000))
  603. return;
  604. switch (sas_loginfo.dw.originator) {
  605. case 0:
  606. originator_str = "IOP";
  607. break;
  608. case 1:
  609. originator_str = "PL";
  610. break;
  611. case 2:
  612. if (!ioc->hide_ir_msg)
  613. originator_str = "IR";
  614. else
  615. originator_str = "WarpDrive";
  616. break;
  617. }
  618. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  619. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  620. originator_str, sas_loginfo.dw.code,
  621. sas_loginfo.dw.subcode);
  622. }
  623. /**
  624. * _base_display_reply_info -
  625. * @ioc: per adapter object
  626. * @smid: system request message index
  627. * @msix_index: MSIX table index supplied by the OS
  628. * @reply: reply message frame(lower 32bit addr)
  629. *
  630. * Return nothing.
  631. */
  632. static void
  633. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  634. u32 reply)
  635. {
  636. MPI2DefaultReply_t *mpi_reply;
  637. u16 ioc_status;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  640. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  641. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  642. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  643. _base_sas_ioc_info(ioc , mpi_reply,
  644. mpt2sas_base_get_msg_frame(ioc, smid));
  645. }
  646. #endif
  647. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  648. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  649. }
  650. /**
  651. * mpt2sas_base_done - base internal command completion routine
  652. * @ioc: per adapter object
  653. * @smid: system request message index
  654. * @msix_index: MSIX table index supplied by the OS
  655. * @reply: reply message frame(lower 32bit addr)
  656. *
  657. * Return 1 meaning mf should be freed from _base_interrupt
  658. * 0 means the mf is freed from this function.
  659. */
  660. u8
  661. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  662. u32 reply)
  663. {
  664. MPI2DefaultReply_t *mpi_reply;
  665. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  666. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  667. return 1;
  668. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  669. return 1;
  670. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  671. if (mpi_reply) {
  672. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  673. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  674. }
  675. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  676. complete(&ioc->base_cmds.done);
  677. return 1;
  678. }
  679. /**
  680. * _base_async_event - main callback handler for firmware asyn events
  681. * @ioc: per adapter object
  682. * @msix_index: MSIX table index supplied by the OS
  683. * @reply: reply message frame(lower 32bit addr)
  684. *
  685. * Return 1 meaning mf should be freed from _base_interrupt
  686. * 0 means the mf is freed from this function.
  687. */
  688. static u8
  689. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  690. {
  691. Mpi2EventNotificationReply_t *mpi_reply;
  692. Mpi2EventAckRequest_t *ack_request;
  693. u16 smid;
  694. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  695. if (!mpi_reply)
  696. return 1;
  697. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  698. return 1;
  699. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  700. _base_display_event_data(ioc, mpi_reply);
  701. #endif
  702. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  703. goto out;
  704. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  705. if (!smid) {
  706. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  707. ioc->name, __func__);
  708. goto out;
  709. }
  710. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  711. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  712. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  713. ack_request->Event = mpi_reply->Event;
  714. ack_request->EventContext = mpi_reply->EventContext;
  715. ack_request->VF_ID = 0; /* TODO */
  716. ack_request->VP_ID = 0;
  717. mpt2sas_base_put_smid_default(ioc, smid);
  718. out:
  719. /* scsih callback handler */
  720. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  721. /* ctl callback handler */
  722. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  723. return 1;
  724. }
  725. /**
  726. * _base_get_cb_idx - obtain the callback index
  727. * @ioc: per adapter object
  728. * @smid: system request message index
  729. *
  730. * Return callback index.
  731. */
  732. static u8
  733. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  734. {
  735. int i;
  736. u8 cb_idx;
  737. if (smid < ioc->hi_priority_smid) {
  738. i = smid - 1;
  739. cb_idx = ioc->scsi_lookup[i].cb_idx;
  740. } else if (smid < ioc->internal_smid) {
  741. i = smid - ioc->hi_priority_smid;
  742. cb_idx = ioc->hpr_lookup[i].cb_idx;
  743. } else if (smid <= ioc->hba_queue_depth) {
  744. i = smid - ioc->internal_smid;
  745. cb_idx = ioc->internal_lookup[i].cb_idx;
  746. } else
  747. cb_idx = 0xFF;
  748. return cb_idx;
  749. }
  750. /**
  751. * _base_mask_interrupts - disable interrupts
  752. * @ioc: per adapter object
  753. *
  754. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  755. *
  756. * Return nothing.
  757. */
  758. static void
  759. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  760. {
  761. u32 him_register;
  762. ioc->mask_interrupts = 1;
  763. him_register = readl(&ioc->chip->HostInterruptMask);
  764. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  765. writel(him_register, &ioc->chip->HostInterruptMask);
  766. readl(&ioc->chip->HostInterruptMask);
  767. }
  768. /**
  769. * _base_unmask_interrupts - enable interrupts
  770. * @ioc: per adapter object
  771. *
  772. * Enabling only Reply Interrupts
  773. *
  774. * Return nothing.
  775. */
  776. static void
  777. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  778. {
  779. u32 him_register;
  780. him_register = readl(&ioc->chip->HostInterruptMask);
  781. him_register &= ~MPI2_HIM_RIM;
  782. writel(him_register, &ioc->chip->HostInterruptMask);
  783. ioc->mask_interrupts = 0;
  784. }
  785. union reply_descriptor {
  786. u64 word;
  787. struct {
  788. u32 low;
  789. u32 high;
  790. } u;
  791. };
  792. /**
  793. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  794. * @irq: irq number (not used)
  795. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  796. * @r: pt_regs pointer (not used)
  797. *
  798. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  799. */
  800. static irqreturn_t
  801. _base_interrupt(int irq, void *bus_id)
  802. {
  803. struct adapter_reply_queue *reply_q = bus_id;
  804. union reply_descriptor rd;
  805. u32 completed_cmds;
  806. u8 request_desript_type;
  807. u16 smid;
  808. u8 cb_idx;
  809. u32 reply;
  810. u8 msix_index = reply_q->msix_index;
  811. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  812. Mpi2ReplyDescriptorsUnion_t *rpf;
  813. u8 rc;
  814. if (ioc->mask_interrupts)
  815. return IRQ_NONE;
  816. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  817. return IRQ_NONE;
  818. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  819. request_desript_type = rpf->Default.ReplyFlags
  820. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  821. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  822. atomic_dec(&reply_q->busy);
  823. return IRQ_NONE;
  824. }
  825. completed_cmds = 0;
  826. cb_idx = 0xFF;
  827. do {
  828. rd.word = le64_to_cpu(rpf->Words);
  829. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  830. goto out;
  831. reply = 0;
  832. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  833. if (request_desript_type ==
  834. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  835. reply = le32_to_cpu
  836. (rpf->AddressReply.ReplyFrameAddress);
  837. if (reply > ioc->reply_dma_max_address ||
  838. reply < ioc->reply_dma_min_address)
  839. reply = 0;
  840. } else if (request_desript_type ==
  841. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  842. goto next;
  843. else if (request_desript_type ==
  844. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  845. goto next;
  846. if (smid)
  847. cb_idx = _base_get_cb_idx(ioc, smid);
  848. if (smid && cb_idx != 0xFF) {
  849. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  850. reply);
  851. if (reply)
  852. _base_display_reply_info(ioc, smid, msix_index,
  853. reply);
  854. if (rc)
  855. mpt2sas_base_free_smid(ioc, smid);
  856. }
  857. if (!smid)
  858. _base_async_event(ioc, msix_index, reply);
  859. /* reply free queue handling */
  860. if (reply) {
  861. ioc->reply_free_host_index =
  862. (ioc->reply_free_host_index ==
  863. (ioc->reply_free_queue_depth - 1)) ?
  864. 0 : ioc->reply_free_host_index + 1;
  865. ioc->reply_free[ioc->reply_free_host_index] =
  866. cpu_to_le32(reply);
  867. wmb();
  868. writel(ioc->reply_free_host_index,
  869. &ioc->chip->ReplyFreeHostIndex);
  870. }
  871. next:
  872. rpf->Words = cpu_to_le64(ULLONG_MAX);
  873. reply_q->reply_post_host_index =
  874. (reply_q->reply_post_host_index ==
  875. (ioc->reply_post_queue_depth - 1)) ? 0 :
  876. reply_q->reply_post_host_index + 1;
  877. request_desript_type =
  878. reply_q->reply_post_free[reply_q->reply_post_host_index].
  879. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  880. completed_cmds++;
  881. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  882. goto out;
  883. if (!reply_q->reply_post_host_index)
  884. rpf = reply_q->reply_post_free;
  885. else
  886. rpf++;
  887. } while (1);
  888. out:
  889. if (!completed_cmds) {
  890. atomic_dec(&reply_q->busy);
  891. return IRQ_NONE;
  892. }
  893. wmb();
  894. if (ioc->is_warpdrive) {
  895. writel(reply_q->reply_post_host_index,
  896. ioc->reply_post_host_index[msix_index]);
  897. atomic_dec(&reply_q->busy);
  898. return IRQ_HANDLED;
  899. }
  900. writel(reply_q->reply_post_host_index | (msix_index <<
  901. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  902. atomic_dec(&reply_q->busy);
  903. return IRQ_HANDLED;
  904. }
  905. /**
  906. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  907. * @ioc: per adapter object
  908. *
  909. */
  910. static inline int
  911. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  912. {
  913. return (ioc->facts.IOCCapabilities &
  914. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  915. }
  916. /**
  917. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  918. * @ioc: per adapter object
  919. * Context: ISR conext
  920. *
  921. * Called when a Task Management request has completed. We want
  922. * to flush the other reply queues so all the outstanding IO has been
  923. * completed back to OS before we process the TM completetion.
  924. *
  925. * Return nothing.
  926. */
  927. void
  928. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  929. {
  930. struct adapter_reply_queue *reply_q;
  931. /* If MSIX capability is turned off
  932. * then multi-queues are not enabled
  933. */
  934. if (!_base_is_controller_msix_enabled(ioc))
  935. return;
  936. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  937. if (ioc->shost_recovery)
  938. return;
  939. /* TMs are on msix_index == 0 */
  940. if (reply_q->msix_index == 0)
  941. continue;
  942. _base_interrupt(reply_q->vector, (void *)reply_q);
  943. }
  944. }
  945. /**
  946. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  947. * @cb_idx: callback index
  948. *
  949. * Return nothing.
  950. */
  951. void
  952. mpt2sas_base_release_callback_handler(u8 cb_idx)
  953. {
  954. mpt_callbacks[cb_idx] = NULL;
  955. }
  956. /**
  957. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  958. * @cb_func: callback function
  959. *
  960. * Returns cb_func.
  961. */
  962. u8
  963. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  964. {
  965. u8 cb_idx;
  966. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  967. if (mpt_callbacks[cb_idx] == NULL)
  968. break;
  969. mpt_callbacks[cb_idx] = cb_func;
  970. return cb_idx;
  971. }
  972. /**
  973. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  974. *
  975. * Return nothing.
  976. */
  977. void
  978. mpt2sas_base_initialize_callback_handler(void)
  979. {
  980. u8 cb_idx;
  981. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  982. mpt2sas_base_release_callback_handler(cb_idx);
  983. }
  984. /**
  985. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  986. * @ioc: per adapter object
  987. * @paddr: virtual address for SGE
  988. *
  989. * Create a zero length scatter gather entry to insure the IOCs hardware has
  990. * something to use if the target device goes brain dead and tries
  991. * to send data even when none is asked for.
  992. *
  993. * Return nothing.
  994. */
  995. void
  996. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  997. {
  998. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  999. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1000. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1001. MPI2_SGE_FLAGS_SHIFT);
  1002. ioc->base_add_sg_single(paddr, flags_length, -1);
  1003. }
  1004. /**
  1005. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1006. * @paddr: virtual address for SGE
  1007. * @flags_length: SGE flags and data transfer length
  1008. * @dma_addr: Physical address
  1009. *
  1010. * Return nothing.
  1011. */
  1012. static void
  1013. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1014. {
  1015. Mpi2SGESimple32_t *sgel = paddr;
  1016. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1017. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1018. sgel->FlagsLength = cpu_to_le32(flags_length);
  1019. sgel->Address = cpu_to_le32(dma_addr);
  1020. }
  1021. /**
  1022. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1023. * @paddr: virtual address for SGE
  1024. * @flags_length: SGE flags and data transfer length
  1025. * @dma_addr: Physical address
  1026. *
  1027. * Return nothing.
  1028. */
  1029. static void
  1030. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1031. {
  1032. Mpi2SGESimple64_t *sgel = paddr;
  1033. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1034. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1035. sgel->FlagsLength = cpu_to_le32(flags_length);
  1036. sgel->Address = cpu_to_le64(dma_addr);
  1037. }
  1038. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1039. /**
  1040. * _base_config_dma_addressing - set dma addressing
  1041. * @ioc: per adapter object
  1042. * @pdev: PCI device struct
  1043. *
  1044. * Returns 0 for success, non-zero for failure.
  1045. */
  1046. static int
  1047. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1048. {
  1049. struct sysinfo s;
  1050. char *desc = NULL;
  1051. if (sizeof(dma_addr_t) > 4) {
  1052. const uint64_t required_mask =
  1053. dma_get_required_mask(&pdev->dev);
  1054. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1055. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1056. DMA_BIT_MASK(64))) {
  1057. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1058. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1059. desc = "64";
  1060. goto out;
  1061. }
  1062. }
  1063. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1064. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1065. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1066. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1067. desc = "32";
  1068. } else
  1069. return -ENODEV;
  1070. out:
  1071. si_meminfo(&s);
  1072. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1073. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1074. return 0;
  1075. }
  1076. /**
  1077. * _base_check_enable_msix - checks MSIX capabable.
  1078. * @ioc: per adapter object
  1079. *
  1080. * Check to see if card is capable of MSIX, and set number
  1081. * of available msix vectors
  1082. */
  1083. static int
  1084. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1085. {
  1086. int base;
  1087. u16 message_control;
  1088. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1089. if (!base) {
  1090. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1091. "supported\n", ioc->name));
  1092. return -EINVAL;
  1093. }
  1094. /* get msix vector count */
  1095. /* NUMA_IO not supported for older controllers */
  1096. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1097. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1098. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1099. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1100. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1101. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1102. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1103. ioc->msix_vector_count = 1;
  1104. else {
  1105. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1106. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1107. }
  1108. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1109. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1110. return 0;
  1111. }
  1112. /**
  1113. * _base_free_irq - free irq
  1114. * @ioc: per adapter object
  1115. *
  1116. * Freeing respective reply_queue from the list.
  1117. */
  1118. static void
  1119. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1120. {
  1121. struct adapter_reply_queue *reply_q, *next;
  1122. if (list_empty(&ioc->reply_queue_list))
  1123. return;
  1124. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1125. list_del(&reply_q->list);
  1126. synchronize_irq(reply_q->vector);
  1127. free_irq(reply_q->vector, reply_q);
  1128. kfree(reply_q);
  1129. }
  1130. }
  1131. /**
  1132. * _base_request_irq - request irq
  1133. * @ioc: per adapter object
  1134. * @index: msix index into vector table
  1135. * @vector: irq vector
  1136. *
  1137. * Inserting respective reply_queue into the list.
  1138. */
  1139. static int
  1140. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1141. {
  1142. struct adapter_reply_queue *reply_q;
  1143. int r;
  1144. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1145. if (!reply_q) {
  1146. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1147. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1148. return -ENOMEM;
  1149. }
  1150. reply_q->ioc = ioc;
  1151. reply_q->msix_index = index;
  1152. reply_q->vector = vector;
  1153. atomic_set(&reply_q->busy, 0);
  1154. if (ioc->msix_enable)
  1155. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1156. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1157. else
  1158. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1159. MPT2SAS_DRIVER_NAME, ioc->id);
  1160. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1161. reply_q);
  1162. if (r) {
  1163. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1164. reply_q->name, vector);
  1165. kfree(reply_q);
  1166. return -EBUSY;
  1167. }
  1168. INIT_LIST_HEAD(&reply_q->list);
  1169. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1170. return 0;
  1171. }
  1172. /**
  1173. * _base_assign_reply_queues - assigning msix index for each cpu
  1174. * @ioc: per adapter object
  1175. *
  1176. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1177. *
  1178. * It would nice if we could call irq_set_affinity, however it is not
  1179. * an exported symbol
  1180. */
  1181. static void
  1182. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1183. {
  1184. struct adapter_reply_queue *reply_q;
  1185. int cpu_id;
  1186. int cpu_grouping, loop, grouping, grouping_mod;
  1187. if (!_base_is_controller_msix_enabled(ioc))
  1188. return;
  1189. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1190. /* when there are more cpus than available msix vectors,
  1191. * then group cpus togeather on same irq
  1192. */
  1193. if (ioc->cpu_count > ioc->msix_vector_count) {
  1194. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1195. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1196. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1197. cpu_grouping = 2;
  1198. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1199. cpu_grouping = 4;
  1200. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1201. cpu_grouping = 8;
  1202. else
  1203. cpu_grouping = 16;
  1204. } else
  1205. cpu_grouping = 0;
  1206. loop = 0;
  1207. reply_q = list_entry(ioc->reply_queue_list.next,
  1208. struct adapter_reply_queue, list);
  1209. for_each_online_cpu(cpu_id) {
  1210. if (!cpu_grouping) {
  1211. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1212. reply_q = list_entry(reply_q->list.next,
  1213. struct adapter_reply_queue, list);
  1214. } else {
  1215. if (loop < cpu_grouping) {
  1216. ioc->cpu_msix_table[cpu_id] =
  1217. reply_q->msix_index;
  1218. loop++;
  1219. } else {
  1220. reply_q = list_entry(reply_q->list.next,
  1221. struct adapter_reply_queue, list);
  1222. ioc->cpu_msix_table[cpu_id] =
  1223. reply_q->msix_index;
  1224. loop = 1;
  1225. }
  1226. }
  1227. }
  1228. }
  1229. /**
  1230. * _base_disable_msix - disables msix
  1231. * @ioc: per adapter object
  1232. *
  1233. */
  1234. static void
  1235. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1236. {
  1237. if (ioc->msix_enable) {
  1238. pci_disable_msix(ioc->pdev);
  1239. ioc->msix_enable = 0;
  1240. }
  1241. }
  1242. /**
  1243. * _base_enable_msix - enables msix, failback to io_apic
  1244. * @ioc: per adapter object
  1245. *
  1246. */
  1247. static int
  1248. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1249. {
  1250. struct msix_entry *entries, *a;
  1251. int r;
  1252. int i;
  1253. u8 try_msix = 0;
  1254. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1255. if (msix_disable == -1 || msix_disable == 0)
  1256. try_msix = 1;
  1257. if (!try_msix)
  1258. goto try_ioapic;
  1259. if (_base_check_enable_msix(ioc) != 0)
  1260. goto try_ioapic;
  1261. ioc->reply_queue_count = min_t(u8, ioc->cpu_count,
  1262. ioc->msix_vector_count);
  1263. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1264. GFP_KERNEL);
  1265. if (!entries) {
  1266. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1267. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1268. __LINE__, __func__));
  1269. goto try_ioapic;
  1270. }
  1271. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1272. a->entry = i;
  1273. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1274. if (r) {
  1275. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1276. "failed (r=%d) !!!\n", ioc->name, r));
  1277. kfree(entries);
  1278. goto try_ioapic;
  1279. }
  1280. ioc->msix_enable = 1;
  1281. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1282. r = _base_request_irq(ioc, i, a->vector);
  1283. if (r) {
  1284. _base_free_irq(ioc);
  1285. _base_disable_msix(ioc);
  1286. kfree(entries);
  1287. goto try_ioapic;
  1288. }
  1289. }
  1290. kfree(entries);
  1291. return 0;
  1292. /* failback to io_apic interrupt routing */
  1293. try_ioapic:
  1294. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1295. return r;
  1296. }
  1297. /**
  1298. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1299. * @ioc: per adapter object
  1300. *
  1301. * Returns 0 for success, non-zero for failure.
  1302. */
  1303. int
  1304. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1305. {
  1306. struct pci_dev *pdev = ioc->pdev;
  1307. u32 memap_sz;
  1308. u32 pio_sz;
  1309. int i, r = 0;
  1310. u64 pio_chip = 0;
  1311. u64 chip_phys = 0;
  1312. struct adapter_reply_queue *reply_q;
  1313. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1314. ioc->name, __func__));
  1315. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1316. if (pci_enable_device_mem(pdev)) {
  1317. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1318. "failed\n", ioc->name);
  1319. return -ENODEV;
  1320. }
  1321. if (pci_request_selected_regions(pdev, ioc->bars,
  1322. MPT2SAS_DRIVER_NAME)) {
  1323. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1324. "failed\n", ioc->name);
  1325. r = -ENODEV;
  1326. goto out_fail;
  1327. }
  1328. /* AER (Advanced Error Reporting) hooks */
  1329. pci_enable_pcie_error_reporting(pdev);
  1330. pci_set_master(pdev);
  1331. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1332. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1333. ioc->name, pci_name(pdev));
  1334. r = -ENODEV;
  1335. goto out_fail;
  1336. }
  1337. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1338. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1339. if (pio_sz)
  1340. continue;
  1341. pio_chip = (u64)pci_resource_start(pdev, i);
  1342. pio_sz = pci_resource_len(pdev, i);
  1343. } else {
  1344. if (memap_sz)
  1345. continue;
  1346. /* verify memory resource is valid before using */
  1347. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1348. ioc->chip_phys = pci_resource_start(pdev, i);
  1349. chip_phys = (u64)ioc->chip_phys;
  1350. memap_sz = pci_resource_len(pdev, i);
  1351. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1352. if (ioc->chip == NULL) {
  1353. printk(MPT2SAS_ERR_FMT "unable to map "
  1354. "adapter memory!\n", ioc->name);
  1355. r = -EINVAL;
  1356. goto out_fail;
  1357. }
  1358. }
  1359. }
  1360. }
  1361. _base_mask_interrupts(ioc);
  1362. r = _base_enable_msix(ioc);
  1363. if (r)
  1364. goto out_fail;
  1365. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1366. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1367. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1368. "IO-APIC enabled"), reply_q->vector);
  1369. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1370. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1371. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1372. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1373. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1374. pci_save_state(pdev);
  1375. return 0;
  1376. out_fail:
  1377. if (ioc->chip_phys)
  1378. iounmap(ioc->chip);
  1379. ioc->chip_phys = 0;
  1380. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1381. pci_disable_pcie_error_reporting(pdev);
  1382. pci_disable_device(pdev);
  1383. return r;
  1384. }
  1385. /**
  1386. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1387. * @ioc: per adapter object
  1388. * @smid: system request message index(smid zero is invalid)
  1389. *
  1390. * Returns virt pointer to message frame.
  1391. */
  1392. void *
  1393. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1394. {
  1395. return (void *)(ioc->request + (smid * ioc->request_sz));
  1396. }
  1397. /**
  1398. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1399. * @ioc: per adapter object
  1400. * @smid: system request message index
  1401. *
  1402. * Returns virt pointer to sense buffer.
  1403. */
  1404. void *
  1405. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1406. {
  1407. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1408. }
  1409. /**
  1410. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1411. * @ioc: per adapter object
  1412. * @smid: system request message index
  1413. *
  1414. * Returns phys pointer to the low 32bit address of the sense buffer.
  1415. */
  1416. __le32
  1417. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1418. {
  1419. return cpu_to_le32(ioc->sense_dma +
  1420. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1421. }
  1422. /**
  1423. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1424. * @ioc: per adapter object
  1425. * @phys_addr: lower 32 physical addr of the reply
  1426. *
  1427. * Converts 32bit lower physical addr into a virt address.
  1428. */
  1429. void *
  1430. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1431. {
  1432. if (!phys_addr)
  1433. return NULL;
  1434. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1435. }
  1436. /**
  1437. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1438. * @ioc: per adapter object
  1439. * @cb_idx: callback index
  1440. *
  1441. * Returns smid (zero is invalid)
  1442. */
  1443. u16
  1444. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1445. {
  1446. unsigned long flags;
  1447. struct request_tracker *request;
  1448. u16 smid;
  1449. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1450. if (list_empty(&ioc->internal_free_list)) {
  1451. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1452. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1453. ioc->name, __func__);
  1454. return 0;
  1455. }
  1456. request = list_entry(ioc->internal_free_list.next,
  1457. struct request_tracker, tracker_list);
  1458. request->cb_idx = cb_idx;
  1459. smid = request->smid;
  1460. list_del(&request->tracker_list);
  1461. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1462. return smid;
  1463. }
  1464. /**
  1465. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1466. * @ioc: per adapter object
  1467. * @cb_idx: callback index
  1468. * @scmd: pointer to scsi command object
  1469. *
  1470. * Returns smid (zero is invalid)
  1471. */
  1472. u16
  1473. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1474. struct scsi_cmnd *scmd)
  1475. {
  1476. unsigned long flags;
  1477. struct scsiio_tracker *request;
  1478. u16 smid;
  1479. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1480. if (list_empty(&ioc->free_list)) {
  1481. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1482. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1483. ioc->name, __func__);
  1484. return 0;
  1485. }
  1486. request = list_entry(ioc->free_list.next,
  1487. struct scsiio_tracker, tracker_list);
  1488. request->scmd = scmd;
  1489. request->cb_idx = cb_idx;
  1490. smid = request->smid;
  1491. list_del(&request->tracker_list);
  1492. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1493. return smid;
  1494. }
  1495. /**
  1496. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1497. * @ioc: per adapter object
  1498. * @cb_idx: callback index
  1499. *
  1500. * Returns smid (zero is invalid)
  1501. */
  1502. u16
  1503. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1504. {
  1505. unsigned long flags;
  1506. struct request_tracker *request;
  1507. u16 smid;
  1508. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1509. if (list_empty(&ioc->hpr_free_list)) {
  1510. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1511. return 0;
  1512. }
  1513. request = list_entry(ioc->hpr_free_list.next,
  1514. struct request_tracker, tracker_list);
  1515. request->cb_idx = cb_idx;
  1516. smid = request->smid;
  1517. list_del(&request->tracker_list);
  1518. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1519. return smid;
  1520. }
  1521. /**
  1522. * mpt2sas_base_free_smid - put smid back on free_list
  1523. * @ioc: per adapter object
  1524. * @smid: system request message index
  1525. *
  1526. * Return nothing.
  1527. */
  1528. void
  1529. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1530. {
  1531. unsigned long flags;
  1532. int i;
  1533. struct chain_tracker *chain_req, *next;
  1534. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1535. if (smid < ioc->hi_priority_smid) {
  1536. /* scsiio queue */
  1537. i = smid - 1;
  1538. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1539. list_for_each_entry_safe(chain_req, next,
  1540. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1541. list_del_init(&chain_req->tracker_list);
  1542. list_add_tail(&chain_req->tracker_list,
  1543. &ioc->free_chain_list);
  1544. }
  1545. }
  1546. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1547. ioc->scsi_lookup[i].scmd = NULL;
  1548. ioc->scsi_lookup[i].direct_io = 0;
  1549. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1550. &ioc->free_list);
  1551. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1552. /*
  1553. * See _wait_for_commands_to_complete() call with regards
  1554. * to this code.
  1555. */
  1556. if (ioc->shost_recovery && ioc->pending_io_count) {
  1557. if (ioc->pending_io_count == 1)
  1558. wake_up(&ioc->reset_wq);
  1559. ioc->pending_io_count--;
  1560. }
  1561. return;
  1562. } else if (smid < ioc->internal_smid) {
  1563. /* hi-priority */
  1564. i = smid - ioc->hi_priority_smid;
  1565. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1566. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1567. &ioc->hpr_free_list);
  1568. } else if (smid <= ioc->hba_queue_depth) {
  1569. /* internal queue */
  1570. i = smid - ioc->internal_smid;
  1571. ioc->internal_lookup[i].cb_idx = 0xFF;
  1572. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1573. &ioc->internal_free_list);
  1574. }
  1575. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1576. }
  1577. /**
  1578. * _base_writeq - 64 bit write to MMIO
  1579. * @ioc: per adapter object
  1580. * @b: data payload
  1581. * @addr: address in MMIO space
  1582. * @writeq_lock: spin lock
  1583. *
  1584. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1585. * care of 32 bit environment where its not quarenteed to send the entire word
  1586. * in one transfer.
  1587. */
  1588. #ifndef writeq
  1589. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1590. spinlock_t *writeq_lock)
  1591. {
  1592. unsigned long flags;
  1593. __u64 data_out = cpu_to_le64(b);
  1594. spin_lock_irqsave(writeq_lock, flags);
  1595. writel((u32)(data_out), addr);
  1596. writel((u32)(data_out >> 32), (addr + 4));
  1597. spin_unlock_irqrestore(writeq_lock, flags);
  1598. }
  1599. #else
  1600. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1601. spinlock_t *writeq_lock)
  1602. {
  1603. writeq(cpu_to_le64(b), addr);
  1604. }
  1605. #endif
  1606. static inline u8
  1607. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1608. {
  1609. return ioc->cpu_msix_table[smp_processor_id()];
  1610. }
  1611. /**
  1612. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1613. * @ioc: per adapter object
  1614. * @smid: system request message index
  1615. * @handle: device handle
  1616. *
  1617. * Return nothing.
  1618. */
  1619. void
  1620. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1621. {
  1622. Mpi2RequestDescriptorUnion_t descriptor;
  1623. u64 *request = (u64 *)&descriptor;
  1624. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1625. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1626. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1627. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1628. descriptor.SCSIIO.LMID = 0;
  1629. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1630. &ioc->scsi_lookup_lock);
  1631. }
  1632. /**
  1633. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1634. * @ioc: per adapter object
  1635. * @smid: system request message index
  1636. *
  1637. * Return nothing.
  1638. */
  1639. void
  1640. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1641. {
  1642. Mpi2RequestDescriptorUnion_t descriptor;
  1643. u64 *request = (u64 *)&descriptor;
  1644. descriptor.HighPriority.RequestFlags =
  1645. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1646. descriptor.HighPriority.MSIxIndex = 0;
  1647. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1648. descriptor.HighPriority.LMID = 0;
  1649. descriptor.HighPriority.Reserved1 = 0;
  1650. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1651. &ioc->scsi_lookup_lock);
  1652. }
  1653. /**
  1654. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1655. * @ioc: per adapter object
  1656. * @smid: system request message index
  1657. *
  1658. * Return nothing.
  1659. */
  1660. void
  1661. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1662. {
  1663. Mpi2RequestDescriptorUnion_t descriptor;
  1664. u64 *request = (u64 *)&descriptor;
  1665. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1666. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1667. descriptor.Default.SMID = cpu_to_le16(smid);
  1668. descriptor.Default.LMID = 0;
  1669. descriptor.Default.DescriptorTypeDependent = 0;
  1670. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1671. &ioc->scsi_lookup_lock);
  1672. }
  1673. /**
  1674. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1675. * @ioc: per adapter object
  1676. * @smid: system request message index
  1677. * @io_index: value used to track the IO
  1678. *
  1679. * Return nothing.
  1680. */
  1681. void
  1682. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1683. u16 io_index)
  1684. {
  1685. Mpi2RequestDescriptorUnion_t descriptor;
  1686. u64 *request = (u64 *)&descriptor;
  1687. descriptor.SCSITarget.RequestFlags =
  1688. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1689. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1690. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1691. descriptor.SCSITarget.LMID = 0;
  1692. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1693. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1694. &ioc->scsi_lookup_lock);
  1695. }
  1696. /**
  1697. * _base_display_dell_branding - Disply branding string
  1698. * @ioc: per adapter object
  1699. *
  1700. * Return nothing.
  1701. */
  1702. static void
  1703. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1704. {
  1705. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1706. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1707. return;
  1708. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1709. switch (ioc->pdev->subsystem_device) {
  1710. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1711. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1712. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1713. break;
  1714. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1715. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1716. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1717. break;
  1718. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1719. strncpy(dell_branding,
  1720. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1721. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1722. break;
  1723. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1724. strncpy(dell_branding,
  1725. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1726. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1727. break;
  1728. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1729. strncpy(dell_branding,
  1730. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1731. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1732. break;
  1733. case MPT2SAS_DELL_PERC_H200_SSDID:
  1734. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1735. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1736. break;
  1737. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1738. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1739. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1740. break;
  1741. default:
  1742. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1743. break;
  1744. }
  1745. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1746. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1747. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1748. ioc->pdev->subsystem_device);
  1749. }
  1750. /**
  1751. * _base_display_intel_branding - Display branding string
  1752. * @ioc: per adapter object
  1753. *
  1754. * Return nothing.
  1755. */
  1756. static void
  1757. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1758. {
  1759. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1760. return;
  1761. switch (ioc->pdev->device) {
  1762. case MPI2_MFGPAGE_DEVID_SAS2008:
  1763. switch (ioc->pdev->subsystem_device) {
  1764. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1765. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1766. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1767. break;
  1768. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1769. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1770. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1771. break;
  1772. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1773. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1774. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1775. break;
  1776. default:
  1777. break;
  1778. }
  1779. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1780. switch (ioc->pdev->subsystem_device) {
  1781. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1782. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1783. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1784. break;
  1785. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1786. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1787. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1788. break;
  1789. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1790. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1791. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1792. break;
  1793. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1794. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1795. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1796. break;
  1797. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1798. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1799. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1800. break;
  1801. default:
  1802. break;
  1803. }
  1804. default:
  1805. break;
  1806. }
  1807. }
  1808. /**
  1809. * _base_display_hp_branding - Display branding string
  1810. * @ioc: per adapter object
  1811. *
  1812. * Return nothing.
  1813. */
  1814. static void
  1815. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1816. {
  1817. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1818. return;
  1819. switch (ioc->pdev->device) {
  1820. case MPI2_MFGPAGE_DEVID_SAS2004:
  1821. switch (ioc->pdev->subsystem_device) {
  1822. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1823. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1824. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1825. break;
  1826. default:
  1827. break;
  1828. }
  1829. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1830. switch (ioc->pdev->subsystem_device) {
  1831. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1832. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1833. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1834. break;
  1835. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1836. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1837. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1838. break;
  1839. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1840. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1841. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1842. break;
  1843. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1844. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1845. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1846. break;
  1847. default:
  1848. break;
  1849. }
  1850. default:
  1851. break;
  1852. }
  1853. }
  1854. /**
  1855. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1856. * @ioc: per adapter object
  1857. *
  1858. * Return nothing.
  1859. */
  1860. static void
  1861. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1862. {
  1863. int i = 0;
  1864. char desc[16];
  1865. u8 revision;
  1866. u32 iounit_pg1_flags;
  1867. u32 bios_version;
  1868. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1869. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1870. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1871. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1872. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1873. ioc->name, desc,
  1874. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1875. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1876. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1877. ioc->facts.FWVersion.Word & 0x000000FF,
  1878. revision,
  1879. (bios_version & 0xFF000000) >> 24,
  1880. (bios_version & 0x00FF0000) >> 16,
  1881. (bios_version & 0x0000FF00) >> 8,
  1882. bios_version & 0x000000FF);
  1883. _base_display_dell_branding(ioc);
  1884. _base_display_intel_branding(ioc);
  1885. _base_display_hp_branding(ioc);
  1886. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1887. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1888. printk("Initiator");
  1889. i++;
  1890. }
  1891. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1892. printk("%sTarget", i ? "," : "");
  1893. i++;
  1894. }
  1895. i = 0;
  1896. printk("), ");
  1897. printk("Capabilities=(");
  1898. if (!ioc->hide_ir_msg) {
  1899. if (ioc->facts.IOCCapabilities &
  1900. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1901. printk("Raid");
  1902. i++;
  1903. }
  1904. }
  1905. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1906. printk("%sTLR", i ? "," : "");
  1907. i++;
  1908. }
  1909. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1910. printk("%sMulticast", i ? "," : "");
  1911. i++;
  1912. }
  1913. if (ioc->facts.IOCCapabilities &
  1914. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1915. printk("%sBIDI Target", i ? "," : "");
  1916. i++;
  1917. }
  1918. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1919. printk("%sEEDP", i ? "," : "");
  1920. i++;
  1921. }
  1922. if (ioc->facts.IOCCapabilities &
  1923. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1924. printk("%sSnapshot Buffer", i ? "," : "");
  1925. i++;
  1926. }
  1927. if (ioc->facts.IOCCapabilities &
  1928. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1929. printk("%sDiag Trace Buffer", i ? "," : "");
  1930. i++;
  1931. }
  1932. if (ioc->facts.IOCCapabilities &
  1933. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1934. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1935. i++;
  1936. }
  1937. if (ioc->facts.IOCCapabilities &
  1938. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1939. printk("%sTask Set Full", i ? "," : "");
  1940. i++;
  1941. }
  1942. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1943. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1944. printk("%sNCQ", i ? "," : "");
  1945. i++;
  1946. }
  1947. printk(")\n");
  1948. }
  1949. /**
  1950. * _base_update_missing_delay - change the missing delay timers
  1951. * @ioc: per adapter object
  1952. * @device_missing_delay: amount of time till device is reported missing
  1953. * @io_missing_delay: interval IO is returned when there is a missing device
  1954. *
  1955. * Return nothing.
  1956. *
  1957. * Passed on the command line, this function will modify the device missing
  1958. * delay, as well as the io missing delay. This should be called at driver
  1959. * load time.
  1960. */
  1961. static void
  1962. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1963. u16 device_missing_delay, u8 io_missing_delay)
  1964. {
  1965. u16 dmd, dmd_new, dmd_orignal;
  1966. u8 io_missing_delay_original;
  1967. u16 sz;
  1968. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1969. Mpi2ConfigReply_t mpi_reply;
  1970. u8 num_phys = 0;
  1971. u16 ioc_status;
  1972. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1973. if (!num_phys)
  1974. return;
  1975. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1976. sizeof(Mpi2SasIOUnit1PhyData_t));
  1977. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1978. if (!sas_iounit_pg1) {
  1979. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1980. ioc->name, __FILE__, __LINE__, __func__);
  1981. goto out;
  1982. }
  1983. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1984. sas_iounit_pg1, sz))) {
  1985. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1986. ioc->name, __FILE__, __LINE__, __func__);
  1987. goto out;
  1988. }
  1989. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1990. MPI2_IOCSTATUS_MASK;
  1991. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1992. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1993. ioc->name, __FILE__, __LINE__, __func__);
  1994. goto out;
  1995. }
  1996. /* device missing delay */
  1997. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1998. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1999. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2000. else
  2001. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2002. dmd_orignal = dmd;
  2003. if (device_missing_delay > 0x7F) {
  2004. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2005. device_missing_delay;
  2006. dmd = dmd / 16;
  2007. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2008. } else
  2009. dmd = device_missing_delay;
  2010. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2011. /* io missing delay */
  2012. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2013. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2014. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2015. sz)) {
  2016. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2017. dmd_new = (dmd &
  2018. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2019. else
  2020. dmd_new =
  2021. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2022. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2023. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2024. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2025. "new(%d)\n", ioc->name, io_missing_delay_original,
  2026. io_missing_delay);
  2027. ioc->device_missing_delay = dmd_new;
  2028. ioc->io_missing_delay = io_missing_delay;
  2029. }
  2030. out:
  2031. kfree(sas_iounit_pg1);
  2032. }
  2033. /**
  2034. * _base_static_config_pages - static start of day config pages
  2035. * @ioc: per adapter object
  2036. *
  2037. * Return nothing.
  2038. */
  2039. static void
  2040. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2041. {
  2042. Mpi2ConfigReply_t mpi_reply;
  2043. u32 iounit_pg1_flags;
  2044. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2045. if (ioc->ir_firmware)
  2046. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2047. &ioc->manu_pg10);
  2048. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2049. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2050. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2051. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2052. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2053. _base_display_ioc_capabilities(ioc);
  2054. /*
  2055. * Enable task_set_full handling in iounit_pg1 when the
  2056. * facts capabilities indicate that its supported.
  2057. */
  2058. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2059. if ((ioc->facts.IOCCapabilities &
  2060. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2061. iounit_pg1_flags &=
  2062. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2063. else
  2064. iounit_pg1_flags |=
  2065. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2066. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2067. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2068. }
  2069. /**
  2070. * _base_release_memory_pools - release memory
  2071. * @ioc: per adapter object
  2072. *
  2073. * Free memory allocated from _base_allocate_memory_pools.
  2074. *
  2075. * Return nothing.
  2076. */
  2077. static void
  2078. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2079. {
  2080. int i;
  2081. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2082. __func__));
  2083. if (ioc->request) {
  2084. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2085. ioc->request, ioc->request_dma);
  2086. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2087. ": free\n", ioc->name, ioc->request));
  2088. ioc->request = NULL;
  2089. }
  2090. if (ioc->sense) {
  2091. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2092. if (ioc->sense_dma_pool)
  2093. pci_pool_destroy(ioc->sense_dma_pool);
  2094. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2095. ": free\n", ioc->name, ioc->sense));
  2096. ioc->sense = NULL;
  2097. }
  2098. if (ioc->reply) {
  2099. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2100. if (ioc->reply_dma_pool)
  2101. pci_pool_destroy(ioc->reply_dma_pool);
  2102. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2103. ": free\n", ioc->name, ioc->reply));
  2104. ioc->reply = NULL;
  2105. }
  2106. if (ioc->reply_free) {
  2107. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2108. ioc->reply_free_dma);
  2109. if (ioc->reply_free_dma_pool)
  2110. pci_pool_destroy(ioc->reply_free_dma_pool);
  2111. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2112. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2113. ioc->reply_free = NULL;
  2114. }
  2115. if (ioc->reply_post_free) {
  2116. pci_pool_free(ioc->reply_post_free_dma_pool,
  2117. ioc->reply_post_free, ioc->reply_post_free_dma);
  2118. if (ioc->reply_post_free_dma_pool)
  2119. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2120. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2121. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2122. ioc->reply_post_free));
  2123. ioc->reply_post_free = NULL;
  2124. }
  2125. if (ioc->config_page) {
  2126. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2127. "config_page(0x%p): free\n", ioc->name,
  2128. ioc->config_page));
  2129. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2130. ioc->config_page, ioc->config_page_dma);
  2131. }
  2132. if (ioc->scsi_lookup) {
  2133. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2134. ioc->scsi_lookup = NULL;
  2135. }
  2136. kfree(ioc->hpr_lookup);
  2137. kfree(ioc->internal_lookup);
  2138. if (ioc->chain_lookup) {
  2139. for (i = 0; i < ioc->chain_depth; i++) {
  2140. if (ioc->chain_lookup[i].chain_buffer)
  2141. pci_pool_free(ioc->chain_dma_pool,
  2142. ioc->chain_lookup[i].chain_buffer,
  2143. ioc->chain_lookup[i].chain_buffer_dma);
  2144. }
  2145. if (ioc->chain_dma_pool)
  2146. pci_pool_destroy(ioc->chain_dma_pool);
  2147. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2148. ioc->chain_lookup = NULL;
  2149. }
  2150. }
  2151. /**
  2152. * _base_allocate_memory_pools - allocate start of day memory pools
  2153. * @ioc: per adapter object
  2154. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2155. *
  2156. * Returns 0 success, anything else error
  2157. */
  2158. static int
  2159. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2160. {
  2161. struct mpt2sas_facts *facts;
  2162. u16 max_sge_elements;
  2163. u16 chains_needed_per_io;
  2164. u32 sz, total_sz, reply_post_free_sz;
  2165. u32 retry_sz;
  2166. u16 max_request_credit;
  2167. int i;
  2168. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2169. __func__));
  2170. retry_sz = 0;
  2171. facts = &ioc->facts;
  2172. /* command line tunables for max sgl entries */
  2173. if (max_sgl_entries != -1) {
  2174. ioc->shost->sg_tablesize = (max_sgl_entries <
  2175. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2176. MPT2SAS_SG_DEPTH;
  2177. } else {
  2178. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2179. }
  2180. /* command line tunables for max controller queue depth */
  2181. if (max_queue_depth != -1)
  2182. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2183. ? max_queue_depth : facts->RequestCredit;
  2184. else
  2185. max_request_credit = min_t(u16, facts->RequestCredit,
  2186. MAX_HBA_QUEUE_DEPTH);
  2187. ioc->hba_queue_depth = max_request_credit;
  2188. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2189. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2190. /* request frame size */
  2191. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2192. /* reply frame size */
  2193. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2194. retry_allocation:
  2195. total_sz = 0;
  2196. /* calculate number of sg elements left over in the 1st frame */
  2197. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2198. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2199. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2200. /* now do the same for a chain buffer */
  2201. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2202. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2203. ioc->chain_offset_value_for_main_message =
  2204. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2205. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2206. /*
  2207. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2208. */
  2209. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2210. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2211. + 1;
  2212. if (chains_needed_per_io > facts->MaxChainDepth) {
  2213. chains_needed_per_io = facts->MaxChainDepth;
  2214. ioc->shost->sg_tablesize = min_t(u16,
  2215. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2216. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2217. }
  2218. ioc->chains_needed_per_io = chains_needed_per_io;
  2219. /* reply free queue sizing - taking into account for 64 FW events */
  2220. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2221. /* align the reply post queue on the next 16 count boundary */
  2222. if (!ioc->reply_free_queue_depth % 16)
  2223. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2224. else
  2225. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2226. 32 - (ioc->reply_free_queue_depth % 16);
  2227. if (ioc->reply_post_queue_depth >
  2228. facts->MaxReplyDescriptorPostQueueDepth) {
  2229. ioc->reply_post_queue_depth = min_t(u16,
  2230. (facts->MaxReplyDescriptorPostQueueDepth -
  2231. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2232. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2233. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2234. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2235. }
  2236. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2237. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2238. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2239. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2240. ioc->chains_needed_per_io));
  2241. ioc->scsiio_depth = ioc->hba_queue_depth -
  2242. ioc->hi_priority_depth - ioc->internal_depth;
  2243. /* set the scsi host can_queue depth
  2244. * with some internal commands that could be outstanding
  2245. */
  2246. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2247. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2248. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2249. /* contiguous pool for request and chains, 16 byte align, one extra "
  2250. * "frame for smid=0
  2251. */
  2252. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2253. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2254. /* hi-priority queue */
  2255. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2256. /* internal queue */
  2257. sz += (ioc->internal_depth * ioc->request_sz);
  2258. ioc->request_dma_sz = sz;
  2259. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2260. if (!ioc->request) {
  2261. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2262. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2263. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2264. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2265. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2266. goto out;
  2267. retry_sz += 64;
  2268. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2269. goto retry_allocation;
  2270. }
  2271. if (retry_sz)
  2272. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2273. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2274. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2275. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2276. /* hi-priority queue */
  2277. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2278. ioc->request_sz);
  2279. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2280. ioc->request_sz);
  2281. /* internal queue */
  2282. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2283. ioc->request_sz);
  2284. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2285. ioc->request_sz);
  2286. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2287. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2288. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2289. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2290. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2291. ioc->name, (unsigned long long) ioc->request_dma));
  2292. total_sz += sz;
  2293. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2294. ioc->scsi_lookup_pages = get_order(sz);
  2295. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2296. GFP_KERNEL, ioc->scsi_lookup_pages);
  2297. if (!ioc->scsi_lookup) {
  2298. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2299. "sz(%d)\n", ioc->name, (int)sz);
  2300. goto out;
  2301. }
  2302. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2303. "depth(%d)\n", ioc->name, ioc->request,
  2304. ioc->scsiio_depth));
  2305. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2306. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2307. ioc->chain_pages = get_order(sz);
  2308. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2309. GFP_KERNEL, ioc->chain_pages);
  2310. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2311. ioc->request_sz, 16, 0);
  2312. if (!ioc->chain_dma_pool) {
  2313. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2314. "failed\n", ioc->name);
  2315. goto out;
  2316. }
  2317. for (i = 0; i < ioc->chain_depth; i++) {
  2318. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2319. ioc->chain_dma_pool , GFP_KERNEL,
  2320. &ioc->chain_lookup[i].chain_buffer_dma);
  2321. if (!ioc->chain_lookup[i].chain_buffer) {
  2322. ioc->chain_depth = i;
  2323. goto chain_done;
  2324. }
  2325. total_sz += ioc->request_sz;
  2326. }
  2327. chain_done:
  2328. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2329. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2330. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2331. ioc->request_sz))/1024));
  2332. /* initialize hi-priority queue smid's */
  2333. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2334. sizeof(struct request_tracker), GFP_KERNEL);
  2335. if (!ioc->hpr_lookup) {
  2336. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2337. ioc->name);
  2338. goto out;
  2339. }
  2340. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2341. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2342. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2343. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2344. /* initialize internal queue smid's */
  2345. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2346. sizeof(struct request_tracker), GFP_KERNEL);
  2347. if (!ioc->internal_lookup) {
  2348. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2349. ioc->name);
  2350. goto out;
  2351. }
  2352. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2353. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2354. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2355. ioc->internal_depth, ioc->internal_smid));
  2356. /* sense buffers, 4 byte align */
  2357. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2358. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2359. 0);
  2360. if (!ioc->sense_dma_pool) {
  2361. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2362. ioc->name);
  2363. goto out;
  2364. }
  2365. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2366. &ioc->sense_dma);
  2367. if (!ioc->sense) {
  2368. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2369. ioc->name);
  2370. goto out;
  2371. }
  2372. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2373. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2374. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2375. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2376. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2377. ioc->name, (unsigned long long)ioc->sense_dma));
  2378. total_sz += sz;
  2379. /* reply pool, 4 byte align */
  2380. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2381. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2382. 0);
  2383. if (!ioc->reply_dma_pool) {
  2384. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2385. ioc->name);
  2386. goto out;
  2387. }
  2388. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2389. &ioc->reply_dma);
  2390. if (!ioc->reply) {
  2391. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2392. ioc->name);
  2393. goto out;
  2394. }
  2395. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2396. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2397. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2398. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2399. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2400. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2401. ioc->name, (unsigned long long)ioc->reply_dma));
  2402. total_sz += sz;
  2403. /* reply free queue, 16 byte align */
  2404. sz = ioc->reply_free_queue_depth * 4;
  2405. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2406. ioc->pdev, sz, 16, 0);
  2407. if (!ioc->reply_free_dma_pool) {
  2408. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2409. "failed\n", ioc->name);
  2410. goto out;
  2411. }
  2412. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2413. &ioc->reply_free_dma);
  2414. if (!ioc->reply_free) {
  2415. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2416. "failed\n", ioc->name);
  2417. goto out;
  2418. }
  2419. memset(ioc->reply_free, 0, sz);
  2420. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2421. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2422. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2423. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2424. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2425. total_sz += sz;
  2426. /* reply post queue, 16 byte align */
  2427. reply_post_free_sz = ioc->reply_post_queue_depth *
  2428. sizeof(Mpi2DefaultReplyDescriptor_t);
  2429. if (_base_is_controller_msix_enabled(ioc))
  2430. sz = reply_post_free_sz * ioc->reply_queue_count;
  2431. else
  2432. sz = reply_post_free_sz;
  2433. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2434. ioc->pdev, sz, 16, 0);
  2435. if (!ioc->reply_post_free_dma_pool) {
  2436. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2437. "failed\n", ioc->name);
  2438. goto out;
  2439. }
  2440. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2441. GFP_KERNEL, &ioc->reply_post_free_dma);
  2442. if (!ioc->reply_post_free) {
  2443. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2444. "failed\n", ioc->name);
  2445. goto out;
  2446. }
  2447. memset(ioc->reply_post_free, 0, sz);
  2448. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2449. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2450. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2451. sz/1024));
  2452. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2453. "(0x%llx)\n", ioc->name, (unsigned long long)
  2454. ioc->reply_post_free_dma));
  2455. total_sz += sz;
  2456. ioc->config_page_sz = 512;
  2457. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2458. ioc->config_page_sz, &ioc->config_page_dma);
  2459. if (!ioc->config_page) {
  2460. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2461. "failed\n", ioc->name);
  2462. goto out;
  2463. }
  2464. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2465. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2466. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2467. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2468. total_sz += ioc->config_page_sz;
  2469. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2470. ioc->name, total_sz/1024);
  2471. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2472. "Max Controller Queue Depth(%d)\n",
  2473. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2474. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2475. ioc->name, ioc->shost->sg_tablesize);
  2476. return 0;
  2477. out:
  2478. return -ENOMEM;
  2479. }
  2480. /**
  2481. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2482. * @ioc: Pointer to MPT_ADAPTER structure
  2483. * @cooked: Request raw or cooked IOC state
  2484. *
  2485. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2486. * Doorbell bits in MPI_IOC_STATE_MASK.
  2487. */
  2488. u32
  2489. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2490. {
  2491. u32 s, sc;
  2492. s = readl(&ioc->chip->Doorbell);
  2493. sc = s & MPI2_IOC_STATE_MASK;
  2494. return cooked ? sc : s;
  2495. }
  2496. /**
  2497. * _base_wait_on_iocstate - waiting on a particular ioc state
  2498. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2499. * @timeout: timeout in second
  2500. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2501. *
  2502. * Returns 0 for success, non-zero for failure.
  2503. */
  2504. static int
  2505. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2506. int sleep_flag)
  2507. {
  2508. u32 count, cntdn;
  2509. u32 current_state;
  2510. count = 0;
  2511. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2512. do {
  2513. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2514. if (current_state == ioc_state)
  2515. return 0;
  2516. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2517. break;
  2518. if (sleep_flag == CAN_SLEEP)
  2519. msleep(1);
  2520. else
  2521. udelay(500);
  2522. count++;
  2523. } while (--cntdn);
  2524. return current_state;
  2525. }
  2526. /**
  2527. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2528. * a write to the doorbell)
  2529. * @ioc: per adapter object
  2530. * @timeout: timeout in second
  2531. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2532. *
  2533. * Returns 0 for success, non-zero for failure.
  2534. *
  2535. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2536. */
  2537. static int
  2538. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2539. int sleep_flag)
  2540. {
  2541. u32 cntdn, count;
  2542. u32 int_status;
  2543. count = 0;
  2544. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2545. do {
  2546. int_status = readl(&ioc->chip->HostInterruptStatus);
  2547. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2548. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2549. "successful count(%d), timeout(%d)\n", ioc->name,
  2550. __func__, count, timeout));
  2551. return 0;
  2552. }
  2553. if (sleep_flag == CAN_SLEEP)
  2554. msleep(1);
  2555. else
  2556. udelay(500);
  2557. count++;
  2558. } while (--cntdn);
  2559. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2560. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2561. return -EFAULT;
  2562. }
  2563. /**
  2564. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2565. * @ioc: per adapter object
  2566. * @timeout: timeout in second
  2567. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2568. *
  2569. * Returns 0 for success, non-zero for failure.
  2570. *
  2571. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2572. * doorbell.
  2573. */
  2574. static int
  2575. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2576. int sleep_flag)
  2577. {
  2578. u32 cntdn, count;
  2579. u32 int_status;
  2580. u32 doorbell;
  2581. count = 0;
  2582. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2583. do {
  2584. int_status = readl(&ioc->chip->HostInterruptStatus);
  2585. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2586. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2587. "successful count(%d), timeout(%d)\n", ioc->name,
  2588. __func__, count, timeout));
  2589. return 0;
  2590. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2591. doorbell = readl(&ioc->chip->Doorbell);
  2592. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2593. MPI2_IOC_STATE_FAULT) {
  2594. mpt2sas_base_fault_info(ioc , doorbell);
  2595. return -EFAULT;
  2596. }
  2597. } else if (int_status == 0xFFFFFFFF)
  2598. goto out;
  2599. if (sleep_flag == CAN_SLEEP)
  2600. msleep(1);
  2601. else
  2602. udelay(500);
  2603. count++;
  2604. } while (--cntdn);
  2605. out:
  2606. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2607. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2608. return -EFAULT;
  2609. }
  2610. /**
  2611. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2612. * @ioc: per adapter object
  2613. * @timeout: timeout in second
  2614. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2615. *
  2616. * Returns 0 for success, non-zero for failure.
  2617. *
  2618. */
  2619. static int
  2620. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2621. int sleep_flag)
  2622. {
  2623. u32 cntdn, count;
  2624. u32 doorbell_reg;
  2625. count = 0;
  2626. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2627. do {
  2628. doorbell_reg = readl(&ioc->chip->Doorbell);
  2629. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2630. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2631. "successful count(%d), timeout(%d)\n", ioc->name,
  2632. __func__, count, timeout));
  2633. return 0;
  2634. }
  2635. if (sleep_flag == CAN_SLEEP)
  2636. msleep(1);
  2637. else
  2638. udelay(500);
  2639. count++;
  2640. } while (--cntdn);
  2641. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2642. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2643. return -EFAULT;
  2644. }
  2645. /**
  2646. * _base_send_ioc_reset - send doorbell reset
  2647. * @ioc: per adapter object
  2648. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2649. * @timeout: timeout in second
  2650. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2651. *
  2652. * Returns 0 for success, non-zero for failure.
  2653. */
  2654. static int
  2655. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2656. int sleep_flag)
  2657. {
  2658. u32 ioc_state;
  2659. int r = 0;
  2660. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2661. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2662. ioc->name, __func__);
  2663. return -EFAULT;
  2664. }
  2665. if (!(ioc->facts.IOCCapabilities &
  2666. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2667. return -EFAULT;
  2668. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2669. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2670. &ioc->chip->Doorbell);
  2671. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2672. r = -EFAULT;
  2673. goto out;
  2674. }
  2675. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2676. timeout, sleep_flag);
  2677. if (ioc_state) {
  2678. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2679. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2680. r = -EFAULT;
  2681. goto out;
  2682. }
  2683. out:
  2684. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2685. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2686. return r;
  2687. }
  2688. /**
  2689. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2690. * @ioc: per adapter object
  2691. * @request_bytes: request length
  2692. * @request: pointer having request payload
  2693. * @reply_bytes: reply length
  2694. * @reply: pointer to reply payload
  2695. * @timeout: timeout in second
  2696. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2697. *
  2698. * Returns 0 for success, non-zero for failure.
  2699. */
  2700. static int
  2701. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2702. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2703. {
  2704. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2705. int i;
  2706. u8 failed;
  2707. u16 dummy;
  2708. __le32 *mfp;
  2709. /* make sure doorbell is not in use */
  2710. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2711. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2712. " (line=%d)\n", ioc->name, __LINE__);
  2713. return -EFAULT;
  2714. }
  2715. /* clear pending doorbell interrupts from previous state changes */
  2716. if (readl(&ioc->chip->HostInterruptStatus) &
  2717. MPI2_HIS_IOC2SYS_DB_STATUS)
  2718. writel(0, &ioc->chip->HostInterruptStatus);
  2719. /* send message to ioc */
  2720. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2721. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2722. &ioc->chip->Doorbell);
  2723. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2724. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2725. "int failed (line=%d)\n", ioc->name, __LINE__);
  2726. return -EFAULT;
  2727. }
  2728. writel(0, &ioc->chip->HostInterruptStatus);
  2729. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2730. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2731. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2732. return -EFAULT;
  2733. }
  2734. /* send message 32-bits at a time */
  2735. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2736. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2737. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2738. failed = 1;
  2739. }
  2740. if (failed) {
  2741. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2742. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2743. return -EFAULT;
  2744. }
  2745. /* now wait for the reply */
  2746. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2747. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2748. "int failed (line=%d)\n", ioc->name, __LINE__);
  2749. return -EFAULT;
  2750. }
  2751. /* read the first two 16-bits, it gives the total length of the reply */
  2752. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2753. & MPI2_DOORBELL_DATA_MASK);
  2754. writel(0, &ioc->chip->HostInterruptStatus);
  2755. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2756. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2757. "int failed (line=%d)\n", ioc->name, __LINE__);
  2758. return -EFAULT;
  2759. }
  2760. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2761. & MPI2_DOORBELL_DATA_MASK);
  2762. writel(0, &ioc->chip->HostInterruptStatus);
  2763. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2764. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2765. printk(MPT2SAS_ERR_FMT "doorbell "
  2766. "handshake int failed (line=%d)\n", ioc->name,
  2767. __LINE__);
  2768. return -EFAULT;
  2769. }
  2770. if (i >= reply_bytes/2) /* overflow case */
  2771. dummy = readl(&ioc->chip->Doorbell);
  2772. else
  2773. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2774. & MPI2_DOORBELL_DATA_MASK);
  2775. writel(0, &ioc->chip->HostInterruptStatus);
  2776. }
  2777. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2778. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2779. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2780. " (line=%d)\n", ioc->name, __LINE__));
  2781. }
  2782. writel(0, &ioc->chip->HostInterruptStatus);
  2783. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2784. mfp = (__le32 *)reply;
  2785. printk(KERN_INFO "\toffset:data\n");
  2786. for (i = 0; i < reply_bytes/4; i++)
  2787. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2788. le32_to_cpu(mfp[i]));
  2789. }
  2790. return 0;
  2791. }
  2792. /**
  2793. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2794. * @ioc: per adapter object
  2795. * @mpi_reply: the reply payload from FW
  2796. * @mpi_request: the request payload sent to FW
  2797. *
  2798. * The SAS IO Unit Control Request message allows the host to perform low-level
  2799. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2800. * to obtain the IOC assigned device handles for a device if it has other
  2801. * identifying information about the device, in addition allows the host to
  2802. * remove IOC resources associated with the device.
  2803. *
  2804. * Returns 0 for success, non-zero for failure.
  2805. */
  2806. int
  2807. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2808. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2809. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2810. {
  2811. u16 smid;
  2812. u32 ioc_state;
  2813. unsigned long timeleft;
  2814. u8 issue_reset;
  2815. int rc;
  2816. void *request;
  2817. u16 wait_state_count;
  2818. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2819. __func__));
  2820. mutex_lock(&ioc->base_cmds.mutex);
  2821. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2822. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2823. ioc->name, __func__);
  2824. rc = -EAGAIN;
  2825. goto out;
  2826. }
  2827. wait_state_count = 0;
  2828. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2829. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2830. if (wait_state_count++ == 10) {
  2831. printk(MPT2SAS_ERR_FMT
  2832. "%s: failed due to ioc not operational\n",
  2833. ioc->name, __func__);
  2834. rc = -EFAULT;
  2835. goto out;
  2836. }
  2837. ssleep(1);
  2838. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2839. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2840. "operational state(count=%d)\n", ioc->name,
  2841. __func__, wait_state_count);
  2842. }
  2843. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2844. if (!smid) {
  2845. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2846. ioc->name, __func__);
  2847. rc = -EAGAIN;
  2848. goto out;
  2849. }
  2850. rc = 0;
  2851. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2852. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2853. ioc->base_cmds.smid = smid;
  2854. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2855. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2856. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2857. ioc->ioc_link_reset_in_progress = 1;
  2858. init_completion(&ioc->base_cmds.done);
  2859. mpt2sas_base_put_smid_default(ioc, smid);
  2860. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2861. msecs_to_jiffies(10000));
  2862. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2863. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2864. ioc->ioc_link_reset_in_progress)
  2865. ioc->ioc_link_reset_in_progress = 0;
  2866. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2867. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2868. ioc->name, __func__);
  2869. _debug_dump_mf(mpi_request,
  2870. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2871. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2872. issue_reset = 1;
  2873. goto issue_host_reset;
  2874. }
  2875. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2876. memcpy(mpi_reply, ioc->base_cmds.reply,
  2877. sizeof(Mpi2SasIoUnitControlReply_t));
  2878. else
  2879. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2880. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2881. goto out;
  2882. issue_host_reset:
  2883. if (issue_reset)
  2884. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2885. FORCE_BIG_HAMMER);
  2886. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2887. rc = -EFAULT;
  2888. out:
  2889. mutex_unlock(&ioc->base_cmds.mutex);
  2890. return rc;
  2891. }
  2892. /**
  2893. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2894. * @ioc: per adapter object
  2895. * @mpi_reply: the reply payload from FW
  2896. * @mpi_request: the request payload sent to FW
  2897. *
  2898. * The SCSI Enclosure Processor request message causes the IOC to
  2899. * communicate with SES devices to control LED status signals.
  2900. *
  2901. * Returns 0 for success, non-zero for failure.
  2902. */
  2903. int
  2904. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2905. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2906. {
  2907. u16 smid;
  2908. u32 ioc_state;
  2909. unsigned long timeleft;
  2910. u8 issue_reset;
  2911. int rc;
  2912. void *request;
  2913. u16 wait_state_count;
  2914. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2915. __func__));
  2916. mutex_lock(&ioc->base_cmds.mutex);
  2917. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2918. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2919. ioc->name, __func__);
  2920. rc = -EAGAIN;
  2921. goto out;
  2922. }
  2923. wait_state_count = 0;
  2924. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2925. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2926. if (wait_state_count++ == 10) {
  2927. printk(MPT2SAS_ERR_FMT
  2928. "%s: failed due to ioc not operational\n",
  2929. ioc->name, __func__);
  2930. rc = -EFAULT;
  2931. goto out;
  2932. }
  2933. ssleep(1);
  2934. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2935. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2936. "operational state(count=%d)\n", ioc->name,
  2937. __func__, wait_state_count);
  2938. }
  2939. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2940. if (!smid) {
  2941. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2942. ioc->name, __func__);
  2943. rc = -EAGAIN;
  2944. goto out;
  2945. }
  2946. rc = 0;
  2947. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2948. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2949. ioc->base_cmds.smid = smid;
  2950. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2951. init_completion(&ioc->base_cmds.done);
  2952. mpt2sas_base_put_smid_default(ioc, smid);
  2953. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2954. msecs_to_jiffies(10000));
  2955. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2956. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2957. ioc->name, __func__);
  2958. _debug_dump_mf(mpi_request,
  2959. sizeof(Mpi2SepRequest_t)/4);
  2960. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2961. issue_reset = 1;
  2962. goto issue_host_reset;
  2963. }
  2964. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2965. memcpy(mpi_reply, ioc->base_cmds.reply,
  2966. sizeof(Mpi2SepReply_t));
  2967. else
  2968. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2969. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2970. goto out;
  2971. issue_host_reset:
  2972. if (issue_reset)
  2973. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2974. FORCE_BIG_HAMMER);
  2975. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2976. rc = -EFAULT;
  2977. out:
  2978. mutex_unlock(&ioc->base_cmds.mutex);
  2979. return rc;
  2980. }
  2981. /**
  2982. * _base_get_port_facts - obtain port facts reply and save in ioc
  2983. * @ioc: per adapter object
  2984. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2985. *
  2986. * Returns 0 for success, non-zero for failure.
  2987. */
  2988. static int
  2989. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2990. {
  2991. Mpi2PortFactsRequest_t mpi_request;
  2992. Mpi2PortFactsReply_t mpi_reply;
  2993. struct mpt2sas_port_facts *pfacts;
  2994. int mpi_reply_sz, mpi_request_sz, r;
  2995. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2996. __func__));
  2997. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2998. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2999. memset(&mpi_request, 0, mpi_request_sz);
  3000. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3001. mpi_request.PortNumber = port;
  3002. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3003. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3004. if (r != 0) {
  3005. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3006. ioc->name, __func__, r);
  3007. return r;
  3008. }
  3009. pfacts = &ioc->pfacts[port];
  3010. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  3011. pfacts->PortNumber = mpi_reply.PortNumber;
  3012. pfacts->VP_ID = mpi_reply.VP_ID;
  3013. pfacts->VF_ID = mpi_reply.VF_ID;
  3014. pfacts->MaxPostedCmdBuffers =
  3015. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3016. return 0;
  3017. }
  3018. /**
  3019. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3020. * @ioc: per adapter object
  3021. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3022. *
  3023. * Returns 0 for success, non-zero for failure.
  3024. */
  3025. static int
  3026. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3027. {
  3028. Mpi2IOCFactsRequest_t mpi_request;
  3029. Mpi2IOCFactsReply_t mpi_reply;
  3030. struct mpt2sas_facts *facts;
  3031. int mpi_reply_sz, mpi_request_sz, r;
  3032. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3033. __func__));
  3034. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3035. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3036. memset(&mpi_request, 0, mpi_request_sz);
  3037. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3038. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3039. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3040. if (r != 0) {
  3041. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3042. ioc->name, __func__, r);
  3043. return r;
  3044. }
  3045. facts = &ioc->facts;
  3046. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3047. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3048. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3049. facts->VP_ID = mpi_reply.VP_ID;
  3050. facts->VF_ID = mpi_reply.VF_ID;
  3051. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3052. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3053. facts->WhoInit = mpi_reply.WhoInit;
  3054. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3055. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3056. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3057. facts->MaxReplyDescriptorPostQueueDepth =
  3058. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3059. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3060. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3061. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3062. ioc->ir_firmware = 1;
  3063. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3064. facts->IOCRequestFrameSize =
  3065. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3066. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3067. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3068. ioc->shost->max_id = -1;
  3069. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3070. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3071. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3072. facts->HighPriorityCredit =
  3073. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3074. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3075. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3076. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3077. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3078. facts->MaxChainDepth));
  3079. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3080. "reply frame size(%d)\n", ioc->name,
  3081. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3082. return 0;
  3083. }
  3084. /**
  3085. * _base_send_ioc_init - send ioc_init to firmware
  3086. * @ioc: per adapter object
  3087. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3088. *
  3089. * Returns 0 for success, non-zero for failure.
  3090. */
  3091. static int
  3092. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3093. {
  3094. Mpi2IOCInitRequest_t mpi_request;
  3095. Mpi2IOCInitReply_t mpi_reply;
  3096. int r;
  3097. struct timeval current_time;
  3098. u16 ioc_status;
  3099. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3100. __func__));
  3101. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3102. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3103. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3104. mpi_request.VF_ID = 0; /* TODO */
  3105. mpi_request.VP_ID = 0;
  3106. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3107. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3108. if (_base_is_controller_msix_enabled(ioc))
  3109. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3110. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3111. mpi_request.ReplyDescriptorPostQueueDepth =
  3112. cpu_to_le16(ioc->reply_post_queue_depth);
  3113. mpi_request.ReplyFreeQueueDepth =
  3114. cpu_to_le16(ioc->reply_free_queue_depth);
  3115. mpi_request.SenseBufferAddressHigh =
  3116. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3117. mpi_request.SystemReplyAddressHigh =
  3118. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3119. mpi_request.SystemRequestFrameBaseAddress =
  3120. cpu_to_le64((u64)ioc->request_dma);
  3121. mpi_request.ReplyFreeQueueAddress =
  3122. cpu_to_le64((u64)ioc->reply_free_dma);
  3123. mpi_request.ReplyDescriptorPostQueueAddress =
  3124. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3125. /* This time stamp specifies number of milliseconds
  3126. * since epoch ~ midnight January 1, 1970.
  3127. */
  3128. do_gettimeofday(&current_time);
  3129. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3130. (current_time.tv_usec / 1000));
  3131. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3132. __le32 *mfp;
  3133. int i;
  3134. mfp = (__le32 *)&mpi_request;
  3135. printk(KERN_INFO "\toffset:data\n");
  3136. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3137. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3138. le32_to_cpu(mfp[i]));
  3139. }
  3140. r = _base_handshake_req_reply_wait(ioc,
  3141. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3142. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3143. sleep_flag);
  3144. if (r != 0) {
  3145. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3146. ioc->name, __func__, r);
  3147. return r;
  3148. }
  3149. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3150. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3151. mpi_reply.IOCLogInfo) {
  3152. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3153. r = -EIO;
  3154. }
  3155. return 0;
  3156. }
  3157. /**
  3158. * mpt2sas_port_enable_done - command completion routine for port enable
  3159. * @ioc: per adapter object
  3160. * @smid: system request message index
  3161. * @msix_index: MSIX table index supplied by the OS
  3162. * @reply: reply message frame(lower 32bit addr)
  3163. *
  3164. * Return 1 meaning mf should be freed from _base_interrupt
  3165. * 0 means the mf is freed from this function.
  3166. */
  3167. u8
  3168. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3169. u32 reply)
  3170. {
  3171. MPI2DefaultReply_t *mpi_reply;
  3172. u16 ioc_status;
  3173. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3174. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3175. return 1;
  3176. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3177. return 1;
  3178. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3179. if (mpi_reply) {
  3180. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3181. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3182. mpi_reply->MsgLength*4);
  3183. }
  3184. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3185. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3186. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3187. ioc->port_enable_failed = 1;
  3188. if (ioc->is_driver_loading) {
  3189. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3190. mpt2sas_port_enable_complete(ioc);
  3191. return 1;
  3192. } else {
  3193. ioc->start_scan_failed = ioc_status;
  3194. ioc->start_scan = 0;
  3195. return 1;
  3196. }
  3197. }
  3198. complete(&ioc->port_enable_cmds.done);
  3199. return 1;
  3200. }
  3201. /**
  3202. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3203. * @ioc: per adapter object
  3204. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3205. *
  3206. * Returns 0 for success, non-zero for failure.
  3207. */
  3208. static int
  3209. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3210. {
  3211. Mpi2PortEnableRequest_t *mpi_request;
  3212. Mpi2PortEnableReply_t *mpi_reply;
  3213. unsigned long timeleft;
  3214. int r = 0;
  3215. u16 smid;
  3216. u16 ioc_status;
  3217. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3218. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3219. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3220. ioc->name, __func__);
  3221. return -EAGAIN;
  3222. }
  3223. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3224. if (!smid) {
  3225. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3226. ioc->name, __func__);
  3227. return -EAGAIN;
  3228. }
  3229. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3230. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3231. ioc->port_enable_cmds.smid = smid;
  3232. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3233. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3234. init_completion(&ioc->port_enable_cmds.done);
  3235. mpt2sas_base_put_smid_default(ioc, smid);
  3236. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3237. 300*HZ);
  3238. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3239. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3240. ioc->name, __func__);
  3241. _debug_dump_mf(mpi_request,
  3242. sizeof(Mpi2PortEnableRequest_t)/4);
  3243. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3244. r = -EFAULT;
  3245. else
  3246. r = -ETIME;
  3247. goto out;
  3248. }
  3249. mpi_reply = ioc->port_enable_cmds.reply;
  3250. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3251. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3252. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3253. ioc->name, __func__, ioc_status);
  3254. r = -EFAULT;
  3255. goto out;
  3256. }
  3257. out:
  3258. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3259. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3260. "SUCCESS" : "FAILED"));
  3261. return r;
  3262. }
  3263. /**
  3264. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3265. * @ioc: per adapter object
  3266. *
  3267. * Returns 0 for success, non-zero for failure.
  3268. */
  3269. int
  3270. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3271. {
  3272. Mpi2PortEnableRequest_t *mpi_request;
  3273. u16 smid;
  3274. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3275. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3276. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3277. ioc->name, __func__);
  3278. return -EAGAIN;
  3279. }
  3280. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3281. if (!smid) {
  3282. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3283. ioc->name, __func__);
  3284. return -EAGAIN;
  3285. }
  3286. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3287. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3288. ioc->port_enable_cmds.smid = smid;
  3289. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3290. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3291. mpt2sas_base_put_smid_default(ioc, smid);
  3292. return 0;
  3293. }
  3294. /**
  3295. * _base_determine_wait_on_discovery - desposition
  3296. * @ioc: per adapter object
  3297. *
  3298. * Decide whether to wait on discovery to complete. Used to either
  3299. * locate boot device, or report volumes ahead of physical devices.
  3300. *
  3301. * Returns 1 for wait, 0 for don't wait
  3302. */
  3303. static int
  3304. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3305. {
  3306. /* We wait for discovery to complete if IR firmware is loaded.
  3307. * The sas topology events arrive before PD events, so we need time to
  3308. * turn on the bit in ioc->pd_handles to indicate PD
  3309. * Also, it maybe required to report Volumes ahead of physical
  3310. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3311. */
  3312. if (ioc->ir_firmware)
  3313. return 1;
  3314. /* if no Bios, then we don't need to wait */
  3315. if (!ioc->bios_pg3.BiosVersion)
  3316. return 0;
  3317. /* Bios is present, then we drop down here.
  3318. *
  3319. * If there any entries in the Bios Page 2, then we wait
  3320. * for discovery to complete.
  3321. */
  3322. /* Current Boot Device */
  3323. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3324. MPI2_BIOSPAGE2_FORM_MASK) ==
  3325. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3326. /* Request Boot Device */
  3327. (ioc->bios_pg2.ReqBootDeviceForm &
  3328. MPI2_BIOSPAGE2_FORM_MASK) ==
  3329. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3330. /* Alternate Request Boot Device */
  3331. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3332. MPI2_BIOSPAGE2_FORM_MASK) ==
  3333. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3334. return 0;
  3335. return 1;
  3336. }
  3337. /**
  3338. * _base_unmask_events - turn on notification for this event
  3339. * @ioc: per adapter object
  3340. * @event: firmware event
  3341. *
  3342. * The mask is stored in ioc->event_masks.
  3343. */
  3344. static void
  3345. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3346. {
  3347. u32 desired_event;
  3348. if (event >= 128)
  3349. return;
  3350. desired_event = (1 << (event % 32));
  3351. if (event < 32)
  3352. ioc->event_masks[0] &= ~desired_event;
  3353. else if (event < 64)
  3354. ioc->event_masks[1] &= ~desired_event;
  3355. else if (event < 96)
  3356. ioc->event_masks[2] &= ~desired_event;
  3357. else if (event < 128)
  3358. ioc->event_masks[3] &= ~desired_event;
  3359. }
  3360. /**
  3361. * _base_event_notification - send event notification
  3362. * @ioc: per adapter object
  3363. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3364. *
  3365. * Returns 0 for success, non-zero for failure.
  3366. */
  3367. static int
  3368. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3369. {
  3370. Mpi2EventNotificationRequest_t *mpi_request;
  3371. unsigned long timeleft;
  3372. u16 smid;
  3373. int r = 0;
  3374. int i;
  3375. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3376. __func__));
  3377. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3378. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3379. ioc->name, __func__);
  3380. return -EAGAIN;
  3381. }
  3382. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3383. if (!smid) {
  3384. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3385. ioc->name, __func__);
  3386. return -EAGAIN;
  3387. }
  3388. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3389. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3390. ioc->base_cmds.smid = smid;
  3391. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3392. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3393. mpi_request->VF_ID = 0; /* TODO */
  3394. mpi_request->VP_ID = 0;
  3395. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3396. mpi_request->EventMasks[i] =
  3397. cpu_to_le32(ioc->event_masks[i]);
  3398. init_completion(&ioc->base_cmds.done);
  3399. mpt2sas_base_put_smid_default(ioc, smid);
  3400. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3401. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3402. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3403. ioc->name, __func__);
  3404. _debug_dump_mf(mpi_request,
  3405. sizeof(Mpi2EventNotificationRequest_t)/4);
  3406. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3407. r = -EFAULT;
  3408. else
  3409. r = -ETIME;
  3410. } else
  3411. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3412. ioc->name, __func__));
  3413. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3414. return r;
  3415. }
  3416. /**
  3417. * mpt2sas_base_validate_event_type - validating event types
  3418. * @ioc: per adapter object
  3419. * @event: firmware event
  3420. *
  3421. * This will turn on firmware event notification when application
  3422. * ask for that event. We don't mask events that are already enabled.
  3423. */
  3424. void
  3425. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3426. {
  3427. int i, j;
  3428. u32 event_mask, desired_event;
  3429. u8 send_update_to_fw;
  3430. for (i = 0, send_update_to_fw = 0; i <
  3431. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3432. event_mask = ~event_type[i];
  3433. desired_event = 1;
  3434. for (j = 0; j < 32; j++) {
  3435. if (!(event_mask & desired_event) &&
  3436. (ioc->event_masks[i] & desired_event)) {
  3437. ioc->event_masks[i] &= ~desired_event;
  3438. send_update_to_fw = 1;
  3439. }
  3440. desired_event = (desired_event << 1);
  3441. }
  3442. }
  3443. if (!send_update_to_fw)
  3444. return;
  3445. mutex_lock(&ioc->base_cmds.mutex);
  3446. _base_event_notification(ioc, CAN_SLEEP);
  3447. mutex_unlock(&ioc->base_cmds.mutex);
  3448. }
  3449. /**
  3450. * _base_diag_reset - the "big hammer" start of day reset
  3451. * @ioc: per adapter object
  3452. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3453. *
  3454. * Returns 0 for success, non-zero for failure.
  3455. */
  3456. static int
  3457. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3458. {
  3459. u32 host_diagnostic;
  3460. u32 ioc_state;
  3461. u32 count;
  3462. u32 hcb_size;
  3463. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3464. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3465. ioc->name));
  3466. count = 0;
  3467. do {
  3468. /* Write magic sequence to WriteSequence register
  3469. * Loop until in diagnostic mode
  3470. */
  3471. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3472. "sequence\n", ioc->name));
  3473. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3474. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3475. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3476. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3477. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3478. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3479. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3480. /* wait 100 msec */
  3481. if (sleep_flag == CAN_SLEEP)
  3482. msleep(100);
  3483. else
  3484. mdelay(100);
  3485. if (count++ > 20)
  3486. goto out;
  3487. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3488. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3489. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3490. ioc->name, count, host_diagnostic));
  3491. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3492. hcb_size = readl(&ioc->chip->HCBSize);
  3493. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3494. ioc->name));
  3495. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3496. &ioc->chip->HostDiagnostic);
  3497. /* don't access any registers for 50 milliseconds */
  3498. msleep(50);
  3499. /* 300 second max wait */
  3500. for (count = 0; count < 3000000 ; count++) {
  3501. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3502. if (host_diagnostic == 0xFFFFFFFF)
  3503. goto out;
  3504. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3505. break;
  3506. /* wait 100 msec */
  3507. if (sleep_flag == CAN_SLEEP)
  3508. msleep(1);
  3509. else
  3510. mdelay(1);
  3511. }
  3512. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3513. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3514. "assuming the HCB Address points to good F/W\n",
  3515. ioc->name));
  3516. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3517. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3518. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3519. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3520. "re-enable the HCDW\n", ioc->name));
  3521. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3522. &ioc->chip->HCBSize);
  3523. }
  3524. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3525. ioc->name));
  3526. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3527. &ioc->chip->HostDiagnostic);
  3528. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3529. "diagnostic register\n", ioc->name));
  3530. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3531. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3532. "READY state\n", ioc->name));
  3533. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3534. sleep_flag);
  3535. if (ioc_state) {
  3536. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3537. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3538. goto out;
  3539. }
  3540. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3541. return 0;
  3542. out:
  3543. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3544. return -EFAULT;
  3545. }
  3546. /**
  3547. * _base_make_ioc_ready - put controller in READY state
  3548. * @ioc: per adapter object
  3549. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3550. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3551. *
  3552. * Returns 0 for success, non-zero for failure.
  3553. */
  3554. static int
  3555. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3556. enum reset_type type)
  3557. {
  3558. u32 ioc_state;
  3559. int rc;
  3560. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3561. __func__));
  3562. if (ioc->pci_error_recovery)
  3563. return 0;
  3564. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3565. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3566. ioc->name, __func__, ioc_state));
  3567. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3568. return 0;
  3569. if (ioc_state & MPI2_DOORBELL_USED) {
  3570. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3571. "active!\n", ioc->name));
  3572. goto issue_diag_reset;
  3573. }
  3574. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3575. mpt2sas_base_fault_info(ioc, ioc_state &
  3576. MPI2_DOORBELL_DATA_MASK);
  3577. goto issue_diag_reset;
  3578. }
  3579. if (type == FORCE_BIG_HAMMER)
  3580. goto issue_diag_reset;
  3581. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3582. if (!(_base_send_ioc_reset(ioc,
  3583. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3584. ioc->ioc_reset_count++;
  3585. return 0;
  3586. }
  3587. issue_diag_reset:
  3588. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3589. ioc->ioc_reset_count++;
  3590. return rc;
  3591. }
  3592. /**
  3593. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3594. * @ioc: per adapter object
  3595. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3596. *
  3597. * Returns 0 for success, non-zero for failure.
  3598. */
  3599. static int
  3600. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3601. {
  3602. int r, i;
  3603. unsigned long flags;
  3604. u32 reply_address;
  3605. u16 smid;
  3606. struct _tr_list *delayed_tr, *delayed_tr_next;
  3607. u8 hide_flag;
  3608. struct adapter_reply_queue *reply_q;
  3609. long reply_post_free;
  3610. u32 reply_post_free_sz;
  3611. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3612. __func__));
  3613. /* clean the delayed target reset list */
  3614. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3615. &ioc->delayed_tr_list, list) {
  3616. list_del(&delayed_tr->list);
  3617. kfree(delayed_tr);
  3618. }
  3619. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3620. &ioc->delayed_tr_volume_list, list) {
  3621. list_del(&delayed_tr->list);
  3622. kfree(delayed_tr);
  3623. }
  3624. /* initialize the scsi lookup free list */
  3625. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3626. INIT_LIST_HEAD(&ioc->free_list);
  3627. smid = 1;
  3628. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3629. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3630. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3631. ioc->scsi_lookup[i].smid = smid;
  3632. ioc->scsi_lookup[i].scmd = NULL;
  3633. ioc->scsi_lookup[i].direct_io = 0;
  3634. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3635. &ioc->free_list);
  3636. }
  3637. /* hi-priority queue */
  3638. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3639. smid = ioc->hi_priority_smid;
  3640. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3641. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3642. ioc->hpr_lookup[i].smid = smid;
  3643. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3644. &ioc->hpr_free_list);
  3645. }
  3646. /* internal queue */
  3647. INIT_LIST_HEAD(&ioc->internal_free_list);
  3648. smid = ioc->internal_smid;
  3649. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3650. ioc->internal_lookup[i].cb_idx = 0xFF;
  3651. ioc->internal_lookup[i].smid = smid;
  3652. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3653. &ioc->internal_free_list);
  3654. }
  3655. /* chain pool */
  3656. INIT_LIST_HEAD(&ioc->free_chain_list);
  3657. for (i = 0; i < ioc->chain_depth; i++)
  3658. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3659. &ioc->free_chain_list);
  3660. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3661. /* initialize Reply Free Queue */
  3662. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3663. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3664. ioc->reply_sz)
  3665. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3666. /* initialize reply queues */
  3667. _base_assign_reply_queues(ioc);
  3668. /* initialize Reply Post Free Queue */
  3669. reply_post_free = (long)ioc->reply_post_free;
  3670. reply_post_free_sz = ioc->reply_post_queue_depth *
  3671. sizeof(Mpi2DefaultReplyDescriptor_t);
  3672. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3673. reply_q->reply_post_host_index = 0;
  3674. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3675. reply_post_free;
  3676. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3677. reply_q->reply_post_free[i].Words =
  3678. cpu_to_le64(ULLONG_MAX);
  3679. if (!_base_is_controller_msix_enabled(ioc))
  3680. goto skip_init_reply_post_free_queue;
  3681. reply_post_free += reply_post_free_sz;
  3682. }
  3683. skip_init_reply_post_free_queue:
  3684. r = _base_send_ioc_init(ioc, sleep_flag);
  3685. if (r)
  3686. return r;
  3687. /* initialize reply free host index */
  3688. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3689. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3690. /* initialize reply post host index */
  3691. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3692. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3693. &ioc->chip->ReplyPostHostIndex);
  3694. if (!_base_is_controller_msix_enabled(ioc))
  3695. goto skip_init_reply_post_host_index;
  3696. }
  3697. skip_init_reply_post_host_index:
  3698. _base_unmask_interrupts(ioc);
  3699. r = _base_event_notification(ioc, sleep_flag);
  3700. if (r)
  3701. return r;
  3702. if (sleep_flag == CAN_SLEEP)
  3703. _base_static_config_pages(ioc);
  3704. if (ioc->is_driver_loading) {
  3705. ioc->wait_for_discovery_to_complete =
  3706. _base_determine_wait_on_discovery(ioc);
  3707. return r; /* scan_start and scan_finished support */
  3708. }
  3709. if (ioc->wait_for_discovery_to_complete && ioc->is_warpdrive) {
  3710. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3711. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3712. MFG_PAGE10_HIDE_SSDS_MASK);
  3713. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3714. ioc->mfg_pg10_hide_flag = hide_flag;
  3715. }
  3716. }
  3717. r = _base_send_port_enable(ioc, sleep_flag);
  3718. if (r)
  3719. return r;
  3720. return r;
  3721. }
  3722. /**
  3723. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3724. * @ioc: per adapter object
  3725. *
  3726. * Return nothing.
  3727. */
  3728. void
  3729. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3730. {
  3731. struct pci_dev *pdev = ioc->pdev;
  3732. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3733. __func__));
  3734. _base_mask_interrupts(ioc);
  3735. ioc->shost_recovery = 1;
  3736. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3737. ioc->shost_recovery = 0;
  3738. _base_free_irq(ioc);
  3739. _base_disable_msix(ioc);
  3740. if (ioc->chip_phys)
  3741. iounmap(ioc->chip);
  3742. ioc->chip_phys = 0;
  3743. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3744. pci_disable_pcie_error_reporting(pdev);
  3745. pci_disable_device(pdev);
  3746. return;
  3747. }
  3748. /**
  3749. * mpt2sas_base_attach - attach controller instance
  3750. * @ioc: per adapter object
  3751. *
  3752. * Returns 0 for success, non-zero for failure.
  3753. */
  3754. int
  3755. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3756. {
  3757. int r, i;
  3758. int cpu_id, last_cpu_id = 0;
  3759. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3760. __func__));
  3761. /* setup cpu_msix_table */
  3762. ioc->cpu_count = num_online_cpus();
  3763. for_each_online_cpu(cpu_id)
  3764. last_cpu_id = cpu_id;
  3765. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3766. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3767. ioc->reply_queue_count = 1;
  3768. if (!ioc->cpu_msix_table) {
  3769. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3770. "cpu_msix_table failed!!!\n", ioc->name));
  3771. r = -ENOMEM;
  3772. goto out_free_resources;
  3773. }
  3774. if (ioc->is_warpdrive) {
  3775. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3776. sizeof(resource_size_t *), GFP_KERNEL);
  3777. if (!ioc->reply_post_host_index) {
  3778. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3779. "for cpu_msix_table failed!!!\n", ioc->name));
  3780. r = -ENOMEM;
  3781. goto out_free_resources;
  3782. }
  3783. }
  3784. r = mpt2sas_base_map_resources(ioc);
  3785. if (r)
  3786. goto out_free_resources;
  3787. if (ioc->is_warpdrive) {
  3788. ioc->reply_post_host_index[0] =
  3789. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3790. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3791. ioc->reply_post_host_index[i] = (resource_size_t *)
  3792. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3793. * 4)));
  3794. }
  3795. pci_set_drvdata(ioc->pdev, ioc->shost);
  3796. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3797. if (r)
  3798. goto out_free_resources;
  3799. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3800. if (r)
  3801. goto out_free_resources;
  3802. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3803. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3804. if (!ioc->pfacts) {
  3805. r = -ENOMEM;
  3806. goto out_free_resources;
  3807. }
  3808. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3809. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3810. if (r)
  3811. goto out_free_resources;
  3812. }
  3813. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3814. if (r)
  3815. goto out_free_resources;
  3816. init_waitqueue_head(&ioc->reset_wq);
  3817. /* allocate memory pd handle bitmask list */
  3818. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3819. if (ioc->facts.MaxDevHandle % 8)
  3820. ioc->pd_handles_sz++;
  3821. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3822. GFP_KERNEL);
  3823. if (!ioc->pd_handles) {
  3824. r = -ENOMEM;
  3825. goto out_free_resources;
  3826. }
  3827. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3828. /* base internal command bits */
  3829. mutex_init(&ioc->base_cmds.mutex);
  3830. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3831. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3832. /* port_enable command bits */
  3833. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3834. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3835. /* transport internal command bits */
  3836. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3837. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3838. mutex_init(&ioc->transport_cmds.mutex);
  3839. /* scsih internal command bits */
  3840. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3841. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3842. mutex_init(&ioc->scsih_cmds.mutex);
  3843. /* task management internal command bits */
  3844. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3845. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3846. mutex_init(&ioc->tm_cmds.mutex);
  3847. /* config page internal command bits */
  3848. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3849. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3850. mutex_init(&ioc->config_cmds.mutex);
  3851. /* ctl module internal command bits */
  3852. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3853. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3854. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3855. mutex_init(&ioc->ctl_cmds.mutex);
  3856. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3857. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3858. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3859. !ioc->ctl_cmds.sense) {
  3860. r = -ENOMEM;
  3861. goto out_free_resources;
  3862. }
  3863. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3864. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3865. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3866. r = -ENOMEM;
  3867. goto out_free_resources;
  3868. }
  3869. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3870. ioc->event_masks[i] = -1;
  3871. /* here we enable the events we care about */
  3872. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3873. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3874. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3875. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3876. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3877. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3878. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3879. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3880. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3881. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3882. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3883. if (r)
  3884. goto out_free_resources;
  3885. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3886. _base_update_missing_delay(ioc, missing_delay[0],
  3887. missing_delay[1]);
  3888. return 0;
  3889. out_free_resources:
  3890. ioc->remove_host = 1;
  3891. mpt2sas_base_free_resources(ioc);
  3892. _base_release_memory_pools(ioc);
  3893. pci_set_drvdata(ioc->pdev, NULL);
  3894. kfree(ioc->cpu_msix_table);
  3895. if (ioc->is_warpdrive)
  3896. kfree(ioc->reply_post_host_index);
  3897. kfree(ioc->pd_handles);
  3898. kfree(ioc->tm_cmds.reply);
  3899. kfree(ioc->transport_cmds.reply);
  3900. kfree(ioc->scsih_cmds.reply);
  3901. kfree(ioc->config_cmds.reply);
  3902. kfree(ioc->base_cmds.reply);
  3903. kfree(ioc->port_enable_cmds.reply);
  3904. kfree(ioc->ctl_cmds.reply);
  3905. kfree(ioc->ctl_cmds.sense);
  3906. kfree(ioc->pfacts);
  3907. ioc->ctl_cmds.reply = NULL;
  3908. ioc->base_cmds.reply = NULL;
  3909. ioc->tm_cmds.reply = NULL;
  3910. ioc->scsih_cmds.reply = NULL;
  3911. ioc->transport_cmds.reply = NULL;
  3912. ioc->config_cmds.reply = NULL;
  3913. ioc->pfacts = NULL;
  3914. return r;
  3915. }
  3916. /**
  3917. * mpt2sas_base_detach - remove controller instance
  3918. * @ioc: per adapter object
  3919. *
  3920. * Return nothing.
  3921. */
  3922. void
  3923. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3924. {
  3925. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3926. __func__));
  3927. mpt2sas_base_stop_watchdog(ioc);
  3928. mpt2sas_base_free_resources(ioc);
  3929. _base_release_memory_pools(ioc);
  3930. pci_set_drvdata(ioc->pdev, NULL);
  3931. kfree(ioc->cpu_msix_table);
  3932. if (ioc->is_warpdrive)
  3933. kfree(ioc->reply_post_host_index);
  3934. kfree(ioc->pd_handles);
  3935. kfree(ioc->pfacts);
  3936. kfree(ioc->ctl_cmds.reply);
  3937. kfree(ioc->ctl_cmds.sense);
  3938. kfree(ioc->base_cmds.reply);
  3939. kfree(ioc->port_enable_cmds.reply);
  3940. kfree(ioc->tm_cmds.reply);
  3941. kfree(ioc->transport_cmds.reply);
  3942. kfree(ioc->scsih_cmds.reply);
  3943. kfree(ioc->config_cmds.reply);
  3944. }
  3945. /**
  3946. * _base_reset_handler - reset callback handler (for base)
  3947. * @ioc: per adapter object
  3948. * @reset_phase: phase
  3949. *
  3950. * The handler for doing any required cleanup or initialization.
  3951. *
  3952. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3953. * MPT2_IOC_DONE_RESET
  3954. *
  3955. * Return nothing.
  3956. */
  3957. static void
  3958. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3959. {
  3960. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3961. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3962. switch (reset_phase) {
  3963. case MPT2_IOC_PRE_RESET:
  3964. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3965. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3966. break;
  3967. case MPT2_IOC_AFTER_RESET:
  3968. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3969. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3970. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3971. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3972. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3973. complete(&ioc->transport_cmds.done);
  3974. }
  3975. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3976. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3977. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3978. complete(&ioc->base_cmds.done);
  3979. }
  3980. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3981. ioc->port_enable_failed = 1;
  3982. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3983. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3984. if (ioc->is_driver_loading) {
  3985. ioc->start_scan_failed =
  3986. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3987. ioc->start_scan = 0;
  3988. ioc->port_enable_cmds.status =
  3989. MPT2_CMD_NOT_USED;
  3990. } else
  3991. complete(&ioc->port_enable_cmds.done);
  3992. }
  3993. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3994. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3995. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3996. ioc->config_cmds.smid = USHRT_MAX;
  3997. complete(&ioc->config_cmds.done);
  3998. }
  3999. break;
  4000. case MPT2_IOC_DONE_RESET:
  4001. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4002. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4003. break;
  4004. }
  4005. }
  4006. /**
  4007. * _wait_for_commands_to_complete - reset controller
  4008. * @ioc: Pointer to MPT_ADAPTER structure
  4009. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4010. *
  4011. * This function waiting(3s) for all pending commands to complete
  4012. * prior to putting controller in reset.
  4013. */
  4014. static void
  4015. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4016. {
  4017. u32 ioc_state;
  4018. unsigned long flags;
  4019. u16 i;
  4020. ioc->pending_io_count = 0;
  4021. if (sleep_flag != CAN_SLEEP)
  4022. return;
  4023. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4024. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4025. return;
  4026. /* pending command count */
  4027. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4028. for (i = 0; i < ioc->scsiio_depth; i++)
  4029. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4030. ioc->pending_io_count++;
  4031. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4032. if (!ioc->pending_io_count)
  4033. return;
  4034. /* wait for pending commands to complete */
  4035. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4036. }
  4037. /**
  4038. * mpt2sas_base_hard_reset_handler - reset controller
  4039. * @ioc: Pointer to MPT_ADAPTER structure
  4040. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4041. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4042. *
  4043. * Returns 0 for success, non-zero for failure.
  4044. */
  4045. int
  4046. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4047. enum reset_type type)
  4048. {
  4049. int r;
  4050. unsigned long flags;
  4051. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4052. __func__));
  4053. if (ioc->pci_error_recovery) {
  4054. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4055. ioc->name, __func__);
  4056. r = 0;
  4057. goto out;
  4058. }
  4059. if (mpt2sas_fwfault_debug)
  4060. mpt2sas_halt_firmware(ioc);
  4061. /* TODO - What we really should be doing is pulling
  4062. * out all the code associated with NO_SLEEP; its never used.
  4063. * That is legacy code from mpt fusion driver, ported over.
  4064. * I will leave this BUG_ON here for now till its been resolved.
  4065. */
  4066. BUG_ON(sleep_flag == NO_SLEEP);
  4067. /* wait for an active reset in progress to complete */
  4068. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4069. do {
  4070. ssleep(1);
  4071. } while (ioc->shost_recovery == 1);
  4072. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4073. __func__));
  4074. return ioc->ioc_reset_in_progress_status;
  4075. }
  4076. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4077. ioc->shost_recovery = 1;
  4078. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4079. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4080. _wait_for_commands_to_complete(ioc, sleep_flag);
  4081. _base_mask_interrupts(ioc);
  4082. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4083. if (r)
  4084. goto out;
  4085. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4086. /* If this hard reset is called while port enable is active, then
  4087. * there is no reason to call make_ioc_operational
  4088. */
  4089. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4090. ioc->remove_host = 1;
  4091. r = -EFAULT;
  4092. goto out;
  4093. }
  4094. r = _base_make_ioc_operational(ioc, sleep_flag);
  4095. if (!r)
  4096. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4097. out:
  4098. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4099. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4101. ioc->ioc_reset_in_progress_status = r;
  4102. ioc->shost_recovery = 0;
  4103. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4104. mutex_unlock(&ioc->reset_in_progress_mutex);
  4105. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4106. __func__));
  4107. return r;
  4108. }