intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_enable_lvds(struct intel_encoder *encoder)
  64. {
  65. struct drm_device *dev = encoder->base.dev;
  66. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  67. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  68. struct drm_i915_private *dev_priv = dev->dev_private;
  69. u32 ctl_reg, lvds_reg, stat_reg;
  70. if (HAS_PCH_SPLIT(dev)) {
  71. ctl_reg = PCH_PP_CONTROL;
  72. lvds_reg = PCH_LVDS;
  73. stat_reg = PCH_PP_STATUS;
  74. } else {
  75. ctl_reg = PP_CONTROL;
  76. lvds_reg = LVDS;
  77. stat_reg = PP_STATUS;
  78. }
  79. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  80. if (intel_lvds->pfit_dirty) {
  81. /*
  82. * Enable automatic panel scaling so that non-native modes
  83. * fill the screen. The panel fitter should only be
  84. * adjusted whilst the pipe is disabled, according to
  85. * register description and PRM.
  86. */
  87. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  88. intel_lvds->pfit_control,
  89. intel_lvds->pfit_pgm_ratios);
  90. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  91. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  92. intel_lvds->pfit_dirty = false;
  93. }
  94. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  95. POSTING_READ(lvds_reg);
  96. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  97. DRM_ERROR("timed out waiting for panel to power on\n");
  98. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  99. }
  100. static void intel_disable_lvds(struct intel_encoder *encoder)
  101. {
  102. struct drm_device *dev = encoder->base.dev;
  103. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  104. struct drm_i915_private *dev_priv = dev->dev_private;
  105. u32 ctl_reg, lvds_reg, stat_reg;
  106. if (HAS_PCH_SPLIT(dev)) {
  107. ctl_reg = PCH_PP_CONTROL;
  108. lvds_reg = PCH_LVDS;
  109. stat_reg = PCH_PP_STATUS;
  110. } else {
  111. ctl_reg = PP_CONTROL;
  112. lvds_reg = LVDS;
  113. stat_reg = PP_STATUS;
  114. }
  115. intel_panel_disable_backlight(dev);
  116. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  117. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  118. DRM_ERROR("timed out waiting for panel to power off\n");
  119. if (intel_lvds->pfit_control) {
  120. I915_WRITE(PFIT_CONTROL, 0);
  121. intel_lvds->pfit_dirty = true;
  122. }
  123. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  124. POSTING_READ(lvds_reg);
  125. }
  126. static int intel_lvds_mode_valid(struct drm_connector *connector,
  127. struct drm_display_mode *mode)
  128. {
  129. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  130. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  131. if (mode->hdisplay > fixed_mode->hdisplay)
  132. return MODE_PANEL;
  133. if (mode->vdisplay > fixed_mode->vdisplay)
  134. return MODE_PANEL;
  135. return MODE_OK;
  136. }
  137. static void
  138. centre_horizontally(struct drm_display_mode *mode,
  139. int width)
  140. {
  141. u32 border, sync_pos, blank_width, sync_width;
  142. /* keep the hsync and hblank widths constant */
  143. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  144. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  145. sync_pos = (blank_width - sync_width + 1) / 2;
  146. border = (mode->hdisplay - width + 1) / 2;
  147. border += border & 1; /* make the border even */
  148. mode->crtc_hdisplay = width;
  149. mode->crtc_hblank_start = width + border;
  150. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  151. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  152. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  153. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  154. }
  155. static void
  156. centre_vertically(struct drm_display_mode *mode,
  157. int height)
  158. {
  159. u32 border, sync_pos, blank_width, sync_width;
  160. /* keep the vsync and vblank widths constant */
  161. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  162. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  163. sync_pos = (blank_width - sync_width + 1) / 2;
  164. border = (mode->vdisplay - height + 1) / 2;
  165. mode->crtc_vdisplay = height;
  166. mode->crtc_vblank_start = height + border;
  167. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  168. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  169. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  170. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  171. }
  172. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  173. {
  174. /*
  175. * Floating point operation is not supported. So the FACTOR
  176. * is defined, which can avoid the floating point computation
  177. * when calculating the panel ratio.
  178. */
  179. #define ACCURACY 12
  180. #define FACTOR (1 << ACCURACY)
  181. u32 ratio = source * FACTOR / target;
  182. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  183. }
  184. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  185. const struct drm_display_mode *mode,
  186. struct drm_display_mode *adjusted_mode)
  187. {
  188. struct drm_device *dev = encoder->dev;
  189. struct drm_i915_private *dev_priv = dev->dev_private;
  190. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  191. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  192. struct intel_encoder *tmp_encoder;
  193. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  194. int pipe;
  195. /* Should never happen!! */
  196. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  197. DRM_ERROR("Can't support LVDS on pipe A\n");
  198. return false;
  199. }
  200. /* Should never happen!! */
  201. for_each_encoder_on_crtc(dev, encoder->crtc, tmp_encoder) {
  202. if (&tmp_encoder->base != encoder) {
  203. DRM_ERROR("Can't enable LVDS and another "
  204. "encoder on the same pipe\n");
  205. return false;
  206. }
  207. }
  208. /*
  209. * We have timings from the BIOS for the panel, put them in
  210. * to the adjusted mode. The CRTC will be set up for this mode,
  211. * with the panel scaling set up to source from the H/VDisplay
  212. * of the original mode.
  213. */
  214. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  215. if (HAS_PCH_SPLIT(dev)) {
  216. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  217. mode, adjusted_mode);
  218. return true;
  219. }
  220. /* Native modes don't need fitting */
  221. if (adjusted_mode->hdisplay == mode->hdisplay &&
  222. adjusted_mode->vdisplay == mode->vdisplay)
  223. goto out;
  224. /* 965+ wants fuzzy fitting */
  225. if (INTEL_INFO(dev)->gen >= 4)
  226. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  227. PFIT_FILTER_FUZZY);
  228. /*
  229. * Enable automatic panel scaling for non-native modes so that they fill
  230. * the screen. Should be enabled before the pipe is enabled, according
  231. * to register description and PRM.
  232. * Change the value here to see the borders for debugging
  233. */
  234. for_each_pipe(pipe)
  235. I915_WRITE(BCLRPAT(pipe), 0);
  236. drm_mode_set_crtcinfo(adjusted_mode, 0);
  237. switch (intel_lvds->fitting_mode) {
  238. case DRM_MODE_SCALE_CENTER:
  239. /*
  240. * For centered modes, we have to calculate border widths &
  241. * heights and modify the values programmed into the CRTC.
  242. */
  243. centre_horizontally(adjusted_mode, mode->hdisplay);
  244. centre_vertically(adjusted_mode, mode->vdisplay);
  245. border = LVDS_BORDER_ENABLE;
  246. break;
  247. case DRM_MODE_SCALE_ASPECT:
  248. /* Scale but preserve the aspect ratio */
  249. if (INTEL_INFO(dev)->gen >= 4) {
  250. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  251. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  252. /* 965+ is easy, it does everything in hw */
  253. if (scaled_width > scaled_height)
  254. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  255. else if (scaled_width < scaled_height)
  256. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  257. else if (adjusted_mode->hdisplay != mode->hdisplay)
  258. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  259. } else {
  260. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  261. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  262. /*
  263. * For earlier chips we have to calculate the scaling
  264. * ratio by hand and program it into the
  265. * PFIT_PGM_RATIO register
  266. */
  267. if (scaled_width > scaled_height) { /* pillar */
  268. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  269. border = LVDS_BORDER_ENABLE;
  270. if (mode->vdisplay != adjusted_mode->vdisplay) {
  271. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  272. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  273. bits << PFIT_VERT_SCALE_SHIFT);
  274. pfit_control |= (PFIT_ENABLE |
  275. VERT_INTERP_BILINEAR |
  276. HORIZ_INTERP_BILINEAR);
  277. }
  278. } else if (scaled_width < scaled_height) { /* letter */
  279. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  280. border = LVDS_BORDER_ENABLE;
  281. if (mode->hdisplay != adjusted_mode->hdisplay) {
  282. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  283. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  284. bits << PFIT_VERT_SCALE_SHIFT);
  285. pfit_control |= (PFIT_ENABLE |
  286. VERT_INTERP_BILINEAR |
  287. HORIZ_INTERP_BILINEAR);
  288. }
  289. } else
  290. /* Aspects match, Let hw scale both directions */
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  293. VERT_INTERP_BILINEAR |
  294. HORIZ_INTERP_BILINEAR);
  295. }
  296. break;
  297. case DRM_MODE_SCALE_FULLSCREEN:
  298. /*
  299. * Full scaling, even if it changes the aspect ratio.
  300. * Fortunately this is all done for us in hw.
  301. */
  302. if (mode->vdisplay != adjusted_mode->vdisplay ||
  303. mode->hdisplay != adjusted_mode->hdisplay) {
  304. pfit_control |= PFIT_ENABLE;
  305. if (INTEL_INFO(dev)->gen >= 4)
  306. pfit_control |= PFIT_SCALING_AUTO;
  307. else
  308. pfit_control |= (VERT_AUTO_SCALE |
  309. VERT_INTERP_BILINEAR |
  310. HORIZ_AUTO_SCALE |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. default:
  315. break;
  316. }
  317. out:
  318. /* If not enabling scaling, be consistent and always use 0. */
  319. if ((pfit_control & PFIT_ENABLE) == 0) {
  320. pfit_control = 0;
  321. pfit_pgm_ratios = 0;
  322. }
  323. /* Make sure pre-965 set dither correctly */
  324. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  325. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  326. if (pfit_control != intel_lvds->pfit_control ||
  327. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  328. intel_lvds->pfit_control = pfit_control;
  329. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  330. intel_lvds->pfit_dirty = true;
  331. }
  332. dev_priv->lvds_border_bits = border;
  333. /*
  334. * XXX: It would be nice to support lower refresh rates on the
  335. * panels to reduce power consumption, and perhaps match the
  336. * user's requested refresh rate.
  337. */
  338. return true;
  339. }
  340. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  341. struct drm_display_mode *mode,
  342. struct drm_display_mode *adjusted_mode)
  343. {
  344. /*
  345. * The LVDS pin pair will already have been turned on in the
  346. * intel_crtc_mode_set since it has a large impact on the DPLL
  347. * settings.
  348. */
  349. }
  350. /**
  351. * Detect the LVDS connection.
  352. *
  353. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  354. * connected and closed means disconnected. We also send hotplug events as
  355. * needed, using lid status notification from the input layer.
  356. */
  357. static enum drm_connector_status
  358. intel_lvds_detect(struct drm_connector *connector, bool force)
  359. {
  360. struct drm_device *dev = connector->dev;
  361. enum drm_connector_status status;
  362. status = intel_panel_detect(dev);
  363. if (status != connector_status_unknown)
  364. return status;
  365. return connector_status_connected;
  366. }
  367. /**
  368. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  369. */
  370. static int intel_lvds_get_modes(struct drm_connector *connector)
  371. {
  372. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  373. struct drm_device *dev = connector->dev;
  374. struct drm_display_mode *mode;
  375. if (intel_lvds->edid)
  376. return drm_add_edid_modes(connector, intel_lvds->edid);
  377. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  378. if (mode == NULL)
  379. return 0;
  380. drm_mode_probed_add(connector, mode);
  381. return 1;
  382. }
  383. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  384. {
  385. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  386. return 1;
  387. }
  388. /* The GPU hangs up on these systems if modeset is performed on LID open */
  389. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  390. {
  391. .callback = intel_no_modeset_on_lid_dmi_callback,
  392. .ident = "Toshiba Tecra A11",
  393. .matches = {
  394. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  395. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  396. },
  397. },
  398. { } /* terminating entry */
  399. };
  400. /*
  401. * Lid events. Note the use of 'modeset_on_lid':
  402. * - we set it on lid close, and reset it on open
  403. * - we use it as a "only once" bit (ie we ignore
  404. * duplicate events where it was already properly
  405. * set/reset)
  406. * - the suspend/resume paths will also set it to
  407. * zero, since they restore the mode ("lid open").
  408. */
  409. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  410. void *unused)
  411. {
  412. struct drm_i915_private *dev_priv =
  413. container_of(nb, struct drm_i915_private, lid_notifier);
  414. struct drm_device *dev = dev_priv->dev;
  415. struct drm_connector *connector = dev_priv->int_lvds_connector;
  416. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  417. return NOTIFY_OK;
  418. /*
  419. * check and update the status of LVDS connector after receiving
  420. * the LID nofication event.
  421. */
  422. if (connector)
  423. connector->status = connector->funcs->detect(connector,
  424. false);
  425. /* Don't force modeset on machines where it causes a GPU lockup */
  426. if (dmi_check_system(intel_no_modeset_on_lid))
  427. return NOTIFY_OK;
  428. if (!acpi_lid_open()) {
  429. dev_priv->modeset_on_lid = 1;
  430. return NOTIFY_OK;
  431. }
  432. if (!dev_priv->modeset_on_lid)
  433. return NOTIFY_OK;
  434. dev_priv->modeset_on_lid = 0;
  435. mutex_lock(&dev->mode_config.mutex);
  436. drm_helper_resume_force_mode(dev);
  437. mutex_unlock(&dev->mode_config.mutex);
  438. return NOTIFY_OK;
  439. }
  440. /**
  441. * intel_lvds_destroy - unregister and free LVDS structures
  442. * @connector: connector to free
  443. *
  444. * Unregister the DDC bus for this connector then free the driver private
  445. * structure.
  446. */
  447. static void intel_lvds_destroy(struct drm_connector *connector)
  448. {
  449. struct drm_device *dev = connector->dev;
  450. struct drm_i915_private *dev_priv = dev->dev_private;
  451. intel_panel_destroy_backlight(dev);
  452. if (dev_priv->lid_notifier.notifier_call)
  453. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  454. drm_sysfs_connector_remove(connector);
  455. drm_connector_cleanup(connector);
  456. kfree(connector);
  457. }
  458. static int intel_lvds_set_property(struct drm_connector *connector,
  459. struct drm_property *property,
  460. uint64_t value)
  461. {
  462. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  463. struct drm_device *dev = connector->dev;
  464. if (property == dev->mode_config.scaling_mode_property) {
  465. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  466. if (value == DRM_MODE_SCALE_NONE) {
  467. DRM_DEBUG_KMS("no scaling not supported\n");
  468. return -EINVAL;
  469. }
  470. if (intel_lvds->fitting_mode == value) {
  471. /* the LVDS scaling property is not changed */
  472. return 0;
  473. }
  474. intel_lvds->fitting_mode = value;
  475. if (crtc && crtc->enabled) {
  476. /*
  477. * If the CRTC is enabled, the display will be changed
  478. * according to the new panel fitting mode.
  479. */
  480. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  481. crtc->x, crtc->y, crtc->fb);
  482. }
  483. }
  484. return 0;
  485. }
  486. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  487. .mode_fixup = intel_lvds_mode_fixup,
  488. .prepare = intel_encoder_noop,
  489. .mode_set = intel_lvds_mode_set,
  490. .commit = intel_encoder_noop,
  491. .disable = intel_encoder_disable,
  492. };
  493. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  494. .get_modes = intel_lvds_get_modes,
  495. .mode_valid = intel_lvds_mode_valid,
  496. .best_encoder = intel_best_encoder,
  497. };
  498. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  499. .dpms = intel_connector_dpms,
  500. .detect = intel_lvds_detect,
  501. .fill_modes = drm_helper_probe_single_connector_modes,
  502. .set_property = intel_lvds_set_property,
  503. .destroy = intel_lvds_destroy,
  504. };
  505. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  506. .destroy = intel_encoder_destroy,
  507. };
  508. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  509. {
  510. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  511. return 1;
  512. }
  513. /* These systems claim to have LVDS, but really don't */
  514. static const struct dmi_system_id intel_no_lvds[] = {
  515. {
  516. .callback = intel_no_lvds_dmi_callback,
  517. .ident = "Apple Mac Mini (Core series)",
  518. .matches = {
  519. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  520. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  521. },
  522. },
  523. {
  524. .callback = intel_no_lvds_dmi_callback,
  525. .ident = "Apple Mac Mini (Core 2 series)",
  526. .matches = {
  527. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  528. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  529. },
  530. },
  531. {
  532. .callback = intel_no_lvds_dmi_callback,
  533. .ident = "MSI IM-945GSE-A",
  534. .matches = {
  535. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  536. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  537. },
  538. },
  539. {
  540. .callback = intel_no_lvds_dmi_callback,
  541. .ident = "Dell Studio Hybrid",
  542. .matches = {
  543. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  544. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  545. },
  546. },
  547. {
  548. .callback = intel_no_lvds_dmi_callback,
  549. .ident = "Dell OptiPlex FX170",
  550. .matches = {
  551. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  552. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  553. },
  554. },
  555. {
  556. .callback = intel_no_lvds_dmi_callback,
  557. .ident = "AOpen Mini PC",
  558. .matches = {
  559. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  560. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  561. },
  562. },
  563. {
  564. .callback = intel_no_lvds_dmi_callback,
  565. .ident = "AOpen Mini PC MP915",
  566. .matches = {
  567. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  568. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  569. },
  570. },
  571. {
  572. .callback = intel_no_lvds_dmi_callback,
  573. .ident = "AOpen i915GMm-HFS",
  574. .matches = {
  575. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  576. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  577. },
  578. },
  579. {
  580. .callback = intel_no_lvds_dmi_callback,
  581. .ident = "AOpen i45GMx-I",
  582. .matches = {
  583. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  584. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  585. },
  586. },
  587. {
  588. .callback = intel_no_lvds_dmi_callback,
  589. .ident = "Aopen i945GTt-VFA",
  590. .matches = {
  591. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  592. },
  593. },
  594. {
  595. .callback = intel_no_lvds_dmi_callback,
  596. .ident = "Clientron U800",
  597. .matches = {
  598. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  599. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  600. },
  601. },
  602. {
  603. .callback = intel_no_lvds_dmi_callback,
  604. .ident = "Clientron E830",
  605. .matches = {
  606. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  607. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  608. },
  609. },
  610. {
  611. .callback = intel_no_lvds_dmi_callback,
  612. .ident = "Asus EeeBox PC EB1007",
  613. .matches = {
  614. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  615. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  616. },
  617. },
  618. {
  619. .callback = intel_no_lvds_dmi_callback,
  620. .ident = "Asus AT5NM10T-I",
  621. .matches = {
  622. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  623. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  624. },
  625. },
  626. {
  627. .callback = intel_no_lvds_dmi_callback,
  628. .ident = "Hewlett-Packard HP t5740e Thin Client",
  629. .matches = {
  630. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  631. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  632. },
  633. },
  634. {
  635. .callback = intel_no_lvds_dmi_callback,
  636. .ident = "Hewlett-Packard t5745",
  637. .matches = {
  638. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  639. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  640. },
  641. },
  642. {
  643. .callback = intel_no_lvds_dmi_callback,
  644. .ident = "Hewlett-Packard st5747",
  645. .matches = {
  646. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  647. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  648. },
  649. },
  650. {
  651. .callback = intel_no_lvds_dmi_callback,
  652. .ident = "MSI Wind Box DC500",
  653. .matches = {
  654. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  655. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  656. },
  657. },
  658. {
  659. .callback = intel_no_lvds_dmi_callback,
  660. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  661. .matches = {
  662. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  663. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  664. },
  665. },
  666. { } /* terminating entry */
  667. };
  668. /**
  669. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  670. * @dev: drm device
  671. * @connector: LVDS connector
  672. *
  673. * Find the reduced downclock for LVDS in EDID.
  674. */
  675. static void intel_find_lvds_downclock(struct drm_device *dev,
  676. struct drm_display_mode *fixed_mode,
  677. struct drm_connector *connector)
  678. {
  679. struct drm_i915_private *dev_priv = dev->dev_private;
  680. struct drm_display_mode *scan;
  681. int temp_downclock;
  682. temp_downclock = fixed_mode->clock;
  683. list_for_each_entry(scan, &connector->probed_modes, head) {
  684. /*
  685. * If one mode has the same resolution with the fixed_panel
  686. * mode while they have the different refresh rate, it means
  687. * that the reduced downclock is found for the LVDS. In such
  688. * case we can set the different FPx0/1 to dynamically select
  689. * between low and high frequency.
  690. */
  691. if (scan->hdisplay == fixed_mode->hdisplay &&
  692. scan->hsync_start == fixed_mode->hsync_start &&
  693. scan->hsync_end == fixed_mode->hsync_end &&
  694. scan->htotal == fixed_mode->htotal &&
  695. scan->vdisplay == fixed_mode->vdisplay &&
  696. scan->vsync_start == fixed_mode->vsync_start &&
  697. scan->vsync_end == fixed_mode->vsync_end &&
  698. scan->vtotal == fixed_mode->vtotal) {
  699. if (scan->clock < temp_downclock) {
  700. /*
  701. * The downclock is already found. But we
  702. * expect to find the lower downclock.
  703. */
  704. temp_downclock = scan->clock;
  705. }
  706. }
  707. }
  708. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  709. /* We found the downclock for LVDS. */
  710. dev_priv->lvds_downclock_avail = 1;
  711. dev_priv->lvds_downclock = temp_downclock;
  712. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  713. "Normal clock %dKhz, downclock %dKhz\n",
  714. fixed_mode->clock, temp_downclock);
  715. }
  716. }
  717. /*
  718. * Enumerate the child dev array parsed from VBT to check whether
  719. * the LVDS is present.
  720. * If it is present, return 1.
  721. * If it is not present, return false.
  722. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  723. */
  724. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  725. u8 *i2c_pin)
  726. {
  727. struct drm_i915_private *dev_priv = dev->dev_private;
  728. int i;
  729. if (!dev_priv->child_dev_num)
  730. return true;
  731. for (i = 0; i < dev_priv->child_dev_num; i++) {
  732. struct child_device_config *child = dev_priv->child_dev + i;
  733. /* If the device type is not LFP, continue.
  734. * We have to check both the new identifiers as well as the
  735. * old for compatibility with some BIOSes.
  736. */
  737. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  738. child->device_type != DEVICE_TYPE_LFP)
  739. continue;
  740. if (intel_gmbus_is_port_valid(child->i2c_pin))
  741. *i2c_pin = child->i2c_pin;
  742. /* However, we cannot trust the BIOS writers to populate
  743. * the VBT correctly. Since LVDS requires additional
  744. * information from AIM blocks, a non-zero addin offset is
  745. * a good indicator that the LVDS is actually present.
  746. */
  747. if (child->addin_offset)
  748. return true;
  749. /* But even then some BIOS writers perform some black magic
  750. * and instantiate the device without reference to any
  751. * additional data. Trust that if the VBT was written into
  752. * the OpRegion then they have validated the LVDS's existence.
  753. */
  754. if (dev_priv->opregion.vbt)
  755. return true;
  756. }
  757. return false;
  758. }
  759. static bool intel_lvds_supported(struct drm_device *dev)
  760. {
  761. /* With the introduction of the PCH we gained a dedicated
  762. * LVDS presence pin, use it. */
  763. if (HAS_PCH_SPLIT(dev))
  764. return true;
  765. /* Otherwise LVDS was only attached to mobile products,
  766. * except for the inglorious 830gm */
  767. return IS_MOBILE(dev) && !IS_I830(dev);
  768. }
  769. /**
  770. * intel_lvds_init - setup LVDS connectors on this device
  771. * @dev: drm device
  772. *
  773. * Create the connector, register the LVDS DDC bus, and try to figure out what
  774. * modes we can display on the LVDS panel (if present).
  775. */
  776. bool intel_lvds_init(struct drm_device *dev)
  777. {
  778. struct drm_i915_private *dev_priv = dev->dev_private;
  779. struct intel_lvds *intel_lvds;
  780. struct intel_encoder *intel_encoder;
  781. struct intel_connector *intel_connector;
  782. struct drm_connector *connector;
  783. struct drm_encoder *encoder;
  784. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  785. struct drm_crtc *crtc;
  786. u32 lvds;
  787. int pipe;
  788. u8 pin;
  789. if (!intel_lvds_supported(dev))
  790. return false;
  791. /* Skip init on machines we know falsely report LVDS */
  792. if (dmi_check_system(intel_no_lvds))
  793. return false;
  794. pin = GMBUS_PORT_PANEL;
  795. if (!lvds_is_present_in_vbt(dev, &pin)) {
  796. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  797. return false;
  798. }
  799. if (HAS_PCH_SPLIT(dev)) {
  800. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  801. return false;
  802. if (dev_priv->edp.support) {
  803. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  804. return false;
  805. }
  806. }
  807. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  808. if (!intel_lvds) {
  809. return false;
  810. }
  811. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  812. if (!intel_connector) {
  813. kfree(intel_lvds);
  814. return false;
  815. }
  816. if (!HAS_PCH_SPLIT(dev)) {
  817. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  818. }
  819. intel_encoder = &intel_lvds->base;
  820. encoder = &intel_encoder->base;
  821. connector = &intel_connector->base;
  822. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  823. DRM_MODE_CONNECTOR_LVDS);
  824. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  825. DRM_MODE_ENCODER_LVDS);
  826. intel_encoder->enable = intel_enable_lvds;
  827. intel_encoder->disable = intel_disable_lvds;
  828. intel_connector_attach_encoder(intel_connector, intel_encoder);
  829. intel_encoder->type = INTEL_OUTPUT_LVDS;
  830. intel_encoder->cloneable = false;
  831. if (HAS_PCH_SPLIT(dev))
  832. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  833. else if (IS_GEN4(dev))
  834. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  835. else
  836. intel_encoder->crtc_mask = (1 << 1);
  837. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  838. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  839. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  840. connector->interlace_allowed = false;
  841. connector->doublescan_allowed = false;
  842. /* create the scaling mode property */
  843. drm_mode_create_scaling_mode_property(dev);
  844. /*
  845. * the initial panel fitting mode will be FULL_SCREEN.
  846. */
  847. drm_connector_attach_property(&intel_connector->base,
  848. dev->mode_config.scaling_mode_property,
  849. DRM_MODE_SCALE_ASPECT);
  850. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  851. /*
  852. * LVDS discovery:
  853. * 1) check for EDID on DDC
  854. * 2) check for VBT data
  855. * 3) check to see if LVDS is already on
  856. * if none of the above, no panel
  857. * 4) make sure lid is open
  858. * if closed, act like it's not there for now
  859. */
  860. /*
  861. * Attempt to get the fixed panel mode from DDC. Assume that the
  862. * preferred mode is the right one.
  863. */
  864. intel_lvds->edid = drm_get_edid(connector,
  865. intel_gmbus_get_adapter(dev_priv,
  866. pin));
  867. if (intel_lvds->edid) {
  868. if (drm_add_edid_modes(connector,
  869. intel_lvds->edid)) {
  870. drm_mode_connector_update_edid_property(connector,
  871. intel_lvds->edid);
  872. } else {
  873. kfree(intel_lvds->edid);
  874. intel_lvds->edid = NULL;
  875. }
  876. }
  877. if (!intel_lvds->edid) {
  878. /* Didn't get an EDID, so
  879. * Set wide sync ranges so we get all modes
  880. * handed to valid_mode for checking
  881. */
  882. connector->display_info.min_vfreq = 0;
  883. connector->display_info.max_vfreq = 200;
  884. connector->display_info.min_hfreq = 0;
  885. connector->display_info.max_hfreq = 200;
  886. }
  887. list_for_each_entry(scan, &connector->probed_modes, head) {
  888. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  889. intel_lvds->fixed_mode =
  890. drm_mode_duplicate(dev, scan);
  891. intel_find_lvds_downclock(dev,
  892. intel_lvds->fixed_mode,
  893. connector);
  894. goto out;
  895. }
  896. }
  897. /* Failed to get EDID, what about VBT? */
  898. if (dev_priv->lfp_lvds_vbt_mode) {
  899. intel_lvds->fixed_mode =
  900. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  901. if (intel_lvds->fixed_mode) {
  902. intel_lvds->fixed_mode->type |=
  903. DRM_MODE_TYPE_PREFERRED;
  904. goto out;
  905. }
  906. }
  907. /*
  908. * If we didn't get EDID, try checking if the panel is already turned
  909. * on. If so, assume that whatever is currently programmed is the
  910. * correct mode.
  911. */
  912. /* Ironlake: FIXME if still fail, not try pipe mode now */
  913. if (HAS_PCH_SPLIT(dev))
  914. goto failed;
  915. lvds = I915_READ(LVDS);
  916. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  917. crtc = intel_get_crtc_for_pipe(dev, pipe);
  918. if (crtc && (lvds & LVDS_PORT_EN)) {
  919. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  920. if (intel_lvds->fixed_mode) {
  921. intel_lvds->fixed_mode->type |=
  922. DRM_MODE_TYPE_PREFERRED;
  923. goto out;
  924. }
  925. }
  926. /* If we still don't have a mode after all that, give up. */
  927. if (!intel_lvds->fixed_mode)
  928. goto failed;
  929. out:
  930. /*
  931. * Unlock registers and just
  932. * leave them unlocked
  933. */
  934. if (HAS_PCH_SPLIT(dev)) {
  935. I915_WRITE(PCH_PP_CONTROL,
  936. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  937. } else {
  938. I915_WRITE(PP_CONTROL,
  939. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  940. }
  941. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  942. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  943. DRM_DEBUG_KMS("lid notifier registration failed\n");
  944. dev_priv->lid_notifier.notifier_call = NULL;
  945. }
  946. /* keep the LVDS connector */
  947. dev_priv->int_lvds_connector = connector;
  948. drm_sysfs_connector_add(connector);
  949. intel_panel_setup_backlight(dev);
  950. return true;
  951. failed:
  952. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  953. drm_connector_cleanup(connector);
  954. drm_encoder_cleanup(encoder);
  955. kfree(intel_lvds);
  956. kfree(intel_connector);
  957. return false;
  958. }