dw_apb_timer_of.c 4.0 KB

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  1. /*
  2. * Copyright (C) 2012 Altera Corporation
  3. * Copyright (c) 2011 Picochip Ltd., Jamie Iles
  4. *
  5. * Modified from mach-picoxcell/time.c
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/dw_apb_timer.h>
  20. #include <linux/of.h>
  21. #include <linux/of_address.h>
  22. #include <linux/of_irq.h>
  23. #include <linux/clk.h>
  24. #include <asm/mach/time.h>
  25. #include <asm/sched_clock.h>
  26. static void timer_get_base_and_rate(struct device_node *np,
  27. void __iomem **base, u32 *rate)
  28. {
  29. struct clk *timer_clk;
  30. struct clk *pclk;
  31. *base = of_iomap(np, 0);
  32. if (!*base)
  33. panic("Unable to map regs for %s", np->name);
  34. /*
  35. * Not all implementations use a periphal clock, so don't panic
  36. * if it's not present
  37. */
  38. pclk = of_clk_get_by_name(np, "pclk");
  39. if (!IS_ERR(pclk))
  40. if (clk_prepare_enable(pclk))
  41. pr_warn("pclk for %s is present, but could not be activated\n",
  42. np->name);
  43. timer_clk = of_clk_get_by_name(np, "timer");
  44. if (IS_ERR(timer_clk))
  45. goto try_clock_freq;
  46. if (!clk_prepare_enable(timer_clk)) {
  47. *rate = clk_get_rate(timer_clk);
  48. return;
  49. }
  50. try_clock_freq:
  51. if (of_property_read_u32(np, "clock-freq", rate) &&
  52. of_property_read_u32(np, "clock-frequency", rate))
  53. panic("No clock nor clock-frequency property for %s", np->name);
  54. }
  55. static void add_clockevent(struct device_node *event_timer)
  56. {
  57. void __iomem *iobase;
  58. struct dw_apb_clock_event_device *ced;
  59. u32 irq, rate;
  60. irq = irq_of_parse_and_map(event_timer, 0);
  61. if (irq == NO_IRQ)
  62. panic("No IRQ for clock event timer");
  63. timer_get_base_and_rate(event_timer, &iobase, &rate);
  64. ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
  65. rate);
  66. if (!ced)
  67. panic("Unable to initialise clockevent device");
  68. dw_apb_clockevent_register(ced);
  69. }
  70. static void __iomem *sched_io_base;
  71. static u32 sched_rate;
  72. static void add_clocksource(struct device_node *source_timer)
  73. {
  74. void __iomem *iobase;
  75. struct dw_apb_clocksource *cs;
  76. u32 rate;
  77. timer_get_base_and_rate(source_timer, &iobase, &rate);
  78. cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
  79. if (!cs)
  80. panic("Unable to initialise clocksource device");
  81. dw_apb_clocksource_start(cs);
  82. dw_apb_clocksource_register(cs);
  83. /*
  84. * Fallback to use the clocksource as sched_clock if no separate
  85. * timer is found. sched_io_base then points to the current_value
  86. * register of the clocksource timer.
  87. */
  88. sched_io_base = iobase + 0x04;
  89. sched_rate = rate;
  90. }
  91. static u32 read_sched_clock(void)
  92. {
  93. return __raw_readl(sched_io_base);
  94. }
  95. static const struct of_device_id sptimer_ids[] __initconst = {
  96. { .compatible = "picochip,pc3x2-rtc" },
  97. { .compatible = "snps,dw-apb-timer-sp" },
  98. { /* Sentinel */ },
  99. };
  100. static void init_sched_clock(void)
  101. {
  102. struct device_node *sched_timer;
  103. sched_timer = of_find_matching_node(NULL, sptimer_ids);
  104. if (sched_timer) {
  105. timer_get_base_and_rate(sched_timer, &sched_io_base,
  106. &sched_rate);
  107. of_node_put(sched_timer);
  108. }
  109. setup_sched_clock(read_sched_clock, 32, sched_rate);
  110. }
  111. static int num_called;
  112. static void __init dw_apb_timer_init(struct device_node *timer)
  113. {
  114. switch (num_called) {
  115. case 0:
  116. pr_debug("%s: found clockevent timer\n", __func__);
  117. add_clockevent(timer);
  118. of_node_put(timer);
  119. break;
  120. case 1:
  121. pr_debug("%s: found clocksource timer\n", __func__);
  122. add_clocksource(timer);
  123. of_node_put(timer);
  124. init_sched_clock();
  125. break;
  126. default:
  127. break;
  128. }
  129. num_called++;
  130. }
  131. CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
  132. CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer-osc", dw_apb_timer_init);