mwl8k.c 99 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Register definitions */
  30. #define MWL8K_HIU_GEN_PTR 0x00000c10
  31. #define MWL8K_MODE_STA 0x0000005a
  32. #define MWL8K_MODE_AP 0x000000a5
  33. #define MWL8K_HIU_INT_CODE 0x00000c14
  34. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  35. #define MWL8K_FWAP_READY 0xf1f2f4a5
  36. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  37. #define MWL8K_HIU_SCRATCH 0x00000c40
  38. /* Host->device communications */
  39. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  40. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  41. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  42. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  43. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  44. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  45. #define MWL8K_H2A_INT_RESET (1 << 15)
  46. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  47. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  48. /* Device->host communications */
  49. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  50. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  51. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  52. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  53. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  54. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  55. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  56. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  57. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  58. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  59. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  60. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  61. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  62. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  63. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  64. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  65. MWL8K_A2H_INT_CHNL_SWITCHED | \
  66. MWL8K_A2H_INT_QUEUE_EMPTY | \
  67. MWL8K_A2H_INT_RADAR_DETECT | \
  68. MWL8K_A2H_INT_RADIO_ON | \
  69. MWL8K_A2H_INT_RADIO_OFF | \
  70. MWL8K_A2H_INT_MAC_EVENT | \
  71. MWL8K_A2H_INT_OPC_DONE | \
  72. MWL8K_A2H_INT_RX_READY | \
  73. MWL8K_A2H_INT_TX_DONE)
  74. #define MWL8K_RX_QUEUES 1
  75. #define MWL8K_TX_QUEUES 4
  76. struct rxd_ops {
  77. int rxd_size;
  78. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  79. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  80. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  81. __le16 *qos);
  82. };
  83. struct mwl8k_device_info {
  84. char *part_name;
  85. char *helper_image;
  86. char *fw_image;
  87. struct rxd_ops *ap_rxd_ops;
  88. };
  89. struct mwl8k_rx_queue {
  90. int rxd_count;
  91. /* hw receives here */
  92. int head;
  93. /* refill descs here */
  94. int tail;
  95. void *rxd;
  96. dma_addr_t rxd_dma;
  97. struct {
  98. struct sk_buff *skb;
  99. DEFINE_DMA_UNMAP_ADDR(dma);
  100. } *buf;
  101. };
  102. struct mwl8k_tx_queue {
  103. /* hw transmits here */
  104. int head;
  105. /* sw appends here */
  106. int tail;
  107. unsigned int len;
  108. struct mwl8k_tx_desc *txd;
  109. dma_addr_t txd_dma;
  110. struct sk_buff **skb;
  111. };
  112. struct mwl8k_priv {
  113. struct ieee80211_hw *hw;
  114. struct pci_dev *pdev;
  115. struct mwl8k_device_info *device_info;
  116. void __iomem *sram;
  117. void __iomem *regs;
  118. /* firmware */
  119. struct firmware *fw_helper;
  120. struct firmware *fw_ucode;
  121. /* hardware/firmware parameters */
  122. bool ap_fw;
  123. struct rxd_ops *rxd_ops;
  124. struct ieee80211_supported_band band_24;
  125. struct ieee80211_channel channels_24[14];
  126. struct ieee80211_rate rates_24[14];
  127. struct ieee80211_supported_band band_50;
  128. struct ieee80211_channel channels_50[4];
  129. struct ieee80211_rate rates_50[9];
  130. u32 ap_macids_supported;
  131. u32 sta_macids_supported;
  132. /* firmware access */
  133. struct mutex fw_mutex;
  134. struct task_struct *fw_mutex_owner;
  135. int fw_mutex_depth;
  136. struct completion *hostcmd_wait;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  140. struct completion *tx_wait;
  141. /* List of interfaces. */
  142. u32 macids_used;
  143. struct list_head vif_list;
  144. /* power management status cookie from firmware */
  145. u32 *cookie;
  146. dma_addr_t cookie_dma;
  147. u16 num_mcaddrs;
  148. u8 hw_rev;
  149. u32 fw_rev;
  150. /*
  151. * Running count of TX packets in flight, to avoid
  152. * iterating over the transmit rings each time.
  153. */
  154. int pending_tx_pkts;
  155. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  156. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool sniffer_enabled;
  160. bool wmm_enabled;
  161. /* XXX need to convert this to handle multiple interfaces */
  162. bool capture_beacon;
  163. u8 capture_bssid[ETH_ALEN];
  164. struct sk_buff *beacon_skb;
  165. /*
  166. * This FJ worker has to be global as it is scheduled from the
  167. * RX handler. At this point we don't know which interface it
  168. * belongs to until the list of bssids waiting to complete join
  169. * is checked.
  170. */
  171. struct work_struct finalize_join_worker;
  172. /* Tasklet to perform TX reclaim. */
  173. struct tasklet_struct poll_tx_task;
  174. /* Tasklet to perform RX. */
  175. struct tasklet_struct poll_rx_task;
  176. };
  177. /* Per interface specific private data */
  178. struct mwl8k_vif {
  179. struct list_head list;
  180. struct ieee80211_vif *vif;
  181. /* Firmware macid for this vif. */
  182. int macid;
  183. /* Non AMPDU sequence number assigned by driver. */
  184. u16 seqno;
  185. };
  186. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  187. struct mwl8k_sta {
  188. /* Index into station database. Returned by UPDATE_STADB. */
  189. u8 peer_id;
  190. };
  191. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  192. static const struct ieee80211_channel mwl8k_channels_24[] = {
  193. { .center_freq = 2412, .hw_value = 1, },
  194. { .center_freq = 2417, .hw_value = 2, },
  195. { .center_freq = 2422, .hw_value = 3, },
  196. { .center_freq = 2427, .hw_value = 4, },
  197. { .center_freq = 2432, .hw_value = 5, },
  198. { .center_freq = 2437, .hw_value = 6, },
  199. { .center_freq = 2442, .hw_value = 7, },
  200. { .center_freq = 2447, .hw_value = 8, },
  201. { .center_freq = 2452, .hw_value = 9, },
  202. { .center_freq = 2457, .hw_value = 10, },
  203. { .center_freq = 2462, .hw_value = 11, },
  204. { .center_freq = 2467, .hw_value = 12, },
  205. { .center_freq = 2472, .hw_value = 13, },
  206. { .center_freq = 2484, .hw_value = 14, },
  207. };
  208. static const struct ieee80211_rate mwl8k_rates_24[] = {
  209. { .bitrate = 10, .hw_value = 2, },
  210. { .bitrate = 20, .hw_value = 4, },
  211. { .bitrate = 55, .hw_value = 11, },
  212. { .bitrate = 110, .hw_value = 22, },
  213. { .bitrate = 220, .hw_value = 44, },
  214. { .bitrate = 60, .hw_value = 12, },
  215. { .bitrate = 90, .hw_value = 18, },
  216. { .bitrate = 120, .hw_value = 24, },
  217. { .bitrate = 180, .hw_value = 36, },
  218. { .bitrate = 240, .hw_value = 48, },
  219. { .bitrate = 360, .hw_value = 72, },
  220. { .bitrate = 480, .hw_value = 96, },
  221. { .bitrate = 540, .hw_value = 108, },
  222. { .bitrate = 720, .hw_value = 144, },
  223. };
  224. static const struct ieee80211_channel mwl8k_channels_50[] = {
  225. { .center_freq = 5180, .hw_value = 36, },
  226. { .center_freq = 5200, .hw_value = 40, },
  227. { .center_freq = 5220, .hw_value = 44, },
  228. { .center_freq = 5240, .hw_value = 48, },
  229. };
  230. static const struct ieee80211_rate mwl8k_rates_50[] = {
  231. { .bitrate = 60, .hw_value = 12, },
  232. { .bitrate = 90, .hw_value = 18, },
  233. { .bitrate = 120, .hw_value = 24, },
  234. { .bitrate = 180, .hw_value = 36, },
  235. { .bitrate = 240, .hw_value = 48, },
  236. { .bitrate = 360, .hw_value = 72, },
  237. { .bitrate = 480, .hw_value = 96, },
  238. { .bitrate = 540, .hw_value = 108, },
  239. { .bitrate = 720, .hw_value = 144, },
  240. };
  241. /* Set or get info from Firmware */
  242. #define MWL8K_CMD_SET 0x0001
  243. #define MWL8K_CMD_GET 0x0000
  244. /* Firmware command codes */
  245. #define MWL8K_CMD_CODE_DNLD 0x0001
  246. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  247. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  248. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  249. #define MWL8K_CMD_GET_STAT 0x0014
  250. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  251. #define MWL8K_CMD_RF_TX_POWER 0x001e
  252. #define MWL8K_CMD_RF_ANTENNA 0x0020
  253. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  254. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  255. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  256. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  257. #define MWL8K_CMD_SET_AID 0x010d
  258. #define MWL8K_CMD_SET_RATE 0x0110
  259. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  260. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  261. #define MWL8K_CMD_SET_SLOT 0x0114
  262. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  263. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  264. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  265. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  266. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  267. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  268. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  269. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  270. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  271. #define MWL8K_CMD_UPDATE_STADB 0x1123
  272. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  273. {
  274. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  275. snprintf(buf, bufsize, "%s", #x);\
  276. return buf;\
  277. } while (0)
  278. switch (cmd & ~0x8000) {
  279. MWL8K_CMDNAME(CODE_DNLD);
  280. MWL8K_CMDNAME(GET_HW_SPEC);
  281. MWL8K_CMDNAME(SET_HW_SPEC);
  282. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  283. MWL8K_CMDNAME(GET_STAT);
  284. MWL8K_CMDNAME(RADIO_CONTROL);
  285. MWL8K_CMDNAME(RF_TX_POWER);
  286. MWL8K_CMDNAME(RF_ANTENNA);
  287. MWL8K_CMDNAME(SET_BEACON);
  288. MWL8K_CMDNAME(SET_PRE_SCAN);
  289. MWL8K_CMDNAME(SET_POST_SCAN);
  290. MWL8K_CMDNAME(SET_RF_CHANNEL);
  291. MWL8K_CMDNAME(SET_AID);
  292. MWL8K_CMDNAME(SET_RATE);
  293. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  294. MWL8K_CMDNAME(RTS_THRESHOLD);
  295. MWL8K_CMDNAME(SET_SLOT);
  296. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  297. MWL8K_CMDNAME(SET_WMM_MODE);
  298. MWL8K_CMDNAME(MIMO_CONFIG);
  299. MWL8K_CMDNAME(USE_FIXED_RATE);
  300. MWL8K_CMDNAME(ENABLE_SNIFFER);
  301. MWL8K_CMDNAME(SET_MAC_ADDR);
  302. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  303. MWL8K_CMDNAME(BSS_START);
  304. MWL8K_CMDNAME(SET_NEW_STN);
  305. MWL8K_CMDNAME(UPDATE_STADB);
  306. default:
  307. snprintf(buf, bufsize, "0x%x", cmd);
  308. }
  309. #undef MWL8K_CMDNAME
  310. return buf;
  311. }
  312. /* Hardware and firmware reset */
  313. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  314. {
  315. iowrite32(MWL8K_H2A_INT_RESET,
  316. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  317. iowrite32(MWL8K_H2A_INT_RESET,
  318. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  319. msleep(20);
  320. }
  321. /* Release fw image */
  322. static void mwl8k_release_fw(struct firmware **fw)
  323. {
  324. if (*fw == NULL)
  325. return;
  326. release_firmware(*fw);
  327. *fw = NULL;
  328. }
  329. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  330. {
  331. mwl8k_release_fw(&priv->fw_ucode);
  332. mwl8k_release_fw(&priv->fw_helper);
  333. }
  334. /* Request fw image */
  335. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  336. const char *fname, struct firmware **fw)
  337. {
  338. /* release current image */
  339. if (*fw != NULL)
  340. mwl8k_release_fw(fw);
  341. return request_firmware((const struct firmware **)fw,
  342. fname, &priv->pdev->dev);
  343. }
  344. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  345. {
  346. struct mwl8k_device_info *di = priv->device_info;
  347. int rc;
  348. if (di->helper_image != NULL) {
  349. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  350. if (rc) {
  351. printk(KERN_ERR "%s: Error requesting helper "
  352. "firmware file %s\n", pci_name(priv->pdev),
  353. di->helper_image);
  354. return rc;
  355. }
  356. }
  357. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  358. if (rc) {
  359. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  360. pci_name(priv->pdev), di->fw_image);
  361. mwl8k_release_fw(&priv->fw_helper);
  362. return rc;
  363. }
  364. return 0;
  365. }
  366. struct mwl8k_cmd_pkt {
  367. __le16 code;
  368. __le16 length;
  369. __u8 seq_num;
  370. __u8 macid;
  371. __le16 result;
  372. char payload[0];
  373. } __packed;
  374. /*
  375. * Firmware loading.
  376. */
  377. static int
  378. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  379. {
  380. void __iomem *regs = priv->regs;
  381. dma_addr_t dma_addr;
  382. int loops;
  383. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  384. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  385. return -ENOMEM;
  386. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  387. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  388. iowrite32(MWL8K_H2A_INT_DOORBELL,
  389. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  390. iowrite32(MWL8K_H2A_INT_DUMMY,
  391. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  392. loops = 1000;
  393. do {
  394. u32 int_code;
  395. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  396. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  397. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  398. break;
  399. }
  400. cond_resched();
  401. udelay(1);
  402. } while (--loops);
  403. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  404. return loops ? 0 : -ETIMEDOUT;
  405. }
  406. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  407. const u8 *data, size_t length)
  408. {
  409. struct mwl8k_cmd_pkt *cmd;
  410. int done;
  411. int rc = 0;
  412. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  413. if (cmd == NULL)
  414. return -ENOMEM;
  415. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  416. cmd->seq_num = 0;
  417. cmd->macid = 0;
  418. cmd->result = 0;
  419. done = 0;
  420. while (length) {
  421. int block_size = length > 256 ? 256 : length;
  422. memcpy(cmd->payload, data + done, block_size);
  423. cmd->length = cpu_to_le16(block_size);
  424. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  425. sizeof(*cmd) + block_size);
  426. if (rc)
  427. break;
  428. done += block_size;
  429. length -= block_size;
  430. }
  431. if (!rc) {
  432. cmd->length = 0;
  433. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  434. }
  435. kfree(cmd);
  436. return rc;
  437. }
  438. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  439. const u8 *data, size_t length)
  440. {
  441. unsigned char *buffer;
  442. int may_continue, rc = 0;
  443. u32 done, prev_block_size;
  444. buffer = kmalloc(1024, GFP_KERNEL);
  445. if (buffer == NULL)
  446. return -ENOMEM;
  447. done = 0;
  448. prev_block_size = 0;
  449. may_continue = 1000;
  450. while (may_continue > 0) {
  451. u32 block_size;
  452. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  453. if (block_size & 1) {
  454. block_size &= ~1;
  455. may_continue--;
  456. } else {
  457. done += prev_block_size;
  458. length -= prev_block_size;
  459. }
  460. if (block_size > 1024 || block_size > length) {
  461. rc = -EOVERFLOW;
  462. break;
  463. }
  464. if (length == 0) {
  465. rc = 0;
  466. break;
  467. }
  468. if (block_size == 0) {
  469. rc = -EPROTO;
  470. may_continue--;
  471. udelay(1);
  472. continue;
  473. }
  474. prev_block_size = block_size;
  475. memcpy(buffer, data + done, block_size);
  476. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  477. if (rc)
  478. break;
  479. }
  480. if (!rc && length != 0)
  481. rc = -EREMOTEIO;
  482. kfree(buffer);
  483. return rc;
  484. }
  485. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  486. {
  487. struct mwl8k_priv *priv = hw->priv;
  488. struct firmware *fw = priv->fw_ucode;
  489. int rc;
  490. int loops;
  491. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  492. struct firmware *helper = priv->fw_helper;
  493. if (helper == NULL) {
  494. printk(KERN_ERR "%s: helper image needed but none "
  495. "given\n", pci_name(priv->pdev));
  496. return -EINVAL;
  497. }
  498. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  499. if (rc) {
  500. printk(KERN_ERR "%s: unable to load firmware "
  501. "helper image\n", pci_name(priv->pdev));
  502. return rc;
  503. }
  504. msleep(5);
  505. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  506. } else {
  507. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  508. }
  509. if (rc) {
  510. printk(KERN_ERR "%s: unable to load firmware image\n",
  511. pci_name(priv->pdev));
  512. return rc;
  513. }
  514. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  515. loops = 500000;
  516. do {
  517. u32 ready_code;
  518. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  519. if (ready_code == MWL8K_FWAP_READY) {
  520. priv->ap_fw = 1;
  521. break;
  522. } else if (ready_code == MWL8K_FWSTA_READY) {
  523. priv->ap_fw = 0;
  524. break;
  525. }
  526. cond_resched();
  527. udelay(1);
  528. } while (--loops);
  529. return loops ? 0 : -ETIMEDOUT;
  530. }
  531. /* DMA header used by firmware and hardware. */
  532. struct mwl8k_dma_data {
  533. __le16 fwlen;
  534. struct ieee80211_hdr wh;
  535. char data[0];
  536. } __packed;
  537. /* Routines to add/remove DMA header from skb. */
  538. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  539. {
  540. struct mwl8k_dma_data *tr;
  541. int hdrlen;
  542. tr = (struct mwl8k_dma_data *)skb->data;
  543. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  544. if (hdrlen != sizeof(tr->wh)) {
  545. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  546. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  547. *((__le16 *)(tr->data - 2)) = qos;
  548. } else {
  549. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  550. }
  551. }
  552. if (hdrlen != sizeof(*tr))
  553. skb_pull(skb, sizeof(*tr) - hdrlen);
  554. }
  555. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  556. {
  557. struct ieee80211_hdr *wh;
  558. int hdrlen;
  559. struct mwl8k_dma_data *tr;
  560. /*
  561. * Add a firmware DMA header; the firmware requires that we
  562. * present a 2-byte payload length followed by a 4-address
  563. * header (without QoS field), followed (optionally) by any
  564. * WEP/ExtIV header (but only filled in for CCMP).
  565. */
  566. wh = (struct ieee80211_hdr *)skb->data;
  567. hdrlen = ieee80211_hdrlen(wh->frame_control);
  568. if (hdrlen != sizeof(*tr))
  569. skb_push(skb, sizeof(*tr) - hdrlen);
  570. if (ieee80211_is_data_qos(wh->frame_control))
  571. hdrlen -= 2;
  572. tr = (struct mwl8k_dma_data *)skb->data;
  573. if (wh != &tr->wh)
  574. memmove(&tr->wh, wh, hdrlen);
  575. if (hdrlen != sizeof(tr->wh))
  576. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  577. /*
  578. * Firmware length is the length of the fully formed "802.11
  579. * payload". That is, everything except for the 802.11 header.
  580. * This includes all crypto material including the MIC.
  581. */
  582. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  583. }
  584. /*
  585. * Packet reception for 88w8366 AP firmware.
  586. */
  587. struct mwl8k_rxd_8366_ap {
  588. __le16 pkt_len;
  589. __u8 sq2;
  590. __u8 rate;
  591. __le32 pkt_phys_addr;
  592. __le32 next_rxd_phys_addr;
  593. __le16 qos_control;
  594. __le16 htsig2;
  595. __le32 hw_rssi_info;
  596. __le32 hw_noise_floor_info;
  597. __u8 noise_floor;
  598. __u8 pad0[3];
  599. __u8 rssi;
  600. __u8 rx_status;
  601. __u8 channel;
  602. __u8 rx_ctrl;
  603. } __packed;
  604. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  605. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  606. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  607. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  608. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  609. {
  610. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  611. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  612. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  613. }
  614. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  615. {
  616. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  617. rxd->pkt_len = cpu_to_le16(len);
  618. rxd->pkt_phys_addr = cpu_to_le32(addr);
  619. wmb();
  620. rxd->rx_ctrl = 0;
  621. }
  622. static int
  623. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  624. __le16 *qos)
  625. {
  626. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  627. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  628. return -1;
  629. rmb();
  630. memset(status, 0, sizeof(*status));
  631. status->signal = -rxd->rssi;
  632. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  633. status->flag |= RX_FLAG_HT;
  634. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  635. status->flag |= RX_FLAG_40MHZ;
  636. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  637. } else {
  638. int i;
  639. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  640. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  641. status->rate_idx = i;
  642. break;
  643. }
  644. }
  645. }
  646. if (rxd->channel > 14) {
  647. status->band = IEEE80211_BAND_5GHZ;
  648. if (!(status->flag & RX_FLAG_HT))
  649. status->rate_idx -= 5;
  650. } else {
  651. status->band = IEEE80211_BAND_2GHZ;
  652. }
  653. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  654. *qos = rxd->qos_control;
  655. return le16_to_cpu(rxd->pkt_len);
  656. }
  657. static struct rxd_ops rxd_8366_ap_ops = {
  658. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  659. .rxd_init = mwl8k_rxd_8366_ap_init,
  660. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  661. .rxd_process = mwl8k_rxd_8366_ap_process,
  662. };
  663. /*
  664. * Packet reception for STA firmware.
  665. */
  666. struct mwl8k_rxd_sta {
  667. __le16 pkt_len;
  668. __u8 link_quality;
  669. __u8 noise_level;
  670. __le32 pkt_phys_addr;
  671. __le32 next_rxd_phys_addr;
  672. __le16 qos_control;
  673. __le16 rate_info;
  674. __le32 pad0[4];
  675. __u8 rssi;
  676. __u8 channel;
  677. __le16 pad1;
  678. __u8 rx_ctrl;
  679. __u8 rx_status;
  680. __u8 pad2[2];
  681. } __packed;
  682. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  683. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  684. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  685. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  686. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  687. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  688. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  689. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  690. {
  691. struct mwl8k_rxd_sta *rxd = _rxd;
  692. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  693. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  694. }
  695. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  696. {
  697. struct mwl8k_rxd_sta *rxd = _rxd;
  698. rxd->pkt_len = cpu_to_le16(len);
  699. rxd->pkt_phys_addr = cpu_to_le32(addr);
  700. wmb();
  701. rxd->rx_ctrl = 0;
  702. }
  703. static int
  704. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  705. __le16 *qos)
  706. {
  707. struct mwl8k_rxd_sta *rxd = _rxd;
  708. u16 rate_info;
  709. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  710. return -1;
  711. rmb();
  712. rate_info = le16_to_cpu(rxd->rate_info);
  713. memset(status, 0, sizeof(*status));
  714. status->signal = -rxd->rssi;
  715. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  716. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  717. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  718. status->flag |= RX_FLAG_SHORTPRE;
  719. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  720. status->flag |= RX_FLAG_40MHZ;
  721. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  722. status->flag |= RX_FLAG_SHORT_GI;
  723. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  724. status->flag |= RX_FLAG_HT;
  725. if (rxd->channel > 14) {
  726. status->band = IEEE80211_BAND_5GHZ;
  727. if (!(status->flag & RX_FLAG_HT))
  728. status->rate_idx -= 5;
  729. } else {
  730. status->band = IEEE80211_BAND_2GHZ;
  731. }
  732. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  733. *qos = rxd->qos_control;
  734. return le16_to_cpu(rxd->pkt_len);
  735. }
  736. static struct rxd_ops rxd_sta_ops = {
  737. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  738. .rxd_init = mwl8k_rxd_sta_init,
  739. .rxd_refill = mwl8k_rxd_sta_refill,
  740. .rxd_process = mwl8k_rxd_sta_process,
  741. };
  742. #define MWL8K_RX_DESCS 256
  743. #define MWL8K_RX_MAXSZ 3800
  744. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  745. {
  746. struct mwl8k_priv *priv = hw->priv;
  747. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  748. int size;
  749. int i;
  750. rxq->rxd_count = 0;
  751. rxq->head = 0;
  752. rxq->tail = 0;
  753. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  754. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  755. if (rxq->rxd == NULL) {
  756. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  757. wiphy_name(hw->wiphy));
  758. return -ENOMEM;
  759. }
  760. memset(rxq->rxd, 0, size);
  761. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  762. if (rxq->buf == NULL) {
  763. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  764. wiphy_name(hw->wiphy));
  765. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  766. return -ENOMEM;
  767. }
  768. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  769. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  770. int desc_size;
  771. void *rxd;
  772. int nexti;
  773. dma_addr_t next_dma_addr;
  774. desc_size = priv->rxd_ops->rxd_size;
  775. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  776. nexti = i + 1;
  777. if (nexti == MWL8K_RX_DESCS)
  778. nexti = 0;
  779. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  780. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  781. }
  782. return 0;
  783. }
  784. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  785. {
  786. struct mwl8k_priv *priv = hw->priv;
  787. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  788. int refilled;
  789. refilled = 0;
  790. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  791. struct sk_buff *skb;
  792. dma_addr_t addr;
  793. int rx;
  794. void *rxd;
  795. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  796. if (skb == NULL)
  797. break;
  798. addr = pci_map_single(priv->pdev, skb->data,
  799. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  800. rxq->rxd_count++;
  801. rx = rxq->tail++;
  802. if (rxq->tail == MWL8K_RX_DESCS)
  803. rxq->tail = 0;
  804. rxq->buf[rx].skb = skb;
  805. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  806. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  807. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  808. refilled++;
  809. }
  810. return refilled;
  811. }
  812. /* Must be called only when the card's reception is completely halted */
  813. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  814. {
  815. struct mwl8k_priv *priv = hw->priv;
  816. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  817. int i;
  818. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  819. if (rxq->buf[i].skb != NULL) {
  820. pci_unmap_single(priv->pdev,
  821. dma_unmap_addr(&rxq->buf[i], dma),
  822. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  823. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  824. kfree_skb(rxq->buf[i].skb);
  825. rxq->buf[i].skb = NULL;
  826. }
  827. }
  828. kfree(rxq->buf);
  829. rxq->buf = NULL;
  830. pci_free_consistent(priv->pdev,
  831. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  832. rxq->rxd, rxq->rxd_dma);
  833. rxq->rxd = NULL;
  834. }
  835. /*
  836. * Scan a list of BSSIDs to process for finalize join.
  837. * Allows for extension to process multiple BSSIDs.
  838. */
  839. static inline int
  840. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  841. {
  842. return priv->capture_beacon &&
  843. ieee80211_is_beacon(wh->frame_control) &&
  844. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  845. }
  846. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  847. struct sk_buff *skb)
  848. {
  849. struct mwl8k_priv *priv = hw->priv;
  850. priv->capture_beacon = false;
  851. memset(priv->capture_bssid, 0, ETH_ALEN);
  852. /*
  853. * Use GFP_ATOMIC as rxq_process is called from
  854. * the primary interrupt handler, memory allocation call
  855. * must not sleep.
  856. */
  857. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  858. if (priv->beacon_skb != NULL)
  859. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  860. }
  861. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  862. {
  863. struct mwl8k_priv *priv = hw->priv;
  864. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  865. int processed;
  866. processed = 0;
  867. while (rxq->rxd_count && limit--) {
  868. struct sk_buff *skb;
  869. void *rxd;
  870. int pkt_len;
  871. struct ieee80211_rx_status status;
  872. __le16 qos;
  873. skb = rxq->buf[rxq->head].skb;
  874. if (skb == NULL)
  875. break;
  876. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  877. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  878. if (pkt_len < 0)
  879. break;
  880. rxq->buf[rxq->head].skb = NULL;
  881. pci_unmap_single(priv->pdev,
  882. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  883. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  884. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  885. rxq->head++;
  886. if (rxq->head == MWL8K_RX_DESCS)
  887. rxq->head = 0;
  888. rxq->rxd_count--;
  889. skb_put(skb, pkt_len);
  890. mwl8k_remove_dma_header(skb, qos);
  891. /*
  892. * Check for a pending join operation. Save a
  893. * copy of the beacon and schedule a tasklet to
  894. * send a FINALIZE_JOIN command to the firmware.
  895. */
  896. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  897. mwl8k_save_beacon(hw, skb);
  898. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  899. ieee80211_rx_irqsafe(hw, skb);
  900. processed++;
  901. }
  902. return processed;
  903. }
  904. /*
  905. * Packet transmission.
  906. */
  907. #define MWL8K_TXD_STATUS_OK 0x00000001
  908. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  909. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  910. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  911. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  912. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  913. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  914. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  915. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  916. #define MWL8K_QOS_EOSP 0x0010
  917. struct mwl8k_tx_desc {
  918. __le32 status;
  919. __u8 data_rate;
  920. __u8 tx_priority;
  921. __le16 qos_control;
  922. __le32 pkt_phys_addr;
  923. __le16 pkt_len;
  924. __u8 dest_MAC_addr[ETH_ALEN];
  925. __le32 next_txd_phys_addr;
  926. __le32 reserved;
  927. __le16 rate_info;
  928. __u8 peer_id;
  929. __u8 tx_frag_cnt;
  930. } __packed;
  931. #define MWL8K_TX_DESCS 128
  932. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  933. {
  934. struct mwl8k_priv *priv = hw->priv;
  935. struct mwl8k_tx_queue *txq = priv->txq + index;
  936. int size;
  937. int i;
  938. txq->len = 0;
  939. txq->head = 0;
  940. txq->tail = 0;
  941. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  942. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  943. if (txq->txd == NULL) {
  944. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  945. wiphy_name(hw->wiphy));
  946. return -ENOMEM;
  947. }
  948. memset(txq->txd, 0, size);
  949. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  950. if (txq->skb == NULL) {
  951. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  952. wiphy_name(hw->wiphy));
  953. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  954. return -ENOMEM;
  955. }
  956. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  957. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  958. struct mwl8k_tx_desc *tx_desc;
  959. int nexti;
  960. tx_desc = txq->txd + i;
  961. nexti = (i + 1) % MWL8K_TX_DESCS;
  962. tx_desc->status = 0;
  963. tx_desc->next_txd_phys_addr =
  964. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  965. }
  966. return 0;
  967. }
  968. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  969. {
  970. iowrite32(MWL8K_H2A_INT_PPA_READY,
  971. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  972. iowrite32(MWL8K_H2A_INT_DUMMY,
  973. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  974. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  975. }
  976. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  977. {
  978. struct mwl8k_priv *priv = hw->priv;
  979. int i;
  980. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  981. struct mwl8k_tx_queue *txq = priv->txq + i;
  982. int fw_owned = 0;
  983. int drv_owned = 0;
  984. int unused = 0;
  985. int desc;
  986. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  987. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  988. u32 status;
  989. status = le32_to_cpu(tx_desc->status);
  990. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  991. fw_owned++;
  992. else
  993. drv_owned++;
  994. if (tx_desc->pkt_len == 0)
  995. unused++;
  996. }
  997. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  998. "fw_owned=%d drv_owned=%d unused=%d\n",
  999. wiphy_name(hw->wiphy), i,
  1000. txq->len, txq->head, txq->tail,
  1001. fw_owned, drv_owned, unused);
  1002. }
  1003. }
  1004. /*
  1005. * Must be called with priv->fw_mutex held and tx queues stopped.
  1006. */
  1007. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1008. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1009. {
  1010. struct mwl8k_priv *priv = hw->priv;
  1011. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1012. int retry;
  1013. int rc;
  1014. might_sleep();
  1015. /*
  1016. * The TX queues are stopped at this point, so this test
  1017. * doesn't need to take ->tx_lock.
  1018. */
  1019. if (!priv->pending_tx_pkts)
  1020. return 0;
  1021. retry = 0;
  1022. rc = 0;
  1023. spin_lock_bh(&priv->tx_lock);
  1024. priv->tx_wait = &tx_wait;
  1025. while (!rc) {
  1026. int oldcount;
  1027. unsigned long timeout;
  1028. oldcount = priv->pending_tx_pkts;
  1029. spin_unlock_bh(&priv->tx_lock);
  1030. timeout = wait_for_completion_timeout(&tx_wait,
  1031. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1032. spin_lock_bh(&priv->tx_lock);
  1033. if (timeout) {
  1034. WARN_ON(priv->pending_tx_pkts);
  1035. if (retry) {
  1036. printk(KERN_NOTICE "%s: tx rings drained\n",
  1037. wiphy_name(hw->wiphy));
  1038. }
  1039. break;
  1040. }
  1041. if (priv->pending_tx_pkts < oldcount) {
  1042. printk(KERN_NOTICE "%s: waiting for tx rings "
  1043. "to drain (%d -> %d pkts)\n",
  1044. wiphy_name(hw->wiphy), oldcount,
  1045. priv->pending_tx_pkts);
  1046. retry = 1;
  1047. continue;
  1048. }
  1049. priv->tx_wait = NULL;
  1050. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1051. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1052. mwl8k_dump_tx_rings(hw);
  1053. rc = -ETIMEDOUT;
  1054. }
  1055. spin_unlock_bh(&priv->tx_lock);
  1056. return rc;
  1057. }
  1058. #define MWL8K_TXD_SUCCESS(status) \
  1059. ((status) & (MWL8K_TXD_STATUS_OK | \
  1060. MWL8K_TXD_STATUS_OK_RETRY | \
  1061. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1062. static int
  1063. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1064. {
  1065. struct mwl8k_priv *priv = hw->priv;
  1066. struct mwl8k_tx_queue *txq = priv->txq + index;
  1067. int processed;
  1068. processed = 0;
  1069. while (txq->len > 0 && limit--) {
  1070. int tx;
  1071. struct mwl8k_tx_desc *tx_desc;
  1072. unsigned long addr;
  1073. int size;
  1074. struct sk_buff *skb;
  1075. struct ieee80211_tx_info *info;
  1076. u32 status;
  1077. tx = txq->head;
  1078. tx_desc = txq->txd + tx;
  1079. status = le32_to_cpu(tx_desc->status);
  1080. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1081. if (!force)
  1082. break;
  1083. tx_desc->status &=
  1084. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1085. }
  1086. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1087. BUG_ON(txq->len == 0);
  1088. txq->len--;
  1089. priv->pending_tx_pkts--;
  1090. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1091. size = le16_to_cpu(tx_desc->pkt_len);
  1092. skb = txq->skb[tx];
  1093. txq->skb[tx] = NULL;
  1094. BUG_ON(skb == NULL);
  1095. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1096. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1097. /* Mark descriptor as unused */
  1098. tx_desc->pkt_phys_addr = 0;
  1099. tx_desc->pkt_len = 0;
  1100. info = IEEE80211_SKB_CB(skb);
  1101. ieee80211_tx_info_clear_status(info);
  1102. if (MWL8K_TXD_SUCCESS(status))
  1103. info->flags |= IEEE80211_TX_STAT_ACK;
  1104. ieee80211_tx_status_irqsafe(hw, skb);
  1105. processed++;
  1106. }
  1107. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1108. ieee80211_wake_queue(hw, index);
  1109. return processed;
  1110. }
  1111. /* must be called only when the card's transmit is completely halted */
  1112. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1113. {
  1114. struct mwl8k_priv *priv = hw->priv;
  1115. struct mwl8k_tx_queue *txq = priv->txq + index;
  1116. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1117. kfree(txq->skb);
  1118. txq->skb = NULL;
  1119. pci_free_consistent(priv->pdev,
  1120. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1121. txq->txd, txq->txd_dma);
  1122. txq->txd = NULL;
  1123. }
  1124. static int
  1125. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1126. {
  1127. struct mwl8k_priv *priv = hw->priv;
  1128. struct ieee80211_tx_info *tx_info;
  1129. struct mwl8k_vif *mwl8k_vif;
  1130. struct ieee80211_hdr *wh;
  1131. struct mwl8k_tx_queue *txq;
  1132. struct mwl8k_tx_desc *tx;
  1133. dma_addr_t dma;
  1134. u32 txstatus;
  1135. u8 txdatarate;
  1136. u16 qos;
  1137. wh = (struct ieee80211_hdr *)skb->data;
  1138. if (ieee80211_is_data_qos(wh->frame_control))
  1139. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1140. else
  1141. qos = 0;
  1142. mwl8k_add_dma_header(skb);
  1143. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1144. tx_info = IEEE80211_SKB_CB(skb);
  1145. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1146. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1147. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1148. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1149. mwl8k_vif->seqno += 0x10;
  1150. }
  1151. /* Setup firmware control bit fields for each frame type. */
  1152. txstatus = 0;
  1153. txdatarate = 0;
  1154. if (ieee80211_is_mgmt(wh->frame_control) ||
  1155. ieee80211_is_ctl(wh->frame_control)) {
  1156. txdatarate = 0;
  1157. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1158. } else if (ieee80211_is_data(wh->frame_control)) {
  1159. txdatarate = 1;
  1160. if (is_multicast_ether_addr(wh->addr1))
  1161. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1162. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1163. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1164. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1165. else
  1166. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1167. }
  1168. dma = pci_map_single(priv->pdev, skb->data,
  1169. skb->len, PCI_DMA_TODEVICE);
  1170. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1171. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1172. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1173. dev_kfree_skb(skb);
  1174. return NETDEV_TX_OK;
  1175. }
  1176. spin_lock_bh(&priv->tx_lock);
  1177. txq = priv->txq + index;
  1178. BUG_ON(txq->skb[txq->tail] != NULL);
  1179. txq->skb[txq->tail] = skb;
  1180. tx = txq->txd + txq->tail;
  1181. tx->data_rate = txdatarate;
  1182. tx->tx_priority = index;
  1183. tx->qos_control = cpu_to_le16(qos);
  1184. tx->pkt_phys_addr = cpu_to_le32(dma);
  1185. tx->pkt_len = cpu_to_le16(skb->len);
  1186. tx->rate_info = 0;
  1187. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1188. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1189. else
  1190. tx->peer_id = 0;
  1191. wmb();
  1192. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1193. txq->len++;
  1194. priv->pending_tx_pkts++;
  1195. txq->tail++;
  1196. if (txq->tail == MWL8K_TX_DESCS)
  1197. txq->tail = 0;
  1198. if (txq->head == txq->tail)
  1199. ieee80211_stop_queue(hw, index);
  1200. mwl8k_tx_start(priv);
  1201. spin_unlock_bh(&priv->tx_lock);
  1202. return NETDEV_TX_OK;
  1203. }
  1204. /*
  1205. * Firmware access.
  1206. *
  1207. * We have the following requirements for issuing firmware commands:
  1208. * - Some commands require that the packet transmit path is idle when
  1209. * the command is issued. (For simplicity, we'll just quiesce the
  1210. * transmit path for every command.)
  1211. * - There are certain sequences of commands that need to be issued to
  1212. * the hardware sequentially, with no other intervening commands.
  1213. *
  1214. * This leads to an implementation of a "firmware lock" as a mutex that
  1215. * can be taken recursively, and which is taken by both the low-level
  1216. * command submission function (mwl8k_post_cmd) as well as any users of
  1217. * that function that require issuing of an atomic sequence of commands,
  1218. * and quiesces the transmit path whenever it's taken.
  1219. */
  1220. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1221. {
  1222. struct mwl8k_priv *priv = hw->priv;
  1223. if (priv->fw_mutex_owner != current) {
  1224. int rc;
  1225. mutex_lock(&priv->fw_mutex);
  1226. ieee80211_stop_queues(hw);
  1227. rc = mwl8k_tx_wait_empty(hw);
  1228. if (rc) {
  1229. ieee80211_wake_queues(hw);
  1230. mutex_unlock(&priv->fw_mutex);
  1231. return rc;
  1232. }
  1233. priv->fw_mutex_owner = current;
  1234. }
  1235. priv->fw_mutex_depth++;
  1236. return 0;
  1237. }
  1238. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1239. {
  1240. struct mwl8k_priv *priv = hw->priv;
  1241. if (!--priv->fw_mutex_depth) {
  1242. ieee80211_wake_queues(hw);
  1243. priv->fw_mutex_owner = NULL;
  1244. mutex_unlock(&priv->fw_mutex);
  1245. }
  1246. }
  1247. /*
  1248. * Command processing.
  1249. */
  1250. /* Timeout firmware commands after 10s */
  1251. #define MWL8K_CMD_TIMEOUT_MS 10000
  1252. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1253. {
  1254. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1255. struct mwl8k_priv *priv = hw->priv;
  1256. void __iomem *regs = priv->regs;
  1257. dma_addr_t dma_addr;
  1258. unsigned int dma_size;
  1259. int rc;
  1260. unsigned long timeout = 0;
  1261. u8 buf[32];
  1262. cmd->result = 0xffff;
  1263. dma_size = le16_to_cpu(cmd->length);
  1264. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1265. PCI_DMA_BIDIRECTIONAL);
  1266. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1267. return -ENOMEM;
  1268. rc = mwl8k_fw_lock(hw);
  1269. if (rc) {
  1270. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1271. PCI_DMA_BIDIRECTIONAL);
  1272. return rc;
  1273. }
  1274. priv->hostcmd_wait = &cmd_wait;
  1275. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1276. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1277. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1278. iowrite32(MWL8K_H2A_INT_DUMMY,
  1279. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1280. timeout = wait_for_completion_timeout(&cmd_wait,
  1281. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1282. priv->hostcmd_wait = NULL;
  1283. mwl8k_fw_unlock(hw);
  1284. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1285. PCI_DMA_BIDIRECTIONAL);
  1286. if (!timeout) {
  1287. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1288. wiphy_name(hw->wiphy),
  1289. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1290. MWL8K_CMD_TIMEOUT_MS);
  1291. rc = -ETIMEDOUT;
  1292. } else {
  1293. int ms;
  1294. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1295. rc = cmd->result ? -EINVAL : 0;
  1296. if (rc)
  1297. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1298. wiphy_name(hw->wiphy),
  1299. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1300. le16_to_cpu(cmd->result));
  1301. else if (ms > 2000)
  1302. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1303. wiphy_name(hw->wiphy),
  1304. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1305. ms);
  1306. }
  1307. return rc;
  1308. }
  1309. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1310. struct ieee80211_vif *vif,
  1311. struct mwl8k_cmd_pkt *cmd)
  1312. {
  1313. if (vif != NULL)
  1314. cmd->macid = MWL8K_VIF(vif)->macid;
  1315. return mwl8k_post_cmd(hw, cmd);
  1316. }
  1317. /*
  1318. * Setup code shared between STA and AP firmware images.
  1319. */
  1320. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1321. {
  1322. struct mwl8k_priv *priv = hw->priv;
  1323. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1324. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1325. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1326. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1327. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1328. priv->band_24.channels = priv->channels_24;
  1329. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1330. priv->band_24.bitrates = priv->rates_24;
  1331. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1332. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1333. }
  1334. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1335. {
  1336. struct mwl8k_priv *priv = hw->priv;
  1337. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1338. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1339. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1340. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1341. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1342. priv->band_50.channels = priv->channels_50;
  1343. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1344. priv->band_50.bitrates = priv->rates_50;
  1345. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1346. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1347. }
  1348. /*
  1349. * CMD_GET_HW_SPEC (STA version).
  1350. */
  1351. struct mwl8k_cmd_get_hw_spec_sta {
  1352. struct mwl8k_cmd_pkt header;
  1353. __u8 hw_rev;
  1354. __u8 host_interface;
  1355. __le16 num_mcaddrs;
  1356. __u8 perm_addr[ETH_ALEN];
  1357. __le16 region_code;
  1358. __le32 fw_rev;
  1359. __le32 ps_cookie;
  1360. __le32 caps;
  1361. __u8 mcs_bitmap[16];
  1362. __le32 rx_queue_ptr;
  1363. __le32 num_tx_queues;
  1364. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1365. __le32 caps2;
  1366. __le32 num_tx_desc_per_queue;
  1367. __le32 total_rxd;
  1368. } __packed;
  1369. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1370. #define MWL8K_CAP_GREENFIELD 0x08000000
  1371. #define MWL8K_CAP_AMPDU 0x04000000
  1372. #define MWL8K_CAP_RX_STBC 0x01000000
  1373. #define MWL8K_CAP_TX_STBC 0x00800000
  1374. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1375. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1376. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1377. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1378. #define MWL8K_CAP_DELAY_BA 0x00003000
  1379. #define MWL8K_CAP_MIMO 0x00000200
  1380. #define MWL8K_CAP_40MHZ 0x00000100
  1381. #define MWL8K_CAP_BAND_MASK 0x00000007
  1382. #define MWL8K_CAP_5GHZ 0x00000004
  1383. #define MWL8K_CAP_2GHZ4 0x00000001
  1384. static void
  1385. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1386. struct ieee80211_supported_band *band, u32 cap)
  1387. {
  1388. int rx_streams;
  1389. int tx_streams;
  1390. band->ht_cap.ht_supported = 1;
  1391. if (cap & MWL8K_CAP_MAX_AMSDU)
  1392. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1393. if (cap & MWL8K_CAP_GREENFIELD)
  1394. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1395. if (cap & MWL8K_CAP_AMPDU) {
  1396. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1397. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1398. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1399. }
  1400. if (cap & MWL8K_CAP_RX_STBC)
  1401. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1402. if (cap & MWL8K_CAP_TX_STBC)
  1403. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1404. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1405. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1406. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1407. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1408. if (cap & MWL8K_CAP_DELAY_BA)
  1409. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1410. if (cap & MWL8K_CAP_40MHZ)
  1411. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1412. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1413. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1414. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1415. if (rx_streams >= 2)
  1416. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1417. if (rx_streams >= 3)
  1418. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1419. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1420. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1421. if (rx_streams != tx_streams) {
  1422. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1423. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1424. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1425. }
  1426. }
  1427. static void
  1428. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1429. {
  1430. struct mwl8k_priv *priv = hw->priv;
  1431. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1432. mwl8k_setup_2ghz_band(hw);
  1433. if (caps & MWL8K_CAP_MIMO)
  1434. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1435. }
  1436. if (caps & MWL8K_CAP_5GHZ) {
  1437. mwl8k_setup_5ghz_band(hw);
  1438. if (caps & MWL8K_CAP_MIMO)
  1439. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1440. }
  1441. }
  1442. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1443. {
  1444. struct mwl8k_priv *priv = hw->priv;
  1445. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1446. int rc;
  1447. int i;
  1448. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1449. if (cmd == NULL)
  1450. return -ENOMEM;
  1451. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1452. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1453. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1454. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1455. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1456. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1457. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1458. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1459. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1460. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1461. rc = mwl8k_post_cmd(hw, &cmd->header);
  1462. if (!rc) {
  1463. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1464. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1465. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1466. priv->hw_rev = cmd->hw_rev;
  1467. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1468. priv->ap_macids_supported = 0x00000000;
  1469. priv->sta_macids_supported = 0x00000001;
  1470. }
  1471. kfree(cmd);
  1472. return rc;
  1473. }
  1474. /*
  1475. * CMD_GET_HW_SPEC (AP version).
  1476. */
  1477. struct mwl8k_cmd_get_hw_spec_ap {
  1478. struct mwl8k_cmd_pkt header;
  1479. __u8 hw_rev;
  1480. __u8 host_interface;
  1481. __le16 num_wcb;
  1482. __le16 num_mcaddrs;
  1483. __u8 perm_addr[ETH_ALEN];
  1484. __le16 region_code;
  1485. __le16 num_antenna;
  1486. __le32 fw_rev;
  1487. __le32 wcbbase0;
  1488. __le32 rxwrptr;
  1489. __le32 rxrdptr;
  1490. __le32 ps_cookie;
  1491. __le32 wcbbase1;
  1492. __le32 wcbbase2;
  1493. __le32 wcbbase3;
  1494. } __packed;
  1495. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1496. {
  1497. struct mwl8k_priv *priv = hw->priv;
  1498. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1499. int rc;
  1500. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1501. if (cmd == NULL)
  1502. return -ENOMEM;
  1503. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1504. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1505. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1506. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1507. rc = mwl8k_post_cmd(hw, &cmd->header);
  1508. if (!rc) {
  1509. int off;
  1510. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1511. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1512. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1513. priv->hw_rev = cmd->hw_rev;
  1514. mwl8k_setup_2ghz_band(hw);
  1515. priv->ap_macids_supported = 0x000000ff;
  1516. priv->sta_macids_supported = 0x00000000;
  1517. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1518. iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
  1519. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1520. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1521. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1522. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1523. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1524. iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
  1525. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1526. iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
  1527. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1528. iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
  1529. }
  1530. kfree(cmd);
  1531. return rc;
  1532. }
  1533. /*
  1534. * CMD_SET_HW_SPEC.
  1535. */
  1536. struct mwl8k_cmd_set_hw_spec {
  1537. struct mwl8k_cmd_pkt header;
  1538. __u8 hw_rev;
  1539. __u8 host_interface;
  1540. __le16 num_mcaddrs;
  1541. __u8 perm_addr[ETH_ALEN];
  1542. __le16 region_code;
  1543. __le32 fw_rev;
  1544. __le32 ps_cookie;
  1545. __le32 caps;
  1546. __le32 rx_queue_ptr;
  1547. __le32 num_tx_queues;
  1548. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1549. __le32 flags;
  1550. __le32 num_tx_desc_per_queue;
  1551. __le32 total_rxd;
  1552. } __packed;
  1553. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1554. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1555. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1556. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1557. {
  1558. struct mwl8k_priv *priv = hw->priv;
  1559. struct mwl8k_cmd_set_hw_spec *cmd;
  1560. int rc;
  1561. int i;
  1562. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1563. if (cmd == NULL)
  1564. return -ENOMEM;
  1565. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1566. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1567. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1568. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1569. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1570. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1571. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1572. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1573. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1574. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1575. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1576. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1577. rc = mwl8k_post_cmd(hw, &cmd->header);
  1578. kfree(cmd);
  1579. return rc;
  1580. }
  1581. /*
  1582. * CMD_MAC_MULTICAST_ADR.
  1583. */
  1584. struct mwl8k_cmd_mac_multicast_adr {
  1585. struct mwl8k_cmd_pkt header;
  1586. __le16 action;
  1587. __le16 numaddr;
  1588. __u8 addr[0][ETH_ALEN];
  1589. };
  1590. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1591. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1592. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1593. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1594. static struct mwl8k_cmd_pkt *
  1595. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1596. struct netdev_hw_addr_list *mc_list)
  1597. {
  1598. struct mwl8k_priv *priv = hw->priv;
  1599. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1600. int size;
  1601. int mc_count = 0;
  1602. if (mc_list)
  1603. mc_count = netdev_hw_addr_list_count(mc_list);
  1604. if (allmulti || mc_count > priv->num_mcaddrs) {
  1605. allmulti = 1;
  1606. mc_count = 0;
  1607. }
  1608. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1609. cmd = kzalloc(size, GFP_ATOMIC);
  1610. if (cmd == NULL)
  1611. return NULL;
  1612. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1613. cmd->header.length = cpu_to_le16(size);
  1614. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1615. MWL8K_ENABLE_RX_BROADCAST);
  1616. if (allmulti) {
  1617. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1618. } else if (mc_count) {
  1619. struct netdev_hw_addr *ha;
  1620. int i = 0;
  1621. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1622. cmd->numaddr = cpu_to_le16(mc_count);
  1623. netdev_hw_addr_list_for_each(ha, mc_list) {
  1624. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1625. }
  1626. }
  1627. return &cmd->header;
  1628. }
  1629. /*
  1630. * CMD_GET_STAT.
  1631. */
  1632. struct mwl8k_cmd_get_stat {
  1633. struct mwl8k_cmd_pkt header;
  1634. __le32 stats[64];
  1635. } __packed;
  1636. #define MWL8K_STAT_ACK_FAILURE 9
  1637. #define MWL8K_STAT_RTS_FAILURE 12
  1638. #define MWL8K_STAT_FCS_ERROR 24
  1639. #define MWL8K_STAT_RTS_SUCCESS 11
  1640. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1641. struct ieee80211_low_level_stats *stats)
  1642. {
  1643. struct mwl8k_cmd_get_stat *cmd;
  1644. int rc;
  1645. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1646. if (cmd == NULL)
  1647. return -ENOMEM;
  1648. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1649. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1650. rc = mwl8k_post_cmd(hw, &cmd->header);
  1651. if (!rc) {
  1652. stats->dot11ACKFailureCount =
  1653. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1654. stats->dot11RTSFailureCount =
  1655. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1656. stats->dot11FCSErrorCount =
  1657. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1658. stats->dot11RTSSuccessCount =
  1659. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1660. }
  1661. kfree(cmd);
  1662. return rc;
  1663. }
  1664. /*
  1665. * CMD_RADIO_CONTROL.
  1666. */
  1667. struct mwl8k_cmd_radio_control {
  1668. struct mwl8k_cmd_pkt header;
  1669. __le16 action;
  1670. __le16 control;
  1671. __le16 radio_on;
  1672. } __packed;
  1673. static int
  1674. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1675. {
  1676. struct mwl8k_priv *priv = hw->priv;
  1677. struct mwl8k_cmd_radio_control *cmd;
  1678. int rc;
  1679. if (enable == priv->radio_on && !force)
  1680. return 0;
  1681. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1682. if (cmd == NULL)
  1683. return -ENOMEM;
  1684. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1685. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1686. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1687. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1688. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1689. rc = mwl8k_post_cmd(hw, &cmd->header);
  1690. kfree(cmd);
  1691. if (!rc)
  1692. priv->radio_on = enable;
  1693. return rc;
  1694. }
  1695. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1696. {
  1697. return mwl8k_cmd_radio_control(hw, 0, 0);
  1698. }
  1699. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1700. {
  1701. return mwl8k_cmd_radio_control(hw, 1, 0);
  1702. }
  1703. static int
  1704. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1705. {
  1706. struct mwl8k_priv *priv = hw->priv;
  1707. priv->radio_short_preamble = short_preamble;
  1708. return mwl8k_cmd_radio_control(hw, 1, 1);
  1709. }
  1710. /*
  1711. * CMD_RF_TX_POWER.
  1712. */
  1713. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1714. struct mwl8k_cmd_rf_tx_power {
  1715. struct mwl8k_cmd_pkt header;
  1716. __le16 action;
  1717. __le16 support_level;
  1718. __le16 current_level;
  1719. __le16 reserved;
  1720. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1721. } __packed;
  1722. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1723. {
  1724. struct mwl8k_cmd_rf_tx_power *cmd;
  1725. int rc;
  1726. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1727. if (cmd == NULL)
  1728. return -ENOMEM;
  1729. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1730. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1731. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1732. cmd->support_level = cpu_to_le16(dBm);
  1733. rc = mwl8k_post_cmd(hw, &cmd->header);
  1734. kfree(cmd);
  1735. return rc;
  1736. }
  1737. /*
  1738. * CMD_RF_ANTENNA.
  1739. */
  1740. struct mwl8k_cmd_rf_antenna {
  1741. struct mwl8k_cmd_pkt header;
  1742. __le16 antenna;
  1743. __le16 mode;
  1744. } __packed;
  1745. #define MWL8K_RF_ANTENNA_RX 1
  1746. #define MWL8K_RF_ANTENNA_TX 2
  1747. static int
  1748. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1749. {
  1750. struct mwl8k_cmd_rf_antenna *cmd;
  1751. int rc;
  1752. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1753. if (cmd == NULL)
  1754. return -ENOMEM;
  1755. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1756. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1757. cmd->antenna = cpu_to_le16(antenna);
  1758. cmd->mode = cpu_to_le16(mask);
  1759. rc = mwl8k_post_cmd(hw, &cmd->header);
  1760. kfree(cmd);
  1761. return rc;
  1762. }
  1763. /*
  1764. * CMD_SET_BEACON.
  1765. */
  1766. struct mwl8k_cmd_set_beacon {
  1767. struct mwl8k_cmd_pkt header;
  1768. __le16 beacon_len;
  1769. __u8 beacon[0];
  1770. };
  1771. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1772. struct ieee80211_vif *vif, u8 *beacon, int len)
  1773. {
  1774. struct mwl8k_cmd_set_beacon *cmd;
  1775. int rc;
  1776. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1777. if (cmd == NULL)
  1778. return -ENOMEM;
  1779. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1780. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1781. cmd->beacon_len = cpu_to_le16(len);
  1782. memcpy(cmd->beacon, beacon, len);
  1783. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1784. kfree(cmd);
  1785. return rc;
  1786. }
  1787. /*
  1788. * CMD_SET_PRE_SCAN.
  1789. */
  1790. struct mwl8k_cmd_set_pre_scan {
  1791. struct mwl8k_cmd_pkt header;
  1792. } __packed;
  1793. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1794. {
  1795. struct mwl8k_cmd_set_pre_scan *cmd;
  1796. int rc;
  1797. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1798. if (cmd == NULL)
  1799. return -ENOMEM;
  1800. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1801. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1802. rc = mwl8k_post_cmd(hw, &cmd->header);
  1803. kfree(cmd);
  1804. return rc;
  1805. }
  1806. /*
  1807. * CMD_SET_POST_SCAN.
  1808. */
  1809. struct mwl8k_cmd_set_post_scan {
  1810. struct mwl8k_cmd_pkt header;
  1811. __le32 isibss;
  1812. __u8 bssid[ETH_ALEN];
  1813. } __packed;
  1814. static int
  1815. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1816. {
  1817. struct mwl8k_cmd_set_post_scan *cmd;
  1818. int rc;
  1819. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1820. if (cmd == NULL)
  1821. return -ENOMEM;
  1822. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1823. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1824. cmd->isibss = 0;
  1825. memcpy(cmd->bssid, mac, ETH_ALEN);
  1826. rc = mwl8k_post_cmd(hw, &cmd->header);
  1827. kfree(cmd);
  1828. return rc;
  1829. }
  1830. /*
  1831. * CMD_SET_RF_CHANNEL.
  1832. */
  1833. struct mwl8k_cmd_set_rf_channel {
  1834. struct mwl8k_cmd_pkt header;
  1835. __le16 action;
  1836. __u8 current_channel;
  1837. __le32 channel_flags;
  1838. } __packed;
  1839. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1840. struct ieee80211_conf *conf)
  1841. {
  1842. struct ieee80211_channel *channel = conf->channel;
  1843. struct mwl8k_cmd_set_rf_channel *cmd;
  1844. int rc;
  1845. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1846. if (cmd == NULL)
  1847. return -ENOMEM;
  1848. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1849. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1850. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1851. cmd->current_channel = channel->hw_value;
  1852. if (channel->band == IEEE80211_BAND_2GHZ)
  1853. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1854. else if (channel->band == IEEE80211_BAND_5GHZ)
  1855. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1856. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1857. conf->channel_type == NL80211_CHAN_HT20)
  1858. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1859. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1860. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1861. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1862. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1863. rc = mwl8k_post_cmd(hw, &cmd->header);
  1864. kfree(cmd);
  1865. return rc;
  1866. }
  1867. /*
  1868. * CMD_SET_AID.
  1869. */
  1870. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1871. #define MWL8K_FRAME_PROT_11G 0x07
  1872. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1873. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1874. struct mwl8k_cmd_update_set_aid {
  1875. struct mwl8k_cmd_pkt header;
  1876. __le16 aid;
  1877. /* AP's MAC address (BSSID) */
  1878. __u8 bssid[ETH_ALEN];
  1879. __le16 protection_mode;
  1880. __u8 supp_rates[14];
  1881. } __packed;
  1882. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1883. {
  1884. int i;
  1885. int j;
  1886. /*
  1887. * Clear nonstandard rates 4 and 13.
  1888. */
  1889. mask &= 0x1fef;
  1890. for (i = 0, j = 0; i < 14; i++) {
  1891. if (mask & (1 << i))
  1892. rates[j++] = mwl8k_rates_24[i].hw_value;
  1893. }
  1894. }
  1895. static int
  1896. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1897. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1898. {
  1899. struct mwl8k_cmd_update_set_aid *cmd;
  1900. u16 prot_mode;
  1901. int rc;
  1902. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1903. if (cmd == NULL)
  1904. return -ENOMEM;
  1905. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1906. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1907. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1908. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1909. if (vif->bss_conf.use_cts_prot) {
  1910. prot_mode = MWL8K_FRAME_PROT_11G;
  1911. } else {
  1912. switch (vif->bss_conf.ht_operation_mode &
  1913. IEEE80211_HT_OP_MODE_PROTECTION) {
  1914. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1915. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1916. break;
  1917. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1918. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1919. break;
  1920. default:
  1921. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1922. break;
  1923. }
  1924. }
  1925. cmd->protection_mode = cpu_to_le16(prot_mode);
  1926. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1927. rc = mwl8k_post_cmd(hw, &cmd->header);
  1928. kfree(cmd);
  1929. return rc;
  1930. }
  1931. /*
  1932. * CMD_SET_RATE.
  1933. */
  1934. struct mwl8k_cmd_set_rate {
  1935. struct mwl8k_cmd_pkt header;
  1936. __u8 legacy_rates[14];
  1937. /* Bitmap for supported MCS codes. */
  1938. __u8 mcs_set[16];
  1939. __u8 reserved[16];
  1940. } __packed;
  1941. static int
  1942. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1943. u32 legacy_rate_mask, u8 *mcs_rates)
  1944. {
  1945. struct mwl8k_cmd_set_rate *cmd;
  1946. int rc;
  1947. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1948. if (cmd == NULL)
  1949. return -ENOMEM;
  1950. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1951. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1952. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1953. memcpy(cmd->mcs_set, mcs_rates, 16);
  1954. rc = mwl8k_post_cmd(hw, &cmd->header);
  1955. kfree(cmd);
  1956. return rc;
  1957. }
  1958. /*
  1959. * CMD_FINALIZE_JOIN.
  1960. */
  1961. #define MWL8K_FJ_BEACON_MAXLEN 128
  1962. struct mwl8k_cmd_finalize_join {
  1963. struct mwl8k_cmd_pkt header;
  1964. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1965. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1966. } __packed;
  1967. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1968. int framelen, int dtim)
  1969. {
  1970. struct mwl8k_cmd_finalize_join *cmd;
  1971. struct ieee80211_mgmt *payload = frame;
  1972. int payload_len;
  1973. int rc;
  1974. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1975. if (cmd == NULL)
  1976. return -ENOMEM;
  1977. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1978. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1979. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1980. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1981. if (payload_len < 0)
  1982. payload_len = 0;
  1983. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1984. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1985. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1986. rc = mwl8k_post_cmd(hw, &cmd->header);
  1987. kfree(cmd);
  1988. return rc;
  1989. }
  1990. /*
  1991. * CMD_SET_RTS_THRESHOLD.
  1992. */
  1993. struct mwl8k_cmd_set_rts_threshold {
  1994. struct mwl8k_cmd_pkt header;
  1995. __le16 action;
  1996. __le16 threshold;
  1997. } __packed;
  1998. static int
  1999. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2000. {
  2001. struct mwl8k_cmd_set_rts_threshold *cmd;
  2002. int rc;
  2003. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2004. if (cmd == NULL)
  2005. return -ENOMEM;
  2006. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2007. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2008. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2009. cmd->threshold = cpu_to_le16(rts_thresh);
  2010. rc = mwl8k_post_cmd(hw, &cmd->header);
  2011. kfree(cmd);
  2012. return rc;
  2013. }
  2014. /*
  2015. * CMD_SET_SLOT.
  2016. */
  2017. struct mwl8k_cmd_set_slot {
  2018. struct mwl8k_cmd_pkt header;
  2019. __le16 action;
  2020. __u8 short_slot;
  2021. } __packed;
  2022. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2023. {
  2024. struct mwl8k_cmd_set_slot *cmd;
  2025. int rc;
  2026. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2027. if (cmd == NULL)
  2028. return -ENOMEM;
  2029. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2030. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2031. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2032. cmd->short_slot = short_slot_time;
  2033. rc = mwl8k_post_cmd(hw, &cmd->header);
  2034. kfree(cmd);
  2035. return rc;
  2036. }
  2037. /*
  2038. * CMD_SET_EDCA_PARAMS.
  2039. */
  2040. struct mwl8k_cmd_set_edca_params {
  2041. struct mwl8k_cmd_pkt header;
  2042. /* See MWL8K_SET_EDCA_XXX below */
  2043. __le16 action;
  2044. /* TX opportunity in units of 32 us */
  2045. __le16 txop;
  2046. union {
  2047. struct {
  2048. /* Log exponent of max contention period: 0...15 */
  2049. __le32 log_cw_max;
  2050. /* Log exponent of min contention period: 0...15 */
  2051. __le32 log_cw_min;
  2052. /* Adaptive interframe spacing in units of 32us */
  2053. __u8 aifs;
  2054. /* TX queue to configure */
  2055. __u8 txq;
  2056. } ap;
  2057. struct {
  2058. /* Log exponent of max contention period: 0...15 */
  2059. __u8 log_cw_max;
  2060. /* Log exponent of min contention period: 0...15 */
  2061. __u8 log_cw_min;
  2062. /* Adaptive interframe spacing in units of 32us */
  2063. __u8 aifs;
  2064. /* TX queue to configure */
  2065. __u8 txq;
  2066. } sta;
  2067. };
  2068. } __packed;
  2069. #define MWL8K_SET_EDCA_CW 0x01
  2070. #define MWL8K_SET_EDCA_TXOP 0x02
  2071. #define MWL8K_SET_EDCA_AIFS 0x04
  2072. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2073. MWL8K_SET_EDCA_TXOP | \
  2074. MWL8K_SET_EDCA_AIFS)
  2075. static int
  2076. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2077. __u16 cw_min, __u16 cw_max,
  2078. __u8 aifs, __u16 txop)
  2079. {
  2080. struct mwl8k_priv *priv = hw->priv;
  2081. struct mwl8k_cmd_set_edca_params *cmd;
  2082. int rc;
  2083. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2084. if (cmd == NULL)
  2085. return -ENOMEM;
  2086. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2087. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2088. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2089. cmd->txop = cpu_to_le16(txop);
  2090. if (priv->ap_fw) {
  2091. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2092. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2093. cmd->ap.aifs = aifs;
  2094. cmd->ap.txq = qnum;
  2095. } else {
  2096. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2097. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2098. cmd->sta.aifs = aifs;
  2099. cmd->sta.txq = qnum;
  2100. }
  2101. rc = mwl8k_post_cmd(hw, &cmd->header);
  2102. kfree(cmd);
  2103. return rc;
  2104. }
  2105. /*
  2106. * CMD_SET_WMM_MODE.
  2107. */
  2108. struct mwl8k_cmd_set_wmm_mode {
  2109. struct mwl8k_cmd_pkt header;
  2110. __le16 action;
  2111. } __packed;
  2112. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2113. {
  2114. struct mwl8k_priv *priv = hw->priv;
  2115. struct mwl8k_cmd_set_wmm_mode *cmd;
  2116. int rc;
  2117. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2118. if (cmd == NULL)
  2119. return -ENOMEM;
  2120. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2121. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2122. cmd->action = cpu_to_le16(!!enable);
  2123. rc = mwl8k_post_cmd(hw, &cmd->header);
  2124. kfree(cmd);
  2125. if (!rc)
  2126. priv->wmm_enabled = enable;
  2127. return rc;
  2128. }
  2129. /*
  2130. * CMD_MIMO_CONFIG.
  2131. */
  2132. struct mwl8k_cmd_mimo_config {
  2133. struct mwl8k_cmd_pkt header;
  2134. __le32 action;
  2135. __u8 rx_antenna_map;
  2136. __u8 tx_antenna_map;
  2137. } __packed;
  2138. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2139. {
  2140. struct mwl8k_cmd_mimo_config *cmd;
  2141. int rc;
  2142. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2143. if (cmd == NULL)
  2144. return -ENOMEM;
  2145. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2146. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2147. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2148. cmd->rx_antenna_map = rx;
  2149. cmd->tx_antenna_map = tx;
  2150. rc = mwl8k_post_cmd(hw, &cmd->header);
  2151. kfree(cmd);
  2152. return rc;
  2153. }
  2154. /*
  2155. * CMD_USE_FIXED_RATE (STA version).
  2156. */
  2157. struct mwl8k_cmd_use_fixed_rate_sta {
  2158. struct mwl8k_cmd_pkt header;
  2159. __le32 action;
  2160. __le32 allow_rate_drop;
  2161. __le32 num_rates;
  2162. struct {
  2163. __le32 is_ht_rate;
  2164. __le32 enable_retry;
  2165. __le32 rate;
  2166. __le32 retry_count;
  2167. } rate_entry[8];
  2168. __le32 rate_type;
  2169. __le32 reserved1;
  2170. __le32 reserved2;
  2171. } __packed;
  2172. #define MWL8K_USE_AUTO_RATE 0x0002
  2173. #define MWL8K_UCAST_RATE 0
  2174. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2175. {
  2176. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2177. int rc;
  2178. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2179. if (cmd == NULL)
  2180. return -ENOMEM;
  2181. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2182. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2183. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2184. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2185. rc = mwl8k_post_cmd(hw, &cmd->header);
  2186. kfree(cmd);
  2187. return rc;
  2188. }
  2189. /*
  2190. * CMD_USE_FIXED_RATE (AP version).
  2191. */
  2192. struct mwl8k_cmd_use_fixed_rate_ap {
  2193. struct mwl8k_cmd_pkt header;
  2194. __le32 action;
  2195. __le32 allow_rate_drop;
  2196. __le32 num_rates;
  2197. struct mwl8k_rate_entry_ap {
  2198. __le32 is_ht_rate;
  2199. __le32 enable_retry;
  2200. __le32 rate;
  2201. __le32 retry_count;
  2202. } rate_entry[4];
  2203. u8 multicast_rate;
  2204. u8 multicast_rate_type;
  2205. u8 management_rate;
  2206. } __packed;
  2207. static int
  2208. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2209. {
  2210. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2211. int rc;
  2212. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2213. if (cmd == NULL)
  2214. return -ENOMEM;
  2215. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2216. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2217. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2218. cmd->multicast_rate = mcast;
  2219. cmd->management_rate = mgmt;
  2220. rc = mwl8k_post_cmd(hw, &cmd->header);
  2221. kfree(cmd);
  2222. return rc;
  2223. }
  2224. /*
  2225. * CMD_ENABLE_SNIFFER.
  2226. */
  2227. struct mwl8k_cmd_enable_sniffer {
  2228. struct mwl8k_cmd_pkt header;
  2229. __le32 action;
  2230. } __packed;
  2231. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2232. {
  2233. struct mwl8k_cmd_enable_sniffer *cmd;
  2234. int rc;
  2235. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2236. if (cmd == NULL)
  2237. return -ENOMEM;
  2238. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2239. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2240. cmd->action = cpu_to_le32(!!enable);
  2241. rc = mwl8k_post_cmd(hw, &cmd->header);
  2242. kfree(cmd);
  2243. return rc;
  2244. }
  2245. /*
  2246. * CMD_SET_MAC_ADDR.
  2247. */
  2248. struct mwl8k_cmd_set_mac_addr {
  2249. struct mwl8k_cmd_pkt header;
  2250. union {
  2251. struct {
  2252. __le16 mac_type;
  2253. __u8 mac_addr[ETH_ALEN];
  2254. } mbss;
  2255. __u8 mac_addr[ETH_ALEN];
  2256. };
  2257. } __packed;
  2258. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2259. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2260. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2261. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2262. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2263. struct ieee80211_vif *vif, u8 *mac)
  2264. {
  2265. struct mwl8k_priv *priv = hw->priv;
  2266. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2267. struct mwl8k_cmd_set_mac_addr *cmd;
  2268. int mac_type;
  2269. int rc;
  2270. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2271. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2272. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2273. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2274. else
  2275. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2276. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2277. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2278. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2279. else
  2280. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2281. }
  2282. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2283. if (cmd == NULL)
  2284. return -ENOMEM;
  2285. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2286. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2287. if (priv->ap_fw) {
  2288. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2289. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2290. } else {
  2291. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2292. }
  2293. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2294. kfree(cmd);
  2295. return rc;
  2296. }
  2297. /*
  2298. * CMD_SET_RATEADAPT_MODE.
  2299. */
  2300. struct mwl8k_cmd_set_rate_adapt_mode {
  2301. struct mwl8k_cmd_pkt header;
  2302. __le16 action;
  2303. __le16 mode;
  2304. } __packed;
  2305. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2306. {
  2307. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2308. int rc;
  2309. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2310. if (cmd == NULL)
  2311. return -ENOMEM;
  2312. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2313. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2314. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2315. cmd->mode = cpu_to_le16(mode);
  2316. rc = mwl8k_post_cmd(hw, &cmd->header);
  2317. kfree(cmd);
  2318. return rc;
  2319. }
  2320. /*
  2321. * CMD_BSS_START.
  2322. */
  2323. struct mwl8k_cmd_bss_start {
  2324. struct mwl8k_cmd_pkt header;
  2325. __le32 enable;
  2326. } __packed;
  2327. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2328. struct ieee80211_vif *vif, int enable)
  2329. {
  2330. struct mwl8k_cmd_bss_start *cmd;
  2331. int rc;
  2332. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2333. if (cmd == NULL)
  2334. return -ENOMEM;
  2335. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2336. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2337. cmd->enable = cpu_to_le32(enable);
  2338. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2339. kfree(cmd);
  2340. return rc;
  2341. }
  2342. /*
  2343. * CMD_SET_NEW_STN.
  2344. */
  2345. struct mwl8k_cmd_set_new_stn {
  2346. struct mwl8k_cmd_pkt header;
  2347. __le16 aid;
  2348. __u8 mac_addr[6];
  2349. __le16 stn_id;
  2350. __le16 action;
  2351. __le16 rsvd;
  2352. __le32 legacy_rates;
  2353. __u8 ht_rates[4];
  2354. __le16 cap_info;
  2355. __le16 ht_capabilities_info;
  2356. __u8 mac_ht_param_info;
  2357. __u8 rev;
  2358. __u8 control_channel;
  2359. __u8 add_channel;
  2360. __le16 op_mode;
  2361. __le16 stbc;
  2362. __u8 add_qos_info;
  2363. __u8 is_qos_sta;
  2364. __le32 fw_sta_ptr;
  2365. } __packed;
  2366. #define MWL8K_STA_ACTION_ADD 0
  2367. #define MWL8K_STA_ACTION_REMOVE 2
  2368. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2369. struct ieee80211_vif *vif,
  2370. struct ieee80211_sta *sta)
  2371. {
  2372. struct mwl8k_cmd_set_new_stn *cmd;
  2373. u32 rates;
  2374. int rc;
  2375. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2376. if (cmd == NULL)
  2377. return -ENOMEM;
  2378. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2379. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2380. cmd->aid = cpu_to_le16(sta->aid);
  2381. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2382. cmd->stn_id = cpu_to_le16(sta->aid);
  2383. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2384. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2385. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2386. else
  2387. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2388. cmd->legacy_rates = cpu_to_le32(rates);
  2389. if (sta->ht_cap.ht_supported) {
  2390. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2391. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2392. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2393. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2394. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2395. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2396. ((sta->ht_cap.ampdu_density & 7) << 2);
  2397. cmd->is_qos_sta = 1;
  2398. }
  2399. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2400. kfree(cmd);
  2401. return rc;
  2402. }
  2403. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2404. struct ieee80211_vif *vif)
  2405. {
  2406. struct mwl8k_cmd_set_new_stn *cmd;
  2407. int rc;
  2408. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2409. if (cmd == NULL)
  2410. return -ENOMEM;
  2411. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2412. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2413. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2414. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2415. kfree(cmd);
  2416. return rc;
  2417. }
  2418. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2419. struct ieee80211_vif *vif, u8 *addr)
  2420. {
  2421. struct mwl8k_cmd_set_new_stn *cmd;
  2422. int rc;
  2423. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2424. if (cmd == NULL)
  2425. return -ENOMEM;
  2426. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2427. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2428. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2429. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2430. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2431. kfree(cmd);
  2432. return rc;
  2433. }
  2434. /*
  2435. * CMD_UPDATE_STADB.
  2436. */
  2437. struct ewc_ht_info {
  2438. __le16 control1;
  2439. __le16 control2;
  2440. __le16 control3;
  2441. } __packed;
  2442. struct peer_capability_info {
  2443. /* Peer type - AP vs. STA. */
  2444. __u8 peer_type;
  2445. /* Basic 802.11 capabilities from assoc resp. */
  2446. __le16 basic_caps;
  2447. /* Set if peer supports 802.11n high throughput (HT). */
  2448. __u8 ht_support;
  2449. /* Valid if HT is supported. */
  2450. __le16 ht_caps;
  2451. __u8 extended_ht_caps;
  2452. struct ewc_ht_info ewc_info;
  2453. /* Legacy rate table. Intersection of our rates and peer rates. */
  2454. __u8 legacy_rates[12];
  2455. /* HT rate table. Intersection of our rates and peer rates. */
  2456. __u8 ht_rates[16];
  2457. __u8 pad[16];
  2458. /* If set, interoperability mode, no proprietary extensions. */
  2459. __u8 interop;
  2460. __u8 pad2;
  2461. __u8 station_id;
  2462. __le16 amsdu_enabled;
  2463. } __packed;
  2464. struct mwl8k_cmd_update_stadb {
  2465. struct mwl8k_cmd_pkt header;
  2466. /* See STADB_ACTION_TYPE */
  2467. __le32 action;
  2468. /* Peer MAC address */
  2469. __u8 peer_addr[ETH_ALEN];
  2470. __le32 reserved;
  2471. /* Peer info - valid during add/update. */
  2472. struct peer_capability_info peer_info;
  2473. } __packed;
  2474. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2475. #define MWL8K_STA_DB_DEL_ENTRY 2
  2476. /* Peer Entry flags - used to define the type of the peer node */
  2477. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2478. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2479. struct ieee80211_vif *vif,
  2480. struct ieee80211_sta *sta)
  2481. {
  2482. struct mwl8k_cmd_update_stadb *cmd;
  2483. struct peer_capability_info *p;
  2484. u32 rates;
  2485. int rc;
  2486. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2487. if (cmd == NULL)
  2488. return -ENOMEM;
  2489. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2490. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2491. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2492. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2493. p = &cmd->peer_info;
  2494. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2495. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2496. p->ht_support = sta->ht_cap.ht_supported;
  2497. p->ht_caps = sta->ht_cap.cap;
  2498. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2499. ((sta->ht_cap.ampdu_density & 7) << 2);
  2500. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2501. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2502. else
  2503. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2504. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2505. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2506. p->interop = 1;
  2507. p->amsdu_enabled = 0;
  2508. rc = mwl8k_post_cmd(hw, &cmd->header);
  2509. kfree(cmd);
  2510. return rc ? rc : p->station_id;
  2511. }
  2512. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2513. struct ieee80211_vif *vif, u8 *addr)
  2514. {
  2515. struct mwl8k_cmd_update_stadb *cmd;
  2516. int rc;
  2517. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2518. if (cmd == NULL)
  2519. return -ENOMEM;
  2520. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2521. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2522. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2523. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2524. rc = mwl8k_post_cmd(hw, &cmd->header);
  2525. kfree(cmd);
  2526. return rc;
  2527. }
  2528. /*
  2529. * Interrupt handling.
  2530. */
  2531. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2532. {
  2533. struct ieee80211_hw *hw = dev_id;
  2534. struct mwl8k_priv *priv = hw->priv;
  2535. u32 status;
  2536. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2537. if (!status)
  2538. return IRQ_NONE;
  2539. if (status & MWL8K_A2H_INT_TX_DONE) {
  2540. status &= ~MWL8K_A2H_INT_TX_DONE;
  2541. tasklet_schedule(&priv->poll_tx_task);
  2542. }
  2543. if (status & MWL8K_A2H_INT_RX_READY) {
  2544. status &= ~MWL8K_A2H_INT_RX_READY;
  2545. tasklet_schedule(&priv->poll_rx_task);
  2546. }
  2547. if (status)
  2548. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2549. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2550. if (priv->hostcmd_wait != NULL)
  2551. complete(priv->hostcmd_wait);
  2552. }
  2553. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2554. if (!mutex_is_locked(&priv->fw_mutex) &&
  2555. priv->radio_on && priv->pending_tx_pkts)
  2556. mwl8k_tx_start(priv);
  2557. }
  2558. return IRQ_HANDLED;
  2559. }
  2560. static void mwl8k_tx_poll(unsigned long data)
  2561. {
  2562. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2563. struct mwl8k_priv *priv = hw->priv;
  2564. int limit;
  2565. int i;
  2566. limit = 32;
  2567. spin_lock_bh(&priv->tx_lock);
  2568. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2569. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2570. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2571. complete(priv->tx_wait);
  2572. priv->tx_wait = NULL;
  2573. }
  2574. spin_unlock_bh(&priv->tx_lock);
  2575. if (limit) {
  2576. writel(~MWL8K_A2H_INT_TX_DONE,
  2577. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2578. } else {
  2579. tasklet_schedule(&priv->poll_tx_task);
  2580. }
  2581. }
  2582. static void mwl8k_rx_poll(unsigned long data)
  2583. {
  2584. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2585. struct mwl8k_priv *priv = hw->priv;
  2586. int limit;
  2587. limit = 32;
  2588. limit -= rxq_process(hw, 0, limit);
  2589. limit -= rxq_refill(hw, 0, limit);
  2590. if (limit) {
  2591. writel(~MWL8K_A2H_INT_RX_READY,
  2592. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2593. } else {
  2594. tasklet_schedule(&priv->poll_rx_task);
  2595. }
  2596. }
  2597. /*
  2598. * Core driver operations.
  2599. */
  2600. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2601. {
  2602. struct mwl8k_priv *priv = hw->priv;
  2603. int index = skb_get_queue_mapping(skb);
  2604. int rc;
  2605. if (!priv->radio_on) {
  2606. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2607. "disabled\n", wiphy_name(hw->wiphy));
  2608. dev_kfree_skb(skb);
  2609. return NETDEV_TX_OK;
  2610. }
  2611. rc = mwl8k_txq_xmit(hw, index, skb);
  2612. return rc;
  2613. }
  2614. static int mwl8k_start(struct ieee80211_hw *hw)
  2615. {
  2616. struct mwl8k_priv *priv = hw->priv;
  2617. int rc;
  2618. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2619. IRQF_SHARED, MWL8K_NAME, hw);
  2620. if (rc) {
  2621. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2622. wiphy_name(hw->wiphy));
  2623. return -EIO;
  2624. }
  2625. /* Enable TX reclaim and RX tasklets. */
  2626. tasklet_enable(&priv->poll_tx_task);
  2627. tasklet_enable(&priv->poll_rx_task);
  2628. /* Enable interrupts */
  2629. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2630. rc = mwl8k_fw_lock(hw);
  2631. if (!rc) {
  2632. rc = mwl8k_cmd_radio_enable(hw);
  2633. if (!priv->ap_fw) {
  2634. if (!rc)
  2635. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2636. if (!rc)
  2637. rc = mwl8k_cmd_set_pre_scan(hw);
  2638. if (!rc)
  2639. rc = mwl8k_cmd_set_post_scan(hw,
  2640. "\x00\x00\x00\x00\x00\x00");
  2641. }
  2642. if (!rc)
  2643. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2644. if (!rc)
  2645. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2646. mwl8k_fw_unlock(hw);
  2647. }
  2648. if (rc) {
  2649. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2650. free_irq(priv->pdev->irq, hw);
  2651. tasklet_disable(&priv->poll_tx_task);
  2652. tasklet_disable(&priv->poll_rx_task);
  2653. }
  2654. return rc;
  2655. }
  2656. static void mwl8k_stop(struct ieee80211_hw *hw)
  2657. {
  2658. struct mwl8k_priv *priv = hw->priv;
  2659. int i;
  2660. mwl8k_cmd_radio_disable(hw);
  2661. ieee80211_stop_queues(hw);
  2662. /* Disable interrupts */
  2663. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2664. free_irq(priv->pdev->irq, hw);
  2665. /* Stop finalize join worker */
  2666. cancel_work_sync(&priv->finalize_join_worker);
  2667. if (priv->beacon_skb != NULL)
  2668. dev_kfree_skb(priv->beacon_skb);
  2669. /* Stop TX reclaim and RX tasklets. */
  2670. tasklet_disable(&priv->poll_tx_task);
  2671. tasklet_disable(&priv->poll_rx_task);
  2672. /* Return all skbs to mac80211 */
  2673. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2674. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2675. }
  2676. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2677. struct ieee80211_vif *vif)
  2678. {
  2679. struct mwl8k_priv *priv = hw->priv;
  2680. struct mwl8k_vif *mwl8k_vif;
  2681. u32 macids_supported;
  2682. int macid;
  2683. /*
  2684. * Reject interface creation if sniffer mode is active, as
  2685. * STA operation is mutually exclusive with hardware sniffer
  2686. * mode. (Sniffer mode is only used on STA firmware.)
  2687. */
  2688. if (priv->sniffer_enabled) {
  2689. printk(KERN_INFO "%s: unable to create STA "
  2690. "interface due to sniffer mode being enabled\n",
  2691. wiphy_name(hw->wiphy));
  2692. return -EINVAL;
  2693. }
  2694. switch (vif->type) {
  2695. case NL80211_IFTYPE_AP:
  2696. macids_supported = priv->ap_macids_supported;
  2697. break;
  2698. case NL80211_IFTYPE_STATION:
  2699. macids_supported = priv->sta_macids_supported;
  2700. break;
  2701. default:
  2702. return -EINVAL;
  2703. }
  2704. macid = ffs(macids_supported & ~priv->macids_used);
  2705. if (!macid--)
  2706. return -EBUSY;
  2707. /* Setup driver private area. */
  2708. mwl8k_vif = MWL8K_VIF(vif);
  2709. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2710. mwl8k_vif->vif = vif;
  2711. mwl8k_vif->macid = macid;
  2712. mwl8k_vif->seqno = 0;
  2713. /* Set the mac address. */
  2714. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2715. if (priv->ap_fw)
  2716. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2717. priv->macids_used |= 1 << mwl8k_vif->macid;
  2718. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2719. return 0;
  2720. }
  2721. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2722. struct ieee80211_vif *vif)
  2723. {
  2724. struct mwl8k_priv *priv = hw->priv;
  2725. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2726. if (priv->ap_fw)
  2727. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2728. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2729. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2730. list_del(&mwl8k_vif->list);
  2731. }
  2732. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2733. {
  2734. struct ieee80211_conf *conf = &hw->conf;
  2735. struct mwl8k_priv *priv = hw->priv;
  2736. int rc;
  2737. if (conf->flags & IEEE80211_CONF_IDLE) {
  2738. mwl8k_cmd_radio_disable(hw);
  2739. return 0;
  2740. }
  2741. rc = mwl8k_fw_lock(hw);
  2742. if (rc)
  2743. return rc;
  2744. rc = mwl8k_cmd_radio_enable(hw);
  2745. if (rc)
  2746. goto out;
  2747. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2748. if (rc)
  2749. goto out;
  2750. if (conf->power_level > 18)
  2751. conf->power_level = 18;
  2752. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2753. if (rc)
  2754. goto out;
  2755. if (priv->ap_fw) {
  2756. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2757. if (!rc)
  2758. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2759. } else {
  2760. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2761. }
  2762. out:
  2763. mwl8k_fw_unlock(hw);
  2764. return rc;
  2765. }
  2766. static void
  2767. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2768. struct ieee80211_bss_conf *info, u32 changed)
  2769. {
  2770. struct mwl8k_priv *priv = hw->priv;
  2771. u32 ap_legacy_rates;
  2772. u8 ap_mcs_rates[16];
  2773. int rc;
  2774. if (mwl8k_fw_lock(hw))
  2775. return;
  2776. /*
  2777. * No need to capture a beacon if we're no longer associated.
  2778. */
  2779. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2780. priv->capture_beacon = false;
  2781. /*
  2782. * Get the AP's legacy and MCS rates.
  2783. */
  2784. if (vif->bss_conf.assoc) {
  2785. struct ieee80211_sta *ap;
  2786. rcu_read_lock();
  2787. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2788. if (ap == NULL) {
  2789. rcu_read_unlock();
  2790. goto out;
  2791. }
  2792. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2793. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2794. } else {
  2795. ap_legacy_rates =
  2796. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2797. }
  2798. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2799. rcu_read_unlock();
  2800. }
  2801. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2802. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2803. if (rc)
  2804. goto out;
  2805. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2806. if (rc)
  2807. goto out;
  2808. }
  2809. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2810. rc = mwl8k_set_radio_preamble(hw,
  2811. vif->bss_conf.use_short_preamble);
  2812. if (rc)
  2813. goto out;
  2814. }
  2815. if (changed & BSS_CHANGED_ERP_SLOT) {
  2816. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2817. if (rc)
  2818. goto out;
  2819. }
  2820. if (vif->bss_conf.assoc &&
  2821. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2822. BSS_CHANGED_HT))) {
  2823. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2824. if (rc)
  2825. goto out;
  2826. }
  2827. if (vif->bss_conf.assoc &&
  2828. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2829. /*
  2830. * Finalize the join. Tell rx handler to process
  2831. * next beacon from our BSSID.
  2832. */
  2833. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2834. priv->capture_beacon = true;
  2835. }
  2836. out:
  2837. mwl8k_fw_unlock(hw);
  2838. }
  2839. static void
  2840. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2841. struct ieee80211_bss_conf *info, u32 changed)
  2842. {
  2843. int rc;
  2844. if (mwl8k_fw_lock(hw))
  2845. return;
  2846. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2847. rc = mwl8k_set_radio_preamble(hw,
  2848. vif->bss_conf.use_short_preamble);
  2849. if (rc)
  2850. goto out;
  2851. }
  2852. if (changed & BSS_CHANGED_BASIC_RATES) {
  2853. int idx;
  2854. int rate;
  2855. /*
  2856. * Use lowest supported basic rate for multicasts
  2857. * and management frames (such as probe responses --
  2858. * beacons will always go out at 1 Mb/s).
  2859. */
  2860. idx = ffs(vif->bss_conf.basic_rates);
  2861. if (idx)
  2862. idx--;
  2863. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2864. rate = mwl8k_rates_24[idx].hw_value;
  2865. else
  2866. rate = mwl8k_rates_50[idx].hw_value;
  2867. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2868. }
  2869. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2870. struct sk_buff *skb;
  2871. skb = ieee80211_beacon_get(hw, vif);
  2872. if (skb != NULL) {
  2873. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2874. kfree_skb(skb);
  2875. }
  2876. }
  2877. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2878. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2879. out:
  2880. mwl8k_fw_unlock(hw);
  2881. }
  2882. static void
  2883. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2884. struct ieee80211_bss_conf *info, u32 changed)
  2885. {
  2886. struct mwl8k_priv *priv = hw->priv;
  2887. if (!priv->ap_fw)
  2888. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2889. else
  2890. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2891. }
  2892. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2893. struct netdev_hw_addr_list *mc_list)
  2894. {
  2895. struct mwl8k_cmd_pkt *cmd;
  2896. /*
  2897. * Synthesize and return a command packet that programs the
  2898. * hardware multicast address filter. At this point we don't
  2899. * know whether FIF_ALLMULTI is being requested, but if it is,
  2900. * we'll end up throwing this packet away and creating a new
  2901. * one in mwl8k_configure_filter().
  2902. */
  2903. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2904. return (unsigned long)cmd;
  2905. }
  2906. static int
  2907. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2908. unsigned int changed_flags,
  2909. unsigned int *total_flags)
  2910. {
  2911. struct mwl8k_priv *priv = hw->priv;
  2912. /*
  2913. * Hardware sniffer mode is mutually exclusive with STA
  2914. * operation, so refuse to enable sniffer mode if a STA
  2915. * interface is active.
  2916. */
  2917. if (!list_empty(&priv->vif_list)) {
  2918. if (net_ratelimit())
  2919. printk(KERN_INFO "%s: not enabling sniffer "
  2920. "mode because STA interface is active\n",
  2921. wiphy_name(hw->wiphy));
  2922. return 0;
  2923. }
  2924. if (!priv->sniffer_enabled) {
  2925. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2926. return 0;
  2927. priv->sniffer_enabled = true;
  2928. }
  2929. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2930. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2931. FIF_OTHER_BSS;
  2932. return 1;
  2933. }
  2934. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2935. {
  2936. if (!list_empty(&priv->vif_list))
  2937. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2938. return NULL;
  2939. }
  2940. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2941. unsigned int changed_flags,
  2942. unsigned int *total_flags,
  2943. u64 multicast)
  2944. {
  2945. struct mwl8k_priv *priv = hw->priv;
  2946. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2947. /*
  2948. * AP firmware doesn't allow fine-grained control over
  2949. * the receive filter.
  2950. */
  2951. if (priv->ap_fw) {
  2952. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2953. kfree(cmd);
  2954. return;
  2955. }
  2956. /*
  2957. * Enable hardware sniffer mode if FIF_CONTROL or
  2958. * FIF_OTHER_BSS is requested.
  2959. */
  2960. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2961. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2962. kfree(cmd);
  2963. return;
  2964. }
  2965. /* Clear unsupported feature flags */
  2966. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2967. if (mwl8k_fw_lock(hw)) {
  2968. kfree(cmd);
  2969. return;
  2970. }
  2971. if (priv->sniffer_enabled) {
  2972. mwl8k_cmd_enable_sniffer(hw, 0);
  2973. priv->sniffer_enabled = false;
  2974. }
  2975. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2976. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2977. /*
  2978. * Disable the BSS filter.
  2979. */
  2980. mwl8k_cmd_set_pre_scan(hw);
  2981. } else {
  2982. struct mwl8k_vif *mwl8k_vif;
  2983. const u8 *bssid;
  2984. /*
  2985. * Enable the BSS filter.
  2986. *
  2987. * If there is an active STA interface, use that
  2988. * interface's BSSID, otherwise use a dummy one
  2989. * (where the OUI part needs to be nonzero for
  2990. * the BSSID to be accepted by POST_SCAN).
  2991. */
  2992. mwl8k_vif = mwl8k_first_vif(priv);
  2993. if (mwl8k_vif != NULL)
  2994. bssid = mwl8k_vif->vif->bss_conf.bssid;
  2995. else
  2996. bssid = "\x01\x00\x00\x00\x00\x00";
  2997. mwl8k_cmd_set_post_scan(hw, bssid);
  2998. }
  2999. }
  3000. /*
  3001. * If FIF_ALLMULTI is being requested, throw away the command
  3002. * packet that ->prepare_multicast() built and replace it with
  3003. * a command packet that enables reception of all multicast
  3004. * packets.
  3005. */
  3006. if (*total_flags & FIF_ALLMULTI) {
  3007. kfree(cmd);
  3008. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3009. }
  3010. if (cmd != NULL) {
  3011. mwl8k_post_cmd(hw, cmd);
  3012. kfree(cmd);
  3013. }
  3014. mwl8k_fw_unlock(hw);
  3015. }
  3016. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3017. {
  3018. return mwl8k_cmd_set_rts_threshold(hw, value);
  3019. }
  3020. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3021. struct ieee80211_vif *vif,
  3022. struct ieee80211_sta *sta)
  3023. {
  3024. struct mwl8k_priv *priv = hw->priv;
  3025. if (priv->ap_fw)
  3026. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3027. else
  3028. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3029. }
  3030. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3031. struct ieee80211_vif *vif,
  3032. struct ieee80211_sta *sta)
  3033. {
  3034. struct mwl8k_priv *priv = hw->priv;
  3035. int ret;
  3036. if (!priv->ap_fw) {
  3037. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3038. if (ret >= 0) {
  3039. MWL8K_STA(sta)->peer_id = ret;
  3040. return 0;
  3041. }
  3042. return ret;
  3043. }
  3044. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3045. }
  3046. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3047. const struct ieee80211_tx_queue_params *params)
  3048. {
  3049. struct mwl8k_priv *priv = hw->priv;
  3050. int rc;
  3051. rc = mwl8k_fw_lock(hw);
  3052. if (!rc) {
  3053. if (!priv->wmm_enabled)
  3054. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3055. if (!rc)
  3056. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3057. params->cw_min,
  3058. params->cw_max,
  3059. params->aifs,
  3060. params->txop);
  3061. mwl8k_fw_unlock(hw);
  3062. }
  3063. return rc;
  3064. }
  3065. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3066. struct ieee80211_low_level_stats *stats)
  3067. {
  3068. return mwl8k_cmd_get_stat(hw, stats);
  3069. }
  3070. static int
  3071. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3072. enum ieee80211_ampdu_mlme_action action,
  3073. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3074. {
  3075. switch (action) {
  3076. case IEEE80211_AMPDU_RX_START:
  3077. case IEEE80211_AMPDU_RX_STOP:
  3078. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3079. return -ENOTSUPP;
  3080. return 0;
  3081. default:
  3082. return -ENOTSUPP;
  3083. }
  3084. }
  3085. static const struct ieee80211_ops mwl8k_ops = {
  3086. .tx = mwl8k_tx,
  3087. .start = mwl8k_start,
  3088. .stop = mwl8k_stop,
  3089. .add_interface = mwl8k_add_interface,
  3090. .remove_interface = mwl8k_remove_interface,
  3091. .config = mwl8k_config,
  3092. .bss_info_changed = mwl8k_bss_info_changed,
  3093. .prepare_multicast = mwl8k_prepare_multicast,
  3094. .configure_filter = mwl8k_configure_filter,
  3095. .set_rts_threshold = mwl8k_set_rts_threshold,
  3096. .sta_add = mwl8k_sta_add,
  3097. .sta_remove = mwl8k_sta_remove,
  3098. .conf_tx = mwl8k_conf_tx,
  3099. .get_stats = mwl8k_get_stats,
  3100. .ampdu_action = mwl8k_ampdu_action,
  3101. };
  3102. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3103. {
  3104. struct mwl8k_priv *priv =
  3105. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3106. struct sk_buff *skb = priv->beacon_skb;
  3107. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3108. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3109. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3110. mgmt->u.beacon.variable, len);
  3111. int dtim_period = 1;
  3112. if (tim && tim[1] >= 2)
  3113. dtim_period = tim[3];
  3114. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3115. dev_kfree_skb(skb);
  3116. priv->beacon_skb = NULL;
  3117. }
  3118. enum {
  3119. MWL8363 = 0,
  3120. MWL8687,
  3121. MWL8366,
  3122. };
  3123. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3124. [MWL8363] = {
  3125. .part_name = "88w8363",
  3126. .helper_image = "mwl8k/helper_8363.fw",
  3127. .fw_image = "mwl8k/fmimage_8363.fw",
  3128. },
  3129. [MWL8687] = {
  3130. .part_name = "88w8687",
  3131. .helper_image = "mwl8k/helper_8687.fw",
  3132. .fw_image = "mwl8k/fmimage_8687.fw",
  3133. },
  3134. [MWL8366] = {
  3135. .part_name = "88w8366",
  3136. .helper_image = "mwl8k/helper_8366.fw",
  3137. .fw_image = "mwl8k/fmimage_8366.fw",
  3138. .ap_rxd_ops = &rxd_8366_ap_ops,
  3139. },
  3140. };
  3141. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3142. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3143. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3144. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3145. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3146. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3147. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3148. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3149. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3150. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3151. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3152. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3153. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3154. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3155. { },
  3156. };
  3157. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3158. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3159. const struct pci_device_id *id)
  3160. {
  3161. static int printed_version = 0;
  3162. struct ieee80211_hw *hw;
  3163. struct mwl8k_priv *priv;
  3164. int rc;
  3165. int i;
  3166. if (!printed_version) {
  3167. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3168. printed_version = 1;
  3169. }
  3170. rc = pci_enable_device(pdev);
  3171. if (rc) {
  3172. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3173. MWL8K_NAME);
  3174. return rc;
  3175. }
  3176. rc = pci_request_regions(pdev, MWL8K_NAME);
  3177. if (rc) {
  3178. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3179. MWL8K_NAME);
  3180. goto err_disable_device;
  3181. }
  3182. pci_set_master(pdev);
  3183. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3184. if (hw == NULL) {
  3185. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3186. rc = -ENOMEM;
  3187. goto err_free_reg;
  3188. }
  3189. SET_IEEE80211_DEV(hw, &pdev->dev);
  3190. pci_set_drvdata(pdev, hw);
  3191. priv = hw->priv;
  3192. priv->hw = hw;
  3193. priv->pdev = pdev;
  3194. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3195. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3196. if (priv->sram == NULL) {
  3197. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3198. wiphy_name(hw->wiphy));
  3199. goto err_iounmap;
  3200. }
  3201. /*
  3202. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3203. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3204. */
  3205. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3206. if (priv->regs == NULL) {
  3207. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3208. if (priv->regs == NULL) {
  3209. printk(KERN_ERR "%s: Cannot map device registers\n",
  3210. wiphy_name(hw->wiphy));
  3211. goto err_iounmap;
  3212. }
  3213. }
  3214. /* Reset firmware and hardware */
  3215. mwl8k_hw_reset(priv);
  3216. /* Ask userland hotplug daemon for the device firmware */
  3217. rc = mwl8k_request_firmware(priv);
  3218. if (rc) {
  3219. printk(KERN_ERR "%s: Firmware files not found\n",
  3220. wiphy_name(hw->wiphy));
  3221. goto err_stop_firmware;
  3222. }
  3223. /* Load firmware into hardware */
  3224. rc = mwl8k_load_firmware(hw);
  3225. if (rc) {
  3226. printk(KERN_ERR "%s: Cannot start firmware\n",
  3227. wiphy_name(hw->wiphy));
  3228. goto err_stop_firmware;
  3229. }
  3230. /* Reclaim memory once firmware is successfully loaded */
  3231. mwl8k_release_firmware(priv);
  3232. if (priv->ap_fw) {
  3233. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3234. if (priv->rxd_ops == NULL) {
  3235. printk(KERN_ERR "%s: Driver does not have AP "
  3236. "firmware image support for this hardware\n",
  3237. wiphy_name(hw->wiphy));
  3238. goto err_stop_firmware;
  3239. }
  3240. } else {
  3241. priv->rxd_ops = &rxd_sta_ops;
  3242. }
  3243. priv->sniffer_enabled = false;
  3244. priv->wmm_enabled = false;
  3245. priv->pending_tx_pkts = 0;
  3246. /*
  3247. * Extra headroom is the size of the required DMA header
  3248. * minus the size of the smallest 802.11 frame (CTS frame).
  3249. */
  3250. hw->extra_tx_headroom =
  3251. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3252. hw->channel_change_time = 10;
  3253. hw->queues = MWL8K_TX_QUEUES;
  3254. /* Set rssi values to dBm */
  3255. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3256. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3257. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3258. priv->macids_used = 0;
  3259. INIT_LIST_HEAD(&priv->vif_list);
  3260. /* Set default radio state and preamble */
  3261. priv->radio_on = 0;
  3262. priv->radio_short_preamble = 0;
  3263. /* Finalize join worker */
  3264. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3265. /* TX reclaim and RX tasklets. */
  3266. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3267. tasklet_disable(&priv->poll_tx_task);
  3268. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3269. tasklet_disable(&priv->poll_rx_task);
  3270. /* Power management cookie */
  3271. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3272. if (priv->cookie == NULL)
  3273. goto err_stop_firmware;
  3274. rc = mwl8k_rxq_init(hw, 0);
  3275. if (rc)
  3276. goto err_free_cookie;
  3277. rxq_refill(hw, 0, INT_MAX);
  3278. mutex_init(&priv->fw_mutex);
  3279. priv->fw_mutex_owner = NULL;
  3280. priv->fw_mutex_depth = 0;
  3281. priv->hostcmd_wait = NULL;
  3282. spin_lock_init(&priv->tx_lock);
  3283. priv->tx_wait = NULL;
  3284. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3285. rc = mwl8k_txq_init(hw, i);
  3286. if (rc)
  3287. goto err_free_queues;
  3288. }
  3289. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3290. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3291. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3292. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3293. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3294. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3295. IRQF_SHARED, MWL8K_NAME, hw);
  3296. if (rc) {
  3297. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3298. wiphy_name(hw->wiphy));
  3299. goto err_free_queues;
  3300. }
  3301. /*
  3302. * Temporarily enable interrupts. Initial firmware host
  3303. * commands use interrupts and avoid polling. Disable
  3304. * interrupts when done.
  3305. */
  3306. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3307. /* Get config data, mac addrs etc */
  3308. if (priv->ap_fw) {
  3309. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3310. if (!rc)
  3311. rc = mwl8k_cmd_set_hw_spec(hw);
  3312. } else {
  3313. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3314. }
  3315. if (rc) {
  3316. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3317. wiphy_name(hw->wiphy));
  3318. goto err_free_irq;
  3319. }
  3320. hw->wiphy->interface_modes = 0;
  3321. if (priv->ap_macids_supported)
  3322. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3323. if (priv->sta_macids_supported)
  3324. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3325. /* Turn radio off */
  3326. rc = mwl8k_cmd_radio_disable(hw);
  3327. if (rc) {
  3328. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3329. goto err_free_irq;
  3330. }
  3331. /* Clear MAC address */
  3332. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3333. if (rc) {
  3334. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3335. wiphy_name(hw->wiphy));
  3336. goto err_free_irq;
  3337. }
  3338. /* Disable interrupts */
  3339. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3340. free_irq(priv->pdev->irq, hw);
  3341. rc = ieee80211_register_hw(hw);
  3342. if (rc) {
  3343. printk(KERN_ERR "%s: Cannot register device\n",
  3344. wiphy_name(hw->wiphy));
  3345. goto err_free_queues;
  3346. }
  3347. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3348. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3349. priv->hw_rev, hw->wiphy->perm_addr,
  3350. priv->ap_fw ? "AP" : "STA",
  3351. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3352. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3353. return 0;
  3354. err_free_irq:
  3355. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3356. free_irq(priv->pdev->irq, hw);
  3357. err_free_queues:
  3358. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3359. mwl8k_txq_deinit(hw, i);
  3360. mwl8k_rxq_deinit(hw, 0);
  3361. err_free_cookie:
  3362. if (priv->cookie != NULL)
  3363. pci_free_consistent(priv->pdev, 4,
  3364. priv->cookie, priv->cookie_dma);
  3365. err_stop_firmware:
  3366. mwl8k_hw_reset(priv);
  3367. mwl8k_release_firmware(priv);
  3368. err_iounmap:
  3369. if (priv->regs != NULL)
  3370. pci_iounmap(pdev, priv->regs);
  3371. if (priv->sram != NULL)
  3372. pci_iounmap(pdev, priv->sram);
  3373. pci_set_drvdata(pdev, NULL);
  3374. ieee80211_free_hw(hw);
  3375. err_free_reg:
  3376. pci_release_regions(pdev);
  3377. err_disable_device:
  3378. pci_disable_device(pdev);
  3379. return rc;
  3380. }
  3381. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3382. {
  3383. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3384. }
  3385. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3386. {
  3387. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3388. struct mwl8k_priv *priv;
  3389. int i;
  3390. if (hw == NULL)
  3391. return;
  3392. priv = hw->priv;
  3393. ieee80211_stop_queues(hw);
  3394. ieee80211_unregister_hw(hw);
  3395. /* Remove TX reclaim and RX tasklets. */
  3396. tasklet_kill(&priv->poll_tx_task);
  3397. tasklet_kill(&priv->poll_rx_task);
  3398. /* Stop hardware */
  3399. mwl8k_hw_reset(priv);
  3400. /* Return all skbs to mac80211 */
  3401. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3402. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3403. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3404. mwl8k_txq_deinit(hw, i);
  3405. mwl8k_rxq_deinit(hw, 0);
  3406. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3407. pci_iounmap(pdev, priv->regs);
  3408. pci_iounmap(pdev, priv->sram);
  3409. pci_set_drvdata(pdev, NULL);
  3410. ieee80211_free_hw(hw);
  3411. pci_release_regions(pdev);
  3412. pci_disable_device(pdev);
  3413. }
  3414. static struct pci_driver mwl8k_driver = {
  3415. .name = MWL8K_NAME,
  3416. .id_table = mwl8k_pci_id_table,
  3417. .probe = mwl8k_probe,
  3418. .remove = __devexit_p(mwl8k_remove),
  3419. .shutdown = __devexit_p(mwl8k_shutdown),
  3420. };
  3421. static int __init mwl8k_init(void)
  3422. {
  3423. return pci_register_driver(&mwl8k_driver);
  3424. }
  3425. static void __exit mwl8k_exit(void)
  3426. {
  3427. pci_unregister_driver(&mwl8k_driver);
  3428. }
  3429. module_init(mwl8k_init);
  3430. module_exit(mwl8k_exit);
  3431. MODULE_DESCRIPTION(MWL8K_DESC);
  3432. MODULE_VERSION(MWL8K_VERSION);
  3433. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3434. MODULE_LICENSE("GPL");