pio.h 4.4 KB

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  1. #ifndef B43_PIO_H_
  2. #define B43_PIO_H_
  3. #include "b43.h"
  4. #include <linux/interrupt.h>
  5. #include <linux/io.h>
  6. #include <linux/list.h>
  7. #include <linux/skbuff.h>
  8. /*** Registers for PIO queues up to revision 7. ***/
  9. /* TX queue. */
  10. #define B43_PIO_TXCTL 0x00
  11. #define B43_PIO_TXCTL_WRITELO 0x0001
  12. #define B43_PIO_TXCTL_WRITEHI 0x0002
  13. #define B43_PIO_TXCTL_EOF 0x0004
  14. #define B43_PIO_TXCTL_FREADY 0x0008
  15. #define B43_PIO_TXCTL_FLUSHREQ 0x0020
  16. #define B43_PIO_TXCTL_FLUSHPEND 0x0040
  17. #define B43_PIO_TXCTL_SUSPREQ 0x0080
  18. #define B43_PIO_TXCTL_QSUSP 0x0100
  19. #define B43_PIO_TXCTL_COMMCNT 0xFC00
  20. #define B43_PIO_TXCTL_COMMCNT_SHIFT 10
  21. #define B43_PIO_TXDATA 0x02
  22. #define B43_PIO_TXQBUFSIZE 0x04
  23. /* RX queue. */
  24. #define B43_PIO_RXCTL 0x00
  25. #define B43_PIO_RXCTL_FRAMERDY 0x0001
  26. #define B43_PIO_RXCTL_DATARDY 0x0002
  27. #define B43_PIO_RXDATA 0x02
  28. /*** Registers for PIO queues revision 8 and later. ***/
  29. /* TX queue */
  30. #define B43_PIO8_TXCTL 0x00
  31. #define B43_PIO8_TXCTL_0_7 0x00000001
  32. #define B43_PIO8_TXCTL_8_15 0x00000002
  33. #define B43_PIO8_TXCTL_16_23 0x00000004
  34. #define B43_PIO8_TXCTL_24_31 0x00000008
  35. #define B43_PIO8_TXCTL_EOF 0x00000010
  36. #define B43_PIO8_TXCTL_FREADY 0x00000080
  37. #define B43_PIO8_TXCTL_SUSPREQ 0x00000100
  38. #define B43_PIO8_TXCTL_QSUSP 0x00000200
  39. #define B43_PIO8_TXCTL_FLUSHREQ 0x00000400
  40. #define B43_PIO8_TXCTL_FLUSHPEND 0x00000800
  41. #define B43_PIO8_TXDATA 0x04
  42. /* RX queue */
  43. #define B43_PIO8_RXCTL 0x00
  44. #define B43_PIO8_RXCTL_FRAMERDY 0x00000001
  45. #define B43_PIO8_RXCTL_DATARDY 0x00000002
  46. #define B43_PIO8_RXDATA 0x04
  47. /* The maximum number of TX-packets the HW can handle. */
  48. #define B43_PIO_MAX_NR_TXPACKETS 32
  49. struct b43_pio_txpacket {
  50. /* Pointer to the TX queue we belong to. */
  51. struct b43_pio_txqueue *queue;
  52. /* The TX data packet. */
  53. struct sk_buff *skb;
  54. /* Index in the (struct b43_pio_txqueue)->packets array. */
  55. u8 index;
  56. struct list_head list;
  57. };
  58. struct b43_pio_txqueue {
  59. struct b43_wldev *dev;
  60. u16 mmio_base;
  61. /* The device queue buffer size in bytes. */
  62. u16 buffer_size;
  63. /* The number of used bytes in the device queue buffer. */
  64. u16 buffer_used;
  65. /* The number of packets that can still get queued.
  66. * This is decremented on queueing a packet and incremented
  67. * after receiving the transmit status. */
  68. u16 free_packet_slots;
  69. /* True, if the mac80211 queue was stopped due to overflow at TX. */
  70. bool stopped;
  71. /* Our b43 queue index number */
  72. u8 index;
  73. /* The mac80211 QoS queue priority. */
  74. u8 queue_prio;
  75. /* Buffer for TX packet meta data. */
  76. struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS];
  77. struct list_head packets_list;
  78. /* Shortcut to the 802.11 core revision. This is to
  79. * avoid horrible pointer dereferencing in the fastpaths. */
  80. u8 rev;
  81. };
  82. struct b43_pio_rxqueue {
  83. struct b43_wldev *dev;
  84. u16 mmio_base;
  85. /* Shortcut to the 802.11 core revision. This is to
  86. * avoid horrible pointer dereferencing in the fastpaths. */
  87. u8 rev;
  88. };
  89. static inline u16 b43_piotx_read16(struct b43_pio_txqueue *q, u16 offset)
  90. {
  91. return b43_read16(q->dev, q->mmio_base + offset);
  92. }
  93. static inline u32 b43_piotx_read32(struct b43_pio_txqueue *q, u16 offset)
  94. {
  95. return b43_read32(q->dev, q->mmio_base + offset);
  96. }
  97. static inline void b43_piotx_write16(struct b43_pio_txqueue *q,
  98. u16 offset, u16 value)
  99. {
  100. b43_write16(q->dev, q->mmio_base + offset, value);
  101. }
  102. static inline void b43_piotx_write32(struct b43_pio_txqueue *q,
  103. u16 offset, u32 value)
  104. {
  105. b43_write32(q->dev, q->mmio_base + offset, value);
  106. }
  107. static inline u16 b43_piorx_read16(struct b43_pio_rxqueue *q, u16 offset)
  108. {
  109. return b43_read16(q->dev, q->mmio_base + offset);
  110. }
  111. static inline u32 b43_piorx_read32(struct b43_pio_rxqueue *q, u16 offset)
  112. {
  113. return b43_read32(q->dev, q->mmio_base + offset);
  114. }
  115. static inline void b43_piorx_write16(struct b43_pio_rxqueue *q,
  116. u16 offset, u16 value)
  117. {
  118. b43_write16(q->dev, q->mmio_base + offset, value);
  119. }
  120. static inline void b43_piorx_write32(struct b43_pio_rxqueue *q,
  121. u16 offset, u32 value)
  122. {
  123. b43_write32(q->dev, q->mmio_base + offset, value);
  124. }
  125. int b43_pio_init(struct b43_wldev *dev);
  126. void b43_pio_free(struct b43_wldev *dev);
  127. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb);
  128. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  129. const struct b43_txstatus *status);
  130. void b43_pio_rx(struct b43_pio_rxqueue *q);
  131. void b43_pio_tx_suspend(struct b43_wldev *dev);
  132. void b43_pio_tx_resume(struct b43_wldev *dev);
  133. #endif /* B43_PIO_H_ */