htc_drv_init.c 23 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "htc.h"
  17. MODULE_AUTHOR("Atheros Communications");
  18. MODULE_LICENSE("Dual BSD/GPL");
  19. MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  20. static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  21. module_param_named(debug, ath9k_debug, uint, 0);
  22. MODULE_PARM_DESC(debug, "Debugging mask");
  23. int htc_modparam_nohwcrypt;
  24. module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  25. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  26. #define CHAN2G(_freq, _idx) { \
  27. .center_freq = (_freq), \
  28. .hw_value = (_idx), \
  29. .max_power = 20, \
  30. }
  31. #define CHAN5G(_freq, _idx) { \
  32. .band = IEEE80211_BAND_5GHZ, \
  33. .center_freq = (_freq), \
  34. .hw_value = (_idx), \
  35. .max_power = 20, \
  36. }
  37. static struct ieee80211_channel ath9k_2ghz_channels[] = {
  38. CHAN2G(2412, 0), /* Channel 1 */
  39. CHAN2G(2417, 1), /* Channel 2 */
  40. CHAN2G(2422, 2), /* Channel 3 */
  41. CHAN2G(2427, 3), /* Channel 4 */
  42. CHAN2G(2432, 4), /* Channel 5 */
  43. CHAN2G(2437, 5), /* Channel 6 */
  44. CHAN2G(2442, 6), /* Channel 7 */
  45. CHAN2G(2447, 7), /* Channel 8 */
  46. CHAN2G(2452, 8), /* Channel 9 */
  47. CHAN2G(2457, 9), /* Channel 10 */
  48. CHAN2G(2462, 10), /* Channel 11 */
  49. CHAN2G(2467, 11), /* Channel 12 */
  50. CHAN2G(2472, 12), /* Channel 13 */
  51. CHAN2G(2484, 13), /* Channel 14 */
  52. };
  53. static struct ieee80211_channel ath9k_5ghz_channels[] = {
  54. /* _We_ call this UNII 1 */
  55. CHAN5G(5180, 14), /* Channel 36 */
  56. CHAN5G(5200, 15), /* Channel 40 */
  57. CHAN5G(5220, 16), /* Channel 44 */
  58. CHAN5G(5240, 17), /* Channel 48 */
  59. /* _We_ call this UNII 2 */
  60. CHAN5G(5260, 18), /* Channel 52 */
  61. CHAN5G(5280, 19), /* Channel 56 */
  62. CHAN5G(5300, 20), /* Channel 60 */
  63. CHAN5G(5320, 21), /* Channel 64 */
  64. /* _We_ call this "Middle band" */
  65. CHAN5G(5500, 22), /* Channel 100 */
  66. CHAN5G(5520, 23), /* Channel 104 */
  67. CHAN5G(5540, 24), /* Channel 108 */
  68. CHAN5G(5560, 25), /* Channel 112 */
  69. CHAN5G(5580, 26), /* Channel 116 */
  70. CHAN5G(5600, 27), /* Channel 120 */
  71. CHAN5G(5620, 28), /* Channel 124 */
  72. CHAN5G(5640, 29), /* Channel 128 */
  73. CHAN5G(5660, 30), /* Channel 132 */
  74. CHAN5G(5680, 31), /* Channel 136 */
  75. CHAN5G(5700, 32), /* Channel 140 */
  76. /* _We_ call this UNII 3 */
  77. CHAN5G(5745, 33), /* Channel 149 */
  78. CHAN5G(5765, 34), /* Channel 153 */
  79. CHAN5G(5785, 35), /* Channel 157 */
  80. CHAN5G(5805, 36), /* Channel 161 */
  81. CHAN5G(5825, 37), /* Channel 165 */
  82. };
  83. /* Atheros hardware rate code addition for short premble */
  84. #define SHPCHECK(__hw_rate, __flags) \
  85. ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  86. #define RATE(_bitrate, _hw_rate, _flags) { \
  87. .bitrate = (_bitrate), \
  88. .flags = (_flags), \
  89. .hw_value = (_hw_rate), \
  90. .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
  91. }
  92. static struct ieee80211_rate ath9k_legacy_rates[] = {
  93. RATE(10, 0x1b, 0),
  94. RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
  95. RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
  96. RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
  97. RATE(60, 0x0b, 0),
  98. RATE(90, 0x0f, 0),
  99. RATE(120, 0x0a, 0),
  100. RATE(180, 0x0e, 0),
  101. RATE(240, 0x09, 0),
  102. RATE(360, 0x0d, 0),
  103. RATE(480, 0x08, 0),
  104. RATE(540, 0x0c, 0),
  105. };
  106. static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
  107. {
  108. int time_left;
  109. if (atomic_read(&priv->htc->tgt_ready) > 0) {
  110. atomic_dec(&priv->htc->tgt_ready);
  111. return 0;
  112. }
  113. /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
  114. time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
  115. if (!time_left) {
  116. dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
  117. return -ETIMEDOUT;
  118. }
  119. atomic_dec(&priv->htc->tgt_ready);
  120. return 0;
  121. }
  122. static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
  123. {
  124. ath9k_htc_exit_debug(priv->ah);
  125. ath9k_hw_deinit(priv->ah);
  126. tasklet_kill(&priv->wmi_tasklet);
  127. tasklet_kill(&priv->rx_tasklet);
  128. tasklet_kill(&priv->tx_tasklet);
  129. kfree(priv->ah);
  130. priv->ah = NULL;
  131. }
  132. static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
  133. {
  134. struct ieee80211_hw *hw = priv->hw;
  135. wiphy_rfkill_stop_polling(hw->wiphy);
  136. ath9k_deinit_leds(priv);
  137. ieee80211_unregister_hw(hw);
  138. ath9k_rx_cleanup(priv);
  139. ath9k_tx_cleanup(priv);
  140. ath9k_deinit_priv(priv);
  141. }
  142. static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
  143. u16 service_id,
  144. void (*tx) (void *,
  145. struct sk_buff *,
  146. enum htc_endpoint_id,
  147. bool txok),
  148. enum htc_endpoint_id *ep_id)
  149. {
  150. struct htc_service_connreq req;
  151. memset(&req, 0, sizeof(struct htc_service_connreq));
  152. req.service_id = service_id;
  153. req.ep_callbacks.priv = priv;
  154. req.ep_callbacks.rx = ath9k_htc_rxep;
  155. req.ep_callbacks.tx = tx;
  156. return htc_connect_service(priv->htc, &req, ep_id);
  157. }
  158. static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
  159. {
  160. int ret;
  161. /* WMI CMD*/
  162. ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
  163. if (ret)
  164. goto err;
  165. /* Beacon */
  166. ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
  167. &priv->beacon_ep);
  168. if (ret)
  169. goto err;
  170. /* CAB */
  171. ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
  172. &priv->cab_ep);
  173. if (ret)
  174. goto err;
  175. /* UAPSD */
  176. ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
  177. &priv->uapsd_ep);
  178. if (ret)
  179. goto err;
  180. /* MGMT */
  181. ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
  182. &priv->mgmt_ep);
  183. if (ret)
  184. goto err;
  185. /* DATA BE */
  186. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
  187. &priv->data_be_ep);
  188. if (ret)
  189. goto err;
  190. /* DATA BK */
  191. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
  192. &priv->data_bk_ep);
  193. if (ret)
  194. goto err;
  195. /* DATA VI */
  196. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
  197. &priv->data_vi_ep);
  198. if (ret)
  199. goto err;
  200. /* DATA VO */
  201. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
  202. &priv->data_vo_ep);
  203. if (ret)
  204. goto err;
  205. /*
  206. * Setup required credits before initializing HTC.
  207. * This is a bit hacky, but, since queuing is done in
  208. * the HIF layer, shouldn't matter much.
  209. */
  210. switch(devid) {
  211. case 0x7010:
  212. case 0x9018:
  213. priv->htc->credits = 45;
  214. break;
  215. default:
  216. priv->htc->credits = 33;
  217. }
  218. ret = htc_init(priv->htc);
  219. if (ret)
  220. goto err;
  221. dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
  222. priv->htc->credits);
  223. return 0;
  224. err:
  225. dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
  226. return ret;
  227. }
  228. static int ath9k_reg_notifier(struct wiphy *wiphy,
  229. struct regulatory_request *request)
  230. {
  231. struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
  232. struct ath9k_htc_priv *priv = hw->priv;
  233. return ath_reg_notifier_apply(wiphy, request,
  234. ath9k_hw_regulatory(priv->ah));
  235. }
  236. static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
  237. {
  238. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  239. struct ath_common *common = ath9k_hw_common(ah);
  240. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  241. __be32 val, reg = cpu_to_be32(reg_offset);
  242. int r;
  243. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
  244. (u8 *) &reg, sizeof(reg),
  245. (u8 *) &val, sizeof(val),
  246. 100);
  247. if (unlikely(r)) {
  248. ath_print(common, ATH_DBG_WMI,
  249. "REGISTER READ FAILED: (0x%04x, %d)\n",
  250. reg_offset, r);
  251. return -EIO;
  252. }
  253. return be32_to_cpu(val);
  254. }
  255. static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
  256. {
  257. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  258. struct ath_common *common = ath9k_hw_common(ah);
  259. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  260. __be32 buf[2] = {
  261. cpu_to_be32(reg_offset),
  262. cpu_to_be32(val),
  263. };
  264. int r;
  265. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  266. (u8 *) &buf, sizeof(buf),
  267. (u8 *) &val, sizeof(val),
  268. 100);
  269. if (unlikely(r)) {
  270. ath_print(common, ATH_DBG_WMI,
  271. "REGISTER WRITE FAILED:(0x%04x, %d)\n",
  272. reg_offset, r);
  273. }
  274. }
  275. static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
  276. {
  277. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  278. struct ath_common *common = ath9k_hw_common(ah);
  279. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  280. u32 rsp_status;
  281. int r;
  282. mutex_lock(&priv->wmi->multi_write_mutex);
  283. /* Store the register/value */
  284. priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
  285. cpu_to_be32(reg_offset);
  286. priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
  287. cpu_to_be32(val);
  288. priv->wmi->multi_write_idx++;
  289. /* If the buffer is full, send it out. */
  290. if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
  291. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  292. (u8 *) &priv->wmi->multi_write,
  293. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  294. (u8 *) &rsp_status, sizeof(rsp_status),
  295. 100);
  296. if (unlikely(r)) {
  297. ath_print(common, ATH_DBG_WMI,
  298. "REGISTER WRITE FAILED, multi len: %d\n",
  299. priv->wmi->multi_write_idx);
  300. }
  301. priv->wmi->multi_write_idx = 0;
  302. }
  303. mutex_unlock(&priv->wmi->multi_write_mutex);
  304. }
  305. static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
  306. {
  307. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  308. struct ath_common *common = ath9k_hw_common(ah);
  309. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  310. if (atomic_read(&priv->wmi->mwrite_cnt))
  311. ath9k_regwrite_buffer(hw_priv, val, reg_offset);
  312. else
  313. ath9k_regwrite_single(hw_priv, val, reg_offset);
  314. }
  315. static void ath9k_enable_regwrite_buffer(void *hw_priv)
  316. {
  317. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  318. struct ath_common *common = ath9k_hw_common(ah);
  319. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  320. atomic_inc(&priv->wmi->mwrite_cnt);
  321. }
  322. static void ath9k_disable_regwrite_buffer(void *hw_priv)
  323. {
  324. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  325. struct ath_common *common = ath9k_hw_common(ah);
  326. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  327. atomic_dec(&priv->wmi->mwrite_cnt);
  328. }
  329. static void ath9k_regwrite_flush(void *hw_priv)
  330. {
  331. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  332. struct ath_common *common = ath9k_hw_common(ah);
  333. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  334. u32 rsp_status;
  335. int r;
  336. mutex_lock(&priv->wmi->multi_write_mutex);
  337. if (priv->wmi->multi_write_idx) {
  338. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  339. (u8 *) &priv->wmi->multi_write,
  340. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  341. (u8 *) &rsp_status, sizeof(rsp_status),
  342. 100);
  343. if (unlikely(r)) {
  344. ath_print(common, ATH_DBG_WMI,
  345. "REGISTER WRITE FAILED, multi len: %d\n",
  346. priv->wmi->multi_write_idx);
  347. }
  348. priv->wmi->multi_write_idx = 0;
  349. }
  350. mutex_unlock(&priv->wmi->multi_write_mutex);
  351. }
  352. static const struct ath_ops ath9k_common_ops = {
  353. .read = ath9k_regread,
  354. .write = ath9k_regwrite,
  355. .enable_write_buffer = ath9k_enable_regwrite_buffer,
  356. .disable_write_buffer = ath9k_disable_regwrite_buffer,
  357. .write_flush = ath9k_regwrite_flush,
  358. };
  359. static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
  360. {
  361. *csz = L1_CACHE_BYTES >> 2;
  362. }
  363. static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  364. {
  365. struct ath_hw *ah = (struct ath_hw *) common->ah;
  366. (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
  367. if (!ath9k_hw_wait(ah,
  368. AR_EEPROM_STATUS_DATA,
  369. AR_EEPROM_STATUS_DATA_BUSY |
  370. AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
  371. AH_WAIT_TIMEOUT))
  372. return false;
  373. *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
  374. AR_EEPROM_STATUS_DATA_VAL);
  375. return true;
  376. }
  377. static const struct ath_bus_ops ath9k_usb_bus_ops = {
  378. .ath_bus_type = ATH_USB,
  379. .read_cachesize = ath_usb_read_cachesize,
  380. .eeprom_read = ath_usb_eeprom_read,
  381. };
  382. static void setup_ht_cap(struct ath9k_htc_priv *priv,
  383. struct ieee80211_sta_ht_cap *ht_info)
  384. {
  385. struct ath_common *common = ath9k_hw_common(priv->ah);
  386. u8 tx_streams, rx_streams;
  387. int i;
  388. ht_info->ht_supported = true;
  389. ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
  390. IEEE80211_HT_CAP_SM_PS |
  391. IEEE80211_HT_CAP_SGI_40 |
  392. IEEE80211_HT_CAP_DSSSCCK40;
  393. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
  394. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  395. ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
  396. ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  397. ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
  398. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  399. /* ath9k_htc supports only 1 or 2 stream devices */
  400. tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
  401. rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
  402. ath_print(common, ATH_DBG_CONFIG,
  403. "TX streams %d, RX streams: %d\n",
  404. tx_streams, rx_streams);
  405. if (tx_streams != rx_streams) {
  406. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  407. ht_info->mcs.tx_params |= ((tx_streams - 1) <<
  408. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  409. }
  410. for (i = 0; i < rx_streams; i++)
  411. ht_info->mcs.rx_mask[i] = 0xff;
  412. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
  413. }
  414. static int ath9k_init_queues(struct ath9k_htc_priv *priv)
  415. {
  416. struct ath_common *common = ath9k_hw_common(priv->ah);
  417. int i;
  418. for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
  419. priv->hwq_map[i] = -1;
  420. priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
  421. if (priv->beaconq == -1) {
  422. ath_print(common, ATH_DBG_FATAL,
  423. "Unable to setup BEACON xmit queue\n");
  424. goto err;
  425. }
  426. priv->cabq = ath9k_htc_cabq_setup(priv);
  427. if (priv->cabq == -1) {
  428. ath_print(common, ATH_DBG_FATAL,
  429. "Unable to setup CAB xmit queue\n");
  430. goto err;
  431. }
  432. if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
  433. ath_print(common, ATH_DBG_FATAL,
  434. "Unable to setup xmit queue for BE traffic\n");
  435. goto err;
  436. }
  437. if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
  438. ath_print(common, ATH_DBG_FATAL,
  439. "Unable to setup xmit queue for BK traffic\n");
  440. goto err;
  441. }
  442. if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
  443. ath_print(common, ATH_DBG_FATAL,
  444. "Unable to setup xmit queue for VI traffic\n");
  445. goto err;
  446. }
  447. if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
  448. ath_print(common, ATH_DBG_FATAL,
  449. "Unable to setup xmit queue for VO traffic\n");
  450. goto err;
  451. }
  452. return 0;
  453. err:
  454. return -EINVAL;
  455. }
  456. static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
  457. {
  458. struct ath_common *common = ath9k_hw_common(priv->ah);
  459. int i = 0;
  460. /* Get the hardware key cache size. */
  461. common->keymax = priv->ah->caps.keycache_size;
  462. if (common->keymax > ATH_KEYMAX) {
  463. ath_print(common, ATH_DBG_ANY,
  464. "Warning, using only %u entries in %u key cache\n",
  465. ATH_KEYMAX, common->keymax);
  466. common->keymax = ATH_KEYMAX;
  467. }
  468. /*
  469. * Reset the key cache since some parts do not
  470. * reset the contents on initial power up.
  471. */
  472. for (i = 0; i < common->keymax; i++)
  473. ath9k_hw_keyreset(priv->ah, (u16) i);
  474. }
  475. static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
  476. {
  477. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
  478. priv->sbands[IEEE80211_BAND_2GHZ].channels =
  479. ath9k_2ghz_channels;
  480. priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
  481. priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
  482. ARRAY_SIZE(ath9k_2ghz_channels);
  483. priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
  484. priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
  485. ARRAY_SIZE(ath9k_legacy_rates);
  486. }
  487. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
  488. priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
  489. priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
  490. priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
  491. ARRAY_SIZE(ath9k_5ghz_channels);
  492. priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
  493. ath9k_legacy_rates + 4;
  494. priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
  495. ARRAY_SIZE(ath9k_legacy_rates) - 4;
  496. }
  497. }
  498. static void ath9k_init_misc(struct ath9k_htc_priv *priv)
  499. {
  500. struct ath_common *common = ath9k_hw_common(priv->ah);
  501. common->tx_chainmask = priv->ah->caps.tx_chainmask;
  502. common->rx_chainmask = priv->ah->caps.rx_chainmask;
  503. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  504. memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
  505. priv->ah->opmode = NL80211_IFTYPE_STATION;
  506. }
  507. static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
  508. {
  509. struct ath_hw *ah = NULL;
  510. struct ath_common *common;
  511. int ret = 0, csz = 0;
  512. priv->op_flags |= OP_INVALID;
  513. ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
  514. if (!ah)
  515. return -ENOMEM;
  516. ah->hw_version.devid = devid;
  517. ah->hw_version.subsysid = 0; /* FIXME */
  518. priv->ah = ah;
  519. common = ath9k_hw_common(ah);
  520. common->ops = &ath9k_common_ops;
  521. common->bus_ops = &ath9k_usb_bus_ops;
  522. common->ah = ah;
  523. common->hw = priv->hw;
  524. common->priv = priv;
  525. common->debug_mask = ath9k_debug;
  526. spin_lock_init(&priv->wmi->wmi_lock);
  527. spin_lock_init(&priv->beacon_lock);
  528. spin_lock_init(&priv->tx_lock);
  529. mutex_init(&priv->mutex);
  530. mutex_init(&priv->htc_pm_lock);
  531. tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
  532. (unsigned long)priv);
  533. tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
  534. (unsigned long)priv);
  535. tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
  536. INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
  537. INIT_WORK(&priv->ps_work, ath9k_ps_work);
  538. /*
  539. * Cache line size is used to size and align various
  540. * structures used to communicate with the hardware.
  541. */
  542. ath_read_cachesize(common, &csz);
  543. common->cachelsz = csz << 2; /* convert to bytes */
  544. ret = ath9k_hw_init(ah);
  545. if (ret) {
  546. ath_print(common, ATH_DBG_FATAL,
  547. "Unable to initialize hardware; "
  548. "initialization status: %d\n", ret);
  549. goto err_hw;
  550. }
  551. ret = ath9k_htc_init_debug(ah);
  552. if (ret) {
  553. ath_print(common, ATH_DBG_FATAL,
  554. "Unable to create debugfs files\n");
  555. goto err_debug;
  556. }
  557. ret = ath9k_init_queues(priv);
  558. if (ret)
  559. goto err_queues;
  560. ath9k_init_crypto(priv);
  561. ath9k_init_channels_rates(priv);
  562. ath9k_init_misc(priv);
  563. return 0;
  564. err_queues:
  565. ath9k_htc_exit_debug(ah);
  566. err_debug:
  567. ath9k_hw_deinit(ah);
  568. err_hw:
  569. kfree(ah);
  570. priv->ah = NULL;
  571. return ret;
  572. }
  573. static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
  574. struct ieee80211_hw *hw)
  575. {
  576. struct ath_common *common = ath9k_hw_common(priv->ah);
  577. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  578. IEEE80211_HW_AMPDU_AGGREGATION |
  579. IEEE80211_HW_SPECTRUM_MGMT |
  580. IEEE80211_HW_HAS_RATE_CONTROL |
  581. IEEE80211_HW_RX_INCLUDES_FCS |
  582. IEEE80211_HW_SUPPORTS_PS |
  583. IEEE80211_HW_PS_NULLFUNC_STACK;
  584. hw->wiphy->interface_modes =
  585. BIT(NL80211_IFTYPE_STATION) |
  586. BIT(NL80211_IFTYPE_ADHOC);
  587. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  588. hw->queues = 4;
  589. hw->channel_change_time = 5000;
  590. hw->max_listen_interval = 10;
  591. hw->vif_data_size = sizeof(struct ath9k_htc_vif);
  592. hw->sta_data_size = sizeof(struct ath9k_htc_sta);
  593. /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
  594. hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
  595. sizeof(struct htc_frame_hdr) + 4;
  596. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  597. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  598. &priv->sbands[IEEE80211_BAND_2GHZ];
  599. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
  600. hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  601. &priv->sbands[IEEE80211_BAND_5GHZ];
  602. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  603. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  604. setup_ht_cap(priv,
  605. &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
  606. if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
  607. setup_ht_cap(priv,
  608. &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
  609. }
  610. SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
  611. }
  612. static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
  613. {
  614. struct ieee80211_hw *hw = priv->hw;
  615. struct ath_common *common;
  616. struct ath_hw *ah;
  617. int error = 0;
  618. struct ath_regulatory *reg;
  619. /* Bring up device */
  620. error = ath9k_init_priv(priv, devid);
  621. if (error != 0)
  622. goto err_init;
  623. ah = priv->ah;
  624. common = ath9k_hw_common(ah);
  625. ath9k_set_hw_capab(priv, hw);
  626. /* Initialize regulatory */
  627. error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
  628. ath9k_reg_notifier);
  629. if (error)
  630. goto err_regd;
  631. reg = &common->regulatory;
  632. /* Setup TX */
  633. error = ath9k_tx_init(priv);
  634. if (error != 0)
  635. goto err_tx;
  636. /* Setup RX */
  637. error = ath9k_rx_init(priv);
  638. if (error != 0)
  639. goto err_rx;
  640. /* Register with mac80211 */
  641. error = ieee80211_register_hw(hw);
  642. if (error)
  643. goto err_register;
  644. /* Handle world regulatory */
  645. if (!ath_is_world_regd(reg)) {
  646. error = regulatory_hint(hw->wiphy, reg->alpha2);
  647. if (error)
  648. goto err_world;
  649. }
  650. ath9k_init_leds(priv);
  651. ath9k_start_rfkill_poll(priv);
  652. return 0;
  653. err_world:
  654. ieee80211_unregister_hw(hw);
  655. err_register:
  656. ath9k_rx_cleanup(priv);
  657. err_rx:
  658. ath9k_tx_cleanup(priv);
  659. err_tx:
  660. /* Nothing */
  661. err_regd:
  662. ath9k_deinit_priv(priv);
  663. err_init:
  664. return error;
  665. }
  666. int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
  667. u16 devid)
  668. {
  669. struct ieee80211_hw *hw;
  670. struct ath9k_htc_priv *priv;
  671. int ret;
  672. hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
  673. if (!hw)
  674. return -ENOMEM;
  675. priv = hw->priv;
  676. priv->hw = hw;
  677. priv->htc = htc_handle;
  678. priv->dev = dev;
  679. htc_handle->drv_priv = priv;
  680. SET_IEEE80211_DEV(hw, priv->dev);
  681. ret = ath9k_htc_wait_for_target(priv);
  682. if (ret)
  683. goto err_free;
  684. priv->wmi = ath9k_init_wmi(priv);
  685. if (!priv->wmi) {
  686. ret = -EINVAL;
  687. goto err_free;
  688. }
  689. ret = ath9k_init_htc_services(priv, devid);
  690. if (ret)
  691. goto err_init;
  692. /* The device may have been unplugged earlier. */
  693. priv->op_flags &= ~OP_UNPLUGGED;
  694. ret = ath9k_init_device(priv, devid);
  695. if (ret)
  696. goto err_init;
  697. return 0;
  698. err_init:
  699. ath9k_deinit_wmi(priv);
  700. err_free:
  701. ieee80211_free_hw(hw);
  702. return ret;
  703. }
  704. void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
  705. {
  706. if (htc_handle->drv_priv) {
  707. /* Check if the device has been yanked out. */
  708. if (hotunplug)
  709. htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
  710. ath9k_deinit_device(htc_handle->drv_priv);
  711. ath9k_deinit_wmi(htc_handle->drv_priv);
  712. ieee80211_free_hw(htc_handle->drv_priv->hw);
  713. }
  714. }
  715. #ifdef CONFIG_PM
  716. int ath9k_htc_resume(struct htc_target *htc_handle)
  717. {
  718. int ret;
  719. ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
  720. if (ret)
  721. return ret;
  722. ret = ath9k_init_htc_services(htc_handle->drv_priv,
  723. htc_handle->drv_priv->ah->hw_version.devid);
  724. return ret;
  725. }
  726. #endif
  727. static int __init ath9k_htc_init(void)
  728. {
  729. int error;
  730. error = ath9k_htc_debug_create_root();
  731. if (error < 0) {
  732. printk(KERN_ERR
  733. "ath9k_htc: Unable to create debugfs root: %d\n",
  734. error);
  735. goto err_dbg;
  736. }
  737. error = ath9k_hif_usb_init();
  738. if (error < 0) {
  739. printk(KERN_ERR
  740. "ath9k_htc: No USB devices found,"
  741. " driver not installed.\n");
  742. error = -ENODEV;
  743. goto err_usb;
  744. }
  745. return 0;
  746. err_usb:
  747. ath9k_htc_debug_remove_root();
  748. err_dbg:
  749. return error;
  750. }
  751. module_init(ath9k_htc_init);
  752. static void __exit ath9k_htc_exit(void)
  753. {
  754. ath9k_hif_usb_exit();
  755. ath9k_htc_debug_remove_root();
  756. printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
  757. }
  758. module_exit(ath9k_htc_exit);