calib.c 9.5 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. #include "hw-ops.h"
  18. /* Common calibration code */
  19. /* We can tune this as we go by monitoring really low values */
  20. #define ATH9K_NF_TOO_LOW -60
  21. /* AR5416 may return very high value (like -31 dBm), in those cases the nf
  22. * is incorrect and we should use the static NF value. Later we can try to
  23. * find out why they are reporting these values */
  24. static bool ath9k_hw_nf_in_range(struct ath_hw *ah, s16 nf)
  25. {
  26. if (nf > ATH9K_NF_TOO_LOW) {
  27. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  28. "noise floor value detected (%d) is "
  29. "lower than what we think is a "
  30. "reasonable value (%d)\n",
  31. nf, ATH9K_NF_TOO_LOW);
  32. return false;
  33. }
  34. return true;
  35. }
  36. static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
  37. {
  38. int16_t nfval;
  39. int16_t sort[ATH9K_NF_CAL_HIST_MAX];
  40. int i, j;
  41. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
  42. sort[i] = nfCalBuffer[i];
  43. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
  44. for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
  45. if (sort[j] > sort[j - 1]) {
  46. nfval = sort[j];
  47. sort[j] = sort[j - 1];
  48. sort[j - 1] = nfval;
  49. }
  50. }
  51. }
  52. nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
  53. return nfval;
  54. }
  55. static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h,
  56. int16_t *nfarray)
  57. {
  58. int i;
  59. for (i = 0; i < NUM_NF_READINGS; i++) {
  60. h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
  61. if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
  62. h[i].currIndex = 0;
  63. if (h[i].invalidNFcount > 0) {
  64. h[i].invalidNFcount--;
  65. h[i].privNF = nfarray[i];
  66. } else {
  67. h[i].privNF =
  68. ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
  69. }
  70. }
  71. }
  72. static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
  73. enum ieee80211_band band,
  74. int16_t *nft)
  75. {
  76. switch (band) {
  77. case IEEE80211_BAND_5GHZ:
  78. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
  79. break;
  80. case IEEE80211_BAND_2GHZ:
  81. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
  82. break;
  83. default:
  84. BUG_ON(1);
  85. return false;
  86. }
  87. return true;
  88. }
  89. void ath9k_hw_reset_calibration(struct ath_hw *ah,
  90. struct ath9k_cal_list *currCal)
  91. {
  92. int i;
  93. ath9k_hw_setup_calibration(ah, currCal);
  94. currCal->calState = CAL_RUNNING;
  95. for (i = 0; i < AR5416_MAX_CHAINS; i++) {
  96. ah->meas0.sign[i] = 0;
  97. ah->meas1.sign[i] = 0;
  98. ah->meas2.sign[i] = 0;
  99. ah->meas3.sign[i] = 0;
  100. }
  101. ah->cal_samples = 0;
  102. }
  103. /* This is done for the currently configured channel */
  104. bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
  105. {
  106. struct ath_common *common = ath9k_hw_common(ah);
  107. struct ieee80211_conf *conf = &common->hw->conf;
  108. struct ath9k_cal_list *currCal = ah->cal_list_curr;
  109. if (!ah->curchan)
  110. return true;
  111. if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
  112. return true;
  113. if (currCal == NULL)
  114. return true;
  115. if (currCal->calState != CAL_DONE) {
  116. ath_print(common, ATH_DBG_CALIBRATE,
  117. "Calibration state incorrect, %d\n",
  118. currCal->calState);
  119. return true;
  120. }
  121. if (!ath9k_hw_iscal_supported(ah, currCal->calData->calType))
  122. return true;
  123. ath_print(common, ATH_DBG_CALIBRATE,
  124. "Resetting Cal %d state for channel %u\n",
  125. currCal->calData->calType, conf->channel->center_freq);
  126. ah->curchan->CalValid &= ~currCal->calData->calType;
  127. currCal->calState = CAL_WAITING;
  128. return false;
  129. }
  130. EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
  131. void ath9k_hw_start_nfcal(struct ath_hw *ah)
  132. {
  133. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  134. AR_PHY_AGC_CONTROL_ENABLE_NF);
  135. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  136. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  137. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  138. }
  139. void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
  140. {
  141. struct ath9k_nfcal_hist *h;
  142. unsigned i, j;
  143. int32_t val;
  144. u8 chainmask;
  145. struct ath_common *common = ath9k_hw_common(ah);
  146. if (AR_SREV_9300_20_OR_LATER(ah))
  147. chainmask = 0x3F;
  148. else if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
  149. chainmask = 0x9;
  150. else if (AR_SREV_9280(ah) || AR_SREV_9287(ah)) {
  151. if ((ah->rxchainmask & 0x2) || (ah->rxchainmask & 0x4))
  152. chainmask = 0x1B;
  153. else
  154. chainmask = 0x09;
  155. } else {
  156. if (ah->rxchainmask & 0x4)
  157. chainmask = 0x3F;
  158. else if (ah->rxchainmask & 0x2)
  159. chainmask = 0x1B;
  160. else
  161. chainmask = 0x09;
  162. }
  163. h = ah->nfCalHist;
  164. for (i = 0; i < NUM_NF_READINGS; i++) {
  165. if (chainmask & (1 << i)) {
  166. val = REG_READ(ah, ah->nf_regs[i]);
  167. val &= 0xFFFFFE00;
  168. val |= (((u32) (h[i].privNF) << 1) & 0x1ff);
  169. REG_WRITE(ah, ah->nf_regs[i], val);
  170. }
  171. }
  172. /*
  173. * Load software filtered NF value into baseband internal minCCApwr
  174. * variable.
  175. */
  176. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  177. AR_PHY_AGC_CONTROL_ENABLE_NF);
  178. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  179. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  180. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  181. /*
  182. * Wait for load to complete, should be fast, a few 10s of us.
  183. * The max delay was changed from an original 250us to 10000us
  184. * since 250us often results in NF load timeout and causes deaf
  185. * condition during stress testing 12/12/2009
  186. */
  187. for (j = 0; j < 1000; j++) {
  188. if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
  189. AR_PHY_AGC_CONTROL_NF) == 0)
  190. break;
  191. udelay(10);
  192. }
  193. /*
  194. * We timed out waiting for the noisefloor to load, probably due to an
  195. * in-progress rx. Simply return here and allow the load plenty of time
  196. * to complete before the next calibration interval. We need to avoid
  197. * trying to load -50 (which happens below) while the previous load is
  198. * still in progress as this can cause rx deafness. Instead by returning
  199. * here, the baseband nf cal will just be capped by our present
  200. * noisefloor until the next calibration timer.
  201. */
  202. if (j == 1000) {
  203. ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf "
  204. "to load: AR_PHY_AGC_CONTROL=0x%x\n",
  205. REG_READ(ah, AR_PHY_AGC_CONTROL));
  206. return;
  207. }
  208. /*
  209. * Restore maxCCAPower register parameter again so that we're not capped
  210. * by the median we just loaded. This will be initial (and max) value
  211. * of next noise floor calibration the baseband does.
  212. */
  213. ENABLE_REGWRITE_BUFFER(ah);
  214. for (i = 0; i < NUM_NF_READINGS; i++) {
  215. if (chainmask & (1 << i)) {
  216. val = REG_READ(ah, ah->nf_regs[i]);
  217. val &= 0xFFFFFE00;
  218. val |= (((u32) (-50) << 1) & 0x1ff);
  219. REG_WRITE(ah, ah->nf_regs[i], val);
  220. }
  221. }
  222. REGWRITE_BUFFER_FLUSH(ah);
  223. DISABLE_REGWRITE_BUFFER(ah);
  224. }
  225. static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
  226. {
  227. struct ath_common *common = ath9k_hw_common(ah);
  228. struct ath_nf_limits *limit;
  229. int i;
  230. if (IS_CHAN_2GHZ(ah->curchan))
  231. limit = &ah->nf_2g;
  232. else
  233. limit = &ah->nf_5g;
  234. for (i = 0; i < NUM_NF_READINGS; i++) {
  235. if (!nf[i])
  236. continue;
  237. ath_print(common, ATH_DBG_CALIBRATE,
  238. "NF calibrated [%s] [chain %d] is %d\n",
  239. (i > 3 ? "ext" : "ctl"), i % 3, nf[i]);
  240. if (nf[i] > limit->max) {
  241. ath_print(common, ATH_DBG_CALIBRATE,
  242. "NF[%d] (%d) > MAX (%d), correcting to MAX",
  243. i, nf[i], limit->max);
  244. nf[i] = limit->max;
  245. } else if (nf[i] < limit->min) {
  246. ath_print(common, ATH_DBG_CALIBRATE,
  247. "NF[%d] (%d) < MIN (%d), correcting to NOM",
  248. i, nf[i], limit->min);
  249. nf[i] = limit->nominal;
  250. }
  251. }
  252. }
  253. int16_t ath9k_hw_getnf(struct ath_hw *ah,
  254. struct ath9k_channel *chan)
  255. {
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. int16_t nf, nfThresh;
  258. int16_t nfarray[NUM_NF_READINGS] = { 0 };
  259. struct ath9k_nfcal_hist *h;
  260. struct ieee80211_channel *c = chan->chan;
  261. chan->channelFlags &= (~CHANNEL_CW_INT);
  262. if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
  263. ath_print(common, ATH_DBG_CALIBRATE,
  264. "NF did not complete in calibration window\n");
  265. nf = 0;
  266. chan->rawNoiseFloor = nf;
  267. return chan->rawNoiseFloor;
  268. } else {
  269. ath9k_hw_do_getnf(ah, nfarray);
  270. ath9k_hw_nf_sanitize(ah, nfarray);
  271. nf = nfarray[0];
  272. if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
  273. && nf > nfThresh) {
  274. ath_print(common, ATH_DBG_CALIBRATE,
  275. "noise floor failed detected; "
  276. "detected %d, threshold %d\n",
  277. nf, nfThresh);
  278. chan->channelFlags |= CHANNEL_CW_INT;
  279. }
  280. }
  281. h = ah->nfCalHist;
  282. ath9k_hw_update_nfcal_hist_buffer(h, nfarray);
  283. chan->rawNoiseFloor = h[0].privNF;
  284. return chan->rawNoiseFloor;
  285. }
  286. void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah)
  287. {
  288. struct ath_nf_limits *limit;
  289. int i, j;
  290. if (!ah->curchan || IS_CHAN_2GHZ(ah->curchan))
  291. limit = &ah->nf_2g;
  292. else
  293. limit = &ah->nf_5g;
  294. for (i = 0; i < NUM_NF_READINGS; i++) {
  295. ah->nfCalHist[i].currIndex = 0;
  296. ah->nfCalHist[i].privNF = limit->nominal;
  297. ah->nfCalHist[i].invalidNFcount =
  298. AR_PHY_CCA_FILTERWINDOW_LENGTH;
  299. for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
  300. ah->nfCalHist[i].nfCalBuffer[j] = limit->nominal;
  301. }
  302. }
  303. }
  304. s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
  305. {
  306. s16 nf;
  307. if (chan->rawNoiseFloor == 0)
  308. nf = -96;
  309. else
  310. nf = chan->rawNoiseFloor;
  311. if (!ath9k_hw_nf_in_range(ah, nf))
  312. nf = ATH_DEFAULT_NOISE_FLOOR;
  313. return nf;
  314. }
  315. EXPORT_SYMBOL(ath9k_hw_getchan_noise);