smc911x.c 58 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/delay.h>
  59. #include <linux/interrupt.h>
  60. #include <linux/errno.h>
  61. #include <linux/ioport.h>
  62. #include <linux/crc32.h>
  63. #include <linux/device.h>
  64. #include <linux/platform_device.h>
  65. #include <linux/spinlock.h>
  66. #include <linux/ethtool.h>
  67. #include <linux/mii.h>
  68. #include <linux/workqueue.h>
  69. #include <linux/netdevice.h>
  70. #include <linux/etherdevice.h>
  71. #include <linux/skbuff.h>
  72. #include <asm/io.h>
  73. #include "smc911x.h"
  74. /*
  75. * Transmit timeout, default 5 seconds.
  76. */
  77. static int watchdog = 5000;
  78. module_param(watchdog, int, 0400);
  79. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  80. static int tx_fifo_kb=8;
  81. module_param(tx_fifo_kb, int, 0400);
  82. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  83. MODULE_LICENSE("GPL");
  84. MODULE_ALIAS("platform:smc911x");
  85. /*
  86. * The internal workings of the driver. If you are changing anything
  87. * here with the SMC stuff, you should have the datasheet and know
  88. * what you are doing.
  89. */
  90. #define CARDNAME "smc911x"
  91. /*
  92. * Use power-down feature of the chip
  93. */
  94. #define POWER_DOWN 1
  95. #if SMC_DEBUG > 0
  96. #define DBG(n, args...) \
  97. do { \
  98. if (SMC_DEBUG & (n)) \
  99. printk(args); \
  100. } while (0)
  101. #define PRINTK(args...) printk(args)
  102. #else
  103. #define DBG(n, args...) do { } while (0)
  104. #define PRINTK(args...) printk(KERN_DEBUG args)
  105. #endif
  106. #if SMC_DEBUG_PKTS > 0
  107. static void PRINT_PKT(u_char *buf, int length)
  108. {
  109. int i;
  110. int remainder;
  111. int lines;
  112. lines = length / 16;
  113. remainder = length % 16;
  114. for (i = 0; i < lines ; i ++) {
  115. int cur;
  116. for (cur = 0; cur < 8; cur++) {
  117. u_char a, b;
  118. a = *buf++;
  119. b = *buf++;
  120. printk("%02x%02x ", a, b);
  121. }
  122. printk("\n");
  123. }
  124. for (i = 0; i < remainder/2 ; i++) {
  125. u_char a, b;
  126. a = *buf++;
  127. b = *buf++;
  128. printk("%02x%02x ", a, b);
  129. }
  130. printk("\n");
  131. }
  132. #else
  133. #define PRINT_PKT(x...) do { } while (0)
  134. #endif
  135. /* this enables an interrupt in the interrupt mask register */
  136. #define SMC_ENABLE_INT(lp, x) do { \
  137. unsigned int __mask; \
  138. __mask = SMC_GET_INT_EN((lp)); \
  139. __mask |= (x); \
  140. SMC_SET_INT_EN((lp), __mask); \
  141. } while (0)
  142. /* this disables an interrupt from the interrupt mask register */
  143. #define SMC_DISABLE_INT(lp, x) do { \
  144. unsigned int __mask; \
  145. __mask = SMC_GET_INT_EN((lp)); \
  146. __mask &= ~(x); \
  147. SMC_SET_INT_EN((lp), __mask); \
  148. } while (0)
  149. /*
  150. * this does a soft reset on the device
  151. */
  152. static void smc911x_reset(struct net_device *dev)
  153. {
  154. struct smc911x_local *lp = netdev_priv(dev);
  155. unsigned int reg, timeout=0, resets=1, irq_cfg;
  156. unsigned long flags;
  157. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  158. /* Take out of PM setting first */
  159. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  160. /* Write to the bytetest will take out of powerdown */
  161. SMC_SET_BYTE_TEST(lp, 0);
  162. timeout=10;
  163. do {
  164. udelay(10);
  165. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  166. } while (--timeout && !reg);
  167. if (timeout == 0) {
  168. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  169. return;
  170. }
  171. }
  172. /* Disable all interrupts */
  173. spin_lock_irqsave(&lp->lock, flags);
  174. SMC_SET_INT_EN(lp, 0);
  175. spin_unlock_irqrestore(&lp->lock, flags);
  176. while (resets--) {
  177. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  178. timeout=10;
  179. do {
  180. udelay(10);
  181. reg = SMC_GET_HW_CFG(lp);
  182. /* If chip indicates reset timeout then try again */
  183. if (reg & HW_CFG_SRST_TO_) {
  184. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  185. resets++;
  186. break;
  187. }
  188. } while (--timeout && (reg & HW_CFG_SRST_));
  189. }
  190. if (timeout == 0) {
  191. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  192. return;
  193. }
  194. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  195. timeout=1000;
  196. while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
  197. udelay(10);
  198. if (timeout == 0){
  199. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  200. return;
  201. }
  202. /* Initialize interrupts */
  203. SMC_SET_INT_EN(lp, 0);
  204. SMC_ACK_INT(lp, -1);
  205. /* Reset the FIFO level and flow control settings */
  206. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  207. //TODO: Figure out what appropriate pause time is
  208. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  209. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  210. /* Set to LED outputs */
  211. SMC_SET_GPIO_CFG(lp, 0x70070000);
  212. /*
  213. * Deassert IRQ for 1*10us for edge type interrupts
  214. * and drive IRQ pin push-pull
  215. */
  216. irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
  217. #ifdef SMC_DYNAMIC_BUS_CONFIG
  218. if (lp->cfg.irq_polarity)
  219. irq_cfg |= INT_CFG_IRQ_POL_;
  220. #endif
  221. SMC_SET_IRQ_CFG(lp, irq_cfg);
  222. /* clear anything saved */
  223. if (lp->pending_tx_skb != NULL) {
  224. dev_kfree_skb (lp->pending_tx_skb);
  225. lp->pending_tx_skb = NULL;
  226. dev->stats.tx_errors++;
  227. dev->stats.tx_aborted_errors++;
  228. }
  229. }
  230. /*
  231. * Enable Interrupts, Receive, and Transmit
  232. */
  233. static void smc911x_enable(struct net_device *dev)
  234. {
  235. struct smc911x_local *lp = netdev_priv(dev);
  236. unsigned mask, cfg, cr;
  237. unsigned long flags;
  238. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  239. spin_lock_irqsave(&lp->lock, flags);
  240. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  241. /* Enable TX */
  242. cfg = SMC_GET_HW_CFG(lp);
  243. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  244. cfg |= HW_CFG_SF_;
  245. SMC_SET_HW_CFG(lp, cfg);
  246. SMC_SET_FIFO_TDA(lp, 0xFF);
  247. /* Update TX stats on every 64 packets received or every 1 sec */
  248. SMC_SET_FIFO_TSL(lp, 64);
  249. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  250. SMC_GET_MAC_CR(lp, cr);
  251. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  252. SMC_SET_MAC_CR(lp, cr);
  253. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  254. /* Add 2 byte padding to start of packets */
  255. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  256. /* Turn on receiver and enable RX */
  257. if (cr & MAC_CR_RXEN_)
  258. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  259. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  260. /* Interrupt on every received packet */
  261. SMC_SET_FIFO_RSA(lp, 0x01);
  262. SMC_SET_FIFO_RSL(lp, 0x00);
  263. /* now, enable interrupts */
  264. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  265. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  266. INT_EN_PHY_INT_EN_;
  267. if (IS_REV_A(lp->revision))
  268. mask|=INT_EN_RDFL_EN_;
  269. else {
  270. mask|=INT_EN_RDFO_EN_;
  271. }
  272. SMC_ENABLE_INT(lp, mask);
  273. spin_unlock_irqrestore(&lp->lock, flags);
  274. }
  275. /*
  276. * this puts the device in an inactive state
  277. */
  278. static void smc911x_shutdown(struct net_device *dev)
  279. {
  280. struct smc911x_local *lp = netdev_priv(dev);
  281. unsigned cr;
  282. unsigned long flags;
  283. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
  284. /* Disable IRQ's */
  285. SMC_SET_INT_EN(lp, 0);
  286. /* Turn of Rx and TX */
  287. spin_lock_irqsave(&lp->lock, flags);
  288. SMC_GET_MAC_CR(lp, cr);
  289. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  290. SMC_SET_MAC_CR(lp, cr);
  291. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  292. spin_unlock_irqrestore(&lp->lock, flags);
  293. }
  294. static inline void smc911x_drop_pkt(struct net_device *dev)
  295. {
  296. struct smc911x_local *lp = netdev_priv(dev);
  297. unsigned int fifo_count, timeout, reg;
  298. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
  299. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  300. if (fifo_count <= 4) {
  301. /* Manually dump the packet data */
  302. while (fifo_count--)
  303. SMC_GET_RX_FIFO(lp);
  304. } else {
  305. /* Fast forward through the bad packet */
  306. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  307. timeout=50;
  308. do {
  309. udelay(10);
  310. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  311. } while (--timeout && reg);
  312. if (timeout == 0) {
  313. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  314. }
  315. }
  316. }
  317. /*
  318. * This is the procedure to handle the receipt of a packet.
  319. * It should be called after checking for packet presence in
  320. * the RX status FIFO. It must be called with the spin lock
  321. * already held.
  322. */
  323. static inline void smc911x_rcv(struct net_device *dev)
  324. {
  325. struct smc911x_local *lp = netdev_priv(dev);
  326. unsigned int pkt_len, status;
  327. struct sk_buff *skb;
  328. unsigned char *data;
  329. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  330. dev->name, __func__);
  331. status = SMC_GET_RX_STS_FIFO(lp);
  332. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x\n",
  333. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  334. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  335. if (status & RX_STS_ES_) {
  336. /* Deal with a bad packet */
  337. dev->stats.rx_errors++;
  338. if (status & RX_STS_CRC_ERR_)
  339. dev->stats.rx_crc_errors++;
  340. else {
  341. if (status & RX_STS_LEN_ERR_)
  342. dev->stats.rx_length_errors++;
  343. if (status & RX_STS_MCAST_)
  344. dev->stats.multicast++;
  345. }
  346. /* Remove the bad packet data from the RX FIFO */
  347. smc911x_drop_pkt(dev);
  348. } else {
  349. /* Receive a valid packet */
  350. /* Alloc a buffer with extra room for DMA alignment */
  351. skb=dev_alloc_skb(pkt_len+32);
  352. if (unlikely(skb == NULL)) {
  353. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  354. dev->name);
  355. dev->stats.rx_dropped++;
  356. smc911x_drop_pkt(dev);
  357. return;
  358. }
  359. /* Align IP header to 32 bits
  360. * Note that the device is configured to add a 2
  361. * byte padding to the packet start, so we really
  362. * want to write to the orignal data pointer */
  363. data = skb->data;
  364. skb_reserve(skb, 2);
  365. skb_put(skb,pkt_len-4);
  366. #ifdef SMC_USE_DMA
  367. {
  368. unsigned int fifo;
  369. /* Lower the FIFO threshold if possible */
  370. fifo = SMC_GET_FIFO_INT(lp);
  371. if (fifo & 0xFF) fifo--;
  372. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  373. dev->name, fifo & 0xff);
  374. SMC_SET_FIFO_INT(lp, fifo);
  375. /* Setup RX DMA */
  376. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  377. lp->rxdma_active = 1;
  378. lp->current_rx_skb = skb;
  379. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  380. /* Packet processing deferred to DMA RX interrupt */
  381. }
  382. #else
  383. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  384. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  385. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  386. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  387. skb->protocol = eth_type_trans(skb, dev);
  388. netif_rx(skb);
  389. dev->stats.rx_packets++;
  390. dev->stats.rx_bytes += pkt_len-4;
  391. #endif
  392. }
  393. }
  394. /*
  395. * This is called to actually send a packet to the chip.
  396. */
  397. static void smc911x_hardware_send_pkt(struct net_device *dev)
  398. {
  399. struct smc911x_local *lp = netdev_priv(dev);
  400. struct sk_buff *skb;
  401. unsigned int cmdA, cmdB, len;
  402. unsigned char *buf;
  403. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
  404. BUG_ON(lp->pending_tx_skb == NULL);
  405. skb = lp->pending_tx_skb;
  406. lp->pending_tx_skb = NULL;
  407. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  408. /* cmdB {31:16] pkt tag [10:0] length */
  409. #ifdef SMC_USE_DMA
  410. /* 16 byte buffer alignment mode */
  411. buf = (char*)((u32)(skb->data) & ~0xF);
  412. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  413. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  414. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  415. skb->len;
  416. #else
  417. buf = (char*)((u32)skb->data & ~0x3);
  418. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  419. cmdA = (((u32)skb->data & 0x3) << 16) |
  420. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  421. skb->len;
  422. #endif
  423. /* tag is packet length so we can use this in stats update later */
  424. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  425. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  426. dev->name, len, len, buf, cmdA, cmdB);
  427. SMC_SET_TX_FIFO(lp, cmdA);
  428. SMC_SET_TX_FIFO(lp, cmdB);
  429. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  430. PRINT_PKT(buf, len <= 64 ? len : 64);
  431. /* Send pkt via PIO or DMA */
  432. #ifdef SMC_USE_DMA
  433. lp->current_tx_skb = skb;
  434. SMC_PUSH_DATA(lp, buf, len);
  435. /* DMA complete IRQ will free buffer and set jiffies */
  436. #else
  437. SMC_PUSH_DATA(lp, buf, len);
  438. dev->trans_start = jiffies;
  439. dev_kfree_skb_irq(skb);
  440. #endif
  441. if (!lp->tx_throttle) {
  442. netif_wake_queue(dev);
  443. }
  444. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  445. }
  446. /*
  447. * Since I am not sure if I will have enough room in the chip's ram
  448. * to store the packet, I call this routine which either sends it
  449. * now, or set the card to generates an interrupt when ready
  450. * for the packet.
  451. */
  452. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  453. {
  454. struct smc911x_local *lp = netdev_priv(dev);
  455. unsigned int free;
  456. unsigned long flags;
  457. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  458. dev->name, __func__);
  459. spin_lock_irqsave(&lp->lock, flags);
  460. BUG_ON(lp->pending_tx_skb != NULL);
  461. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  462. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  463. /* Turn off the flow when running out of space in FIFO */
  464. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  465. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  466. dev->name, free);
  467. /* Reenable when at least 1 packet of size MTU present */
  468. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  469. lp->tx_throttle = 1;
  470. netif_stop_queue(dev);
  471. }
  472. /* Drop packets when we run out of space in TX FIFO
  473. * Account for overhead required for:
  474. *
  475. * Tx command words 8 bytes
  476. * Start offset 15 bytes
  477. * End padding 15 bytes
  478. */
  479. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  480. printk("%s: No Tx free space %d < %d\n",
  481. dev->name, free, skb->len);
  482. lp->pending_tx_skb = NULL;
  483. dev->stats.tx_errors++;
  484. dev->stats.tx_dropped++;
  485. spin_unlock_irqrestore(&lp->lock, flags);
  486. dev_kfree_skb(skb);
  487. return NETDEV_TX_OK;
  488. }
  489. #ifdef SMC_USE_DMA
  490. {
  491. /* If the DMA is already running then defer this packet Tx until
  492. * the DMA IRQ starts it
  493. */
  494. if (lp->txdma_active) {
  495. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  496. lp->pending_tx_skb = skb;
  497. netif_stop_queue(dev);
  498. spin_unlock_irqrestore(&lp->lock, flags);
  499. return NETDEV_TX_OK;
  500. } else {
  501. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  502. lp->txdma_active = 1;
  503. }
  504. }
  505. #endif
  506. lp->pending_tx_skb = skb;
  507. smc911x_hardware_send_pkt(dev);
  508. spin_unlock_irqrestore(&lp->lock, flags);
  509. return NETDEV_TX_OK;
  510. }
  511. /*
  512. * This handles a TX status interrupt, which is only called when:
  513. * - a TX error occurred, or
  514. * - TX of a packet completed.
  515. */
  516. static void smc911x_tx(struct net_device *dev)
  517. {
  518. struct smc911x_local *lp = netdev_priv(dev);
  519. unsigned int tx_status;
  520. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  521. dev->name, __func__);
  522. /* Collect the TX status */
  523. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  524. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  525. dev->name,
  526. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  527. tx_status = SMC_GET_TX_STS_FIFO(lp);
  528. dev->stats.tx_packets++;
  529. dev->stats.tx_bytes+=tx_status>>16;
  530. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  531. dev->name, (tx_status & 0xffff0000) >> 16,
  532. tx_status & 0x0000ffff);
  533. /* count Tx errors, but ignore lost carrier errors when in
  534. * full-duplex mode */
  535. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  536. !(tx_status & 0x00000306))) {
  537. dev->stats.tx_errors++;
  538. }
  539. if (tx_status & TX_STS_MANY_COLL_) {
  540. dev->stats.collisions+=16;
  541. dev->stats.tx_aborted_errors++;
  542. } else {
  543. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  544. }
  545. /* carrier error only has meaning for half-duplex communication */
  546. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  547. !lp->ctl_rfduplx) {
  548. dev->stats.tx_carrier_errors++;
  549. }
  550. if (tx_status & TX_STS_LATE_COLL_) {
  551. dev->stats.collisions++;
  552. dev->stats.tx_aborted_errors++;
  553. }
  554. }
  555. }
  556. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  557. /*
  558. * Reads a register from the MII Management serial interface
  559. */
  560. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  561. {
  562. struct smc911x_local *lp = netdev_priv(dev);
  563. unsigned int phydata;
  564. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  565. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  566. __func__, phyaddr, phyreg, phydata);
  567. return phydata;
  568. }
  569. /*
  570. * Writes a register to the MII Management serial interface
  571. */
  572. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  573. int phydata)
  574. {
  575. struct smc911x_local *lp = netdev_priv(dev);
  576. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  577. __func__, phyaddr, phyreg, phydata);
  578. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  579. }
  580. /*
  581. * Finds and reports the PHY address (115 and 117 have external
  582. * PHY interface 118 has internal only
  583. */
  584. static void smc911x_phy_detect(struct net_device *dev)
  585. {
  586. struct smc911x_local *lp = netdev_priv(dev);
  587. int phyaddr;
  588. unsigned int cfg, id1, id2;
  589. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  590. lp->phy_type = 0;
  591. /*
  592. * Scan all 32 PHY addresses if necessary, starting at
  593. * PHY#1 to PHY#31, and then PHY#0 last.
  594. */
  595. switch(lp->version) {
  596. case CHIP_9115:
  597. case CHIP_9117:
  598. case CHIP_9215:
  599. case CHIP_9217:
  600. cfg = SMC_GET_HW_CFG(lp);
  601. if (cfg & HW_CFG_EXT_PHY_DET_) {
  602. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  603. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  604. SMC_SET_HW_CFG(lp, cfg);
  605. udelay(10); /* Wait for clocks to stop */
  606. cfg |= HW_CFG_EXT_PHY_EN_;
  607. SMC_SET_HW_CFG(lp, cfg);
  608. udelay(10); /* Wait for clocks to stop */
  609. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  610. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  611. SMC_SET_HW_CFG(lp, cfg);
  612. udelay(10); /* Wait for clocks to stop */
  613. cfg |= HW_CFG_SMI_SEL_;
  614. SMC_SET_HW_CFG(lp, cfg);
  615. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  616. /* Read the PHY identifiers */
  617. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  618. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  619. /* Make sure it is a valid identifier */
  620. if (id1 != 0x0000 && id1 != 0xffff &&
  621. id1 != 0x8000 && id2 != 0x0000 &&
  622. id2 != 0xffff && id2 != 0x8000) {
  623. /* Save the PHY's address */
  624. lp->mii.phy_id = phyaddr & 31;
  625. lp->phy_type = id1 << 16 | id2;
  626. break;
  627. }
  628. }
  629. if (phyaddr < 32)
  630. /* Found an external PHY */
  631. break;
  632. }
  633. default:
  634. /* Internal media only */
  635. SMC_GET_PHY_ID1(lp, 1, id1);
  636. SMC_GET_PHY_ID2(lp, 1, id2);
  637. /* Save the PHY's address */
  638. lp->mii.phy_id = 1;
  639. lp->phy_type = id1 << 16 | id2;
  640. }
  641. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  642. dev->name, id1, id2, lp->mii.phy_id);
  643. }
  644. /*
  645. * Sets the PHY to a configuration as determined by the user.
  646. * Called with spin_lock held.
  647. */
  648. static int smc911x_phy_fixed(struct net_device *dev)
  649. {
  650. struct smc911x_local *lp = netdev_priv(dev);
  651. int phyaddr = lp->mii.phy_id;
  652. int bmcr;
  653. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  654. /* Enter Link Disable state */
  655. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  656. bmcr |= BMCR_PDOWN;
  657. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  658. /*
  659. * Set our fixed capabilities
  660. * Disable auto-negotiation
  661. */
  662. bmcr &= ~BMCR_ANENABLE;
  663. if (lp->ctl_rfduplx)
  664. bmcr |= BMCR_FULLDPLX;
  665. if (lp->ctl_rspeed == 100)
  666. bmcr |= BMCR_SPEED100;
  667. /* Write our capabilities to the phy control register */
  668. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  669. /* Re-Configure the Receive/Phy Control register */
  670. bmcr &= ~BMCR_PDOWN;
  671. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  672. return 1;
  673. }
  674. /*
  675. * smc911x_phy_reset - reset the phy
  676. * @dev: net device
  677. * @phy: phy address
  678. *
  679. * Issue a software reset for the specified PHY and
  680. * wait up to 100ms for the reset to complete. We should
  681. * not access the PHY for 50ms after issuing the reset.
  682. *
  683. * The time to wait appears to be dependent on the PHY.
  684. *
  685. */
  686. static int smc911x_phy_reset(struct net_device *dev, int phy)
  687. {
  688. struct smc911x_local *lp = netdev_priv(dev);
  689. int timeout;
  690. unsigned long flags;
  691. unsigned int reg;
  692. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  693. spin_lock_irqsave(&lp->lock, flags);
  694. reg = SMC_GET_PMT_CTRL(lp);
  695. reg &= ~0xfffff030;
  696. reg |= PMT_CTRL_PHY_RST_;
  697. SMC_SET_PMT_CTRL(lp, reg);
  698. spin_unlock_irqrestore(&lp->lock, flags);
  699. for (timeout = 2; timeout; timeout--) {
  700. msleep(50);
  701. spin_lock_irqsave(&lp->lock, flags);
  702. reg = SMC_GET_PMT_CTRL(lp);
  703. spin_unlock_irqrestore(&lp->lock, flags);
  704. if (!(reg & PMT_CTRL_PHY_RST_)) {
  705. /* extra delay required because the phy may
  706. * not be completed with its reset
  707. * when PHY_BCR_RESET_ is cleared. 256us
  708. * should suffice, but use 500us to be safe
  709. */
  710. udelay(500);
  711. break;
  712. }
  713. }
  714. return reg & PMT_CTRL_PHY_RST_;
  715. }
  716. /*
  717. * smc911x_phy_powerdown - powerdown phy
  718. * @dev: net device
  719. * @phy: phy address
  720. *
  721. * Power down the specified PHY
  722. */
  723. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  724. {
  725. struct smc911x_local *lp = netdev_priv(dev);
  726. unsigned int bmcr;
  727. /* Enter Link Disable state */
  728. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  729. bmcr |= BMCR_PDOWN;
  730. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  731. }
  732. /*
  733. * smc911x_phy_check_media - check the media status and adjust BMCR
  734. * @dev: net device
  735. * @init: set true for initialisation
  736. *
  737. * Select duplex mode depending on negotiation state. This
  738. * also updates our carrier state.
  739. */
  740. static void smc911x_phy_check_media(struct net_device *dev, int init)
  741. {
  742. struct smc911x_local *lp = netdev_priv(dev);
  743. int phyaddr = lp->mii.phy_id;
  744. unsigned int bmcr, cr;
  745. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  746. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  747. /* duplex state has changed */
  748. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  749. SMC_GET_MAC_CR(lp, cr);
  750. if (lp->mii.full_duplex) {
  751. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  752. bmcr |= BMCR_FULLDPLX;
  753. cr |= MAC_CR_RCVOWN_;
  754. } else {
  755. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  756. bmcr &= ~BMCR_FULLDPLX;
  757. cr &= ~MAC_CR_RCVOWN_;
  758. }
  759. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  760. SMC_SET_MAC_CR(lp, cr);
  761. }
  762. }
  763. /*
  764. * Configures the specified PHY through the MII management interface
  765. * using Autonegotiation.
  766. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  767. * If RPC ANEG bit is set, the media selection is dependent purely on
  768. * the selection by the MII (either in the MII BMCR reg or the result
  769. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  770. * is controlled by the RPC SPEED and RPC DPLX bits.
  771. */
  772. static void smc911x_phy_configure(struct work_struct *work)
  773. {
  774. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  775. phy_configure);
  776. struct net_device *dev = lp->netdev;
  777. int phyaddr = lp->mii.phy_id;
  778. int my_phy_caps; /* My PHY capabilities */
  779. int my_ad_caps; /* My Advertised capabilities */
  780. int status;
  781. unsigned long flags;
  782. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  783. /*
  784. * We should not be called if phy_type is zero.
  785. */
  786. if (lp->phy_type == 0)
  787. return;
  788. if (smc911x_phy_reset(dev, phyaddr)) {
  789. printk("%s: PHY reset timed out\n", dev->name);
  790. return;
  791. }
  792. spin_lock_irqsave(&lp->lock, flags);
  793. /*
  794. * Enable PHY Interrupts (for register 18)
  795. * Interrupts listed here are enabled
  796. */
  797. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  798. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  799. PHY_INT_MASK_LINK_DOWN_);
  800. /* If the user requested no auto neg, then go set his request */
  801. if (lp->mii.force_media) {
  802. smc911x_phy_fixed(dev);
  803. goto smc911x_phy_configure_exit;
  804. }
  805. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  806. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  807. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  808. printk(KERN_INFO "Auto negotiation NOT supported\n");
  809. smc911x_phy_fixed(dev);
  810. goto smc911x_phy_configure_exit;
  811. }
  812. /* CSMA capable w/ both pauses */
  813. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  814. if (my_phy_caps & BMSR_100BASE4)
  815. my_ad_caps |= ADVERTISE_100BASE4;
  816. if (my_phy_caps & BMSR_100FULL)
  817. my_ad_caps |= ADVERTISE_100FULL;
  818. if (my_phy_caps & BMSR_100HALF)
  819. my_ad_caps |= ADVERTISE_100HALF;
  820. if (my_phy_caps & BMSR_10FULL)
  821. my_ad_caps |= ADVERTISE_10FULL;
  822. if (my_phy_caps & BMSR_10HALF)
  823. my_ad_caps |= ADVERTISE_10HALF;
  824. /* Disable capabilities not selected by our user */
  825. if (lp->ctl_rspeed != 100)
  826. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  827. if (!lp->ctl_rfduplx)
  828. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  829. /* Update our Auto-Neg Advertisement Register */
  830. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  831. lp->mii.advertising = my_ad_caps;
  832. /*
  833. * Read the register back. Without this, it appears that when
  834. * auto-negotiation is restarted, sometimes it isn't ready and
  835. * the link does not come up.
  836. */
  837. udelay(10);
  838. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  839. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  840. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  841. /* Restart auto-negotiation process in order to advertise my caps */
  842. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  843. smc911x_phy_check_media(dev, 1);
  844. smc911x_phy_configure_exit:
  845. spin_unlock_irqrestore(&lp->lock, flags);
  846. }
  847. /*
  848. * smc911x_phy_interrupt
  849. *
  850. * Purpose: Handle interrupts relating to PHY register 18. This is
  851. * called from the "hard" interrupt handler under our private spinlock.
  852. */
  853. static void smc911x_phy_interrupt(struct net_device *dev)
  854. {
  855. struct smc911x_local *lp = netdev_priv(dev);
  856. int phyaddr = lp->mii.phy_id;
  857. int status;
  858. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  859. if (lp->phy_type == 0)
  860. return;
  861. smc911x_phy_check_media(dev, 0);
  862. /* read to clear status bits */
  863. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  864. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  865. dev->name, status & 0xffff);
  866. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  867. dev->name, SMC_GET_AFC_CFG(lp));
  868. }
  869. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  870. /*
  871. * This is the main routine of the driver, to handle the device when
  872. * it needs some attention.
  873. */
  874. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  875. {
  876. struct net_device *dev = dev_id;
  877. struct smc911x_local *lp = netdev_priv(dev);
  878. unsigned int status, mask, timeout;
  879. unsigned int rx_overrun=0, cr, pkts;
  880. unsigned long flags;
  881. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  882. spin_lock_irqsave(&lp->lock, flags);
  883. /* Spurious interrupt check */
  884. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  885. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  886. spin_unlock_irqrestore(&lp->lock, flags);
  887. return IRQ_NONE;
  888. }
  889. mask = SMC_GET_INT_EN(lp);
  890. SMC_SET_INT_EN(lp, 0);
  891. /* set a timeout value, so I don't stay here forever */
  892. timeout = 8;
  893. do {
  894. status = SMC_GET_INT(lp);
  895. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  896. dev->name, status, mask, status & ~mask);
  897. status &= mask;
  898. if (!status)
  899. break;
  900. /* Handle SW interrupt condition */
  901. if (status & INT_STS_SW_INT_) {
  902. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  903. mask &= ~INT_EN_SW_INT_EN_;
  904. }
  905. /* Handle various error conditions */
  906. if (status & INT_STS_RXE_) {
  907. SMC_ACK_INT(lp, INT_STS_RXE_);
  908. dev->stats.rx_errors++;
  909. }
  910. if (status & INT_STS_RXDFH_INT_) {
  911. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  912. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  913. }
  914. /* Undocumented interrupt-what is the right thing to do here? */
  915. if (status & INT_STS_RXDF_INT_) {
  916. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  917. }
  918. /* Rx Data FIFO exceeds set level */
  919. if (status & INT_STS_RDFL_) {
  920. if (IS_REV_A(lp->revision)) {
  921. rx_overrun=1;
  922. SMC_GET_MAC_CR(lp, cr);
  923. cr &= ~MAC_CR_RXEN_;
  924. SMC_SET_MAC_CR(lp, cr);
  925. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  926. dev->stats.rx_errors++;
  927. dev->stats.rx_fifo_errors++;
  928. }
  929. SMC_ACK_INT(lp, INT_STS_RDFL_);
  930. }
  931. if (status & INT_STS_RDFO_) {
  932. if (!IS_REV_A(lp->revision)) {
  933. SMC_GET_MAC_CR(lp, cr);
  934. cr &= ~MAC_CR_RXEN_;
  935. SMC_SET_MAC_CR(lp, cr);
  936. rx_overrun=1;
  937. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  938. dev->stats.rx_errors++;
  939. dev->stats.rx_fifo_errors++;
  940. }
  941. SMC_ACK_INT(lp, INT_STS_RDFO_);
  942. }
  943. /* Handle receive condition */
  944. if ((status & INT_STS_RSFL_) || rx_overrun) {
  945. unsigned int fifo;
  946. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  947. fifo = SMC_GET_RX_FIFO_INF(lp);
  948. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  949. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  950. dev->name, pkts, fifo & 0xFFFF );
  951. if (pkts != 0) {
  952. #ifdef SMC_USE_DMA
  953. unsigned int fifo;
  954. if (lp->rxdma_active){
  955. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  956. "%s: RX DMA active\n", dev->name);
  957. /* The DMA is already running so up the IRQ threshold */
  958. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  959. fifo |= pkts & 0xFF;
  960. DBG(SMC_DEBUG_RX,
  961. "%s: Setting RX stat FIFO threshold to %d\n",
  962. dev->name, fifo & 0xff);
  963. SMC_SET_FIFO_INT(lp, fifo);
  964. } else
  965. #endif
  966. smc911x_rcv(dev);
  967. }
  968. SMC_ACK_INT(lp, INT_STS_RSFL_);
  969. }
  970. /* Handle transmit FIFO available */
  971. if (status & INT_STS_TDFA_) {
  972. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  973. SMC_SET_FIFO_TDA(lp, 0xFF);
  974. lp->tx_throttle = 0;
  975. #ifdef SMC_USE_DMA
  976. if (!lp->txdma_active)
  977. #endif
  978. netif_wake_queue(dev);
  979. SMC_ACK_INT(lp, INT_STS_TDFA_);
  980. }
  981. /* Handle transmit done condition */
  982. #if 1
  983. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  984. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  985. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  986. dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  987. smc911x_tx(dev);
  988. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  989. SMC_ACK_INT(lp, INT_STS_TSFL_);
  990. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  991. }
  992. #else
  993. if (status & INT_STS_TSFL_) {
  994. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq\n", dev->name, );
  995. smc911x_tx(dev);
  996. SMC_ACK_INT(lp, INT_STS_TSFL_);
  997. }
  998. if (status & INT_STS_GPT_INT_) {
  999. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1000. dev->name,
  1001. SMC_GET_IRQ_CFG(lp),
  1002. SMC_GET_FIFO_INT(lp),
  1003. SMC_GET_RX_CFG(lp));
  1004. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1005. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1006. dev->name,
  1007. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  1008. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  1009. SMC_GET_RX_STS_FIFO_PEEK(lp));
  1010. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  1011. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  1012. }
  1013. #endif
  1014. /* Handle PHY interrupt condition */
  1015. if (status & INT_STS_PHY_INT_) {
  1016. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1017. smc911x_phy_interrupt(dev);
  1018. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1019. }
  1020. } while (--timeout);
  1021. /* restore mask state */
  1022. SMC_SET_INT_EN(lp, mask);
  1023. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1024. dev->name, 8-timeout);
  1025. spin_unlock_irqrestore(&lp->lock, flags);
  1026. return IRQ_HANDLED;
  1027. }
  1028. #ifdef SMC_USE_DMA
  1029. static void
  1030. smc911x_tx_dma_irq(int dma, void *data)
  1031. {
  1032. struct net_device *dev = (struct net_device *)data;
  1033. struct smc911x_local *lp = netdev_priv(dev);
  1034. struct sk_buff *skb = lp->current_tx_skb;
  1035. unsigned long flags;
  1036. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1037. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1038. /* Clear the DMA interrupt sources */
  1039. SMC_DMA_ACK_IRQ(dev, dma);
  1040. BUG_ON(skb == NULL);
  1041. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1042. dev->trans_start = jiffies;
  1043. dev_kfree_skb_irq(skb);
  1044. lp->current_tx_skb = NULL;
  1045. if (lp->pending_tx_skb != NULL)
  1046. smc911x_hardware_send_pkt(dev);
  1047. else {
  1048. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1049. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1050. spin_lock_irqsave(&lp->lock, flags);
  1051. lp->txdma_active = 0;
  1052. if (!lp->tx_throttle) {
  1053. netif_wake_queue(dev);
  1054. }
  1055. spin_unlock_irqrestore(&lp->lock, flags);
  1056. }
  1057. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1058. "%s: TX DMA irq completed\n", dev->name);
  1059. }
  1060. static void
  1061. smc911x_rx_dma_irq(int dma, void *data)
  1062. {
  1063. struct net_device *dev = (struct net_device *)data;
  1064. unsigned long ioaddr = dev->base_addr;
  1065. struct smc911x_local *lp = netdev_priv(dev);
  1066. struct sk_buff *skb = lp->current_rx_skb;
  1067. unsigned long flags;
  1068. unsigned int pkts;
  1069. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1070. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1071. /* Clear the DMA interrupt sources */
  1072. SMC_DMA_ACK_IRQ(dev, dma);
  1073. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1074. BUG_ON(skb == NULL);
  1075. lp->current_rx_skb = NULL;
  1076. PRINT_PKT(skb->data, skb->len);
  1077. skb->protocol = eth_type_trans(skb, dev);
  1078. dev->stats.rx_packets++;
  1079. dev->stats.rx_bytes += skb->len;
  1080. netif_rx(skb);
  1081. spin_lock_irqsave(&lp->lock, flags);
  1082. pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
  1083. if (pkts != 0) {
  1084. smc911x_rcv(dev);
  1085. }else {
  1086. lp->rxdma_active = 0;
  1087. }
  1088. spin_unlock_irqrestore(&lp->lock, flags);
  1089. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1090. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1091. dev->name, pkts);
  1092. }
  1093. #endif /* SMC_USE_DMA */
  1094. #ifdef CONFIG_NET_POLL_CONTROLLER
  1095. /*
  1096. * Polling receive - used by netconsole and other diagnostic tools
  1097. * to allow network i/o with interrupts disabled.
  1098. */
  1099. static void smc911x_poll_controller(struct net_device *dev)
  1100. {
  1101. disable_irq(dev->irq);
  1102. smc911x_interrupt(dev->irq, dev);
  1103. enable_irq(dev->irq);
  1104. }
  1105. #endif
  1106. /* Our watchdog timed out. Called by the networking layer */
  1107. static void smc911x_timeout(struct net_device *dev)
  1108. {
  1109. struct smc911x_local *lp = netdev_priv(dev);
  1110. int status, mask;
  1111. unsigned long flags;
  1112. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1113. spin_lock_irqsave(&lp->lock, flags);
  1114. status = SMC_GET_INT(lp);
  1115. mask = SMC_GET_INT_EN(lp);
  1116. spin_unlock_irqrestore(&lp->lock, flags);
  1117. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x\n",
  1118. dev->name, status, mask);
  1119. /* Dump the current TX FIFO contents and restart */
  1120. mask = SMC_GET_TX_CFG(lp);
  1121. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1122. /*
  1123. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1124. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1125. * which calls schedule(). Hence we use a work queue.
  1126. */
  1127. if (lp->phy_type != 0)
  1128. schedule_work(&lp->phy_configure);
  1129. /* We can accept TX packets again */
  1130. dev->trans_start = jiffies; /* prevent tx timeout */
  1131. netif_wake_queue(dev);
  1132. }
  1133. /*
  1134. * This routine will, depending on the values passed to it,
  1135. * either make it accept multicast packets, go into
  1136. * promiscuous mode (for TCPDUMP and cousins) or accept
  1137. * a select set of multicast packets
  1138. */
  1139. static void smc911x_set_multicast_list(struct net_device *dev)
  1140. {
  1141. struct smc911x_local *lp = netdev_priv(dev);
  1142. unsigned int multicast_table[2];
  1143. unsigned int mcr, update_multicast = 0;
  1144. unsigned long flags;
  1145. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1146. spin_lock_irqsave(&lp->lock, flags);
  1147. SMC_GET_MAC_CR(lp, mcr);
  1148. spin_unlock_irqrestore(&lp->lock, flags);
  1149. if (dev->flags & IFF_PROMISC) {
  1150. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1151. mcr |= MAC_CR_PRMS_;
  1152. }
  1153. /*
  1154. * Here, I am setting this to accept all multicast packets.
  1155. * I don't need to zero the multicast table, because the flag is
  1156. * checked before the table is
  1157. */
  1158. else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
  1159. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1160. mcr |= MAC_CR_MCPAS_;
  1161. }
  1162. /*
  1163. * This sets the internal hardware table to filter out unwanted
  1164. * multicast packets before they take up memory.
  1165. *
  1166. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1167. * address are the offset into the table. If that bit is 1, then the
  1168. * multicast packet is accepted. Otherwise, it's dropped silently.
  1169. *
  1170. * To use the 6 bits as an offset into the table, the high 1 bit is
  1171. * the number of the 32 bit register, while the low 5 bits are the bit
  1172. * within that register.
  1173. */
  1174. else if (!netdev_mc_empty(dev)) {
  1175. struct netdev_hw_addr *ha;
  1176. /* Set the Hash perfec mode */
  1177. mcr |= MAC_CR_HPFILT_;
  1178. /* start with a table of all zeros: reject all */
  1179. memset(multicast_table, 0, sizeof(multicast_table));
  1180. netdev_for_each_mc_addr(ha, dev) {
  1181. u32 position;
  1182. /* make sure this is a multicast address -
  1183. shouldn't this be a given if we have it here ? */
  1184. if (!(*ha->addr & 1))
  1185. continue;
  1186. /* upper 6 bits are used as hash index */
  1187. position = ether_crc(ETH_ALEN, ha->addr)>>26;
  1188. multicast_table[position>>5] |= 1 << (position&0x1f);
  1189. }
  1190. /* be sure I get rid of flags I might have set */
  1191. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1192. /* now, the table can be loaded into the chipset */
  1193. update_multicast = 1;
  1194. } else {
  1195. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1196. dev->name);
  1197. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1198. /*
  1199. * since I'm disabling all multicast entirely, I need to
  1200. * clear the multicast list
  1201. */
  1202. memset(multicast_table, 0, sizeof(multicast_table));
  1203. update_multicast = 1;
  1204. }
  1205. spin_lock_irqsave(&lp->lock, flags);
  1206. SMC_SET_MAC_CR(lp, mcr);
  1207. if (update_multicast) {
  1208. DBG(SMC_DEBUG_MISC,
  1209. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1210. dev->name, multicast_table[0], multicast_table[1]);
  1211. SMC_SET_HASHL(lp, multicast_table[0]);
  1212. SMC_SET_HASHH(lp, multicast_table[1]);
  1213. }
  1214. spin_unlock_irqrestore(&lp->lock, flags);
  1215. }
  1216. /*
  1217. * Open and Initialize the board
  1218. *
  1219. * Set up everything, reset the card, etc..
  1220. */
  1221. static int
  1222. smc911x_open(struct net_device *dev)
  1223. {
  1224. struct smc911x_local *lp = netdev_priv(dev);
  1225. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1226. /*
  1227. * Check that the address is valid. If its not, refuse
  1228. * to bring the device up. The user must specify an
  1229. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1230. */
  1231. if (!is_valid_ether_addr(dev->dev_addr)) {
  1232. PRINTK("%s: no valid ethernet hw addr\n", __func__);
  1233. return -EINVAL;
  1234. }
  1235. /* reset the hardware */
  1236. smc911x_reset(dev);
  1237. /* Configure the PHY, initialize the link state */
  1238. smc911x_phy_configure(&lp->phy_configure);
  1239. /* Turn on Tx + Rx */
  1240. smc911x_enable(dev);
  1241. netif_start_queue(dev);
  1242. return 0;
  1243. }
  1244. /*
  1245. * smc911x_close
  1246. *
  1247. * this makes the board clean up everything that it can
  1248. * and not talk to the outside world. Caused by
  1249. * an 'ifconfig ethX down'
  1250. */
  1251. static int smc911x_close(struct net_device *dev)
  1252. {
  1253. struct smc911x_local *lp = netdev_priv(dev);
  1254. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1255. netif_stop_queue(dev);
  1256. netif_carrier_off(dev);
  1257. /* clear everything */
  1258. smc911x_shutdown(dev);
  1259. if (lp->phy_type != 0) {
  1260. /* We need to ensure that no calls to
  1261. * smc911x_phy_configure are pending.
  1262. */
  1263. cancel_work_sync(&lp->phy_configure);
  1264. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1265. }
  1266. if (lp->pending_tx_skb) {
  1267. dev_kfree_skb(lp->pending_tx_skb);
  1268. lp->pending_tx_skb = NULL;
  1269. }
  1270. return 0;
  1271. }
  1272. /*
  1273. * Ethtool support
  1274. */
  1275. static int
  1276. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1277. {
  1278. struct smc911x_local *lp = netdev_priv(dev);
  1279. int ret, status;
  1280. unsigned long flags;
  1281. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1282. cmd->maxtxpkt = 1;
  1283. cmd->maxrxpkt = 1;
  1284. if (lp->phy_type != 0) {
  1285. spin_lock_irqsave(&lp->lock, flags);
  1286. ret = mii_ethtool_gset(&lp->mii, cmd);
  1287. spin_unlock_irqrestore(&lp->lock, flags);
  1288. } else {
  1289. cmd->supported = SUPPORTED_10baseT_Half |
  1290. SUPPORTED_10baseT_Full |
  1291. SUPPORTED_TP | SUPPORTED_AUI;
  1292. if (lp->ctl_rspeed == 10)
  1293. cmd->speed = SPEED_10;
  1294. else if (lp->ctl_rspeed == 100)
  1295. cmd->speed = SPEED_100;
  1296. cmd->autoneg = AUTONEG_DISABLE;
  1297. if (lp->mii.phy_id==1)
  1298. cmd->transceiver = XCVR_INTERNAL;
  1299. else
  1300. cmd->transceiver = XCVR_EXTERNAL;
  1301. cmd->port = 0;
  1302. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1303. cmd->duplex =
  1304. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1305. DUPLEX_FULL : DUPLEX_HALF;
  1306. ret = 0;
  1307. }
  1308. return ret;
  1309. }
  1310. static int
  1311. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1312. {
  1313. struct smc911x_local *lp = netdev_priv(dev);
  1314. int ret;
  1315. unsigned long flags;
  1316. if (lp->phy_type != 0) {
  1317. spin_lock_irqsave(&lp->lock, flags);
  1318. ret = mii_ethtool_sset(&lp->mii, cmd);
  1319. spin_unlock_irqrestore(&lp->lock, flags);
  1320. } else {
  1321. if (cmd->autoneg != AUTONEG_DISABLE ||
  1322. cmd->speed != SPEED_10 ||
  1323. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1324. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1325. return -EINVAL;
  1326. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1327. ret = 0;
  1328. }
  1329. return ret;
  1330. }
  1331. static void
  1332. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1333. {
  1334. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1335. strncpy(info->version, version, sizeof(info->version));
  1336. strncpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
  1337. }
  1338. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1339. {
  1340. struct smc911x_local *lp = netdev_priv(dev);
  1341. int ret = -EINVAL;
  1342. unsigned long flags;
  1343. if (lp->phy_type != 0) {
  1344. spin_lock_irqsave(&lp->lock, flags);
  1345. ret = mii_nway_restart(&lp->mii);
  1346. spin_unlock_irqrestore(&lp->lock, flags);
  1347. }
  1348. return ret;
  1349. }
  1350. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1351. {
  1352. struct smc911x_local *lp = netdev_priv(dev);
  1353. return lp->msg_enable;
  1354. }
  1355. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1356. {
  1357. struct smc911x_local *lp = netdev_priv(dev);
  1358. lp->msg_enable = level;
  1359. }
  1360. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1361. {
  1362. /* System regs + MAC regs + PHY regs */
  1363. return (((E2P_CMD - ID_REV)/4 + 1) +
  1364. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1365. }
  1366. static void smc911x_ethtool_getregs(struct net_device *dev,
  1367. struct ethtool_regs* regs, void *buf)
  1368. {
  1369. struct smc911x_local *lp = netdev_priv(dev);
  1370. unsigned long flags;
  1371. u32 reg,i,j=0;
  1372. u32 *data = (u32*)buf;
  1373. regs->version = lp->version;
  1374. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1375. data[j++] = SMC_inl(lp, i);
  1376. }
  1377. for(i=MAC_CR;i<=WUCSR;i++) {
  1378. spin_lock_irqsave(&lp->lock, flags);
  1379. SMC_GET_MAC_CSR(lp, i, reg);
  1380. spin_unlock_irqrestore(&lp->lock, flags);
  1381. data[j++] = reg;
  1382. }
  1383. for(i=0;i<=31;i++) {
  1384. spin_lock_irqsave(&lp->lock, flags);
  1385. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1386. spin_unlock_irqrestore(&lp->lock, flags);
  1387. data[j++] = reg & 0xFFFF;
  1388. }
  1389. }
  1390. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1391. {
  1392. struct smc911x_local *lp = netdev_priv(dev);
  1393. unsigned int timeout;
  1394. int e2p_cmd;
  1395. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1396. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1397. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1398. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1399. dev->name, __func__);
  1400. return -EFAULT;
  1401. }
  1402. mdelay(1);
  1403. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1404. }
  1405. if (timeout == 0) {
  1406. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1407. dev->name, __func__);
  1408. return -ETIMEDOUT;
  1409. }
  1410. return 0;
  1411. }
  1412. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1413. int cmd, int addr)
  1414. {
  1415. struct smc911x_local *lp = netdev_priv(dev);
  1416. int ret;
  1417. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1418. return ret;
  1419. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1420. ((cmd) & (0x7<<28)) |
  1421. ((addr) & 0xFF));
  1422. return 0;
  1423. }
  1424. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1425. u8 *data)
  1426. {
  1427. struct smc911x_local *lp = netdev_priv(dev);
  1428. int ret;
  1429. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1430. return ret;
  1431. *data = SMC_GET_E2P_DATA(lp);
  1432. return 0;
  1433. }
  1434. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1435. u8 data)
  1436. {
  1437. struct smc911x_local *lp = netdev_priv(dev);
  1438. int ret;
  1439. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1440. return ret;
  1441. SMC_SET_E2P_DATA(lp, data);
  1442. return 0;
  1443. }
  1444. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1445. struct ethtool_eeprom *eeprom, u8 *data)
  1446. {
  1447. u8 eebuf[SMC911X_EEPROM_LEN];
  1448. int i, ret;
  1449. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1450. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1451. return ret;
  1452. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1453. return ret;
  1454. }
  1455. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1456. return 0;
  1457. }
  1458. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1459. struct ethtool_eeprom *eeprom, u8 *data)
  1460. {
  1461. int i, ret;
  1462. /* Enable erase */
  1463. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1464. return ret;
  1465. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1466. /* erase byte */
  1467. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1468. return ret;
  1469. /* write byte */
  1470. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1471. return ret;
  1472. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1473. return ret;
  1474. }
  1475. return 0;
  1476. }
  1477. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1478. {
  1479. return SMC911X_EEPROM_LEN;
  1480. }
  1481. static const struct ethtool_ops smc911x_ethtool_ops = {
  1482. .get_settings = smc911x_ethtool_getsettings,
  1483. .set_settings = smc911x_ethtool_setsettings,
  1484. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1485. .get_msglevel = smc911x_ethtool_getmsglevel,
  1486. .set_msglevel = smc911x_ethtool_setmsglevel,
  1487. .nway_reset = smc911x_ethtool_nwayreset,
  1488. .get_link = ethtool_op_get_link,
  1489. .get_regs_len = smc911x_ethtool_getregslen,
  1490. .get_regs = smc911x_ethtool_getregs,
  1491. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1492. .get_eeprom = smc911x_ethtool_geteeprom,
  1493. .set_eeprom = smc911x_ethtool_seteeprom,
  1494. };
  1495. /*
  1496. * smc911x_findirq
  1497. *
  1498. * This routine has a simple purpose -- make the SMC chip generate an
  1499. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1500. */
  1501. static int __devinit smc911x_findirq(struct net_device *dev)
  1502. {
  1503. struct smc911x_local *lp = netdev_priv(dev);
  1504. int timeout = 20;
  1505. unsigned long cookie;
  1506. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1507. cookie = probe_irq_on();
  1508. /*
  1509. * Force a SW interrupt
  1510. */
  1511. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1512. /*
  1513. * Wait until positive that the interrupt has been generated
  1514. */
  1515. do {
  1516. int int_status;
  1517. udelay(10);
  1518. int_status = SMC_GET_INT_EN(lp);
  1519. if (int_status & INT_EN_SW_INT_EN_)
  1520. break; /* got the interrupt */
  1521. } while (--timeout);
  1522. /*
  1523. * there is really nothing that I can do here if timeout fails,
  1524. * as autoirq_report will return a 0 anyway, which is what I
  1525. * want in this case. Plus, the clean up is needed in both
  1526. * cases.
  1527. */
  1528. /* and disable all interrupts again */
  1529. SMC_SET_INT_EN(lp, 0);
  1530. /* and return what I found */
  1531. return probe_irq_off(cookie);
  1532. }
  1533. static const struct net_device_ops smc911x_netdev_ops = {
  1534. .ndo_open = smc911x_open,
  1535. .ndo_stop = smc911x_close,
  1536. .ndo_start_xmit = smc911x_hard_start_xmit,
  1537. .ndo_tx_timeout = smc911x_timeout,
  1538. .ndo_set_multicast_list = smc911x_set_multicast_list,
  1539. .ndo_change_mtu = eth_change_mtu,
  1540. .ndo_validate_addr = eth_validate_addr,
  1541. .ndo_set_mac_address = eth_mac_addr,
  1542. #ifdef CONFIG_NET_POLL_CONTROLLER
  1543. .ndo_poll_controller = smc911x_poll_controller,
  1544. #endif
  1545. };
  1546. /*
  1547. * Function: smc911x_probe(unsigned long ioaddr)
  1548. *
  1549. * Purpose:
  1550. * Tests to see if a given ioaddr points to an SMC911x chip.
  1551. * Returns a 0 on success
  1552. *
  1553. * Algorithm:
  1554. * (1) see if the endian word is OK
  1555. * (1) see if I recognize the chip ID in the appropriate register
  1556. *
  1557. * Here I do typical initialization tasks.
  1558. *
  1559. * o Initialize the structure if needed
  1560. * o print out my vanity message if not done so already
  1561. * o print out what type of hardware is detected
  1562. * o print out the ethernet address
  1563. * o find the IRQ
  1564. * o set up my private data
  1565. * o configure the dev structure with my subroutines
  1566. * o actually GRAB the irq.
  1567. * o GRAB the region
  1568. */
  1569. static int __devinit smc911x_probe(struct net_device *dev)
  1570. {
  1571. struct smc911x_local *lp = netdev_priv(dev);
  1572. int i, retval;
  1573. unsigned int val, chip_id, revision;
  1574. const char *version_string;
  1575. unsigned long irq_flags;
  1576. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1577. /* First, see if the endian word is recognized */
  1578. val = SMC_GET_BYTE_TEST(lp);
  1579. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1580. if (val != 0x87654321) {
  1581. printk(KERN_ERR "Invalid chip endian 0x%08x\n",val);
  1582. retval = -ENODEV;
  1583. goto err_out;
  1584. }
  1585. /*
  1586. * check if the revision register is something that I
  1587. * recognize. These might need to be added to later,
  1588. * as future revisions could be added.
  1589. */
  1590. chip_id = SMC_GET_PN(lp);
  1591. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1592. for(i=0;chip_ids[i].id != 0; i++) {
  1593. if (chip_ids[i].id == chip_id) break;
  1594. }
  1595. if (!chip_ids[i].id) {
  1596. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1597. retval = -ENODEV;
  1598. goto err_out;
  1599. }
  1600. version_string = chip_ids[i].name;
  1601. revision = SMC_GET_REV(lp);
  1602. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1603. /* At this point I'll assume that the chip is an SMC911x. */
  1604. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1605. /* Validate the TX FIFO size requested */
  1606. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1607. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1608. retval = -EINVAL;
  1609. goto err_out;
  1610. }
  1611. /* fill in some of the fields */
  1612. lp->version = chip_ids[i].id;
  1613. lp->revision = revision;
  1614. lp->tx_fifo_kb = tx_fifo_kb;
  1615. /* Reverse calculate the RX FIFO size from the TX */
  1616. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1617. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1618. /* Set the automatic flow control values */
  1619. switch(lp->tx_fifo_kb) {
  1620. /*
  1621. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1622. * AFC_LO is AFC_HI/2
  1623. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1624. */
  1625. case 2:/* 13440 Rx Data Fifo Size */
  1626. lp->afc_cfg=0x008C46AF;break;
  1627. case 3:/* 12480 Rx Data Fifo Size */
  1628. lp->afc_cfg=0x0082419F;break;
  1629. case 4:/* 11520 Rx Data Fifo Size */
  1630. lp->afc_cfg=0x00783C9F;break;
  1631. case 5:/* 10560 Rx Data Fifo Size */
  1632. lp->afc_cfg=0x006E374F;break;
  1633. case 6:/* 9600 Rx Data Fifo Size */
  1634. lp->afc_cfg=0x0064328F;break;
  1635. case 7:/* 8640 Rx Data Fifo Size */
  1636. lp->afc_cfg=0x005A2D7F;break;
  1637. case 8:/* 7680 Rx Data Fifo Size */
  1638. lp->afc_cfg=0x0050287F;break;
  1639. case 9:/* 6720 Rx Data Fifo Size */
  1640. lp->afc_cfg=0x0046236F;break;
  1641. case 10:/* 5760 Rx Data Fifo Size */
  1642. lp->afc_cfg=0x003C1E6F;break;
  1643. case 11:/* 4800 Rx Data Fifo Size */
  1644. lp->afc_cfg=0x0032195F;break;
  1645. /*
  1646. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1647. * AFC_LO is AFC_HI/2
  1648. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1649. */
  1650. case 12:/* 3840 Rx Data Fifo Size */
  1651. lp->afc_cfg=0x0024124F;break;
  1652. case 13:/* 2880 Rx Data Fifo Size */
  1653. lp->afc_cfg=0x0015073F;break;
  1654. case 14:/* 1920 Rx Data Fifo Size */
  1655. lp->afc_cfg=0x0006032F;break;
  1656. default:
  1657. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1658. dev->name);
  1659. break;
  1660. }
  1661. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1662. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1663. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1664. spin_lock_init(&lp->lock);
  1665. /* Get the MAC address */
  1666. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1667. /* now, reset the chip, and put it into a known state */
  1668. smc911x_reset(dev);
  1669. /*
  1670. * If dev->irq is 0, then the device has to be banged on to see
  1671. * what the IRQ is.
  1672. *
  1673. * Specifying an IRQ is done with the assumption that the user knows
  1674. * what (s)he is doing. No checking is done!!!!
  1675. */
  1676. if (dev->irq < 1) {
  1677. int trials;
  1678. trials = 3;
  1679. while (trials--) {
  1680. dev->irq = smc911x_findirq(dev);
  1681. if (dev->irq)
  1682. break;
  1683. /* kick the card and try again */
  1684. smc911x_reset(dev);
  1685. }
  1686. }
  1687. if (dev->irq == 0) {
  1688. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1689. dev->name);
  1690. retval = -ENODEV;
  1691. goto err_out;
  1692. }
  1693. dev->irq = irq_canonicalize(dev->irq);
  1694. /* Fill in the fields of the device structure with ethernet values. */
  1695. ether_setup(dev);
  1696. dev->netdev_ops = &smc911x_netdev_ops;
  1697. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1698. dev->ethtool_ops = &smc911x_ethtool_ops;
  1699. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1700. lp->mii.phy_id_mask = 0x1f;
  1701. lp->mii.reg_num_mask = 0x1f;
  1702. lp->mii.force_media = 0;
  1703. lp->mii.full_duplex = 0;
  1704. lp->mii.dev = dev;
  1705. lp->mii.mdio_read = smc911x_phy_read;
  1706. lp->mii.mdio_write = smc911x_phy_write;
  1707. /*
  1708. * Locate the phy, if any.
  1709. */
  1710. smc911x_phy_detect(dev);
  1711. /* Set default parameters */
  1712. lp->msg_enable = NETIF_MSG_LINK;
  1713. lp->ctl_rfduplx = 1;
  1714. lp->ctl_rspeed = 100;
  1715. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1716. irq_flags = lp->cfg.irq_flags;
  1717. #else
  1718. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1719. #endif
  1720. /* Grab the IRQ */
  1721. retval = request_irq(dev->irq, smc911x_interrupt,
  1722. irq_flags, dev->name, dev);
  1723. if (retval)
  1724. goto err_out;
  1725. #ifdef SMC_USE_DMA
  1726. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1727. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1728. lp->rxdma_active = 0;
  1729. lp->txdma_active = 0;
  1730. dev->dma = lp->rxdma;
  1731. #endif
  1732. retval = register_netdev(dev);
  1733. if (retval == 0) {
  1734. /* now, print out the card info, in a short format.. */
  1735. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1736. dev->name, version_string, lp->revision,
  1737. dev->base_addr, dev->irq);
  1738. #ifdef SMC_USE_DMA
  1739. if (lp->rxdma != -1)
  1740. printk(" RXDMA %d ", lp->rxdma);
  1741. if (lp->txdma != -1)
  1742. printk("TXDMA %d", lp->txdma);
  1743. #endif
  1744. printk("\n");
  1745. if (!is_valid_ether_addr(dev->dev_addr)) {
  1746. printk("%s: Invalid ethernet MAC address. Please "
  1747. "set using ifconfig\n", dev->name);
  1748. } else {
  1749. /* Print the Ethernet address */
  1750. printk("%s: Ethernet addr: %pM\n",
  1751. dev->name, dev->dev_addr);
  1752. }
  1753. if (lp->phy_type == 0) {
  1754. PRINTK("%s: No PHY found\n", dev->name);
  1755. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1756. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1757. } else {
  1758. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1759. }
  1760. }
  1761. err_out:
  1762. #ifdef SMC_USE_DMA
  1763. if (retval) {
  1764. if (lp->rxdma != -1) {
  1765. SMC_DMA_FREE(dev, lp->rxdma);
  1766. }
  1767. if (lp->txdma != -1) {
  1768. SMC_DMA_FREE(dev, lp->txdma);
  1769. }
  1770. }
  1771. #endif
  1772. return retval;
  1773. }
  1774. /*
  1775. * smc911x_init(void)
  1776. *
  1777. * Output:
  1778. * 0 --> there is a device
  1779. * anything else, error
  1780. */
  1781. static int __devinit smc911x_drv_probe(struct platform_device *pdev)
  1782. {
  1783. struct net_device *ndev;
  1784. struct resource *res;
  1785. struct smc911x_local *lp;
  1786. unsigned int *addr;
  1787. int ret;
  1788. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1789. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1790. if (!res) {
  1791. ret = -ENODEV;
  1792. goto out;
  1793. }
  1794. /*
  1795. * Request the regions.
  1796. */
  1797. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1798. ret = -EBUSY;
  1799. goto out;
  1800. }
  1801. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1802. if (!ndev) {
  1803. printk("%s: could not allocate device.\n", CARDNAME);
  1804. ret = -ENOMEM;
  1805. goto release_1;
  1806. }
  1807. SET_NETDEV_DEV(ndev, &pdev->dev);
  1808. ndev->dma = (unsigned char)-1;
  1809. ndev->irq = platform_get_irq(pdev, 0);
  1810. lp = netdev_priv(ndev);
  1811. lp->netdev = ndev;
  1812. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1813. {
  1814. struct smc911x_platdata *pd = pdev->dev.platform_data;
  1815. if (!pd) {
  1816. ret = -EINVAL;
  1817. goto release_both;
  1818. }
  1819. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1820. }
  1821. #endif
  1822. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1823. if (!addr) {
  1824. ret = -ENOMEM;
  1825. goto release_both;
  1826. }
  1827. platform_set_drvdata(pdev, ndev);
  1828. lp->base = addr;
  1829. ndev->base_addr = res->start;
  1830. ret = smc911x_probe(ndev);
  1831. if (ret != 0) {
  1832. platform_set_drvdata(pdev, NULL);
  1833. iounmap(addr);
  1834. release_both:
  1835. free_netdev(ndev);
  1836. release_1:
  1837. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1838. out:
  1839. printk("%s: not found (%d).\n", CARDNAME, ret);
  1840. }
  1841. #ifdef SMC_USE_DMA
  1842. else {
  1843. lp->physaddr = res->start;
  1844. lp->dev = &pdev->dev;
  1845. }
  1846. #endif
  1847. return ret;
  1848. }
  1849. static int __devexit smc911x_drv_remove(struct platform_device *pdev)
  1850. {
  1851. struct net_device *ndev = platform_get_drvdata(pdev);
  1852. struct smc911x_local *lp = netdev_priv(ndev);
  1853. struct resource *res;
  1854. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1855. platform_set_drvdata(pdev, NULL);
  1856. unregister_netdev(ndev);
  1857. free_irq(ndev->irq, ndev);
  1858. #ifdef SMC_USE_DMA
  1859. {
  1860. if (lp->rxdma != -1) {
  1861. SMC_DMA_FREE(dev, lp->rxdma);
  1862. }
  1863. if (lp->txdma != -1) {
  1864. SMC_DMA_FREE(dev, lp->txdma);
  1865. }
  1866. }
  1867. #endif
  1868. iounmap(lp->base);
  1869. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1870. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1871. free_netdev(ndev);
  1872. return 0;
  1873. }
  1874. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1875. {
  1876. struct net_device *ndev = platform_get_drvdata(dev);
  1877. struct smc911x_local *lp = netdev_priv(ndev);
  1878. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1879. if (ndev) {
  1880. if (netif_running(ndev)) {
  1881. netif_device_detach(ndev);
  1882. smc911x_shutdown(ndev);
  1883. #if POWER_DOWN
  1884. /* Set D2 - Energy detect only setting */
  1885. SMC_SET_PMT_CTRL(lp, 2<<12);
  1886. #endif
  1887. }
  1888. }
  1889. return 0;
  1890. }
  1891. static int smc911x_drv_resume(struct platform_device *dev)
  1892. {
  1893. struct net_device *ndev = platform_get_drvdata(dev);
  1894. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1895. if (ndev) {
  1896. struct smc911x_local *lp = netdev_priv(ndev);
  1897. if (netif_running(ndev)) {
  1898. smc911x_reset(ndev);
  1899. if (lp->phy_type != 0)
  1900. smc911x_phy_configure(&lp->phy_configure);
  1901. smc911x_enable(ndev);
  1902. netif_device_attach(ndev);
  1903. }
  1904. }
  1905. return 0;
  1906. }
  1907. static struct platform_driver smc911x_driver = {
  1908. .probe = smc911x_drv_probe,
  1909. .remove = __devexit_p(smc911x_drv_remove),
  1910. .suspend = smc911x_drv_suspend,
  1911. .resume = smc911x_drv_resume,
  1912. .driver = {
  1913. .name = CARDNAME,
  1914. .owner = THIS_MODULE,
  1915. },
  1916. };
  1917. static int __init smc911x_init(void)
  1918. {
  1919. return platform_driver_register(&smc911x_driver);
  1920. }
  1921. static void __exit smc911x_cleanup(void)
  1922. {
  1923. platform_driver_unregister(&smc911x_driver);
  1924. }
  1925. module_init(smc911x_init);
  1926. module_exit(smc911x_cleanup);