qlge_mpi.c 30 KB

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  1. #include "qlge.h"
  2. int ql_unpause_mpi_risc(struct ql_adapter *qdev)
  3. {
  4. u32 tmp;
  5. /* Un-pause the RISC */
  6. tmp = ql_read32(qdev, CSR);
  7. if (!(tmp & CSR_RP))
  8. return -EIO;
  9. ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE);
  10. return 0;
  11. }
  12. int ql_pause_mpi_risc(struct ql_adapter *qdev)
  13. {
  14. u32 tmp;
  15. int count = UDELAY_COUNT;
  16. /* Pause the RISC */
  17. ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
  18. do {
  19. tmp = ql_read32(qdev, CSR);
  20. if (tmp & CSR_RP)
  21. break;
  22. mdelay(UDELAY_DELAY);
  23. count--;
  24. } while (count);
  25. return (count == 0) ? -ETIMEDOUT : 0;
  26. }
  27. int ql_hard_reset_mpi_risc(struct ql_adapter *qdev)
  28. {
  29. u32 tmp;
  30. int count = UDELAY_COUNT;
  31. /* Reset the RISC */
  32. ql_write32(qdev, CSR, CSR_CMD_SET_RST);
  33. do {
  34. tmp = ql_read32(qdev, CSR);
  35. if (tmp & CSR_RR) {
  36. ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
  37. break;
  38. }
  39. mdelay(UDELAY_DELAY);
  40. count--;
  41. } while (count);
  42. return (count == 0) ? -ETIMEDOUT : 0;
  43. }
  44. int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data)
  45. {
  46. int status;
  47. /* wait for reg to come ready */
  48. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  49. if (status)
  50. goto exit;
  51. /* set up for reg read */
  52. ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
  53. /* wait for reg to come ready */
  54. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  55. if (status)
  56. goto exit;
  57. /* get the data */
  58. *data = ql_read32(qdev, PROC_DATA);
  59. exit:
  60. return status;
  61. }
  62. int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data)
  63. {
  64. int status = 0;
  65. /* wait for reg to come ready */
  66. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  67. if (status)
  68. goto exit;
  69. /* write the data to the data reg */
  70. ql_write32(qdev, PROC_DATA, data);
  71. /* trigger the write */
  72. ql_write32(qdev, PROC_ADDR, reg);
  73. /* wait for reg to come ready */
  74. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  75. if (status)
  76. goto exit;
  77. exit:
  78. return status;
  79. }
  80. int ql_soft_reset_mpi_risc(struct ql_adapter *qdev)
  81. {
  82. int status;
  83. status = ql_write_mpi_reg(qdev, 0x00001010, 1);
  84. return status;
  85. }
  86. /* Determine if we are in charge of the firwmare. If
  87. * we are the lower of the 2 NIC pcie functions, or if
  88. * we are the higher function and the lower function
  89. * is not enabled.
  90. */
  91. int ql_own_firmware(struct ql_adapter *qdev)
  92. {
  93. u32 temp;
  94. /* If we are the lower of the 2 NIC functions
  95. * on the chip the we are responsible for
  96. * core dump and firmware reset after an error.
  97. */
  98. if (qdev->func < qdev->alt_func)
  99. return 1;
  100. /* If we are the higher of the 2 NIC functions
  101. * on the chip and the lower function is not
  102. * enabled, then we are responsible for
  103. * core dump and firmware reset after an error.
  104. */
  105. temp = ql_read32(qdev, STS);
  106. if (!(temp & (1 << (8 + qdev->alt_func))))
  107. return 1;
  108. return 0;
  109. }
  110. static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
  111. {
  112. int i, status;
  113. status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
  114. if (status)
  115. return -EBUSY;
  116. for (i = 0; i < mbcp->out_count; i++) {
  117. status =
  118. ql_read_mpi_reg(qdev, qdev->mailbox_out + i,
  119. &mbcp->mbox_out[i]);
  120. if (status) {
  121. netif_err(qdev, drv, qdev->ndev, "Failed mailbox read.\n");
  122. break;
  123. }
  124. }
  125. ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
  126. return status;
  127. }
  128. /* Wait for a single mailbox command to complete.
  129. * Returns zero on success.
  130. */
  131. static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
  132. {
  133. int count = 100;
  134. u32 value;
  135. do {
  136. value = ql_read32(qdev, STS);
  137. if (value & STS_PI)
  138. return 0;
  139. mdelay(UDELAY_DELAY); /* 100ms */
  140. } while (--count);
  141. return -ETIMEDOUT;
  142. }
  143. /* Execute a single mailbox command.
  144. * Caller must hold PROC_ADDR semaphore.
  145. */
  146. static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp)
  147. {
  148. int i, status;
  149. /*
  150. * Make sure there's nothing pending.
  151. * This shouldn't happen.
  152. */
  153. if (ql_read32(qdev, CSR) & CSR_HRI)
  154. return -EIO;
  155. status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
  156. if (status)
  157. return status;
  158. /*
  159. * Fill the outbound mailboxes.
  160. */
  161. for (i = 0; i < mbcp->in_count; i++) {
  162. status = ql_write_mpi_reg(qdev, qdev->mailbox_in + i,
  163. mbcp->mbox_in[i]);
  164. if (status)
  165. goto end;
  166. }
  167. /*
  168. * Wake up the MPI firmware.
  169. */
  170. ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
  171. end:
  172. ql_sem_unlock(qdev, SEM_PROC_REG_MASK);
  173. return status;
  174. }
  175. /* We are being asked by firmware to accept
  176. * a change to the port. This is only
  177. * a change to max frame sizes (Tx/Rx), pause
  178. * parameters, or loopback mode. We wake up a worker
  179. * to handler processing this since a mailbox command
  180. * will need to be sent to ACK the request.
  181. */
  182. static int ql_idc_req_aen(struct ql_adapter *qdev)
  183. {
  184. int status;
  185. struct mbox_params *mbcp = &qdev->idc_mbc;
  186. netif_err(qdev, drv, qdev->ndev, "Enter!\n");
  187. /* Get the status data and start up a thread to
  188. * handle the request.
  189. */
  190. mbcp = &qdev->idc_mbc;
  191. mbcp->out_count = 4;
  192. status = ql_get_mb_sts(qdev, mbcp);
  193. if (status) {
  194. netif_err(qdev, drv, qdev->ndev,
  195. "Could not read MPI, resetting ASIC!\n");
  196. ql_queue_asic_error(qdev);
  197. } else {
  198. /* Begin polled mode early so
  199. * we don't get another interrupt
  200. * when we leave mpi_worker.
  201. */
  202. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  203. queue_delayed_work(qdev->workqueue, &qdev->mpi_idc_work, 0);
  204. }
  205. return status;
  206. }
  207. /* Process an inter-device event completion.
  208. * If good, signal the caller's completion.
  209. */
  210. static int ql_idc_cmplt_aen(struct ql_adapter *qdev)
  211. {
  212. int status;
  213. struct mbox_params *mbcp = &qdev->idc_mbc;
  214. mbcp->out_count = 4;
  215. status = ql_get_mb_sts(qdev, mbcp);
  216. if (status) {
  217. netif_err(qdev, drv, qdev->ndev,
  218. "Could not read MPI, resetting RISC!\n");
  219. ql_queue_fw_error(qdev);
  220. } else
  221. /* Wake up the sleeping mpi_idc_work thread that is
  222. * waiting for this event.
  223. */
  224. complete(&qdev->ide_completion);
  225. return status;
  226. }
  227. static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp)
  228. {
  229. int status;
  230. mbcp->out_count = 2;
  231. status = ql_get_mb_sts(qdev, mbcp);
  232. if (status) {
  233. netif_err(qdev, drv, qdev->ndev,
  234. "%s: Could not get mailbox status.\n", __func__);
  235. return;
  236. }
  237. qdev->link_status = mbcp->mbox_out[1];
  238. netif_err(qdev, drv, qdev->ndev, "Link Up.\n");
  239. /* If we're coming back from an IDC event
  240. * then set up the CAM and frame routing.
  241. */
  242. if (test_bit(QL_CAM_RT_SET, &qdev->flags)) {
  243. status = ql_cam_route_initialize(qdev);
  244. if (status) {
  245. netif_err(qdev, ifup, qdev->ndev,
  246. "Failed to init CAM/Routing tables.\n");
  247. return;
  248. } else
  249. clear_bit(QL_CAM_RT_SET, &qdev->flags);
  250. }
  251. /* Queue up a worker to check the frame
  252. * size information, and fix it if it's not
  253. * to our liking.
  254. */
  255. if (!test_bit(QL_PORT_CFG, &qdev->flags)) {
  256. netif_err(qdev, drv, qdev->ndev, "Queue Port Config Worker!\n");
  257. set_bit(QL_PORT_CFG, &qdev->flags);
  258. /* Begin polled mode early so
  259. * we don't get another interrupt
  260. * when we leave mpi_worker dpc.
  261. */
  262. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  263. queue_delayed_work(qdev->workqueue,
  264. &qdev->mpi_port_cfg_work, 0);
  265. }
  266. ql_link_on(qdev);
  267. }
  268. static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp)
  269. {
  270. int status;
  271. mbcp->out_count = 3;
  272. status = ql_get_mb_sts(qdev, mbcp);
  273. if (status)
  274. netif_err(qdev, drv, qdev->ndev, "Link down AEN broken!\n");
  275. ql_link_off(qdev);
  276. }
  277. static int ql_sfp_in(struct ql_adapter *qdev, struct mbox_params *mbcp)
  278. {
  279. int status;
  280. mbcp->out_count = 5;
  281. status = ql_get_mb_sts(qdev, mbcp);
  282. if (status)
  283. netif_err(qdev, drv, qdev->ndev, "SFP in AEN broken!\n");
  284. else
  285. netif_err(qdev, drv, qdev->ndev, "SFP insertion detected.\n");
  286. return status;
  287. }
  288. static int ql_sfp_out(struct ql_adapter *qdev, struct mbox_params *mbcp)
  289. {
  290. int status;
  291. mbcp->out_count = 1;
  292. status = ql_get_mb_sts(qdev, mbcp);
  293. if (status)
  294. netif_err(qdev, drv, qdev->ndev, "SFP out AEN broken!\n");
  295. else
  296. netif_err(qdev, drv, qdev->ndev, "SFP removal detected.\n");
  297. return status;
  298. }
  299. static int ql_aen_lost(struct ql_adapter *qdev, struct mbox_params *mbcp)
  300. {
  301. int status;
  302. mbcp->out_count = 6;
  303. status = ql_get_mb_sts(qdev, mbcp);
  304. if (status)
  305. netif_err(qdev, drv, qdev->ndev, "Lost AEN broken!\n");
  306. else {
  307. int i;
  308. netif_err(qdev, drv, qdev->ndev, "Lost AEN detected.\n");
  309. for (i = 0; i < mbcp->out_count; i++)
  310. netif_err(qdev, drv, qdev->ndev, "mbox_out[%d] = 0x%.08x.\n",
  311. i, mbcp->mbox_out[i]);
  312. }
  313. return status;
  314. }
  315. static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp)
  316. {
  317. int status;
  318. mbcp->out_count = 2;
  319. status = ql_get_mb_sts(qdev, mbcp);
  320. if (status) {
  321. netif_err(qdev, drv, qdev->ndev, "Firmware did not initialize!\n");
  322. } else {
  323. netif_err(qdev, drv, qdev->ndev, "Firmware Revision = 0x%.08x.\n",
  324. mbcp->mbox_out[1]);
  325. qdev->fw_rev_id = mbcp->mbox_out[1];
  326. status = ql_cam_route_initialize(qdev);
  327. if (status)
  328. netif_err(qdev, ifup, qdev->ndev,
  329. "Failed to init CAM/Routing tables.\n");
  330. }
  331. }
  332. /* Process an async event and clear it unless it's an
  333. * error condition.
  334. * This can get called iteratively from the mpi_work thread
  335. * when events arrive via an interrupt.
  336. * It also gets called when a mailbox command is polling for
  337. * it's completion. */
  338. static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp)
  339. {
  340. int status;
  341. int orig_count = mbcp->out_count;
  342. /* Just get mailbox zero for now. */
  343. mbcp->out_count = 1;
  344. status = ql_get_mb_sts(qdev, mbcp);
  345. if (status) {
  346. netif_err(qdev, drv, qdev->ndev,
  347. "Could not read MPI, resetting ASIC!\n");
  348. ql_queue_asic_error(qdev);
  349. goto end;
  350. }
  351. switch (mbcp->mbox_out[0]) {
  352. /* This case is only active when we arrive here
  353. * as a result of issuing a mailbox command to
  354. * the firmware.
  355. */
  356. case MB_CMD_STS_INTRMDT:
  357. case MB_CMD_STS_GOOD:
  358. case MB_CMD_STS_INVLD_CMD:
  359. case MB_CMD_STS_XFC_ERR:
  360. case MB_CMD_STS_CSUM_ERR:
  361. case MB_CMD_STS_ERR:
  362. case MB_CMD_STS_PARAM_ERR:
  363. /* We can only get mailbox status if we're polling from an
  364. * unfinished command. Get the rest of the status data and
  365. * return back to the caller.
  366. * We only end up here when we're polling for a mailbox
  367. * command completion.
  368. */
  369. mbcp->out_count = orig_count;
  370. status = ql_get_mb_sts(qdev, mbcp);
  371. return status;
  372. /* We are being asked by firmware to accept
  373. * a change to the port. This is only
  374. * a change to max frame sizes (Tx/Rx), pause
  375. * parameters, or loopback mode.
  376. */
  377. case AEN_IDC_REQ:
  378. status = ql_idc_req_aen(qdev);
  379. break;
  380. /* Process and inbound IDC event.
  381. * This will happen when we're trying to
  382. * change tx/rx max frame size, change pause
  383. * parameters or loopback mode.
  384. */
  385. case AEN_IDC_CMPLT:
  386. case AEN_IDC_EXT:
  387. status = ql_idc_cmplt_aen(qdev);
  388. break;
  389. case AEN_LINK_UP:
  390. ql_link_up(qdev, mbcp);
  391. break;
  392. case AEN_LINK_DOWN:
  393. ql_link_down(qdev, mbcp);
  394. break;
  395. case AEN_FW_INIT_DONE:
  396. /* If we're in process on executing the firmware,
  397. * then convert the status to normal mailbox status.
  398. */
  399. if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
  400. mbcp->out_count = orig_count;
  401. status = ql_get_mb_sts(qdev, mbcp);
  402. mbcp->mbox_out[0] = MB_CMD_STS_GOOD;
  403. return status;
  404. }
  405. ql_init_fw_done(qdev, mbcp);
  406. break;
  407. case AEN_AEN_SFP_IN:
  408. ql_sfp_in(qdev, mbcp);
  409. break;
  410. case AEN_AEN_SFP_OUT:
  411. ql_sfp_out(qdev, mbcp);
  412. break;
  413. /* This event can arrive at boot time or after an
  414. * MPI reset if the firmware failed to initialize.
  415. */
  416. case AEN_FW_INIT_FAIL:
  417. /* If we're in process on executing the firmware,
  418. * then convert the status to normal mailbox status.
  419. */
  420. if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
  421. mbcp->out_count = orig_count;
  422. status = ql_get_mb_sts(qdev, mbcp);
  423. mbcp->mbox_out[0] = MB_CMD_STS_ERR;
  424. return status;
  425. }
  426. netif_err(qdev, drv, qdev->ndev,
  427. "Firmware initialization failed.\n");
  428. status = -EIO;
  429. ql_queue_fw_error(qdev);
  430. break;
  431. case AEN_SYS_ERR:
  432. netif_err(qdev, drv, qdev->ndev, "System Error.\n");
  433. ql_queue_fw_error(qdev);
  434. status = -EIO;
  435. break;
  436. case AEN_AEN_LOST:
  437. ql_aen_lost(qdev, mbcp);
  438. break;
  439. case AEN_DCBX_CHG:
  440. /* Need to support AEN 8110 */
  441. break;
  442. default:
  443. netif_err(qdev, drv, qdev->ndev,
  444. "Unsupported AE %.08x.\n", mbcp->mbox_out[0]);
  445. /* Clear the MPI firmware status. */
  446. }
  447. end:
  448. ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
  449. /* Restore the original mailbox count to
  450. * what the caller asked for. This can get
  451. * changed when a mailbox command is waiting
  452. * for a response and an AEN arrives and
  453. * is handled.
  454. * */
  455. mbcp->out_count = orig_count;
  456. return status;
  457. }
  458. /* Execute a single mailbox command.
  459. * mbcp is a pointer to an array of u32. Each
  460. * element in the array contains the value for it's
  461. * respective mailbox register.
  462. */
  463. static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
  464. {
  465. int status;
  466. unsigned long count;
  467. /* Begin polled mode for MPI */
  468. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  469. /* Load the mailbox registers and wake up MPI RISC. */
  470. status = ql_exec_mb_cmd(qdev, mbcp);
  471. if (status)
  472. goto end;
  473. /* If we're generating a system error, then there's nothing
  474. * to wait for.
  475. */
  476. if (mbcp->mbox_in[0] == MB_CMD_MAKE_SYS_ERR)
  477. goto end;
  478. /* Wait for the command to complete. We loop
  479. * here because some AEN might arrive while
  480. * we're waiting for the mailbox command to
  481. * complete. If more than 5 seconds expire we can
  482. * assume something is wrong. */
  483. count = jiffies + HZ * MAILBOX_TIMEOUT;
  484. do {
  485. /* Wait for the interrupt to come in. */
  486. status = ql_wait_mbx_cmd_cmplt(qdev);
  487. if (status)
  488. continue;
  489. /* Process the event. If it's an AEN, it
  490. * will be handled in-line or a worker
  491. * will be spawned. If it's our completion
  492. * we will catch it below.
  493. */
  494. status = ql_mpi_handler(qdev, mbcp);
  495. if (status)
  496. goto end;
  497. /* It's either the completion for our mailbox
  498. * command complete or an AEN. If it's our
  499. * completion then get out.
  500. */
  501. if (((mbcp->mbox_out[0] & 0x0000f000) ==
  502. MB_CMD_STS_GOOD) ||
  503. ((mbcp->mbox_out[0] & 0x0000f000) ==
  504. MB_CMD_STS_INTRMDT))
  505. goto done;
  506. } while (time_before(jiffies, count));
  507. netif_err(qdev, drv, qdev->ndev,
  508. "Timed out waiting for mailbox complete.\n");
  509. status = -ETIMEDOUT;
  510. goto end;
  511. done:
  512. /* Now we can clear the interrupt condition
  513. * and look at our status.
  514. */
  515. ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
  516. if (((mbcp->mbox_out[0] & 0x0000f000) !=
  517. MB_CMD_STS_GOOD) &&
  518. ((mbcp->mbox_out[0] & 0x0000f000) !=
  519. MB_CMD_STS_INTRMDT)) {
  520. status = -EIO;
  521. }
  522. end:
  523. /* End polled mode for MPI */
  524. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
  525. return status;
  526. }
  527. /* Get MPI firmware version. This will be used for
  528. * driver banner and for ethtool info.
  529. * Returns zero on success.
  530. */
  531. int ql_mb_about_fw(struct ql_adapter *qdev)
  532. {
  533. struct mbox_params mbc;
  534. struct mbox_params *mbcp = &mbc;
  535. int status = 0;
  536. memset(mbcp, 0, sizeof(struct mbox_params));
  537. mbcp->in_count = 1;
  538. mbcp->out_count = 3;
  539. mbcp->mbox_in[0] = MB_CMD_ABOUT_FW;
  540. status = ql_mailbox_command(qdev, mbcp);
  541. if (status)
  542. return status;
  543. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  544. netif_err(qdev, drv, qdev->ndev,
  545. "Failed about firmware command\n");
  546. status = -EIO;
  547. }
  548. /* Store the firmware version */
  549. qdev->fw_rev_id = mbcp->mbox_out[1];
  550. return status;
  551. }
  552. /* Get functional state for MPI firmware.
  553. * Returns zero on success.
  554. */
  555. int ql_mb_get_fw_state(struct ql_adapter *qdev)
  556. {
  557. struct mbox_params mbc;
  558. struct mbox_params *mbcp = &mbc;
  559. int status = 0;
  560. memset(mbcp, 0, sizeof(struct mbox_params));
  561. mbcp->in_count = 1;
  562. mbcp->out_count = 2;
  563. mbcp->mbox_in[0] = MB_CMD_GET_FW_STATE;
  564. status = ql_mailbox_command(qdev, mbcp);
  565. if (status)
  566. return status;
  567. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  568. netif_err(qdev, drv, qdev->ndev,
  569. "Failed Get Firmware State.\n");
  570. status = -EIO;
  571. }
  572. /* If bit zero is set in mbx 1 then the firmware is
  573. * running, but not initialized. This should never
  574. * happen.
  575. */
  576. if (mbcp->mbox_out[1] & 1) {
  577. netif_err(qdev, drv, qdev->ndev,
  578. "Firmware waiting for initialization.\n");
  579. status = -EIO;
  580. }
  581. return status;
  582. }
  583. /* Send and ACK mailbox command to the firmware to
  584. * let it continue with the change.
  585. */
  586. int ql_mb_idc_ack(struct ql_adapter *qdev)
  587. {
  588. struct mbox_params mbc;
  589. struct mbox_params *mbcp = &mbc;
  590. int status = 0;
  591. memset(mbcp, 0, sizeof(struct mbox_params));
  592. mbcp->in_count = 5;
  593. mbcp->out_count = 1;
  594. mbcp->mbox_in[0] = MB_CMD_IDC_ACK;
  595. mbcp->mbox_in[1] = qdev->idc_mbc.mbox_out[1];
  596. mbcp->mbox_in[2] = qdev->idc_mbc.mbox_out[2];
  597. mbcp->mbox_in[3] = qdev->idc_mbc.mbox_out[3];
  598. mbcp->mbox_in[4] = qdev->idc_mbc.mbox_out[4];
  599. status = ql_mailbox_command(qdev, mbcp);
  600. if (status)
  601. return status;
  602. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  603. netif_err(qdev, drv, qdev->ndev, "Failed IDC ACK send.\n");
  604. status = -EIO;
  605. }
  606. return status;
  607. }
  608. /* Get link settings and maximum frame size settings
  609. * for the current port.
  610. * Most likely will block.
  611. */
  612. int ql_mb_set_port_cfg(struct ql_adapter *qdev)
  613. {
  614. struct mbox_params mbc;
  615. struct mbox_params *mbcp = &mbc;
  616. int status = 0;
  617. memset(mbcp, 0, sizeof(struct mbox_params));
  618. mbcp->in_count = 3;
  619. mbcp->out_count = 1;
  620. mbcp->mbox_in[0] = MB_CMD_SET_PORT_CFG;
  621. mbcp->mbox_in[1] = qdev->link_config;
  622. mbcp->mbox_in[2] = qdev->max_frame_size;
  623. status = ql_mailbox_command(qdev, mbcp);
  624. if (status)
  625. return status;
  626. if (mbcp->mbox_out[0] == MB_CMD_STS_INTRMDT) {
  627. netif_err(qdev, drv, qdev->ndev,
  628. "Port Config sent, wait for IDC.\n");
  629. } else if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  630. netif_err(qdev, drv, qdev->ndev,
  631. "Failed Set Port Configuration.\n");
  632. status = -EIO;
  633. }
  634. return status;
  635. }
  636. int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr,
  637. u32 size)
  638. {
  639. int status = 0;
  640. struct mbox_params mbc;
  641. struct mbox_params *mbcp = &mbc;
  642. memset(mbcp, 0, sizeof(struct mbox_params));
  643. mbcp->in_count = 9;
  644. mbcp->out_count = 1;
  645. mbcp->mbox_in[0] = MB_CMD_DUMP_RISC_RAM;
  646. mbcp->mbox_in[1] = LSW(addr);
  647. mbcp->mbox_in[2] = MSW(req_dma);
  648. mbcp->mbox_in[3] = LSW(req_dma);
  649. mbcp->mbox_in[4] = MSW(size);
  650. mbcp->mbox_in[5] = LSW(size);
  651. mbcp->mbox_in[6] = MSW(MSD(req_dma));
  652. mbcp->mbox_in[7] = LSW(MSD(req_dma));
  653. mbcp->mbox_in[8] = MSW(addr);
  654. status = ql_mailbox_command(qdev, mbcp);
  655. if (status)
  656. return status;
  657. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  658. netif_err(qdev, drv, qdev->ndev, "Failed to dump risc RAM.\n");
  659. status = -EIO;
  660. }
  661. return status;
  662. }
  663. /* Issue a mailbox command to dump RISC RAM. */
  664. int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf,
  665. u32 ram_addr, int word_count)
  666. {
  667. int status;
  668. char *my_buf;
  669. dma_addr_t buf_dma;
  670. my_buf = pci_alloc_consistent(qdev->pdev, word_count * sizeof(u32),
  671. &buf_dma);
  672. if (!my_buf)
  673. return -EIO;
  674. status = ql_mb_dump_ram(qdev, buf_dma, ram_addr, word_count);
  675. if (!status)
  676. memcpy(buf, my_buf, word_count * sizeof(u32));
  677. pci_free_consistent(qdev->pdev, word_count * sizeof(u32), my_buf,
  678. buf_dma);
  679. return status;
  680. }
  681. /* Get link settings and maximum frame size settings
  682. * for the current port.
  683. * Most likely will block.
  684. */
  685. int ql_mb_get_port_cfg(struct ql_adapter *qdev)
  686. {
  687. struct mbox_params mbc;
  688. struct mbox_params *mbcp = &mbc;
  689. int status = 0;
  690. memset(mbcp, 0, sizeof(struct mbox_params));
  691. mbcp->in_count = 1;
  692. mbcp->out_count = 3;
  693. mbcp->mbox_in[0] = MB_CMD_GET_PORT_CFG;
  694. status = ql_mailbox_command(qdev, mbcp);
  695. if (status)
  696. return status;
  697. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  698. netif_err(qdev, drv, qdev->ndev,
  699. "Failed Get Port Configuration.\n");
  700. status = -EIO;
  701. } else {
  702. netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
  703. "Passed Get Port Configuration.\n");
  704. qdev->link_config = mbcp->mbox_out[1];
  705. qdev->max_frame_size = mbcp->mbox_out[2];
  706. }
  707. return status;
  708. }
  709. int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol)
  710. {
  711. struct mbox_params mbc;
  712. struct mbox_params *mbcp = &mbc;
  713. int status;
  714. memset(mbcp, 0, sizeof(struct mbox_params));
  715. mbcp->in_count = 2;
  716. mbcp->out_count = 1;
  717. mbcp->mbox_in[0] = MB_CMD_SET_WOL_MODE;
  718. mbcp->mbox_in[1] = wol;
  719. status = ql_mailbox_command(qdev, mbcp);
  720. if (status)
  721. return status;
  722. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  723. netif_err(qdev, drv, qdev->ndev, "Failed to set WOL mode.\n");
  724. status = -EIO;
  725. }
  726. return status;
  727. }
  728. int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol)
  729. {
  730. struct mbox_params mbc;
  731. struct mbox_params *mbcp = &mbc;
  732. int status;
  733. u8 *addr = qdev->ndev->dev_addr;
  734. memset(mbcp, 0, sizeof(struct mbox_params));
  735. mbcp->in_count = 8;
  736. mbcp->out_count = 1;
  737. mbcp->mbox_in[0] = MB_CMD_SET_WOL_MAGIC;
  738. if (enable_wol) {
  739. mbcp->mbox_in[1] = (u32)addr[0];
  740. mbcp->mbox_in[2] = (u32)addr[1];
  741. mbcp->mbox_in[3] = (u32)addr[2];
  742. mbcp->mbox_in[4] = (u32)addr[3];
  743. mbcp->mbox_in[5] = (u32)addr[4];
  744. mbcp->mbox_in[6] = (u32)addr[5];
  745. mbcp->mbox_in[7] = 0;
  746. } else {
  747. mbcp->mbox_in[1] = 0;
  748. mbcp->mbox_in[2] = 1;
  749. mbcp->mbox_in[3] = 1;
  750. mbcp->mbox_in[4] = 1;
  751. mbcp->mbox_in[5] = 1;
  752. mbcp->mbox_in[6] = 1;
  753. mbcp->mbox_in[7] = 0;
  754. }
  755. status = ql_mailbox_command(qdev, mbcp);
  756. if (status)
  757. return status;
  758. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  759. netif_err(qdev, drv, qdev->ndev, "Failed to set WOL mode.\n");
  760. status = -EIO;
  761. }
  762. return status;
  763. }
  764. /* IDC - Inter Device Communication...
  765. * Some firmware commands require consent of adjacent FCOE
  766. * function. This function waits for the OK, or a
  767. * counter-request for a little more time.i
  768. * The firmware will complete the request if the other
  769. * function doesn't respond.
  770. */
  771. static int ql_idc_wait(struct ql_adapter *qdev)
  772. {
  773. int status = -ETIMEDOUT;
  774. long wait_time = 1 * HZ;
  775. struct mbox_params *mbcp = &qdev->idc_mbc;
  776. do {
  777. /* Wait here for the command to complete
  778. * via the IDC process.
  779. */
  780. wait_time =
  781. wait_for_completion_timeout(&qdev->ide_completion,
  782. wait_time);
  783. if (!wait_time) {
  784. netif_err(qdev, drv, qdev->ndev, "IDC Timeout.\n");
  785. break;
  786. }
  787. /* Now examine the response from the IDC process.
  788. * We might have a good completion or a request for
  789. * more wait time.
  790. */
  791. if (mbcp->mbox_out[0] == AEN_IDC_EXT) {
  792. netif_err(qdev, drv, qdev->ndev,
  793. "IDC Time Extension from function.\n");
  794. wait_time += (mbcp->mbox_out[1] >> 8) & 0x0000000f;
  795. } else if (mbcp->mbox_out[0] == AEN_IDC_CMPLT) {
  796. netif_err(qdev, drv, qdev->ndev, "IDC Success.\n");
  797. status = 0;
  798. break;
  799. } else {
  800. netif_err(qdev, drv, qdev->ndev,
  801. "IDC: Invalid State 0x%.04x.\n",
  802. mbcp->mbox_out[0]);
  803. status = -EIO;
  804. break;
  805. }
  806. } while (wait_time);
  807. return status;
  808. }
  809. int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config)
  810. {
  811. struct mbox_params mbc;
  812. struct mbox_params *mbcp = &mbc;
  813. int status;
  814. memset(mbcp, 0, sizeof(struct mbox_params));
  815. mbcp->in_count = 2;
  816. mbcp->out_count = 1;
  817. mbcp->mbox_in[0] = MB_CMD_SET_LED_CFG;
  818. mbcp->mbox_in[1] = led_config;
  819. status = ql_mailbox_command(qdev, mbcp);
  820. if (status)
  821. return status;
  822. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  823. netif_err(qdev, drv, qdev->ndev,
  824. "Failed to set LED Configuration.\n");
  825. status = -EIO;
  826. }
  827. return status;
  828. }
  829. int ql_mb_get_led_cfg(struct ql_adapter *qdev)
  830. {
  831. struct mbox_params mbc;
  832. struct mbox_params *mbcp = &mbc;
  833. int status;
  834. memset(mbcp, 0, sizeof(struct mbox_params));
  835. mbcp->in_count = 1;
  836. mbcp->out_count = 2;
  837. mbcp->mbox_in[0] = MB_CMD_GET_LED_CFG;
  838. status = ql_mailbox_command(qdev, mbcp);
  839. if (status)
  840. return status;
  841. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  842. netif_err(qdev, drv, qdev->ndev,
  843. "Failed to get LED Configuration.\n");
  844. status = -EIO;
  845. } else
  846. qdev->led_config = mbcp->mbox_out[1];
  847. return status;
  848. }
  849. int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control)
  850. {
  851. struct mbox_params mbc;
  852. struct mbox_params *mbcp = &mbc;
  853. int status;
  854. memset(mbcp, 0, sizeof(struct mbox_params));
  855. mbcp->in_count = 1;
  856. mbcp->out_count = 2;
  857. mbcp->mbox_in[0] = MB_CMD_SET_MGMNT_TFK_CTL;
  858. mbcp->mbox_in[1] = control;
  859. status = ql_mailbox_command(qdev, mbcp);
  860. if (status)
  861. return status;
  862. if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD)
  863. return status;
  864. if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
  865. netif_err(qdev, drv, qdev->ndev,
  866. "Command not supported by firmware.\n");
  867. status = -EINVAL;
  868. } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
  869. /* This indicates that the firmware is
  870. * already in the state we are trying to
  871. * change it to.
  872. */
  873. netif_err(qdev, drv, qdev->ndev,
  874. "Command parameters make no change.\n");
  875. }
  876. return status;
  877. }
  878. /* Returns a negative error code or the mailbox command status. */
  879. static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control)
  880. {
  881. struct mbox_params mbc;
  882. struct mbox_params *mbcp = &mbc;
  883. int status;
  884. memset(mbcp, 0, sizeof(struct mbox_params));
  885. *control = 0;
  886. mbcp->in_count = 1;
  887. mbcp->out_count = 1;
  888. mbcp->mbox_in[0] = MB_CMD_GET_MGMNT_TFK_CTL;
  889. status = ql_mailbox_command(qdev, mbcp);
  890. if (status)
  891. return status;
  892. if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD) {
  893. *control = mbcp->mbox_in[1];
  894. return status;
  895. }
  896. if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
  897. netif_err(qdev, drv, qdev->ndev,
  898. "Command not supported by firmware.\n");
  899. status = -EINVAL;
  900. } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
  901. netif_err(qdev, drv, qdev->ndev,
  902. "Failed to get MPI traffic control.\n");
  903. status = -EIO;
  904. }
  905. return status;
  906. }
  907. int ql_wait_fifo_empty(struct ql_adapter *qdev)
  908. {
  909. int count = 5;
  910. u32 mgmnt_fifo_empty;
  911. u32 nic_fifo_empty;
  912. do {
  913. nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE;
  914. ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
  915. mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
  916. if (nic_fifo_empty && mgmnt_fifo_empty)
  917. return 0;
  918. msleep(100);
  919. } while (count-- > 0);
  920. return -ETIMEDOUT;
  921. }
  922. /* API called in work thread context to set new TX/RX
  923. * maximum frame size values to match MTU.
  924. */
  925. static int ql_set_port_cfg(struct ql_adapter *qdev)
  926. {
  927. int status;
  928. rtnl_lock();
  929. status = ql_mb_set_port_cfg(qdev);
  930. rtnl_unlock();
  931. if (status)
  932. return status;
  933. status = ql_idc_wait(qdev);
  934. return status;
  935. }
  936. /* The following routines are worker threads that process
  937. * events that may sleep waiting for completion.
  938. */
  939. /* This thread gets the maximum TX and RX frame size values
  940. * from the firmware and, if necessary, changes them to match
  941. * the MTU setting.
  942. */
  943. void ql_mpi_port_cfg_work(struct work_struct *work)
  944. {
  945. struct ql_adapter *qdev =
  946. container_of(work, struct ql_adapter, mpi_port_cfg_work.work);
  947. int status;
  948. rtnl_lock();
  949. status = ql_mb_get_port_cfg(qdev);
  950. rtnl_unlock();
  951. if (status) {
  952. netif_err(qdev, drv, qdev->ndev,
  953. "Bug: Failed to get port config data.\n");
  954. goto err;
  955. }
  956. if (qdev->link_config & CFG_JUMBO_FRAME_SIZE &&
  957. qdev->max_frame_size ==
  958. CFG_DEFAULT_MAX_FRAME_SIZE)
  959. goto end;
  960. qdev->link_config |= CFG_JUMBO_FRAME_SIZE;
  961. qdev->max_frame_size = CFG_DEFAULT_MAX_FRAME_SIZE;
  962. status = ql_set_port_cfg(qdev);
  963. if (status) {
  964. netif_err(qdev, drv, qdev->ndev,
  965. "Bug: Failed to set port config data.\n");
  966. goto err;
  967. }
  968. end:
  969. clear_bit(QL_PORT_CFG, &qdev->flags);
  970. return;
  971. err:
  972. ql_queue_fw_error(qdev);
  973. goto end;
  974. }
  975. /* Process an inter-device request. This is issues by
  976. * the firmware in response to another function requesting
  977. * a change to the port. We set a flag to indicate a change
  978. * has been made and then send a mailbox command ACKing
  979. * the change request.
  980. */
  981. void ql_mpi_idc_work(struct work_struct *work)
  982. {
  983. struct ql_adapter *qdev =
  984. container_of(work, struct ql_adapter, mpi_idc_work.work);
  985. int status;
  986. struct mbox_params *mbcp = &qdev->idc_mbc;
  987. u32 aen;
  988. int timeout;
  989. rtnl_lock();
  990. aen = mbcp->mbox_out[1] >> 16;
  991. timeout = (mbcp->mbox_out[1] >> 8) & 0xf;
  992. switch (aen) {
  993. default:
  994. netif_err(qdev, drv, qdev->ndev,
  995. "Bug: Unhandled IDC action.\n");
  996. break;
  997. case MB_CMD_PORT_RESET:
  998. case MB_CMD_STOP_FW:
  999. ql_link_off(qdev);
  1000. case MB_CMD_SET_PORT_CFG:
  1001. /* Signal the resulting link up AEN
  1002. * that the frame routing and mac addr
  1003. * needs to be set.
  1004. * */
  1005. set_bit(QL_CAM_RT_SET, &qdev->flags);
  1006. /* Do ACK if required */
  1007. if (timeout) {
  1008. status = ql_mb_idc_ack(qdev);
  1009. if (status)
  1010. netif_err(qdev, drv, qdev->ndev,
  1011. "Bug: No pending IDC!\n");
  1012. } else {
  1013. netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
  1014. "IDC ACK not required\n");
  1015. status = 0; /* success */
  1016. }
  1017. break;
  1018. /* These sub-commands issued by another (FCoE)
  1019. * function are requesting to do an operation
  1020. * on the shared resource (MPI environment).
  1021. * We currently don't issue these so we just
  1022. * ACK the request.
  1023. */
  1024. case MB_CMD_IOP_RESTART_MPI:
  1025. case MB_CMD_IOP_PREP_LINK_DOWN:
  1026. /* Drop the link, reload the routing
  1027. * table when link comes up.
  1028. */
  1029. ql_link_off(qdev);
  1030. set_bit(QL_CAM_RT_SET, &qdev->flags);
  1031. /* Fall through. */
  1032. case MB_CMD_IOP_DVR_START:
  1033. case MB_CMD_IOP_FLASH_ACC:
  1034. case MB_CMD_IOP_CORE_DUMP_MPI:
  1035. case MB_CMD_IOP_PREP_UPDATE_MPI:
  1036. case MB_CMD_IOP_COMP_UPDATE_MPI:
  1037. case MB_CMD_IOP_NONE: /* an IDC without params */
  1038. /* Do ACK if required */
  1039. if (timeout) {
  1040. status = ql_mb_idc_ack(qdev);
  1041. if (status)
  1042. netif_err(qdev, drv, qdev->ndev,
  1043. "Bug: No pending IDC!\n");
  1044. } else {
  1045. netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
  1046. "IDC ACK not required\n");
  1047. status = 0; /* success */
  1048. }
  1049. break;
  1050. }
  1051. rtnl_unlock();
  1052. }
  1053. void ql_mpi_work(struct work_struct *work)
  1054. {
  1055. struct ql_adapter *qdev =
  1056. container_of(work, struct ql_adapter, mpi_work.work);
  1057. struct mbox_params mbc;
  1058. struct mbox_params *mbcp = &mbc;
  1059. int err = 0;
  1060. rtnl_lock();
  1061. /* Begin polled mode for MPI */
  1062. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  1063. while (ql_read32(qdev, STS) & STS_PI) {
  1064. memset(mbcp, 0, sizeof(struct mbox_params));
  1065. mbcp->out_count = 1;
  1066. /* Don't continue if an async event
  1067. * did not complete properly.
  1068. */
  1069. err = ql_mpi_handler(qdev, mbcp);
  1070. if (err)
  1071. break;
  1072. }
  1073. /* End polled mode for MPI */
  1074. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
  1075. rtnl_unlock();
  1076. ql_enable_completion_interrupt(qdev, 0);
  1077. }
  1078. void ql_mpi_reset_work(struct work_struct *work)
  1079. {
  1080. struct ql_adapter *qdev =
  1081. container_of(work, struct ql_adapter, mpi_reset_work.work);
  1082. cancel_delayed_work_sync(&qdev->mpi_work);
  1083. cancel_delayed_work_sync(&qdev->mpi_port_cfg_work);
  1084. cancel_delayed_work_sync(&qdev->mpi_idc_work);
  1085. /* If we're not the dominant NIC function,
  1086. * then there is nothing to do.
  1087. */
  1088. if (!ql_own_firmware(qdev)) {
  1089. netif_err(qdev, drv, qdev->ndev, "Don't own firmware!\n");
  1090. return;
  1091. }
  1092. if (!ql_core_dump(qdev, qdev->mpi_coredump)) {
  1093. netif_err(qdev, drv, qdev->ndev, "Core is dumped!\n");
  1094. qdev->core_is_dumped = 1;
  1095. queue_delayed_work(qdev->workqueue,
  1096. &qdev->mpi_core_to_log, 5 * HZ);
  1097. }
  1098. ql_soft_reset_mpi_risc(qdev);
  1099. }