ks8851.c 43 KB

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  1. /* drivers/net/ks8851.c
  2. *
  3. * Copyright 2009 Simtec Electronics
  4. * http://www.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #define DEBUG
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/netdevice.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/ethtool.h>
  18. #include <linux/cache.h>
  19. #include <linux/crc32.h>
  20. #include <linux/mii.h>
  21. #include <linux/spi/spi.h>
  22. #include "ks8851.h"
  23. /**
  24. * struct ks8851_rxctrl - KS8851 driver rx control
  25. * @mchash: Multicast hash-table data.
  26. * @rxcr1: KS_RXCR1 register setting
  27. * @rxcr2: KS_RXCR2 register setting
  28. *
  29. * Representation of the settings needs to control the receive filtering
  30. * such as the multicast hash-filter and the receive register settings. This
  31. * is used to make the job of working out if the receive settings change and
  32. * then issuing the new settings to the worker that will send the necessary
  33. * commands.
  34. */
  35. struct ks8851_rxctrl {
  36. u16 mchash[4];
  37. u16 rxcr1;
  38. u16 rxcr2;
  39. };
  40. /**
  41. * union ks8851_tx_hdr - tx header data
  42. * @txb: The header as bytes
  43. * @txw: The header as 16bit, little-endian words
  44. *
  45. * A dual representation of the tx header data to allow
  46. * access to individual bytes, and to allow 16bit accesses
  47. * with 16bit alignment.
  48. */
  49. union ks8851_tx_hdr {
  50. u8 txb[6];
  51. __le16 txw[3];
  52. };
  53. /**
  54. * struct ks8851_net - KS8851 driver private data
  55. * @netdev: The network device we're bound to
  56. * @spidev: The spi device we're bound to.
  57. * @lock: Lock to ensure that the device is not accessed when busy.
  58. * @statelock: Lock on this structure for tx list.
  59. * @mii: The MII state information for the mii calls.
  60. * @rxctrl: RX settings for @rxctrl_work.
  61. * @tx_work: Work queue for tx packets
  62. * @irq_work: Work queue for servicing interrupts
  63. * @rxctrl_work: Work queue for updating RX mode and multicast lists
  64. * @txq: Queue of packets for transmission.
  65. * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
  66. * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
  67. * @txh: Space for generating packet TX header in DMA-able data
  68. * @rxd: Space for receiving SPI data, in DMA-able space.
  69. * @txd: Space for transmitting SPI data, in DMA-able space.
  70. * @msg_enable: The message flags controlling driver output (see ethtool).
  71. * @fid: Incrementing frame id tag.
  72. * @rc_ier: Cached copy of KS_IER.
  73. * @rc_ccr: Cached copy of KS_CCR.
  74. * @rc_rxqcr: Cached copy of KS_RXQCR.
  75. * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
  76. *
  77. * The @lock ensures that the chip is protected when certain operations are
  78. * in progress. When the read or write packet transfer is in progress, most
  79. * of the chip registers are not ccessible until the transfer is finished and
  80. * the DMA has been de-asserted.
  81. *
  82. * The @statelock is used to protect information in the structure which may
  83. * need to be accessed via several sources, such as the network driver layer
  84. * or one of the work queues.
  85. *
  86. * We align the buffers we may use for rx/tx to ensure that if the SPI driver
  87. * wants to DMA map them, it will not have any problems with data the driver
  88. * modifies.
  89. */
  90. struct ks8851_net {
  91. struct net_device *netdev;
  92. struct spi_device *spidev;
  93. struct mutex lock;
  94. spinlock_t statelock;
  95. union ks8851_tx_hdr txh ____cacheline_aligned;
  96. u8 rxd[8];
  97. u8 txd[8];
  98. u32 msg_enable ____cacheline_aligned;
  99. u16 tx_space;
  100. u8 fid;
  101. u16 rc_ier;
  102. u16 rc_rxqcr;
  103. u16 rc_ccr;
  104. u16 eeprom_size;
  105. struct mii_if_info mii;
  106. struct ks8851_rxctrl rxctrl;
  107. struct work_struct tx_work;
  108. struct work_struct irq_work;
  109. struct work_struct rxctrl_work;
  110. struct sk_buff_head txq;
  111. struct spi_message spi_msg1;
  112. struct spi_message spi_msg2;
  113. struct spi_transfer spi_xfer1;
  114. struct spi_transfer spi_xfer2[2];
  115. };
  116. static int msg_enable;
  117. /* shift for byte-enable data */
  118. #define BYTE_EN(_x) ((_x) << 2)
  119. /* turn register number and byte-enable mask into data for start of packet */
  120. #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6)
  121. /* SPI register read/write calls.
  122. *
  123. * All these calls issue SPI transactions to access the chip's registers. They
  124. * all require that the necessary lock is held to prevent accesses when the
  125. * chip is busy transfering packet data (RX/TX FIFO accesses).
  126. */
  127. /**
  128. * ks8851_wrreg16 - write 16bit register value to chip
  129. * @ks: The chip state
  130. * @reg: The register address
  131. * @val: The value to write
  132. *
  133. * Issue a write to put the value @val into the register specified in @reg.
  134. */
  135. static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
  136. {
  137. struct spi_transfer *xfer = &ks->spi_xfer1;
  138. struct spi_message *msg = &ks->spi_msg1;
  139. __le16 txb[2];
  140. int ret;
  141. txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
  142. txb[1] = cpu_to_le16(val);
  143. xfer->tx_buf = txb;
  144. xfer->rx_buf = NULL;
  145. xfer->len = 4;
  146. ret = spi_sync(ks->spidev, msg);
  147. if (ret < 0)
  148. netdev_err(ks->netdev, "spi_sync() failed\n");
  149. }
  150. /**
  151. * ks8851_wrreg8 - write 8bit register value to chip
  152. * @ks: The chip state
  153. * @reg: The register address
  154. * @val: The value to write
  155. *
  156. * Issue a write to put the value @val into the register specified in @reg.
  157. */
  158. static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
  159. {
  160. struct spi_transfer *xfer = &ks->spi_xfer1;
  161. struct spi_message *msg = &ks->spi_msg1;
  162. __le16 txb[2];
  163. int ret;
  164. int bit;
  165. bit = 1 << (reg & 3);
  166. txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
  167. txb[1] = val;
  168. xfer->tx_buf = txb;
  169. xfer->rx_buf = NULL;
  170. xfer->len = 3;
  171. ret = spi_sync(ks->spidev, msg);
  172. if (ret < 0)
  173. netdev_err(ks->netdev, "spi_sync() failed\n");
  174. }
  175. /**
  176. * ks8851_rx_1msg - select whether to use one or two messages for spi read
  177. * @ks: The device structure
  178. *
  179. * Return whether to generate a single message with a tx and rx buffer
  180. * supplied to spi_sync(), or alternatively send the tx and rx buffers
  181. * as separate messages.
  182. *
  183. * Depending on the hardware in use, a single message may be more efficient
  184. * on interrupts or work done by the driver.
  185. *
  186. * This currently always returns true until we add some per-device data passed
  187. * from the platform code to specify which mode is better.
  188. */
  189. static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
  190. {
  191. return true;
  192. }
  193. /**
  194. * ks8851_rdreg - issue read register command and return the data
  195. * @ks: The device state
  196. * @op: The register address and byte enables in message format.
  197. * @rxb: The RX buffer to return the result into
  198. * @rxl: The length of data expected.
  199. *
  200. * This is the low level read call that issues the necessary spi message(s)
  201. * to read data from the register specified in @op.
  202. */
  203. static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
  204. u8 *rxb, unsigned rxl)
  205. {
  206. struct spi_transfer *xfer;
  207. struct spi_message *msg;
  208. __le16 *txb = (__le16 *)ks->txd;
  209. u8 *trx = ks->rxd;
  210. int ret;
  211. txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
  212. if (ks8851_rx_1msg(ks)) {
  213. msg = &ks->spi_msg1;
  214. xfer = &ks->spi_xfer1;
  215. xfer->tx_buf = txb;
  216. xfer->rx_buf = trx;
  217. xfer->len = rxl + 2;
  218. } else {
  219. msg = &ks->spi_msg2;
  220. xfer = ks->spi_xfer2;
  221. xfer->tx_buf = txb;
  222. xfer->rx_buf = NULL;
  223. xfer->len = 2;
  224. xfer++;
  225. xfer->tx_buf = NULL;
  226. xfer->rx_buf = trx;
  227. xfer->len = rxl;
  228. }
  229. ret = spi_sync(ks->spidev, msg);
  230. if (ret < 0)
  231. netdev_err(ks->netdev, "read: spi_sync() failed\n");
  232. else if (ks8851_rx_1msg(ks))
  233. memcpy(rxb, trx + 2, rxl);
  234. else
  235. memcpy(rxb, trx, rxl);
  236. }
  237. /**
  238. * ks8851_rdreg8 - read 8 bit register from device
  239. * @ks: The chip information
  240. * @reg: The register address
  241. *
  242. * Read a 8bit register from the chip, returning the result
  243. */
  244. static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
  245. {
  246. u8 rxb[1];
  247. ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1);
  248. return rxb[0];
  249. }
  250. /**
  251. * ks8851_rdreg16 - read 16 bit register from device
  252. * @ks: The chip information
  253. * @reg: The register address
  254. *
  255. * Read a 16bit register from the chip, returning the result
  256. */
  257. static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
  258. {
  259. __le16 rx = 0;
  260. ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
  261. return le16_to_cpu(rx);
  262. }
  263. /**
  264. * ks8851_rdreg32 - read 32 bit register from device
  265. * @ks: The chip information
  266. * @reg: The register address
  267. *
  268. * Read a 32bit register from the chip.
  269. *
  270. * Note, this read requires the address be aligned to 4 bytes.
  271. */
  272. static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
  273. {
  274. __le32 rx = 0;
  275. WARN_ON(reg & 3);
  276. ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
  277. return le32_to_cpu(rx);
  278. }
  279. /**
  280. * ks8851_soft_reset - issue one of the soft reset to the device
  281. * @ks: The device state.
  282. * @op: The bit(s) to set in the GRR
  283. *
  284. * Issue the relevant soft-reset command to the device's GRR register
  285. * specified by @op.
  286. *
  287. * Note, the delays are in there as a caution to ensure that the reset
  288. * has time to take effect and then complete. Since the datasheet does
  289. * not currently specify the exact sequence, we have chosen something
  290. * that seems to work with our device.
  291. */
  292. static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
  293. {
  294. ks8851_wrreg16(ks, KS_GRR, op);
  295. mdelay(1); /* wait a short time to effect reset */
  296. ks8851_wrreg16(ks, KS_GRR, 0);
  297. mdelay(1); /* wait for condition to clear */
  298. }
  299. /**
  300. * ks8851_write_mac_addr - write mac address to device registers
  301. * @dev: The network device
  302. *
  303. * Update the KS8851 MAC address registers from the address in @dev.
  304. *
  305. * This call assumes that the chip is not running, so there is no need to
  306. * shutdown the RXQ process whilst setting this.
  307. */
  308. static int ks8851_write_mac_addr(struct net_device *dev)
  309. {
  310. struct ks8851_net *ks = netdev_priv(dev);
  311. int i;
  312. mutex_lock(&ks->lock);
  313. for (i = 0; i < ETH_ALEN; i++)
  314. ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
  315. mutex_unlock(&ks->lock);
  316. return 0;
  317. }
  318. /**
  319. * ks8851_init_mac - initialise the mac address
  320. * @ks: The device structure
  321. *
  322. * Get or create the initial mac address for the device and then set that
  323. * into the station address register. Currently we assume that the device
  324. * does not have a valid mac address in it, and so we use random_ether_addr()
  325. * to create a new one.
  326. *
  327. * In future, the driver should check to see if the device has an EEPROM
  328. * attached and whether that has a valid ethernet address in it.
  329. */
  330. static void ks8851_init_mac(struct ks8851_net *ks)
  331. {
  332. struct net_device *dev = ks->netdev;
  333. random_ether_addr(dev->dev_addr);
  334. ks8851_write_mac_addr(dev);
  335. }
  336. /**
  337. * ks8851_irq - device interrupt handler
  338. * @irq: Interrupt number passed from the IRQ hnalder.
  339. * @pw: The private word passed to register_irq(), our struct ks8851_net.
  340. *
  341. * Disable the interrupt from happening again until we've processed the
  342. * current status by scheduling ks8851_irq_work().
  343. */
  344. static irqreturn_t ks8851_irq(int irq, void *pw)
  345. {
  346. struct ks8851_net *ks = pw;
  347. disable_irq_nosync(irq);
  348. schedule_work(&ks->irq_work);
  349. return IRQ_HANDLED;
  350. }
  351. /**
  352. * ks8851_rdfifo - read data from the receive fifo
  353. * @ks: The device state.
  354. * @buff: The buffer address
  355. * @len: The length of the data to read
  356. *
  357. * Issue an RXQ FIFO read command and read the @len amount of data from
  358. * the FIFO into the buffer specified by @buff.
  359. */
  360. static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
  361. {
  362. struct spi_transfer *xfer = ks->spi_xfer2;
  363. struct spi_message *msg = &ks->spi_msg2;
  364. u8 txb[1];
  365. int ret;
  366. netif_dbg(ks, rx_status, ks->netdev,
  367. "%s: %d@%p\n", __func__, len, buff);
  368. /* set the operation we're issuing */
  369. txb[0] = KS_SPIOP_RXFIFO;
  370. xfer->tx_buf = txb;
  371. xfer->rx_buf = NULL;
  372. xfer->len = 1;
  373. xfer++;
  374. xfer->rx_buf = buff;
  375. xfer->tx_buf = NULL;
  376. xfer->len = len;
  377. ret = spi_sync(ks->spidev, msg);
  378. if (ret < 0)
  379. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  380. }
  381. /**
  382. * ks8851_dbg_dumpkkt - dump initial packet contents to debug
  383. * @ks: The device state
  384. * @rxpkt: The data for the received packet
  385. *
  386. * Dump the initial data from the packet to dev_dbg().
  387. */
  388. static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
  389. {
  390. netdev_dbg(ks->netdev,
  391. "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
  392. rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7],
  393. rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11],
  394. rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]);
  395. }
  396. /**
  397. * ks8851_rx_pkts - receive packets from the host
  398. * @ks: The device information.
  399. *
  400. * This is called from the IRQ work queue when the system detects that there
  401. * are packets in the receive queue. Find out how many packets there are and
  402. * read them from the FIFO.
  403. */
  404. static void ks8851_rx_pkts(struct ks8851_net *ks)
  405. {
  406. struct sk_buff *skb;
  407. unsigned rxfc;
  408. unsigned rxlen;
  409. unsigned rxstat;
  410. u32 rxh;
  411. u8 *rxpkt;
  412. rxfc = ks8851_rdreg8(ks, KS_RXFC);
  413. netif_dbg(ks, rx_status, ks->netdev,
  414. "%s: %d packets\n", __func__, rxfc);
  415. /* Currently we're issuing a read per packet, but we could possibly
  416. * improve the code by issuing a single read, getting the receive
  417. * header, allocating the packet and then reading the packet data
  418. * out in one go.
  419. *
  420. * This form of operation would require us to hold the SPI bus'
  421. * chipselect low during the entie transaction to avoid any
  422. * reset to the data stream comming from the chip.
  423. */
  424. for (; rxfc != 0; rxfc--) {
  425. rxh = ks8851_rdreg32(ks, KS_RXFHSR);
  426. rxstat = rxh & 0xffff;
  427. rxlen = rxh >> 16;
  428. netif_dbg(ks, rx_status, ks->netdev,
  429. "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
  430. /* the length of the packet includes the 32bit CRC */
  431. /* set dma read address */
  432. ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
  433. /* start the packet dma process, and set auto-dequeue rx */
  434. ks8851_wrreg16(ks, KS_RXQCR,
  435. ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
  436. if (rxlen > 0) {
  437. skb = netdev_alloc_skb(ks->netdev, rxlen + 2 + 8);
  438. if (!skb) {
  439. /* todo - dump frame and move on */
  440. }
  441. /* two bytes to ensure ip is aligned, and four bytes
  442. * for the status header and 4 bytes of garbage */
  443. skb_reserve(skb, 2 + 4 + 4);
  444. rxpkt = skb_put(skb, rxlen - 4) - 8;
  445. /* align the packet length to 4 bytes, and add 4 bytes
  446. * as we're getting the rx status header as well */
  447. ks8851_rdfifo(ks, rxpkt, ALIGN(rxlen, 4) + 8);
  448. if (netif_msg_pktdata(ks))
  449. ks8851_dbg_dumpkkt(ks, rxpkt);
  450. skb->protocol = eth_type_trans(skb, ks->netdev);
  451. netif_rx(skb);
  452. ks->netdev->stats.rx_packets++;
  453. ks->netdev->stats.rx_bytes += rxlen - 4;
  454. }
  455. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  456. }
  457. }
  458. /**
  459. * ks8851_irq_work - work queue handler for dealing with interrupt requests
  460. * @work: The work structure that was scheduled by schedule_work()
  461. *
  462. * This is the handler invoked when the ks8851_irq() is called to find out
  463. * what happened, as we cannot allow ourselves to sleep whilst waiting for
  464. * anything other process has the chip's lock.
  465. *
  466. * Read the interrupt status, work out what needs to be done and then clear
  467. * any of the interrupts that are not needed.
  468. */
  469. static void ks8851_irq_work(struct work_struct *work)
  470. {
  471. struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work);
  472. unsigned status;
  473. unsigned handled = 0;
  474. mutex_lock(&ks->lock);
  475. status = ks8851_rdreg16(ks, KS_ISR);
  476. netif_dbg(ks, intr, ks->netdev,
  477. "%s: status 0x%04x\n", __func__, status);
  478. if (status & IRQ_LCI) {
  479. /* should do something about checking link status */
  480. handled |= IRQ_LCI;
  481. }
  482. if (status & IRQ_LDI) {
  483. u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);
  484. pmecr &= ~PMECR_WKEVT_MASK;
  485. ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
  486. handled |= IRQ_LDI;
  487. }
  488. if (status & IRQ_RXPSI)
  489. handled |= IRQ_RXPSI;
  490. if (status & IRQ_TXI) {
  491. handled |= IRQ_TXI;
  492. /* no lock here, tx queue should have been stopped */
  493. /* update our idea of how much tx space is available to the
  494. * system */
  495. ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR);
  496. netif_dbg(ks, intr, ks->netdev,
  497. "%s: txspace %d\n", __func__, ks->tx_space);
  498. }
  499. if (status & IRQ_RXI)
  500. handled |= IRQ_RXI;
  501. if (status & IRQ_SPIBEI) {
  502. dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
  503. handled |= IRQ_SPIBEI;
  504. }
  505. ks8851_wrreg16(ks, KS_ISR, handled);
  506. if (status & IRQ_RXI) {
  507. /* the datasheet says to disable the rx interrupt during
  508. * packet read-out, however we're masking the interrupt
  509. * from the device so do not bother masking just the RX
  510. * from the device. */
  511. ks8851_rx_pkts(ks);
  512. }
  513. /* if something stopped the rx process, probably due to wanting
  514. * to change the rx settings, then do something about restarting
  515. * it. */
  516. if (status & IRQ_RXPSI) {
  517. struct ks8851_rxctrl *rxc = &ks->rxctrl;
  518. /* update the multicast hash table */
  519. ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]);
  520. ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]);
  521. ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]);
  522. ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]);
  523. ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2);
  524. ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
  525. }
  526. mutex_unlock(&ks->lock);
  527. if (status & IRQ_TXI)
  528. netif_wake_queue(ks->netdev);
  529. enable_irq(ks->netdev->irq);
  530. }
  531. /**
  532. * calc_txlen - calculate size of message to send packet
  533. * @len: Lenght of data
  534. *
  535. * Returns the size of the TXFIFO message needed to send
  536. * this packet.
  537. */
  538. static inline unsigned calc_txlen(unsigned len)
  539. {
  540. return ALIGN(len + 4, 4);
  541. }
  542. /**
  543. * ks8851_wrpkt - write packet to TX FIFO
  544. * @ks: The device state.
  545. * @txp: The sk_buff to transmit.
  546. * @irq: IRQ on completion of the packet.
  547. *
  548. * Send the @txp to the chip. This means creating the relevant packet header
  549. * specifying the length of the packet and the other information the chip
  550. * needs, such as IRQ on completion. Send the header and the packet data to
  551. * the device.
  552. */
  553. static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
  554. {
  555. struct spi_transfer *xfer = ks->spi_xfer2;
  556. struct spi_message *msg = &ks->spi_msg2;
  557. unsigned fid = 0;
  558. int ret;
  559. netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
  560. __func__, txp, txp->len, txp->data, irq);
  561. fid = ks->fid++;
  562. fid &= TXFR_TXFID_MASK;
  563. if (irq)
  564. fid |= TXFR_TXIC; /* irq on completion */
  565. /* start header at txb[1] to align txw entries */
  566. ks->txh.txb[1] = KS_SPIOP_TXFIFO;
  567. ks->txh.txw[1] = cpu_to_le16(fid);
  568. ks->txh.txw[2] = cpu_to_le16(txp->len);
  569. xfer->tx_buf = &ks->txh.txb[1];
  570. xfer->rx_buf = NULL;
  571. xfer->len = 5;
  572. xfer++;
  573. xfer->tx_buf = txp->data;
  574. xfer->rx_buf = NULL;
  575. xfer->len = ALIGN(txp->len, 4);
  576. ret = spi_sync(ks->spidev, msg);
  577. if (ret < 0)
  578. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  579. }
  580. /**
  581. * ks8851_done_tx - update and then free skbuff after transmitting
  582. * @ks: The device state
  583. * @txb: The buffer transmitted
  584. */
  585. static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb)
  586. {
  587. struct net_device *dev = ks->netdev;
  588. dev->stats.tx_bytes += txb->len;
  589. dev->stats.tx_packets++;
  590. dev_kfree_skb(txb);
  591. }
  592. /**
  593. * ks8851_tx_work - process tx packet(s)
  594. * @work: The work strucutre what was scheduled.
  595. *
  596. * This is called when a number of packets have been scheduled for
  597. * transmission and need to be sent to the device.
  598. */
  599. static void ks8851_tx_work(struct work_struct *work)
  600. {
  601. struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work);
  602. struct sk_buff *txb;
  603. bool last = skb_queue_empty(&ks->txq);
  604. mutex_lock(&ks->lock);
  605. while (!last) {
  606. txb = skb_dequeue(&ks->txq);
  607. last = skb_queue_empty(&ks->txq);
  608. if (txb != NULL) {
  609. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
  610. ks8851_wrpkt(ks, txb, last);
  611. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  612. ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
  613. ks8851_done_tx(ks, txb);
  614. }
  615. }
  616. mutex_unlock(&ks->lock);
  617. }
  618. /**
  619. * ks8851_set_powermode - set power mode of the device
  620. * @ks: The device state
  621. * @pwrmode: The power mode value to write to KS_PMECR.
  622. *
  623. * Change the power mode of the chip.
  624. */
  625. static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
  626. {
  627. unsigned pmecr;
  628. netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
  629. pmecr = ks8851_rdreg16(ks, KS_PMECR);
  630. pmecr &= ~PMECR_PM_MASK;
  631. pmecr |= pwrmode;
  632. ks8851_wrreg16(ks, KS_PMECR, pmecr);
  633. }
  634. /**
  635. * ks8851_net_open - open network device
  636. * @dev: The network device being opened.
  637. *
  638. * Called when the network device is marked active, such as a user executing
  639. * 'ifconfig up' on the device.
  640. */
  641. static int ks8851_net_open(struct net_device *dev)
  642. {
  643. struct ks8851_net *ks = netdev_priv(dev);
  644. /* lock the card, even if we may not actually be doing anything
  645. * else at the moment */
  646. mutex_lock(&ks->lock);
  647. netif_dbg(ks, ifup, ks->netdev, "opening\n");
  648. /* bring chip out of any power saving mode it was in */
  649. ks8851_set_powermode(ks, PMECR_PM_NORMAL);
  650. /* issue a soft reset to the RX/TX QMU to put it into a known
  651. * state. */
  652. ks8851_soft_reset(ks, GRR_QMU);
  653. /* setup transmission parameters */
  654. ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */
  655. TXCR_TXPE | /* pad to min length */
  656. TXCR_TXCRC | /* add CRC */
  657. TXCR_TXFCE)); /* enable flow control */
  658. /* auto-increment tx data, reset tx pointer */
  659. ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
  660. /* setup receiver control */
  661. ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */
  662. RXCR1_RXFCE | /* enable flow control */
  663. RXCR1_RXBE | /* broadcast enable */
  664. RXCR1_RXUE | /* unicast enable */
  665. RXCR1_RXE)); /* enable rx block */
  666. /* transfer entire frames out in one go */
  667. ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME);
  668. /* set receive counter timeouts */
  669. ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */
  670. ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */
  671. ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */
  672. ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
  673. RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
  674. RXQCR_RXDTTE); /* IRQ on time exceeded */
  675. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  676. /* clear then enable interrupts */
  677. #define STD_IRQ (IRQ_LCI | /* Link Change */ \
  678. IRQ_TXI | /* TX done */ \
  679. IRQ_RXI | /* RX done */ \
  680. IRQ_SPIBEI | /* SPI bus error */ \
  681. IRQ_TXPSI | /* TX process stop */ \
  682. IRQ_RXPSI) /* RX process stop */
  683. ks->rc_ier = STD_IRQ;
  684. ks8851_wrreg16(ks, KS_ISR, STD_IRQ);
  685. ks8851_wrreg16(ks, KS_IER, STD_IRQ);
  686. netif_start_queue(ks->netdev);
  687. netif_dbg(ks, ifup, ks->netdev, "network device up\n");
  688. mutex_unlock(&ks->lock);
  689. return 0;
  690. }
  691. /**
  692. * ks8851_net_stop - close network device
  693. * @dev: The device being closed.
  694. *
  695. * Called to close down a network device which has been active. Cancell any
  696. * work, shutdown the RX and TX process and then place the chip into a low
  697. * power state whilst it is not being used.
  698. */
  699. static int ks8851_net_stop(struct net_device *dev)
  700. {
  701. struct ks8851_net *ks = netdev_priv(dev);
  702. netif_info(ks, ifdown, dev, "shutting down\n");
  703. netif_stop_queue(dev);
  704. mutex_lock(&ks->lock);
  705. /* stop any outstanding work */
  706. flush_work(&ks->irq_work);
  707. flush_work(&ks->tx_work);
  708. flush_work(&ks->rxctrl_work);
  709. /* turn off the IRQs and ack any outstanding */
  710. ks8851_wrreg16(ks, KS_IER, 0x0000);
  711. ks8851_wrreg16(ks, KS_ISR, 0xffff);
  712. /* shutdown RX process */
  713. ks8851_wrreg16(ks, KS_RXCR1, 0x0000);
  714. /* shutdown TX process */
  715. ks8851_wrreg16(ks, KS_TXCR, 0x0000);
  716. /* set powermode to soft power down to save power */
  717. ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
  718. /* ensure any queued tx buffers are dumped */
  719. while (!skb_queue_empty(&ks->txq)) {
  720. struct sk_buff *txb = skb_dequeue(&ks->txq);
  721. netif_dbg(ks, ifdown, ks->netdev,
  722. "%s: freeing txb %p\n", __func__, txb);
  723. dev_kfree_skb(txb);
  724. }
  725. mutex_unlock(&ks->lock);
  726. return 0;
  727. }
  728. /**
  729. * ks8851_start_xmit - transmit packet
  730. * @skb: The buffer to transmit
  731. * @dev: The device used to transmit the packet.
  732. *
  733. * Called by the network layer to transmit the @skb. Queue the packet for
  734. * the device and schedule the necessary work to transmit the packet when
  735. * it is free.
  736. *
  737. * We do this to firstly avoid sleeping with the network device locked,
  738. * and secondly so we can round up more than one packet to transmit which
  739. * means we can try and avoid generating too many transmit done interrupts.
  740. */
  741. static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
  742. struct net_device *dev)
  743. {
  744. struct ks8851_net *ks = netdev_priv(dev);
  745. unsigned needed = calc_txlen(skb->len);
  746. netdev_tx_t ret = NETDEV_TX_OK;
  747. netif_dbg(ks, tx_queued, ks->netdev,
  748. "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
  749. spin_lock(&ks->statelock);
  750. if (needed > ks->tx_space) {
  751. netif_stop_queue(dev);
  752. ret = NETDEV_TX_BUSY;
  753. } else {
  754. ks->tx_space -= needed;
  755. skb_queue_tail(&ks->txq, skb);
  756. }
  757. spin_unlock(&ks->statelock);
  758. schedule_work(&ks->tx_work);
  759. return ret;
  760. }
  761. /**
  762. * ks8851_rxctrl_work - work handler to change rx mode
  763. * @work: The work structure this belongs to.
  764. *
  765. * Lock the device and issue the necessary changes to the receive mode from
  766. * the network device layer. This is done so that we can do this without
  767. * having to sleep whilst holding the network device lock.
  768. *
  769. * Since the recommendation from Micrel is that the RXQ is shutdown whilst the
  770. * receive parameters are programmed, we issue a write to disable the RXQ and
  771. * then wait for the interrupt handler to be triggered once the RXQ shutdown is
  772. * complete. The interrupt handler then writes the new values into the chip.
  773. */
  774. static void ks8851_rxctrl_work(struct work_struct *work)
  775. {
  776. struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work);
  777. mutex_lock(&ks->lock);
  778. /* need to shutdown RXQ before modifying filter parameters */
  779. ks8851_wrreg16(ks, KS_RXCR1, 0x00);
  780. mutex_unlock(&ks->lock);
  781. }
  782. static void ks8851_set_rx_mode(struct net_device *dev)
  783. {
  784. struct ks8851_net *ks = netdev_priv(dev);
  785. struct ks8851_rxctrl rxctrl;
  786. memset(&rxctrl, 0, sizeof(rxctrl));
  787. if (dev->flags & IFF_PROMISC) {
  788. /* interface to receive everything */
  789. rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF;
  790. } else if (dev->flags & IFF_ALLMULTI) {
  791. /* accept all multicast packets */
  792. rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE |
  793. RXCR1_RXPAFMA | RXCR1_RXMAFMA);
  794. } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) {
  795. struct netdev_hw_addr *ha;
  796. u32 crc;
  797. /* accept some multicast */
  798. netdev_for_each_mc_addr(ha, dev) {
  799. crc = ether_crc(ETH_ALEN, ha->addr);
  800. crc >>= (32 - 6); /* get top six bits */
  801. rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf));
  802. }
  803. rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
  804. } else {
  805. /* just accept broadcast / unicast */
  806. rxctrl.rxcr1 = RXCR1_RXPAFMA;
  807. }
  808. rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */
  809. RXCR1_RXBE | /* broadcast enable */
  810. RXCR1_RXE | /* RX process enable */
  811. RXCR1_RXFCE); /* enable flow control */
  812. rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME;
  813. /* schedule work to do the actual set of the data if needed */
  814. spin_lock(&ks->statelock);
  815. if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) {
  816. memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl));
  817. schedule_work(&ks->rxctrl_work);
  818. }
  819. spin_unlock(&ks->statelock);
  820. }
  821. static int ks8851_set_mac_address(struct net_device *dev, void *addr)
  822. {
  823. struct sockaddr *sa = addr;
  824. if (netif_running(dev))
  825. return -EBUSY;
  826. if (!is_valid_ether_addr(sa->sa_data))
  827. return -EADDRNOTAVAIL;
  828. memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
  829. return ks8851_write_mac_addr(dev);
  830. }
  831. static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
  832. {
  833. struct ks8851_net *ks = netdev_priv(dev);
  834. if (!netif_running(dev))
  835. return -EINVAL;
  836. return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
  837. }
  838. static const struct net_device_ops ks8851_netdev_ops = {
  839. .ndo_open = ks8851_net_open,
  840. .ndo_stop = ks8851_net_stop,
  841. .ndo_do_ioctl = ks8851_net_ioctl,
  842. .ndo_start_xmit = ks8851_start_xmit,
  843. .ndo_set_mac_address = ks8851_set_mac_address,
  844. .ndo_set_rx_mode = ks8851_set_rx_mode,
  845. .ndo_change_mtu = eth_change_mtu,
  846. .ndo_validate_addr = eth_validate_addr,
  847. };
  848. /* Companion eeprom access */
  849. enum { /* EEPROM programming states */
  850. EEPROM_CONTROL,
  851. EEPROM_ADDRESS,
  852. EEPROM_DATA,
  853. EEPROM_COMPLETE
  854. };
  855. /**
  856. * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
  857. * @dev: The network device the PHY is on.
  858. * @addr: EEPROM address to read
  859. *
  860. * eeprom_size: used to define the data coding length. Can be changed
  861. * through debug-fs.
  862. *
  863. * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
  864. * Warning: The READ feature is not supported on ks8851 revision 0.
  865. *
  866. * Rough programming model:
  867. * - on period start: set clock high and read value on bus
  868. * - on period / 2: set clock low and program value on bus
  869. * - start on period / 2
  870. */
  871. unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
  872. {
  873. struct ks8851_net *ks = netdev_priv(dev);
  874. int eepcr;
  875. int ctrl = EEPROM_OP_READ;
  876. int state = EEPROM_CONTROL;
  877. int bit_count = EEPROM_OP_LEN - 1;
  878. unsigned int data = 0;
  879. int dummy;
  880. unsigned int addr_len;
  881. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  882. /* start transaction: chip select high, authorize write */
  883. mutex_lock(&ks->lock);
  884. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  885. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  886. eepcr |= EEPCR_EECS;
  887. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  888. mutex_unlock(&ks->lock);
  889. while (state != EEPROM_COMPLETE) {
  890. /* falling clock period starts... */
  891. /* set EED_IO pin for control and address */
  892. eepcr &= ~EEPCR_EEDO;
  893. switch (state) {
  894. case EEPROM_CONTROL:
  895. eepcr |= ((ctrl >> bit_count) & 1) << 2;
  896. if (bit_count-- <= 0) {
  897. bit_count = addr_len - 1;
  898. state = EEPROM_ADDRESS;
  899. }
  900. break;
  901. case EEPROM_ADDRESS:
  902. eepcr |= ((addr >> bit_count) & 1) << 2;
  903. bit_count--;
  904. break;
  905. case EEPROM_DATA:
  906. /* Change to receive mode */
  907. eepcr &= ~EEPCR_EESRWA;
  908. break;
  909. }
  910. /* lower clock */
  911. eepcr &= ~EEPCR_EESCK;
  912. mutex_lock(&ks->lock);
  913. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  914. mutex_unlock(&ks->lock);
  915. /* waitread period / 2 */
  916. udelay(EEPROM_SK_PERIOD / 2);
  917. /* rising clock period starts... */
  918. /* raise clock */
  919. mutex_lock(&ks->lock);
  920. eepcr |= EEPCR_EESCK;
  921. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  922. mutex_unlock(&ks->lock);
  923. /* Manage read */
  924. switch (state) {
  925. case EEPROM_ADDRESS:
  926. if (bit_count < 0) {
  927. bit_count = EEPROM_DATA_LEN - 1;
  928. state = EEPROM_DATA;
  929. }
  930. break;
  931. case EEPROM_DATA:
  932. mutex_lock(&ks->lock);
  933. dummy = ks8851_rdreg16(ks, KS_EEPCR);
  934. mutex_unlock(&ks->lock);
  935. data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
  936. if (bit_count-- <= 0)
  937. state = EEPROM_COMPLETE;
  938. break;
  939. }
  940. /* wait period / 2 */
  941. udelay(EEPROM_SK_PERIOD / 2);
  942. }
  943. /* close transaction */
  944. mutex_lock(&ks->lock);
  945. eepcr &= ~EEPCR_EECS;
  946. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  947. eepcr = 0;
  948. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  949. mutex_unlock(&ks->lock);
  950. return data;
  951. }
  952. /**
  953. * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
  954. * @dev: The network device the PHY is on.
  955. * @op: operand (can be WRITE, EWEN, EWDS)
  956. * @addr: EEPROM address to write
  957. * @data: data to write
  958. *
  959. * eeprom_size: used to define the data coding length. Can be changed
  960. * through debug-fs.
  961. *
  962. * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
  963. *
  964. * Note that a write enable is required before writing data.
  965. *
  966. * Rough programming model:
  967. * - on period start: set clock high
  968. * - on period / 2: set clock low and program value on bus
  969. * - start on period / 2
  970. */
  971. void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
  972. unsigned int addr, unsigned int data)
  973. {
  974. struct ks8851_net *ks = netdev_priv(dev);
  975. int eepcr;
  976. int state = EEPROM_CONTROL;
  977. int bit_count = EEPROM_OP_LEN - 1;
  978. unsigned int addr_len;
  979. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  980. switch (op) {
  981. case EEPROM_OP_EWEN:
  982. addr = 0x30;
  983. break;
  984. case EEPROM_OP_EWDS:
  985. addr = 0;
  986. break;
  987. }
  988. /* start transaction: chip select high, authorize write */
  989. mutex_lock(&ks->lock);
  990. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  991. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  992. eepcr |= EEPCR_EECS;
  993. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  994. mutex_unlock(&ks->lock);
  995. while (state != EEPROM_COMPLETE) {
  996. /* falling clock period starts... */
  997. /* set EED_IO pin for control and address */
  998. eepcr &= ~EEPCR_EEDO;
  999. switch (state) {
  1000. case EEPROM_CONTROL:
  1001. eepcr |= ((op >> bit_count) & 1) << 2;
  1002. if (bit_count-- <= 0) {
  1003. bit_count = addr_len - 1;
  1004. state = EEPROM_ADDRESS;
  1005. }
  1006. break;
  1007. case EEPROM_ADDRESS:
  1008. eepcr |= ((addr >> bit_count) & 1) << 2;
  1009. if (bit_count-- <= 0) {
  1010. if (op == EEPROM_OP_WRITE) {
  1011. bit_count = EEPROM_DATA_LEN - 1;
  1012. state = EEPROM_DATA;
  1013. } else {
  1014. state = EEPROM_COMPLETE;
  1015. }
  1016. }
  1017. break;
  1018. case EEPROM_DATA:
  1019. eepcr |= ((data >> bit_count) & 1) << 2;
  1020. if (bit_count-- <= 0)
  1021. state = EEPROM_COMPLETE;
  1022. break;
  1023. }
  1024. /* lower clock */
  1025. eepcr &= ~EEPCR_EESCK;
  1026. mutex_lock(&ks->lock);
  1027. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1028. mutex_unlock(&ks->lock);
  1029. /* wait period / 2 */
  1030. udelay(EEPROM_SK_PERIOD / 2);
  1031. /* rising clock period starts... */
  1032. /* raise clock */
  1033. eepcr |= EEPCR_EESCK;
  1034. mutex_lock(&ks->lock);
  1035. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1036. mutex_unlock(&ks->lock);
  1037. /* wait period / 2 */
  1038. udelay(EEPROM_SK_PERIOD / 2);
  1039. }
  1040. /* close transaction */
  1041. mutex_lock(&ks->lock);
  1042. eepcr &= ~EEPCR_EECS;
  1043. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1044. eepcr = 0;
  1045. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1046. mutex_unlock(&ks->lock);
  1047. }
  1048. /* ethtool support */
  1049. static void ks8851_get_drvinfo(struct net_device *dev,
  1050. struct ethtool_drvinfo *di)
  1051. {
  1052. strlcpy(di->driver, "KS8851", sizeof(di->driver));
  1053. strlcpy(di->version, "1.00", sizeof(di->version));
  1054. strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info));
  1055. }
  1056. static u32 ks8851_get_msglevel(struct net_device *dev)
  1057. {
  1058. struct ks8851_net *ks = netdev_priv(dev);
  1059. return ks->msg_enable;
  1060. }
  1061. static void ks8851_set_msglevel(struct net_device *dev, u32 to)
  1062. {
  1063. struct ks8851_net *ks = netdev_priv(dev);
  1064. ks->msg_enable = to;
  1065. }
  1066. static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1067. {
  1068. struct ks8851_net *ks = netdev_priv(dev);
  1069. return mii_ethtool_gset(&ks->mii, cmd);
  1070. }
  1071. static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1072. {
  1073. struct ks8851_net *ks = netdev_priv(dev);
  1074. return mii_ethtool_sset(&ks->mii, cmd);
  1075. }
  1076. static u32 ks8851_get_link(struct net_device *dev)
  1077. {
  1078. struct ks8851_net *ks = netdev_priv(dev);
  1079. return mii_link_ok(&ks->mii);
  1080. }
  1081. static int ks8851_nway_reset(struct net_device *dev)
  1082. {
  1083. struct ks8851_net *ks = netdev_priv(dev);
  1084. return mii_nway_restart(&ks->mii);
  1085. }
  1086. static int ks8851_get_eeprom_len(struct net_device *dev)
  1087. {
  1088. struct ks8851_net *ks = netdev_priv(dev);
  1089. return ks->eeprom_size;
  1090. }
  1091. static int ks8851_get_eeprom(struct net_device *dev,
  1092. struct ethtool_eeprom *eeprom, u8 *bytes)
  1093. {
  1094. struct ks8851_net *ks = netdev_priv(dev);
  1095. u16 *eeprom_buff;
  1096. int first_word;
  1097. int last_word;
  1098. int ret_val = 0;
  1099. u16 i;
  1100. if (eeprom->len == 0)
  1101. return -EINVAL;
  1102. if (eeprom->len > ks->eeprom_size)
  1103. return -EINVAL;
  1104. eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
  1105. first_word = eeprom->offset >> 1;
  1106. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1107. eeprom_buff = kmalloc(sizeof(u16) *
  1108. (last_word - first_word + 1), GFP_KERNEL);
  1109. if (!eeprom_buff)
  1110. return -ENOMEM;
  1111. for (i = 0; i < last_word - first_word + 1; i++)
  1112. eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
  1113. /* Device's eeprom is little-endian, word addressable */
  1114. for (i = 0; i < last_word - first_word + 1; i++)
  1115. le16_to_cpus(&eeprom_buff[i]);
  1116. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
  1117. kfree(eeprom_buff);
  1118. return ret_val;
  1119. }
  1120. static int ks8851_set_eeprom(struct net_device *dev,
  1121. struct ethtool_eeprom *eeprom, u8 *bytes)
  1122. {
  1123. struct ks8851_net *ks = netdev_priv(dev);
  1124. u16 *eeprom_buff;
  1125. void *ptr;
  1126. int max_len;
  1127. int first_word;
  1128. int last_word;
  1129. int ret_val = 0;
  1130. u16 i;
  1131. if (eeprom->len == 0)
  1132. return -EOPNOTSUPP;
  1133. if (eeprom->len > ks->eeprom_size)
  1134. return -EINVAL;
  1135. if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
  1136. return -EFAULT;
  1137. first_word = eeprom->offset >> 1;
  1138. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1139. max_len = (last_word - first_word + 1) * 2;
  1140. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  1141. if (!eeprom_buff)
  1142. return -ENOMEM;
  1143. ptr = (void *)eeprom_buff;
  1144. if (eeprom->offset & 1) {
  1145. /* need read/modify/write of first changed EEPROM word */
  1146. /* only the second byte of the word is being modified */
  1147. eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
  1148. ptr++;
  1149. }
  1150. if ((eeprom->offset + eeprom->len) & 1)
  1151. /* need read/modify/write of last changed EEPROM word */
  1152. /* only the first byte of the word is being modified */
  1153. eeprom_buff[last_word - first_word] =
  1154. ks8851_eeprom_read(dev, last_word);
  1155. /* Device's eeprom is little-endian, word addressable */
  1156. le16_to_cpus(&eeprom_buff[0]);
  1157. le16_to_cpus(&eeprom_buff[last_word - first_word]);
  1158. memcpy(ptr, bytes, eeprom->len);
  1159. for (i = 0; i < last_word - first_word + 1; i++)
  1160. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  1161. ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
  1162. for (i = 0; i < last_word - first_word + 1; i++) {
  1163. ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
  1164. eeprom_buff[i]);
  1165. mdelay(EEPROM_WRITE_TIME);
  1166. }
  1167. ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
  1168. kfree(eeprom_buff);
  1169. return ret_val;
  1170. }
  1171. static const struct ethtool_ops ks8851_ethtool_ops = {
  1172. .get_drvinfo = ks8851_get_drvinfo,
  1173. .get_msglevel = ks8851_get_msglevel,
  1174. .set_msglevel = ks8851_set_msglevel,
  1175. .get_settings = ks8851_get_settings,
  1176. .set_settings = ks8851_set_settings,
  1177. .get_link = ks8851_get_link,
  1178. .nway_reset = ks8851_nway_reset,
  1179. .get_eeprom_len = ks8851_get_eeprom_len,
  1180. .get_eeprom = ks8851_get_eeprom,
  1181. .set_eeprom = ks8851_set_eeprom,
  1182. };
  1183. /* MII interface controls */
  1184. /**
  1185. * ks8851_phy_reg - convert MII register into a KS8851 register
  1186. * @reg: MII register number.
  1187. *
  1188. * Return the KS8851 register number for the corresponding MII PHY register
  1189. * if possible. Return zero if the MII register has no direct mapping to the
  1190. * KS8851 register set.
  1191. */
  1192. static int ks8851_phy_reg(int reg)
  1193. {
  1194. switch (reg) {
  1195. case MII_BMCR:
  1196. return KS_P1MBCR;
  1197. case MII_BMSR:
  1198. return KS_P1MBSR;
  1199. case MII_PHYSID1:
  1200. return KS_PHY1ILR;
  1201. case MII_PHYSID2:
  1202. return KS_PHY1IHR;
  1203. case MII_ADVERTISE:
  1204. return KS_P1ANAR;
  1205. case MII_LPA:
  1206. return KS_P1ANLPR;
  1207. }
  1208. return 0x0;
  1209. }
  1210. /**
  1211. * ks8851_phy_read - MII interface PHY register read.
  1212. * @dev: The network device the PHY is on.
  1213. * @phy_addr: Address of PHY (ignored as we only have one)
  1214. * @reg: The register to read.
  1215. *
  1216. * This call reads data from the PHY register specified in @reg. Since the
  1217. * device does not support all the MII registers, the non-existant values
  1218. * are always returned as zero.
  1219. *
  1220. * We return zero for unsupported registers as the MII code does not check
  1221. * the value returned for any error status, and simply returns it to the
  1222. * caller. The mii-tool that the driver was tested with takes any -ve error
  1223. * as real PHY capabilities, thus displaying incorrect data to the user.
  1224. */
  1225. static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg)
  1226. {
  1227. struct ks8851_net *ks = netdev_priv(dev);
  1228. int ksreg;
  1229. int result;
  1230. ksreg = ks8851_phy_reg(reg);
  1231. if (!ksreg)
  1232. return 0x0; /* no error return allowed, so use zero */
  1233. mutex_lock(&ks->lock);
  1234. result = ks8851_rdreg16(ks, ksreg);
  1235. mutex_unlock(&ks->lock);
  1236. return result;
  1237. }
  1238. static void ks8851_phy_write(struct net_device *dev,
  1239. int phy, int reg, int value)
  1240. {
  1241. struct ks8851_net *ks = netdev_priv(dev);
  1242. int ksreg;
  1243. ksreg = ks8851_phy_reg(reg);
  1244. if (ksreg) {
  1245. mutex_lock(&ks->lock);
  1246. ks8851_wrreg16(ks, ksreg, value);
  1247. mutex_unlock(&ks->lock);
  1248. }
  1249. }
  1250. /**
  1251. * ks8851_read_selftest - read the selftest memory info.
  1252. * @ks: The device state
  1253. *
  1254. * Read and check the TX/RX memory selftest information.
  1255. */
  1256. static int ks8851_read_selftest(struct ks8851_net *ks)
  1257. {
  1258. unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
  1259. int ret = 0;
  1260. unsigned rd;
  1261. rd = ks8851_rdreg16(ks, KS_MBIR);
  1262. if ((rd & both_done) != both_done) {
  1263. netdev_warn(ks->netdev, "Memory selftest not finished\n");
  1264. return 0;
  1265. }
  1266. if (rd & MBIR_TXMBFA) {
  1267. netdev_err(ks->netdev, "TX memory selftest fail\n");
  1268. ret |= 1;
  1269. }
  1270. if (rd & MBIR_RXMBFA) {
  1271. netdev_err(ks->netdev, "RX memory selftest fail\n");
  1272. ret |= 2;
  1273. }
  1274. return 0;
  1275. }
  1276. /* driver bus management functions */
  1277. static int __devinit ks8851_probe(struct spi_device *spi)
  1278. {
  1279. struct net_device *ndev;
  1280. struct ks8851_net *ks;
  1281. int ret;
  1282. ndev = alloc_etherdev(sizeof(struct ks8851_net));
  1283. if (!ndev) {
  1284. dev_err(&spi->dev, "failed to alloc ethernet device\n");
  1285. return -ENOMEM;
  1286. }
  1287. spi->bits_per_word = 8;
  1288. ks = netdev_priv(ndev);
  1289. ks->netdev = ndev;
  1290. ks->spidev = spi;
  1291. ks->tx_space = 6144;
  1292. mutex_init(&ks->lock);
  1293. spin_lock_init(&ks->statelock);
  1294. INIT_WORK(&ks->tx_work, ks8851_tx_work);
  1295. INIT_WORK(&ks->irq_work, ks8851_irq_work);
  1296. INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work);
  1297. /* initialise pre-made spi transfer messages */
  1298. spi_message_init(&ks->spi_msg1);
  1299. spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1);
  1300. spi_message_init(&ks->spi_msg2);
  1301. spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
  1302. spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
  1303. /* setup mii state */
  1304. ks->mii.dev = ndev;
  1305. ks->mii.phy_id = 1,
  1306. ks->mii.phy_id_mask = 1;
  1307. ks->mii.reg_num_mask = 0xf;
  1308. ks->mii.mdio_read = ks8851_phy_read;
  1309. ks->mii.mdio_write = ks8851_phy_write;
  1310. dev_info(&spi->dev, "message enable is %d\n", msg_enable);
  1311. /* set the default message enable */
  1312. ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
  1313. NETIF_MSG_PROBE |
  1314. NETIF_MSG_LINK));
  1315. skb_queue_head_init(&ks->txq);
  1316. SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops);
  1317. SET_NETDEV_DEV(ndev, &spi->dev);
  1318. dev_set_drvdata(&spi->dev, ks);
  1319. ndev->if_port = IF_PORT_100BASET;
  1320. ndev->netdev_ops = &ks8851_netdev_ops;
  1321. ndev->irq = spi->irq;
  1322. /* issue a global soft reset to reset the device. */
  1323. ks8851_soft_reset(ks, GRR_GSR);
  1324. /* simple check for a valid chip being connected to the bus */
  1325. if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
  1326. dev_err(&spi->dev, "failed to read device ID\n");
  1327. ret = -ENODEV;
  1328. goto err_id;
  1329. }
  1330. /* cache the contents of the CCR register for EEPROM, etc. */
  1331. ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
  1332. if (ks->rc_ccr & CCR_EEPROM)
  1333. ks->eeprom_size = 128;
  1334. else
  1335. ks->eeprom_size = 0;
  1336. ks8851_read_selftest(ks);
  1337. ks8851_init_mac(ks);
  1338. ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW,
  1339. ndev->name, ks);
  1340. if (ret < 0) {
  1341. dev_err(&spi->dev, "failed to get irq\n");
  1342. goto err_irq;
  1343. }
  1344. ret = register_netdev(ndev);
  1345. if (ret) {
  1346. dev_err(&spi->dev, "failed to register network device\n");
  1347. goto err_netdev;
  1348. }
  1349. netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
  1350. CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
  1351. ndev->dev_addr, ndev->irq);
  1352. return 0;
  1353. err_netdev:
  1354. free_irq(ndev->irq, ndev);
  1355. err_id:
  1356. err_irq:
  1357. free_netdev(ndev);
  1358. return ret;
  1359. }
  1360. static int __devexit ks8851_remove(struct spi_device *spi)
  1361. {
  1362. struct ks8851_net *priv = dev_get_drvdata(&spi->dev);
  1363. if (netif_msg_drv(priv))
  1364. dev_info(&spi->dev, "remove\n");
  1365. unregister_netdev(priv->netdev);
  1366. free_irq(spi->irq, priv);
  1367. free_netdev(priv->netdev);
  1368. return 0;
  1369. }
  1370. static struct spi_driver ks8851_driver = {
  1371. .driver = {
  1372. .name = "ks8851",
  1373. .owner = THIS_MODULE,
  1374. },
  1375. .probe = ks8851_probe,
  1376. .remove = __devexit_p(ks8851_remove),
  1377. };
  1378. static int __init ks8851_init(void)
  1379. {
  1380. return spi_register_driver(&ks8851_driver);
  1381. }
  1382. static void __exit ks8851_exit(void)
  1383. {
  1384. spi_unregister_driver(&ks8851_driver);
  1385. }
  1386. module_init(ks8851_init);
  1387. module_exit(ks8851_exit);
  1388. MODULE_DESCRIPTION("KS8851 Network driver");
  1389. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  1390. MODULE_LICENSE("GPL");
  1391. module_param_named(message, msg_enable, int, 0);
  1392. MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
  1393. MODULE_ALIAS("spi:ks8851");