ks8842.c 22 KB

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  1. /*
  2. * ks8842.c timberdale KS8842 ethernet driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * The Micrel KS8842 behind the timberdale FPGA
  20. * The genuine Micrel KS8841/42 device with ISA 16/32bit bus interface
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/ethtool.h>
  29. #include <linux/ks8842.h>
  30. #define DRV_NAME "ks8842"
  31. /* Timberdale specific Registers */
  32. #define REG_TIMB_RST 0x1c
  33. /* KS8842 registers */
  34. #define REG_SELECT_BANK 0x0e
  35. /* bank 0 registers */
  36. #define REG_QRFCR 0x04
  37. /* bank 2 registers */
  38. #define REG_MARL 0x00
  39. #define REG_MARM 0x02
  40. #define REG_MARH 0x04
  41. /* bank 3 registers */
  42. #define REG_GRR 0x06
  43. /* bank 16 registers */
  44. #define REG_TXCR 0x00
  45. #define REG_TXSR 0x02
  46. #define REG_RXCR 0x04
  47. #define REG_TXMIR 0x08
  48. #define REG_RXMIR 0x0A
  49. /* bank 17 registers */
  50. #define REG_TXQCR 0x00
  51. #define REG_RXQCR 0x02
  52. #define REG_TXFDPR 0x04
  53. #define REG_RXFDPR 0x06
  54. #define REG_QMU_DATA_LO 0x08
  55. #define REG_QMU_DATA_HI 0x0A
  56. /* bank 18 registers */
  57. #define REG_IER 0x00
  58. #define IRQ_LINK_CHANGE 0x8000
  59. #define IRQ_TX 0x4000
  60. #define IRQ_RX 0x2000
  61. #define IRQ_RX_OVERRUN 0x0800
  62. #define IRQ_TX_STOPPED 0x0200
  63. #define IRQ_RX_STOPPED 0x0100
  64. #define IRQ_RX_ERROR 0x0080
  65. #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \
  66. IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR)
  67. #define REG_ISR 0x02
  68. #define REG_RXSR 0x04
  69. #define RXSR_VALID 0x8000
  70. #define RXSR_BROADCAST 0x80
  71. #define RXSR_MULTICAST 0x40
  72. #define RXSR_UNICAST 0x20
  73. #define RXSR_FRAMETYPE 0x08
  74. #define RXSR_TOO_LONG 0x04
  75. #define RXSR_RUNT 0x02
  76. #define RXSR_CRC_ERROR 0x01
  77. #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR)
  78. /* bank 32 registers */
  79. #define REG_SW_ID_AND_ENABLE 0x00
  80. #define REG_SGCR1 0x02
  81. #define REG_SGCR2 0x04
  82. #define REG_SGCR3 0x06
  83. /* bank 39 registers */
  84. #define REG_MACAR1 0x00
  85. #define REG_MACAR2 0x02
  86. #define REG_MACAR3 0x04
  87. /* bank 45 registers */
  88. #define REG_P1MBCR 0x00
  89. #define REG_P1MBSR 0x02
  90. /* bank 46 registers */
  91. #define REG_P2MBCR 0x00
  92. #define REG_P2MBSR 0x02
  93. /* bank 48 registers */
  94. #define REG_P1CR2 0x02
  95. /* bank 49 registers */
  96. #define REG_P1CR4 0x02
  97. #define REG_P1SR 0x04
  98. /* flags passed by platform_device for configuration */
  99. #define MICREL_KS884X 0x01 /* 0=Timeberdale(FPGA), 1=Micrel */
  100. #define KS884X_16BIT 0x02 /* 1=16bit, 0=32bit */
  101. struct ks8842_adapter {
  102. void __iomem *hw_addr;
  103. int irq;
  104. unsigned long conf_flags; /* copy of platform_device config */
  105. struct tasklet_struct tasklet;
  106. spinlock_t lock; /* spinlock to be interrupt safe */
  107. struct work_struct timeout_work;
  108. struct net_device *netdev;
  109. };
  110. static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank)
  111. {
  112. iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK);
  113. }
  114. static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank,
  115. u8 value, int offset)
  116. {
  117. ks8842_select_bank(adapter, bank);
  118. iowrite8(value, adapter->hw_addr + offset);
  119. }
  120. static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank,
  121. u16 value, int offset)
  122. {
  123. ks8842_select_bank(adapter, bank);
  124. iowrite16(value, adapter->hw_addr + offset);
  125. }
  126. static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank,
  127. u16 bits, int offset)
  128. {
  129. u16 reg;
  130. ks8842_select_bank(adapter, bank);
  131. reg = ioread16(adapter->hw_addr + offset);
  132. reg |= bits;
  133. iowrite16(reg, adapter->hw_addr + offset);
  134. }
  135. static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank,
  136. u16 bits, int offset)
  137. {
  138. u16 reg;
  139. ks8842_select_bank(adapter, bank);
  140. reg = ioread16(adapter->hw_addr + offset);
  141. reg &= ~bits;
  142. iowrite16(reg, adapter->hw_addr + offset);
  143. }
  144. static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank,
  145. u32 value, int offset)
  146. {
  147. ks8842_select_bank(adapter, bank);
  148. iowrite32(value, adapter->hw_addr + offset);
  149. }
  150. static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank,
  151. int offset)
  152. {
  153. ks8842_select_bank(adapter, bank);
  154. return ioread8(adapter->hw_addr + offset);
  155. }
  156. static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank,
  157. int offset)
  158. {
  159. ks8842_select_bank(adapter, bank);
  160. return ioread16(adapter->hw_addr + offset);
  161. }
  162. static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank,
  163. int offset)
  164. {
  165. ks8842_select_bank(adapter, bank);
  166. return ioread32(adapter->hw_addr + offset);
  167. }
  168. static void ks8842_reset(struct ks8842_adapter *adapter)
  169. {
  170. if (adapter->conf_flags & MICREL_KS884X) {
  171. ks8842_write16(adapter, 3, 1, REG_GRR);
  172. msleep(10);
  173. iowrite16(0, adapter->hw_addr + REG_GRR);
  174. } else {
  175. /* The KS8842 goes haywire when doing softare reset
  176. * a work around in the timberdale IP is implemented to
  177. * do a hardware reset instead
  178. ks8842_write16(adapter, 3, 1, REG_GRR);
  179. msleep(10);
  180. iowrite16(0, adapter->hw_addr + REG_GRR);
  181. */
  182. iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
  183. msleep(20);
  184. }
  185. }
  186. static void ks8842_update_link_status(struct net_device *netdev,
  187. struct ks8842_adapter *adapter)
  188. {
  189. /* check the status of the link */
  190. if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) {
  191. netif_carrier_on(netdev);
  192. netif_wake_queue(netdev);
  193. } else {
  194. netif_stop_queue(netdev);
  195. netif_carrier_off(netdev);
  196. }
  197. }
  198. static void ks8842_enable_tx(struct ks8842_adapter *adapter)
  199. {
  200. ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR);
  201. }
  202. static void ks8842_disable_tx(struct ks8842_adapter *adapter)
  203. {
  204. ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR);
  205. }
  206. static void ks8842_enable_rx(struct ks8842_adapter *adapter)
  207. {
  208. ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR);
  209. }
  210. static void ks8842_disable_rx(struct ks8842_adapter *adapter)
  211. {
  212. ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR);
  213. }
  214. static void ks8842_reset_hw(struct ks8842_adapter *adapter)
  215. {
  216. /* reset the HW */
  217. ks8842_reset(adapter);
  218. /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */
  219. ks8842_write16(adapter, 16, 0x000E, REG_TXCR);
  220. /* enable the receiver, uni + multi + broadcast + flow ctrl
  221. + crc strip */
  222. ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400,
  223. REG_RXCR);
  224. /* TX frame pointer autoincrement */
  225. ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR);
  226. /* RX frame pointer autoincrement */
  227. ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR);
  228. /* RX 2 kb high watermark */
  229. ks8842_write16(adapter, 0, 0x1000, REG_QRFCR);
  230. /* aggresive back off in half duplex */
  231. ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1);
  232. /* enable no excessive collison drop */
  233. ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2);
  234. /* Enable port 1 force flow control / back pressure / transmit / recv */
  235. ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2);
  236. /* restart port auto-negotiation */
  237. ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4);
  238. if (!(adapter->conf_flags & MICREL_KS884X))
  239. /* only advertise 10Mbps */
  240. ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4);
  241. /* Enable the transmitter */
  242. ks8842_enable_tx(adapter);
  243. /* Enable the receiver */
  244. ks8842_enable_rx(adapter);
  245. /* clear all interrupts */
  246. ks8842_write16(adapter, 18, 0xffff, REG_ISR);
  247. /* enable interrupts */
  248. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  249. /* enable the switch */
  250. ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE);
  251. }
  252. static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest)
  253. {
  254. int i;
  255. u16 mac;
  256. for (i = 0; i < ETH_ALEN; i++)
  257. dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i);
  258. if (adapter->conf_flags & MICREL_KS884X) {
  259. /*
  260. the sequence of saving mac addr between MAC and Switch is
  261. different.
  262. */
  263. mac = ks8842_read16(adapter, 2, REG_MARL);
  264. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  265. mac = ks8842_read16(adapter, 2, REG_MARM);
  266. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  267. mac = ks8842_read16(adapter, 2, REG_MARH);
  268. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  269. } else {
  270. /* make sure the switch port uses the same MAC as the QMU */
  271. mac = ks8842_read16(adapter, 2, REG_MARL);
  272. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  273. mac = ks8842_read16(adapter, 2, REG_MARM);
  274. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  275. mac = ks8842_read16(adapter, 2, REG_MARH);
  276. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  277. }
  278. }
  279. static void ks8842_write_mac_addr(struct ks8842_adapter *adapter, u8 *mac)
  280. {
  281. unsigned long flags;
  282. unsigned i;
  283. spin_lock_irqsave(&adapter->lock, flags);
  284. for (i = 0; i < ETH_ALEN; i++) {
  285. ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i);
  286. if (!(adapter->conf_flags & MICREL_KS884X))
  287. ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1],
  288. REG_MACAR1 + i);
  289. }
  290. if (adapter->conf_flags & MICREL_KS884X) {
  291. /*
  292. the sequence of saving mac addr between MAC and Switch is
  293. different.
  294. */
  295. u16 mac;
  296. mac = ks8842_read16(adapter, 2, REG_MARL);
  297. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  298. mac = ks8842_read16(adapter, 2, REG_MARM);
  299. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  300. mac = ks8842_read16(adapter, 2, REG_MARH);
  301. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  302. }
  303. spin_unlock_irqrestore(&adapter->lock, flags);
  304. }
  305. static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter)
  306. {
  307. return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff;
  308. }
  309. static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev)
  310. {
  311. struct ks8842_adapter *adapter = netdev_priv(netdev);
  312. int len = skb->len;
  313. netdev_dbg(netdev, "%s: len %u head %p data %p tail %p end %p\n",
  314. __func__, skb->len, skb->head, skb->data,
  315. skb_tail_pointer(skb), skb_end_pointer(skb));
  316. /* check FIFO buffer space, we need space for CRC and command bits */
  317. if (ks8842_tx_fifo_space(adapter) < len + 8)
  318. return NETDEV_TX_BUSY;
  319. if (adapter->conf_flags & KS884X_16BIT) {
  320. u16 *ptr16 = (u16 *)skb->data;
  321. ks8842_write16(adapter, 17, 0x8000 | 0x100, REG_QMU_DATA_LO);
  322. ks8842_write16(adapter, 17, (u16)len, REG_QMU_DATA_HI);
  323. netdev->stats.tx_bytes += len;
  324. /* copy buffer */
  325. while (len > 0) {
  326. iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_LO);
  327. iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_HI);
  328. len -= sizeof(u32);
  329. }
  330. } else {
  331. u32 *ptr = (u32 *)skb->data;
  332. u32 ctrl;
  333. /* the control word, enable IRQ, port 1 and the length */
  334. ctrl = 0x8000 | 0x100 | (len << 16);
  335. ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO);
  336. netdev->stats.tx_bytes += len;
  337. /* copy buffer */
  338. while (len > 0) {
  339. iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
  340. len -= sizeof(u32);
  341. ptr++;
  342. }
  343. }
  344. /* enqueue packet */
  345. ks8842_write16(adapter, 17, 1, REG_TXQCR);
  346. dev_kfree_skb(skb);
  347. return NETDEV_TX_OK;
  348. }
  349. static void ks8842_rx_frame(struct net_device *netdev,
  350. struct ks8842_adapter *adapter)
  351. {
  352. u16 status16;
  353. u32 status;
  354. int len;
  355. if (adapter->conf_flags & KS884X_16BIT) {
  356. status16 = ks8842_read16(adapter, 17, REG_QMU_DATA_LO);
  357. len = (int)ks8842_read16(adapter, 17, REG_QMU_DATA_HI);
  358. len &= 0xffff;
  359. netdev_dbg(netdev, "%s - rx_data: status: %x\n",
  360. __func__, status16);
  361. } else {
  362. status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO);
  363. len = (status >> 16) & 0x7ff;
  364. status &= 0xffff;
  365. netdev_dbg(netdev, "%s - rx_data: status: %x\n",
  366. __func__, status);
  367. }
  368. /* check the status */
  369. if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) {
  370. struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len);
  371. netdev_dbg(netdev, "%s, got package, len: %d\n", __func__, len);
  372. if (skb) {
  373. netdev->stats.rx_packets++;
  374. netdev->stats.rx_bytes += len;
  375. if (status & RXSR_MULTICAST)
  376. netdev->stats.multicast++;
  377. if (adapter->conf_flags & KS884X_16BIT) {
  378. u16 *data16 = (u16 *)skb_put(skb, len);
  379. ks8842_select_bank(adapter, 17);
  380. while (len > 0) {
  381. *data16++ = ioread16(adapter->hw_addr +
  382. REG_QMU_DATA_LO);
  383. *data16++ = ioread16(adapter->hw_addr +
  384. REG_QMU_DATA_HI);
  385. len -= sizeof(u32);
  386. }
  387. } else {
  388. u32 *data = (u32 *)skb_put(skb, len);
  389. ks8842_select_bank(adapter, 17);
  390. while (len > 0) {
  391. *data++ = ioread32(adapter->hw_addr +
  392. REG_QMU_DATA_LO);
  393. len -= sizeof(u32);
  394. }
  395. }
  396. skb->protocol = eth_type_trans(skb, netdev);
  397. netif_rx(skb);
  398. } else
  399. netdev->stats.rx_dropped++;
  400. } else {
  401. netdev_dbg(netdev, "RX error, status: %x\n", status);
  402. netdev->stats.rx_errors++;
  403. if (status & RXSR_TOO_LONG)
  404. netdev->stats.rx_length_errors++;
  405. if (status & RXSR_CRC_ERROR)
  406. netdev->stats.rx_crc_errors++;
  407. if (status & RXSR_RUNT)
  408. netdev->stats.rx_frame_errors++;
  409. }
  410. /* set high watermark to 3K */
  411. ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR);
  412. /* release the frame */
  413. ks8842_write16(adapter, 17, 0x01, REG_RXQCR);
  414. /* set high watermark to 2K */
  415. ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR);
  416. }
  417. void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter)
  418. {
  419. u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  420. netdev_dbg(netdev, "%s Entry - rx_data: %d\n", __func__, rx_data);
  421. while (rx_data) {
  422. ks8842_rx_frame(netdev, adapter);
  423. rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  424. }
  425. }
  426. void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter)
  427. {
  428. u16 sr = ks8842_read16(adapter, 16, REG_TXSR);
  429. netdev_dbg(netdev, "%s - entry, sr: %x\n", __func__, sr);
  430. netdev->stats.tx_packets++;
  431. if (netif_queue_stopped(netdev))
  432. netif_wake_queue(netdev);
  433. }
  434. void ks8842_handle_rx_overrun(struct net_device *netdev,
  435. struct ks8842_adapter *adapter)
  436. {
  437. netdev_dbg(netdev, "%s: entry\n", __func__);
  438. netdev->stats.rx_errors++;
  439. netdev->stats.rx_fifo_errors++;
  440. }
  441. void ks8842_tasklet(unsigned long arg)
  442. {
  443. struct net_device *netdev = (struct net_device *)arg;
  444. struct ks8842_adapter *adapter = netdev_priv(netdev);
  445. u16 isr;
  446. unsigned long flags;
  447. u16 entry_bank;
  448. /* read current bank to be able to set it back */
  449. spin_lock_irqsave(&adapter->lock, flags);
  450. entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  451. spin_unlock_irqrestore(&adapter->lock, flags);
  452. isr = ks8842_read16(adapter, 18, REG_ISR);
  453. netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr);
  454. /* Ack */
  455. ks8842_write16(adapter, 18, isr, REG_ISR);
  456. if (!netif_running(netdev))
  457. return;
  458. if (isr & IRQ_LINK_CHANGE)
  459. ks8842_update_link_status(netdev, adapter);
  460. if (isr & (IRQ_RX | IRQ_RX_ERROR))
  461. ks8842_handle_rx(netdev, adapter);
  462. if (isr & IRQ_TX)
  463. ks8842_handle_tx(netdev, adapter);
  464. if (isr & IRQ_RX_OVERRUN)
  465. ks8842_handle_rx_overrun(netdev, adapter);
  466. if (isr & IRQ_TX_STOPPED) {
  467. ks8842_disable_tx(adapter);
  468. ks8842_enable_tx(adapter);
  469. }
  470. if (isr & IRQ_RX_STOPPED) {
  471. ks8842_disable_rx(adapter);
  472. ks8842_enable_rx(adapter);
  473. }
  474. /* re-enable interrupts, put back the bank selection register */
  475. spin_lock_irqsave(&adapter->lock, flags);
  476. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  477. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  478. spin_unlock_irqrestore(&adapter->lock, flags);
  479. }
  480. static irqreturn_t ks8842_irq(int irq, void *devid)
  481. {
  482. struct net_device *netdev = devid;
  483. struct ks8842_adapter *adapter = netdev_priv(netdev);
  484. u16 isr;
  485. u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  486. irqreturn_t ret = IRQ_NONE;
  487. isr = ks8842_read16(adapter, 18, REG_ISR);
  488. netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr);
  489. if (isr) {
  490. /* disable IRQ */
  491. ks8842_write16(adapter, 18, 0x00, REG_IER);
  492. /* schedule tasklet */
  493. tasklet_schedule(&adapter->tasklet);
  494. ret = IRQ_HANDLED;
  495. }
  496. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  497. return ret;
  498. }
  499. /* Netdevice operations */
  500. static int ks8842_open(struct net_device *netdev)
  501. {
  502. struct ks8842_adapter *adapter = netdev_priv(netdev);
  503. int err;
  504. netdev_dbg(netdev, "%s - entry\n", __func__);
  505. /* reset the HW */
  506. ks8842_reset_hw(adapter);
  507. ks8842_write_mac_addr(adapter, netdev->dev_addr);
  508. ks8842_update_link_status(netdev, adapter);
  509. err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME,
  510. netdev);
  511. if (err) {
  512. pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err);
  513. return err;
  514. }
  515. return 0;
  516. }
  517. static int ks8842_close(struct net_device *netdev)
  518. {
  519. struct ks8842_adapter *adapter = netdev_priv(netdev);
  520. netdev_dbg(netdev, "%s - entry\n", __func__);
  521. cancel_work_sync(&adapter->timeout_work);
  522. /* free the irq */
  523. free_irq(adapter->irq, netdev);
  524. /* disable the switch */
  525. ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE);
  526. return 0;
  527. }
  528. static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb,
  529. struct net_device *netdev)
  530. {
  531. int ret;
  532. struct ks8842_adapter *adapter = netdev_priv(netdev);
  533. netdev_dbg(netdev, "%s: entry\n", __func__);
  534. ret = ks8842_tx_frame(skb, netdev);
  535. if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8)
  536. netif_stop_queue(netdev);
  537. return ret;
  538. }
  539. static int ks8842_set_mac(struct net_device *netdev, void *p)
  540. {
  541. struct ks8842_adapter *adapter = netdev_priv(netdev);
  542. struct sockaddr *addr = p;
  543. char *mac = (u8 *)addr->sa_data;
  544. netdev_dbg(netdev, "%s: entry\n", __func__);
  545. if (!is_valid_ether_addr(addr->sa_data))
  546. return -EADDRNOTAVAIL;
  547. memcpy(netdev->dev_addr, mac, netdev->addr_len);
  548. ks8842_write_mac_addr(adapter, mac);
  549. return 0;
  550. }
  551. static void ks8842_tx_timeout_work(struct work_struct *work)
  552. {
  553. struct ks8842_adapter *adapter =
  554. container_of(work, struct ks8842_adapter, timeout_work);
  555. struct net_device *netdev = adapter->netdev;
  556. unsigned long flags;
  557. netdev_dbg(netdev, "%s: entry\n", __func__);
  558. spin_lock_irqsave(&adapter->lock, flags);
  559. /* disable interrupts */
  560. ks8842_write16(adapter, 18, 0, REG_IER);
  561. ks8842_write16(adapter, 18, 0xFFFF, REG_ISR);
  562. netif_stop_queue(netdev);
  563. spin_unlock_irqrestore(&adapter->lock, flags);
  564. ks8842_reset_hw(adapter);
  565. ks8842_write_mac_addr(adapter, netdev->dev_addr);
  566. ks8842_update_link_status(netdev, adapter);
  567. }
  568. static void ks8842_tx_timeout(struct net_device *netdev)
  569. {
  570. struct ks8842_adapter *adapter = netdev_priv(netdev);
  571. netdev_dbg(netdev, "%s: entry\n", __func__);
  572. schedule_work(&adapter->timeout_work);
  573. }
  574. static const struct net_device_ops ks8842_netdev_ops = {
  575. .ndo_open = ks8842_open,
  576. .ndo_stop = ks8842_close,
  577. .ndo_start_xmit = ks8842_xmit_frame,
  578. .ndo_set_mac_address = ks8842_set_mac,
  579. .ndo_tx_timeout = ks8842_tx_timeout,
  580. .ndo_validate_addr = eth_validate_addr
  581. };
  582. static const struct ethtool_ops ks8842_ethtool_ops = {
  583. .get_link = ethtool_op_get_link,
  584. };
  585. static int __devinit ks8842_probe(struct platform_device *pdev)
  586. {
  587. int err = -ENOMEM;
  588. struct resource *iomem;
  589. struct net_device *netdev;
  590. struct ks8842_adapter *adapter;
  591. struct ks8842_platform_data *pdata = pdev->dev.platform_data;
  592. u16 id;
  593. unsigned i;
  594. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  595. if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME))
  596. goto err_mem_region;
  597. netdev = alloc_etherdev(sizeof(struct ks8842_adapter));
  598. if (!netdev)
  599. goto err_alloc_etherdev;
  600. SET_NETDEV_DEV(netdev, &pdev->dev);
  601. adapter = netdev_priv(netdev);
  602. adapter->netdev = netdev;
  603. INIT_WORK(&adapter->timeout_work, ks8842_tx_timeout_work);
  604. adapter->hw_addr = ioremap(iomem->start, resource_size(iomem));
  605. adapter->conf_flags = iomem->flags;
  606. if (!adapter->hw_addr)
  607. goto err_ioremap;
  608. adapter->irq = platform_get_irq(pdev, 0);
  609. if (adapter->irq < 0) {
  610. err = adapter->irq;
  611. goto err_get_irq;
  612. }
  613. tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev);
  614. spin_lock_init(&adapter->lock);
  615. netdev->netdev_ops = &ks8842_netdev_ops;
  616. netdev->ethtool_ops = &ks8842_ethtool_ops;
  617. /* Check if a mac address was given */
  618. i = netdev->addr_len;
  619. if (pdata) {
  620. for (i = 0; i < netdev->addr_len; i++)
  621. if (pdata->macaddr[i] != 0)
  622. break;
  623. if (i < netdev->addr_len)
  624. /* an address was passed, use it */
  625. memcpy(netdev->dev_addr, pdata->macaddr,
  626. netdev->addr_len);
  627. }
  628. if (i == netdev->addr_len) {
  629. ks8842_read_mac_addr(adapter, netdev->dev_addr);
  630. if (!is_valid_ether_addr(netdev->dev_addr))
  631. random_ether_addr(netdev->dev_addr);
  632. }
  633. id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE);
  634. strcpy(netdev->name, "eth%d");
  635. err = register_netdev(netdev);
  636. if (err)
  637. goto err_register;
  638. platform_set_drvdata(pdev, netdev);
  639. pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
  640. (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
  641. return 0;
  642. err_register:
  643. err_get_irq:
  644. iounmap(adapter->hw_addr);
  645. err_ioremap:
  646. free_netdev(netdev);
  647. err_alloc_etherdev:
  648. release_mem_region(iomem->start, resource_size(iomem));
  649. err_mem_region:
  650. return err;
  651. }
  652. static int __devexit ks8842_remove(struct platform_device *pdev)
  653. {
  654. struct net_device *netdev = platform_get_drvdata(pdev);
  655. struct ks8842_adapter *adapter = netdev_priv(netdev);
  656. struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  657. unregister_netdev(netdev);
  658. tasklet_kill(&adapter->tasklet);
  659. iounmap(adapter->hw_addr);
  660. free_netdev(netdev);
  661. release_mem_region(iomem->start, resource_size(iomem));
  662. platform_set_drvdata(pdev, NULL);
  663. return 0;
  664. }
  665. static struct platform_driver ks8842_platform_driver = {
  666. .driver = {
  667. .name = DRV_NAME,
  668. .owner = THIS_MODULE,
  669. },
  670. .probe = ks8842_probe,
  671. .remove = ks8842_remove,
  672. };
  673. static int __init ks8842_init(void)
  674. {
  675. return platform_driver_register(&ks8842_platform_driver);
  676. }
  677. static void __exit ks8842_exit(void)
  678. {
  679. platform_driver_unregister(&ks8842_platform_driver);
  680. }
  681. module_init(ks8842_init);
  682. module_exit(ks8842_exit);
  683. MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver");
  684. MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
  685. MODULE_LICENSE("GPL v2");
  686. MODULE_ALIAS("platform:ks8842");