enic_res.c 9.0 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. dev_err(enic_get_dev(enic),
  46. "Error getting MAC addr, %d\n", err);
  47. return err;
  48. }
  49. #define GET_CONFIG(m) \
  50. do { \
  51. err = vnic_dev_spec(enic->vdev, \
  52. offsetof(struct vnic_enet_config, m), \
  53. sizeof(c->m), &c->m); \
  54. if (err) { \
  55. dev_err(enic_get_dev(enic), \
  56. "Error getting %s, %d\n", #m, err); \
  57. return err; \
  58. } \
  59. } while (0)
  60. GET_CONFIG(flags);
  61. GET_CONFIG(wq_desc_count);
  62. GET_CONFIG(rq_desc_count);
  63. GET_CONFIG(mtu);
  64. GET_CONFIG(intr_timer_type);
  65. GET_CONFIG(intr_mode);
  66. GET_CONFIG(intr_timer_usec);
  67. GET_CONFIG(loop_tag);
  68. c->wq_desc_count =
  69. min_t(u32, ENIC_MAX_WQ_DESCS,
  70. max_t(u32, ENIC_MIN_WQ_DESCS,
  71. c->wq_desc_count));
  72. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  73. c->rq_desc_count =
  74. min_t(u32, ENIC_MAX_RQ_DESCS,
  75. max_t(u32, ENIC_MIN_RQ_DESCS,
  76. c->rq_desc_count));
  77. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  78. if (c->mtu == 0)
  79. c->mtu = 1500;
  80. c->mtu = min_t(u16, ENIC_MAX_MTU,
  81. max_t(u16, ENIC_MIN_MTU,
  82. c->mtu));
  83. c->intr_timer_usec = min_t(u32,
  84. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  85. c->intr_timer_usec);
  86. dev_info(enic_get_dev(enic), "vNIC MAC addr %pM wq/rq %d/%d\n",
  87. enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
  88. dev_info(enic_get_dev(enic), "vNIC mtu %d csum tx/rx %d/%d "
  89. "tso/lro %d/%d intr timer %d usec\n",
  90. c->mtu, ENIC_SETTING(enic, TXCSUM),
  91. ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
  92. ENIC_SETTING(enic, LRO), c->intr_timer_usec);
  93. return 0;
  94. }
  95. int enic_add_vlan(struct enic *enic, u16 vlanid)
  96. {
  97. u64 a0 = vlanid, a1 = 0;
  98. int wait = 1000;
  99. int err;
  100. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  101. if (err)
  102. dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
  103. return err;
  104. }
  105. int enic_del_vlan(struct enic *enic, u16 vlanid)
  106. {
  107. u64 a0 = vlanid, a1 = 0;
  108. int wait = 1000;
  109. int err;
  110. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  111. if (err)
  112. dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
  113. return err;
  114. }
  115. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  116. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  117. u8 ig_vlan_strip_en)
  118. {
  119. u64 a0, a1;
  120. u32 nic_cfg;
  121. int wait = 1000;
  122. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  123. rss_hash_type, rss_hash_bits, rss_base_cpu,
  124. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  125. a0 = nic_cfg;
  126. a1 = 0;
  127. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  128. }
  129. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  130. {
  131. u64 a0 = (u64)key_pa, a1 = len;
  132. int wait = 1000;
  133. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  134. }
  135. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  136. {
  137. u64 a0 = (u64)cpu_pa, a1 = len;
  138. int wait = 1000;
  139. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  140. }
  141. void enic_free_vnic_resources(struct enic *enic)
  142. {
  143. unsigned int i;
  144. for (i = 0; i < enic->wq_count; i++)
  145. vnic_wq_free(&enic->wq[i]);
  146. for (i = 0; i < enic->rq_count; i++)
  147. vnic_rq_free(&enic->rq[i]);
  148. for (i = 0; i < enic->cq_count; i++)
  149. vnic_cq_free(&enic->cq[i]);
  150. for (i = 0; i < enic->intr_count; i++)
  151. vnic_intr_free(&enic->intr[i]);
  152. }
  153. void enic_get_res_counts(struct enic *enic)
  154. {
  155. enic->wq_count = min_t(int,
  156. vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
  157. ENIC_WQ_MAX);
  158. enic->rq_count = min_t(int,
  159. vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
  160. ENIC_RQ_MAX);
  161. enic->cq_count = min_t(int,
  162. vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
  163. ENIC_CQ_MAX);
  164. enic->intr_count = min_t(int,
  165. vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
  166. ENIC_INTR_MAX);
  167. dev_info(enic_get_dev(enic),
  168. "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
  169. enic->wq_count, enic->rq_count,
  170. enic->cq_count, enic->intr_count);
  171. }
  172. void enic_init_vnic_resources(struct enic *enic)
  173. {
  174. enum vnic_dev_intr_mode intr_mode;
  175. unsigned int mask_on_assertion;
  176. unsigned int interrupt_offset;
  177. unsigned int error_interrupt_enable;
  178. unsigned int error_interrupt_offset;
  179. unsigned int cq_index;
  180. unsigned int i;
  181. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  182. /* Init RQ/WQ resources.
  183. *
  184. * RQ[0 - n-1] point to CQ[0 - n-1]
  185. * WQ[0 - m-1] point to CQ[n - n+m-1]
  186. *
  187. * Error interrupt is not enabled for MSI.
  188. */
  189. switch (intr_mode) {
  190. case VNIC_DEV_INTR_MODE_INTX:
  191. case VNIC_DEV_INTR_MODE_MSIX:
  192. error_interrupt_enable = 1;
  193. error_interrupt_offset = enic->intr_count - 2;
  194. break;
  195. default:
  196. error_interrupt_enable = 0;
  197. error_interrupt_offset = 0;
  198. break;
  199. }
  200. for (i = 0; i < enic->rq_count; i++) {
  201. cq_index = i;
  202. vnic_rq_init(&enic->rq[i],
  203. cq_index,
  204. error_interrupt_enable,
  205. error_interrupt_offset);
  206. }
  207. for (i = 0; i < enic->wq_count; i++) {
  208. cq_index = enic->rq_count + i;
  209. vnic_wq_init(&enic->wq[i],
  210. cq_index,
  211. error_interrupt_enable,
  212. error_interrupt_offset);
  213. }
  214. /* Init CQ resources
  215. *
  216. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  217. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  218. */
  219. for (i = 0; i < enic->cq_count; i++) {
  220. switch (intr_mode) {
  221. case VNIC_DEV_INTR_MODE_MSIX:
  222. interrupt_offset = i;
  223. break;
  224. default:
  225. interrupt_offset = 0;
  226. break;
  227. }
  228. vnic_cq_init(&enic->cq[i],
  229. 0 /* flow_control_enable */,
  230. 1 /* color_enable */,
  231. 0 /* cq_head */,
  232. 0 /* cq_tail */,
  233. 1 /* cq_tail_color */,
  234. 1 /* interrupt_enable */,
  235. 1 /* cq_entry_enable */,
  236. 0 /* cq_message_enable */,
  237. interrupt_offset,
  238. 0 /* cq_message_addr */);
  239. }
  240. /* Init INTR resources
  241. *
  242. * mask_on_assertion is not used for INTx due to the level-
  243. * triggered nature of INTx
  244. */
  245. switch (intr_mode) {
  246. case VNIC_DEV_INTR_MODE_MSI:
  247. case VNIC_DEV_INTR_MODE_MSIX:
  248. mask_on_assertion = 1;
  249. break;
  250. default:
  251. mask_on_assertion = 0;
  252. break;
  253. }
  254. for (i = 0; i < enic->intr_count; i++) {
  255. vnic_intr_init(&enic->intr[i],
  256. INTR_COALESCE_USEC_TO_HW(enic->config.intr_timer_usec),
  257. enic->config.intr_timer_type,
  258. mask_on_assertion);
  259. }
  260. }
  261. int enic_alloc_vnic_resources(struct enic *enic)
  262. {
  263. enum vnic_dev_intr_mode intr_mode;
  264. unsigned int i;
  265. int err;
  266. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  267. dev_info(enic_get_dev(enic), "vNIC resources used: "
  268. "wq %d rq %d cq %d intr %d intr mode %s\n",
  269. enic->wq_count, enic->rq_count,
  270. enic->cq_count, enic->intr_count,
  271. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  272. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  273. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  274. "unknown");
  275. /* Allocate queue resources
  276. */
  277. for (i = 0; i < enic->wq_count; i++) {
  278. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  279. enic->config.wq_desc_count,
  280. sizeof(struct wq_enet_desc));
  281. if (err)
  282. goto err_out_cleanup;
  283. }
  284. for (i = 0; i < enic->rq_count; i++) {
  285. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  286. enic->config.rq_desc_count,
  287. sizeof(struct rq_enet_desc));
  288. if (err)
  289. goto err_out_cleanup;
  290. }
  291. for (i = 0; i < enic->cq_count; i++) {
  292. if (i < enic->rq_count)
  293. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  294. enic->config.rq_desc_count,
  295. sizeof(struct cq_enet_rq_desc));
  296. else
  297. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  298. enic->config.wq_desc_count,
  299. sizeof(struct cq_enet_wq_desc));
  300. if (err)
  301. goto err_out_cleanup;
  302. }
  303. for (i = 0; i < enic->intr_count; i++) {
  304. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  305. if (err)
  306. goto err_out_cleanup;
  307. }
  308. /* Hook remaining resource
  309. */
  310. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  311. RES_TYPE_INTR_PBA_LEGACY, 0);
  312. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  313. dev_err(enic_get_dev(enic),
  314. "Failed to hook legacy pba resource\n");
  315. err = -ENODEV;
  316. goto err_out_cleanup;
  317. }
  318. return 0;
  319. err_out_cleanup:
  320. enic_free_vnic_resources(enic);
  321. return err;
  322. }