cxgb4.h 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744
  1. /*
  2. * This file is part of the Chelsio T4 Ethernet driver for Linux.
  3. *
  4. * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #ifndef __CXGB4_H__
  35. #define __CXGB4_H__
  36. #include <linux/bitops.h>
  37. #include <linux/cache.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/list.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/pci.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/timer.h>
  44. #include <asm/io.h>
  45. #include "cxgb4_uld.h"
  46. #include "t4_hw.h"
  47. #define FW_VERSION_MAJOR 1
  48. #define FW_VERSION_MINOR 1
  49. #define FW_VERSION_MICRO 0
  50. enum {
  51. MAX_NPORTS = 4, /* max # of ports */
  52. SERNUM_LEN = 24, /* Serial # length */
  53. EC_LEN = 16, /* E/C length */
  54. ID_LEN = 16, /* ID length */
  55. };
  56. enum {
  57. MEM_EDC0,
  58. MEM_EDC1,
  59. MEM_MC
  60. };
  61. enum dev_master {
  62. MASTER_CANT,
  63. MASTER_MAY,
  64. MASTER_MUST
  65. };
  66. enum dev_state {
  67. DEV_STATE_UNINIT,
  68. DEV_STATE_INIT,
  69. DEV_STATE_ERR
  70. };
  71. enum {
  72. PAUSE_RX = 1 << 0,
  73. PAUSE_TX = 1 << 1,
  74. PAUSE_AUTONEG = 1 << 2
  75. };
  76. struct port_stats {
  77. u64 tx_octets; /* total # of octets in good frames */
  78. u64 tx_frames; /* all good frames */
  79. u64 tx_bcast_frames; /* all broadcast frames */
  80. u64 tx_mcast_frames; /* all multicast frames */
  81. u64 tx_ucast_frames; /* all unicast frames */
  82. u64 tx_error_frames; /* all error frames */
  83. u64 tx_frames_64; /* # of Tx frames in a particular range */
  84. u64 tx_frames_65_127;
  85. u64 tx_frames_128_255;
  86. u64 tx_frames_256_511;
  87. u64 tx_frames_512_1023;
  88. u64 tx_frames_1024_1518;
  89. u64 tx_frames_1519_max;
  90. u64 tx_drop; /* # of dropped Tx frames */
  91. u64 tx_pause; /* # of transmitted pause frames */
  92. u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */
  93. u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */
  94. u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */
  95. u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */
  96. u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */
  97. u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */
  98. u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */
  99. u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */
  100. u64 rx_octets; /* total # of octets in good frames */
  101. u64 rx_frames; /* all good frames */
  102. u64 rx_bcast_frames; /* all broadcast frames */
  103. u64 rx_mcast_frames; /* all multicast frames */
  104. u64 rx_ucast_frames; /* all unicast frames */
  105. u64 rx_too_long; /* # of frames exceeding MTU */
  106. u64 rx_jabber; /* # of jabber frames */
  107. u64 rx_fcs_err; /* # of received frames with bad FCS */
  108. u64 rx_len_err; /* # of received frames with length error */
  109. u64 rx_symbol_err; /* symbol errors */
  110. u64 rx_runt; /* # of short frames */
  111. u64 rx_frames_64; /* # of Rx frames in a particular range */
  112. u64 rx_frames_65_127;
  113. u64 rx_frames_128_255;
  114. u64 rx_frames_256_511;
  115. u64 rx_frames_512_1023;
  116. u64 rx_frames_1024_1518;
  117. u64 rx_frames_1519_max;
  118. u64 rx_pause; /* # of received pause frames */
  119. u64 rx_ppp0; /* # of received PPP prio 0 frames */
  120. u64 rx_ppp1; /* # of received PPP prio 1 frames */
  121. u64 rx_ppp2; /* # of received PPP prio 2 frames */
  122. u64 rx_ppp3; /* # of received PPP prio 3 frames */
  123. u64 rx_ppp4; /* # of received PPP prio 4 frames */
  124. u64 rx_ppp5; /* # of received PPP prio 5 frames */
  125. u64 rx_ppp6; /* # of received PPP prio 6 frames */
  126. u64 rx_ppp7; /* # of received PPP prio 7 frames */
  127. u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
  128. u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
  129. u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
  130. u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
  131. u64 rx_trunc0; /* buffer-group 0 truncated packets */
  132. u64 rx_trunc1; /* buffer-group 1 truncated packets */
  133. u64 rx_trunc2; /* buffer-group 2 truncated packets */
  134. u64 rx_trunc3; /* buffer-group 3 truncated packets */
  135. };
  136. struct lb_port_stats {
  137. u64 octets;
  138. u64 frames;
  139. u64 bcast_frames;
  140. u64 mcast_frames;
  141. u64 ucast_frames;
  142. u64 error_frames;
  143. u64 frames_64;
  144. u64 frames_65_127;
  145. u64 frames_128_255;
  146. u64 frames_256_511;
  147. u64 frames_512_1023;
  148. u64 frames_1024_1518;
  149. u64 frames_1519_max;
  150. u64 drop;
  151. u64 ovflow0;
  152. u64 ovflow1;
  153. u64 ovflow2;
  154. u64 ovflow3;
  155. u64 trunc0;
  156. u64 trunc1;
  157. u64 trunc2;
  158. u64 trunc3;
  159. };
  160. struct tp_tcp_stats {
  161. u32 tcpOutRsts;
  162. u64 tcpInSegs;
  163. u64 tcpOutSegs;
  164. u64 tcpRetransSegs;
  165. };
  166. struct tp_err_stats {
  167. u32 macInErrs[4];
  168. u32 hdrInErrs[4];
  169. u32 tcpInErrs[4];
  170. u32 tnlCongDrops[4];
  171. u32 ofldChanDrops[4];
  172. u32 tnlTxDrops[4];
  173. u32 ofldVlanDrops[4];
  174. u32 tcp6InErrs[4];
  175. u32 ofldNoNeigh;
  176. u32 ofldCongDefer;
  177. };
  178. struct tp_params {
  179. unsigned int ntxchan; /* # of Tx channels */
  180. unsigned int tre; /* log2 of core clocks per TP tick */
  181. };
  182. struct vpd_params {
  183. unsigned int cclk;
  184. u8 ec[EC_LEN + 1];
  185. u8 sn[SERNUM_LEN + 1];
  186. u8 id[ID_LEN + 1];
  187. };
  188. struct pci_params {
  189. unsigned char speed;
  190. unsigned char width;
  191. };
  192. struct adapter_params {
  193. struct tp_params tp;
  194. struct vpd_params vpd;
  195. struct pci_params pci;
  196. unsigned int sf_size; /* serial flash size in bytes */
  197. unsigned int sf_nsec; /* # of flash sectors */
  198. unsigned int sf_fw_start; /* start of FW image in flash */
  199. unsigned int fw_vers;
  200. unsigned int tp_vers;
  201. u8 api_vers[7];
  202. unsigned short mtus[NMTUS];
  203. unsigned short a_wnd[NCCTRL_WIN];
  204. unsigned short b_wnd[NCCTRL_WIN];
  205. unsigned char nports; /* # of ethernet ports */
  206. unsigned char portvec;
  207. unsigned char rev; /* chip revision */
  208. unsigned char offload;
  209. unsigned int ofldq_wr_cred;
  210. };
  211. struct trace_params {
  212. u32 data[TRACE_LEN / 4];
  213. u32 mask[TRACE_LEN / 4];
  214. unsigned short snap_len;
  215. unsigned short min_len;
  216. unsigned char skip_ofst;
  217. unsigned char skip_len;
  218. unsigned char invert;
  219. unsigned char port;
  220. };
  221. struct link_config {
  222. unsigned short supported; /* link capabilities */
  223. unsigned short advertising; /* advertised capabilities */
  224. unsigned short requested_speed; /* speed user has requested */
  225. unsigned short speed; /* actual link speed */
  226. unsigned char requested_fc; /* flow control user has requested */
  227. unsigned char fc; /* actual link flow control */
  228. unsigned char autoneg; /* autonegotiating? */
  229. unsigned char link_ok; /* link up? */
  230. };
  231. #define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16)
  232. enum {
  233. MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */
  234. MAX_OFLD_QSETS = 16, /* # of offload Tx/Rx queue sets */
  235. MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */
  236. MAX_RDMA_QUEUES = NCHAN, /* # of streaming RDMA Rx queues */
  237. };
  238. enum {
  239. MAX_EGRQ = 128, /* max # of egress queues, including FLs */
  240. MAX_INGQ = 64 /* max # of interrupt-capable ingress queues */
  241. };
  242. struct adapter;
  243. struct vlan_group;
  244. struct sge_rspq;
  245. struct port_info {
  246. struct adapter *adapter;
  247. struct vlan_group *vlan_grp;
  248. u16 viid;
  249. s16 xact_addr_filt; /* index of exact MAC address filter */
  250. u16 rss_size; /* size of VI's RSS table slice */
  251. s8 mdio_addr;
  252. u8 port_type;
  253. u8 mod_type;
  254. u8 port_id;
  255. u8 tx_chan;
  256. u8 lport; /* associated offload logical port */
  257. u8 rx_offload; /* CSO, etc */
  258. u8 nqsets; /* # of qsets */
  259. u8 first_qset; /* index of first qset */
  260. u8 rss_mode;
  261. struct link_config link_cfg;
  262. u16 *rss;
  263. };
  264. /* port_info.rx_offload flags */
  265. enum {
  266. RX_CSO = 1 << 0,
  267. };
  268. struct dentry;
  269. struct work_struct;
  270. enum { /* adapter flags */
  271. FULL_INIT_DONE = (1 << 0),
  272. USING_MSI = (1 << 1),
  273. USING_MSIX = (1 << 2),
  274. FW_OK = (1 << 4),
  275. };
  276. struct rx_sw_desc;
  277. struct sge_fl { /* SGE free-buffer queue state */
  278. unsigned int avail; /* # of available Rx buffers */
  279. unsigned int pend_cred; /* new buffers since last FL DB ring */
  280. unsigned int cidx; /* consumer index */
  281. unsigned int pidx; /* producer index */
  282. unsigned long alloc_failed; /* # of times buffer allocation failed */
  283. unsigned long large_alloc_failed;
  284. unsigned long starving;
  285. /* RO fields */
  286. unsigned int cntxt_id; /* SGE context id for the free list */
  287. unsigned int size; /* capacity of free list */
  288. struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
  289. __be64 *desc; /* address of HW Rx descriptor ring */
  290. dma_addr_t addr; /* bus address of HW ring start */
  291. };
  292. /* A packet gather list */
  293. struct pkt_gl {
  294. skb_frag_t frags[MAX_SKB_FRAGS];
  295. void *va; /* virtual address of first byte */
  296. unsigned int nfrags; /* # of fragments */
  297. unsigned int tot_len; /* total length of fragments */
  298. };
  299. typedef int (*rspq_handler_t)(struct sge_rspq *q, const __be64 *rsp,
  300. const struct pkt_gl *gl);
  301. struct sge_rspq { /* state for an SGE response queue */
  302. struct napi_struct napi;
  303. const __be64 *cur_desc; /* current descriptor in queue */
  304. unsigned int cidx; /* consumer index */
  305. u8 gen; /* current generation bit */
  306. u8 intr_params; /* interrupt holdoff parameters */
  307. u8 next_intr_params; /* holdoff params for next interrupt */
  308. u8 pktcnt_idx; /* interrupt packet threshold */
  309. u8 uld; /* ULD handling this queue */
  310. u8 idx; /* queue index within its group */
  311. int offset; /* offset into current Rx buffer */
  312. u16 cntxt_id; /* SGE context id for the response q */
  313. u16 abs_id; /* absolute SGE id for the response q */
  314. __be64 *desc; /* address of HW response ring */
  315. dma_addr_t phys_addr; /* physical address of the ring */
  316. unsigned int iqe_len; /* entry size */
  317. unsigned int size; /* capacity of response queue */
  318. struct adapter *adap;
  319. struct net_device *netdev; /* associated net device */
  320. rspq_handler_t handler;
  321. };
  322. struct sge_eth_stats { /* Ethernet queue statistics */
  323. unsigned long pkts; /* # of ethernet packets */
  324. unsigned long lro_pkts; /* # of LRO super packets */
  325. unsigned long lro_merged; /* # of wire packets merged by LRO */
  326. unsigned long rx_cso; /* # of Rx checksum offloads */
  327. unsigned long vlan_ex; /* # of Rx VLAN extractions */
  328. unsigned long rx_drops; /* # of packets dropped due to no mem */
  329. };
  330. struct sge_eth_rxq { /* SW Ethernet Rx queue */
  331. struct sge_rspq rspq;
  332. struct sge_fl fl;
  333. struct sge_eth_stats stats;
  334. } ____cacheline_aligned_in_smp;
  335. struct sge_ofld_stats { /* offload queue statistics */
  336. unsigned long pkts; /* # of packets */
  337. unsigned long imm; /* # of immediate-data packets */
  338. unsigned long an; /* # of asynchronous notifications */
  339. unsigned long nomem; /* # of responses deferred due to no mem */
  340. };
  341. struct sge_ofld_rxq { /* SW offload Rx queue */
  342. struct sge_rspq rspq;
  343. struct sge_fl fl;
  344. struct sge_ofld_stats stats;
  345. } ____cacheline_aligned_in_smp;
  346. struct tx_desc {
  347. __be64 flit[8];
  348. };
  349. struct tx_sw_desc;
  350. struct sge_txq {
  351. unsigned int in_use; /* # of in-use Tx descriptors */
  352. unsigned int size; /* # of descriptors */
  353. unsigned int cidx; /* SW consumer index */
  354. unsigned int pidx; /* producer index */
  355. unsigned long stops; /* # of times q has been stopped */
  356. unsigned long restarts; /* # of queue restarts */
  357. unsigned int cntxt_id; /* SGE context id for the Tx q */
  358. struct tx_desc *desc; /* address of HW Tx descriptor ring */
  359. struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
  360. struct sge_qstat *stat; /* queue status entry */
  361. dma_addr_t phys_addr; /* physical address of the ring */
  362. };
  363. struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */
  364. struct sge_txq q;
  365. struct netdev_queue *txq; /* associated netdev TX queue */
  366. unsigned long tso; /* # of TSO requests */
  367. unsigned long tx_cso; /* # of Tx checksum offloads */
  368. unsigned long vlan_ins; /* # of Tx VLAN insertions */
  369. unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
  370. } ____cacheline_aligned_in_smp;
  371. struct sge_ofld_txq { /* state for an SGE offload Tx queue */
  372. struct sge_txq q;
  373. struct adapter *adap;
  374. struct sk_buff_head sendq; /* list of backpressured packets */
  375. struct tasklet_struct qresume_tsk; /* restarts the queue */
  376. u8 full; /* the Tx ring is full */
  377. unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
  378. } ____cacheline_aligned_in_smp;
  379. struct sge_ctrl_txq { /* state for an SGE control Tx queue */
  380. struct sge_txq q;
  381. struct adapter *adap;
  382. struct sk_buff_head sendq; /* list of backpressured packets */
  383. struct tasklet_struct qresume_tsk; /* restarts the queue */
  384. u8 full; /* the Tx ring is full */
  385. } ____cacheline_aligned_in_smp;
  386. struct sge {
  387. struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
  388. struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS];
  389. struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
  390. struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
  391. struct sge_ofld_rxq ofldrxq[MAX_OFLD_QSETS];
  392. struct sge_ofld_rxq rdmarxq[MAX_RDMA_QUEUES];
  393. struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
  394. struct sge_rspq intrq ____cacheline_aligned_in_smp;
  395. spinlock_t intrq_lock;
  396. u16 max_ethqsets; /* # of available Ethernet queue sets */
  397. u16 ethqsets; /* # of active Ethernet queue sets */
  398. u16 ethtxq_rover; /* Tx queue to clean up next */
  399. u16 ofldqsets; /* # of active offload queue sets */
  400. u16 rdmaqs; /* # of available RDMA Rx queues */
  401. u16 ofld_rxq[MAX_OFLD_QSETS];
  402. u16 rdma_rxq[NCHAN];
  403. u16 timer_val[SGE_NTIMERS];
  404. u8 counter_val[SGE_NCOUNTERS];
  405. unsigned int starve_thres;
  406. u8 idma_state[2];
  407. void *egr_map[MAX_EGRQ]; /* qid->queue egress queue map */
  408. struct sge_rspq *ingr_map[MAX_INGQ]; /* qid->queue ingress queue map */
  409. DECLARE_BITMAP(starving_fl, MAX_EGRQ);
  410. DECLARE_BITMAP(txq_maperr, MAX_EGRQ);
  411. struct timer_list rx_timer; /* refills starving FLs */
  412. struct timer_list tx_timer; /* checks Tx queues */
  413. };
  414. #define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++)
  415. #define for_each_ofldrxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++)
  416. #define for_each_rdmarxq(sge, i) for (i = 0; i < (sge)->rdmaqs; i++)
  417. struct l2t_data;
  418. struct adapter {
  419. void __iomem *regs;
  420. struct pci_dev *pdev;
  421. struct device *pdev_dev;
  422. unsigned long registered_device_map;
  423. unsigned long flags;
  424. const char *name;
  425. int msg_enable;
  426. struct adapter_params params;
  427. struct cxgb4_virt_res vres;
  428. unsigned int swintr;
  429. unsigned int wol;
  430. struct {
  431. unsigned short vec;
  432. char desc[14];
  433. } msix_info[MAX_INGQ + 1];
  434. struct sge sge;
  435. struct net_device *port[MAX_NPORTS];
  436. u8 chan_map[NCHAN]; /* channel -> port map */
  437. struct l2t_data *l2t;
  438. void *uld_handle[CXGB4_ULD_MAX];
  439. struct list_head list_node;
  440. struct tid_info tids;
  441. void **tid_release_head;
  442. spinlock_t tid_release_lock;
  443. struct work_struct tid_release_task;
  444. bool tid_release_task_busy;
  445. struct dentry *debugfs_root;
  446. spinlock_t stats_lock;
  447. };
  448. static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
  449. {
  450. return readl(adap->regs + reg_addr);
  451. }
  452. static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val)
  453. {
  454. writel(val, adap->regs + reg_addr);
  455. }
  456. #ifndef readq
  457. static inline u64 readq(const volatile void __iomem *addr)
  458. {
  459. return readl(addr) + ((u64)readl(addr + 4) << 32);
  460. }
  461. static inline void writeq(u64 val, volatile void __iomem *addr)
  462. {
  463. writel(val, addr);
  464. writel(val >> 32, addr + 4);
  465. }
  466. #endif
  467. static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr)
  468. {
  469. return readq(adap->regs + reg_addr);
  470. }
  471. static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val)
  472. {
  473. writeq(val, adap->regs + reg_addr);
  474. }
  475. /**
  476. * netdev2pinfo - return the port_info structure associated with a net_device
  477. * @dev: the netdev
  478. *
  479. * Return the struct port_info associated with a net_device
  480. */
  481. static inline struct port_info *netdev2pinfo(const struct net_device *dev)
  482. {
  483. return netdev_priv(dev);
  484. }
  485. /**
  486. * adap2pinfo - return the port_info of a port
  487. * @adap: the adapter
  488. * @idx: the port index
  489. *
  490. * Return the port_info structure for the port of the given index.
  491. */
  492. static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
  493. {
  494. return netdev_priv(adap->port[idx]);
  495. }
  496. /**
  497. * netdev2adap - return the adapter structure associated with a net_device
  498. * @dev: the netdev
  499. *
  500. * Return the struct adapter associated with a net_device
  501. */
  502. static inline struct adapter *netdev2adap(const struct net_device *dev)
  503. {
  504. return netdev2pinfo(dev)->adapter;
  505. }
  506. void t4_os_portmod_changed(const struct adapter *adap, int port_id);
  507. void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat);
  508. void *t4_alloc_mem(size_t size);
  509. void t4_free_mem(void *addr);
  510. void t4_free_sge_resources(struct adapter *adap);
  511. irq_handler_t t4_intr_handler(struct adapter *adap);
  512. netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev);
  513. int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
  514. const struct pkt_gl *gl);
  515. int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
  516. int t4_ofld_send(struct adapter *adap, struct sk_buff *skb);
  517. int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
  518. struct net_device *dev, int intr_idx,
  519. struct sge_fl *fl, rspq_handler_t hnd);
  520. int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq,
  521. struct net_device *dev, struct netdev_queue *netdevq,
  522. unsigned int iqid);
  523. int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq,
  524. struct net_device *dev, unsigned int iqid,
  525. unsigned int cmplqid);
  526. int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq,
  527. struct net_device *dev, unsigned int iqid);
  528. irqreturn_t t4_sge_intr_msix(int irq, void *cookie);
  529. void t4_sge_init(struct adapter *adap);
  530. void t4_sge_start(struct adapter *adap);
  531. void t4_sge_stop(struct adapter *adap);
  532. #define for_each_port(adapter, iter) \
  533. for (iter = 0; iter < (adapter)->params.nports; ++iter)
  534. static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
  535. {
  536. return adap->params.vpd.cclk / 1000;
  537. }
  538. static inline unsigned int us_to_core_ticks(const struct adapter *adap,
  539. unsigned int us)
  540. {
  541. return (us * adap->params.vpd.cclk) / 1000;
  542. }
  543. void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
  544. u32 val);
  545. int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
  546. void *rpl, bool sleep_ok);
  547. static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
  548. int size, void *rpl)
  549. {
  550. return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
  551. }
  552. static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
  553. int size, void *rpl)
  554. {
  555. return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
  556. }
  557. void t4_intr_enable(struct adapter *adapter);
  558. void t4_intr_disable(struct adapter *adapter);
  559. void t4_intr_clear(struct adapter *adapter);
  560. int t4_slow_intr_handler(struct adapter *adapter);
  561. int t4_wait_dev_ready(struct adapter *adap);
  562. int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
  563. struct link_config *lc);
  564. int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
  565. int t4_seeprom_wp(struct adapter *adapter, bool enable);
  566. int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
  567. int t4_check_fw_version(struct adapter *adapter);
  568. int t4_prep_adapter(struct adapter *adapter);
  569. int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
  570. void t4_fatal_err(struct adapter *adapter);
  571. int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
  572. int filter_index, int enable);
  573. void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
  574. int filter_index, int *enabled);
  575. int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
  576. int start, int n, const u16 *rspq, unsigned int nrspq);
  577. int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
  578. unsigned int flags);
  579. int t4_read_rss(struct adapter *adapter, u16 *entries);
  580. int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
  581. int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
  582. u64 *parity);
  583. void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
  584. void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
  585. void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
  586. void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
  587. void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
  588. struct tp_tcp_stats *v6);
  589. void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
  590. const unsigned short *alpha, const unsigned short *beta);
  591. void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
  592. const u8 *addr);
  593. int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
  594. u64 mask0, u64 mask1, unsigned int crc, bool enable);
  595. int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
  596. enum dev_master master, enum dev_state *state);
  597. int t4_fw_bye(struct adapter *adap, unsigned int mbox);
  598. int t4_early_init(struct adapter *adap, unsigned int mbox);
  599. int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
  600. int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
  601. unsigned int vf, unsigned int nparams, const u32 *params,
  602. u32 *val);
  603. int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
  604. unsigned int vf, unsigned int nparams, const u32 *params,
  605. const u32 *val);
  606. int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
  607. unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
  608. unsigned int rxqi, unsigned int rxq, unsigned int tc,
  609. unsigned int vi, unsigned int cmask, unsigned int pmask,
  610. unsigned int nexact, unsigned int rcaps, unsigned int wxcaps);
  611. int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
  612. unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
  613. unsigned int *rss_size);
  614. int t4_free_vi(struct adapter *adap, unsigned int mbox, unsigned int pf,
  615. unsigned int vf, unsigned int viid);
  616. int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
  617. int mtu, int promisc, int all_multi, int bcast, int vlanex,
  618. bool sleep_ok);
  619. int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
  620. unsigned int viid, bool free, unsigned int naddr,
  621. const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok);
  622. int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
  623. int idx, const u8 *addr, bool persist, bool add_smt);
  624. int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
  625. bool ucast, u64 vec, bool sleep_ok);
  626. int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
  627. bool rx_en, bool tx_en);
  628. int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
  629. unsigned int nblinks);
  630. int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
  631. unsigned int mmd, unsigned int reg, u16 *valp);
  632. int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
  633. unsigned int mmd, unsigned int reg, u16 val);
  634. int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
  635. unsigned int pf, unsigned int vf, unsigned int iqid,
  636. unsigned int fl0id, unsigned int fl1id);
  637. int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
  638. unsigned int vf, unsigned int iqtype, unsigned int iqid,
  639. unsigned int fl0id, unsigned int fl1id);
  640. int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
  641. unsigned int vf, unsigned int eqid);
  642. int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
  643. unsigned int vf, unsigned int eqid);
  644. int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
  645. unsigned int vf, unsigned int eqid);
  646. int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
  647. #endif /* __CXGB4_H__ */