onenand_base.c 63 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright (C) 2005-2007 Samsung Electronics
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/onenand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <asm/io.h>
  21. /**
  22. * onenand_oob_64 - oob info for large (2KB) page
  23. */
  24. static struct nand_ecclayout onenand_oob_64 = {
  25. .eccbytes = 20,
  26. .eccpos = {
  27. 8, 9, 10, 11, 12,
  28. 24, 25, 26, 27, 28,
  29. 40, 41, 42, 43, 44,
  30. 56, 57, 58, 59, 60,
  31. },
  32. .oobfree = {
  33. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  34. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  35. }
  36. };
  37. /**
  38. * onenand_oob_32 - oob info for middle (1KB) page
  39. */
  40. static struct nand_ecclayout onenand_oob_32 = {
  41. .eccbytes = 10,
  42. .eccpos = {
  43. 8, 9, 10, 11, 12,
  44. 24, 25, 26, 27, 28,
  45. },
  46. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  47. };
  48. static const unsigned char ffchars[] = {
  49. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  50. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  51. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  52. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  53. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  54. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  55. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  56. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  57. };
  58. /**
  59. * onenand_readw - [OneNAND Interface] Read OneNAND register
  60. * @param addr address to read
  61. *
  62. * Read OneNAND register
  63. */
  64. static unsigned short onenand_readw(void __iomem *addr)
  65. {
  66. return readw(addr);
  67. }
  68. /**
  69. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  70. * @param value value to write
  71. * @param addr address to write
  72. *
  73. * Write OneNAND register with value
  74. */
  75. static void onenand_writew(unsigned short value, void __iomem *addr)
  76. {
  77. writew(value, addr);
  78. }
  79. /**
  80. * onenand_block_address - [DEFAULT] Get block address
  81. * @param this onenand chip data structure
  82. * @param block the block
  83. * @return translated block address if DDP, otherwise same
  84. *
  85. * Setup Start Address 1 Register (F100h)
  86. */
  87. static int onenand_block_address(struct onenand_chip *this, int block)
  88. {
  89. /* Device Flash Core select, NAND Flash Block Address */
  90. if (block & this->density_mask)
  91. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  92. return block;
  93. }
  94. /**
  95. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  96. * @param this onenand chip data structure
  97. * @param block the block
  98. * @return set DBS value if DDP, otherwise 0
  99. *
  100. * Setup Start Address 2 Register (F101h) for DDP
  101. */
  102. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  103. {
  104. /* Device BufferRAM Select */
  105. if (block & this->density_mask)
  106. return ONENAND_DDP_CHIP1;
  107. return ONENAND_DDP_CHIP0;
  108. }
  109. /**
  110. * onenand_page_address - [DEFAULT] Get page address
  111. * @param page the page address
  112. * @param sector the sector address
  113. * @return combined page and sector address
  114. *
  115. * Setup Start Address 8 Register (F107h)
  116. */
  117. static int onenand_page_address(int page, int sector)
  118. {
  119. /* Flash Page Address, Flash Sector Address */
  120. int fpa, fsa;
  121. fpa = page & ONENAND_FPA_MASK;
  122. fsa = sector & ONENAND_FSA_MASK;
  123. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  124. }
  125. /**
  126. * onenand_buffer_address - [DEFAULT] Get buffer address
  127. * @param dataram1 DataRAM index
  128. * @param sectors the sector address
  129. * @param count the number of sectors
  130. * @return the start buffer value
  131. *
  132. * Setup Start Buffer Register (F200h)
  133. */
  134. static int onenand_buffer_address(int dataram1, int sectors, int count)
  135. {
  136. int bsa, bsc;
  137. /* BufferRAM Sector Address */
  138. bsa = sectors & ONENAND_BSA_MASK;
  139. if (dataram1)
  140. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  141. else
  142. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  143. /* BufferRAM Sector Count */
  144. bsc = count & ONENAND_BSC_MASK;
  145. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  146. }
  147. /**
  148. * onenand_command - [DEFAULT] Send command to OneNAND device
  149. * @param mtd MTD device structure
  150. * @param cmd the command to be sent
  151. * @param addr offset to read from or write to
  152. * @param len number of bytes to read or write
  153. *
  154. * Send command to OneNAND device. This function is used for middle/large page
  155. * devices (1KB/2KB Bytes per page)
  156. */
  157. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  158. {
  159. struct onenand_chip *this = mtd->priv;
  160. int value, readcmd = 0, block_cmd = 0;
  161. int block, page;
  162. /* Address translation */
  163. switch (cmd) {
  164. case ONENAND_CMD_UNLOCK:
  165. case ONENAND_CMD_LOCK:
  166. case ONENAND_CMD_LOCK_TIGHT:
  167. case ONENAND_CMD_UNLOCK_ALL:
  168. block = -1;
  169. page = -1;
  170. break;
  171. case ONENAND_CMD_ERASE:
  172. case ONENAND_CMD_BUFFERRAM:
  173. case ONENAND_CMD_OTP_ACCESS:
  174. block_cmd = 1;
  175. block = (int) (addr >> this->erase_shift);
  176. page = -1;
  177. break;
  178. default:
  179. block = (int) (addr >> this->erase_shift);
  180. page = (int) (addr >> this->page_shift);
  181. page &= this->page_mask;
  182. break;
  183. }
  184. /* NOTE: The setting order of the registers is very important! */
  185. if (cmd == ONENAND_CMD_BUFFERRAM) {
  186. /* Select DataRAM for DDP */
  187. value = onenand_bufferram_address(this, block);
  188. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  189. /* Switch to the next data buffer */
  190. ONENAND_SET_NEXT_BUFFERRAM(this);
  191. return 0;
  192. }
  193. if (block != -1) {
  194. /* Write 'DFS, FBA' of Flash */
  195. value = onenand_block_address(this, block);
  196. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  197. if (block_cmd) {
  198. /* Select DataRAM for DDP */
  199. value = onenand_bufferram_address(this, block);
  200. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  201. }
  202. }
  203. if (page != -1) {
  204. /* Now we use page size operation */
  205. int sectors = 4, count = 4;
  206. int dataram;
  207. switch (cmd) {
  208. case ONENAND_CMD_READ:
  209. case ONENAND_CMD_READOOB:
  210. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  211. readcmd = 1;
  212. break;
  213. default:
  214. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  215. break;
  216. }
  217. /* Write 'FPA, FSA' of Flash */
  218. value = onenand_page_address(page, sectors);
  219. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  220. /* Write 'BSA, BSC' of DataRAM */
  221. value = onenand_buffer_address(dataram, sectors, count);
  222. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  223. if (readcmd) {
  224. /* Select DataRAM for DDP */
  225. value = onenand_bufferram_address(this, block);
  226. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  227. }
  228. }
  229. /* Interrupt clear */
  230. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  231. /* Write command */
  232. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  233. return 0;
  234. }
  235. /**
  236. * onenand_wait - [DEFAULT] wait until the command is done
  237. * @param mtd MTD device structure
  238. * @param state state to select the max. timeout value
  239. *
  240. * Wait for command done. This applies to all OneNAND command
  241. * Read can take up to 30us, erase up to 2ms and program up to 350us
  242. * according to general OneNAND specs
  243. */
  244. static int onenand_wait(struct mtd_info *mtd, int state)
  245. {
  246. struct onenand_chip * this = mtd->priv;
  247. unsigned long timeout;
  248. unsigned int flags = ONENAND_INT_MASTER;
  249. unsigned int interrupt = 0;
  250. unsigned int ctrl;
  251. /* The 20 msec is enough */
  252. timeout = jiffies + msecs_to_jiffies(20);
  253. while (time_before(jiffies, timeout)) {
  254. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  255. if (interrupt & flags)
  256. break;
  257. if (state != FL_READING)
  258. cond_resched();
  259. }
  260. /* To get correct interrupt status in timeout case */
  261. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  262. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  263. if (ctrl & ONENAND_CTRL_ERROR) {
  264. printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
  265. if (ctrl & ONENAND_CTRL_LOCK)
  266. printk(KERN_ERR "onenand_wait: it's locked error.\n");
  267. return ctrl;
  268. }
  269. if (interrupt & ONENAND_INT_READ) {
  270. int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  271. if (ecc) {
  272. printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
  273. if (ecc & ONENAND_ECC_2BIT_ALL) {
  274. mtd->ecc_stats.failed++;
  275. return ecc;
  276. } else if (ecc & ONENAND_ECC_1BIT_ALL)
  277. mtd->ecc_stats.corrected++;
  278. }
  279. } else if (state == FL_READING) {
  280. printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
  281. return -EIO;
  282. }
  283. return 0;
  284. }
  285. /*
  286. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  287. * @param irq onenand interrupt number
  288. * @param dev_id interrupt data
  289. *
  290. * complete the work
  291. */
  292. static irqreturn_t onenand_interrupt(int irq, void *data)
  293. {
  294. struct onenand_chip *this = (struct onenand_chip *) data;
  295. /* To handle shared interrupt */
  296. if (!this->complete.done)
  297. complete(&this->complete);
  298. return IRQ_HANDLED;
  299. }
  300. /*
  301. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  302. * @param mtd MTD device structure
  303. * @param state state to select the max. timeout value
  304. *
  305. * Wait for command done.
  306. */
  307. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  308. {
  309. struct onenand_chip *this = mtd->priv;
  310. wait_for_completion(&this->complete);
  311. return onenand_wait(mtd, state);
  312. }
  313. /*
  314. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  315. * @param mtd MTD device structure
  316. * @param state state to select the max. timeout value
  317. *
  318. * Try interrupt based wait (It is used one-time)
  319. */
  320. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  321. {
  322. struct onenand_chip *this = mtd->priv;
  323. unsigned long remain, timeout;
  324. /* We use interrupt wait first */
  325. this->wait = onenand_interrupt_wait;
  326. timeout = msecs_to_jiffies(100);
  327. remain = wait_for_completion_timeout(&this->complete, timeout);
  328. if (!remain) {
  329. printk(KERN_INFO "OneNAND: There's no interrupt. "
  330. "We use the normal wait\n");
  331. /* Release the irq */
  332. free_irq(this->irq, this);
  333. this->wait = onenand_wait;
  334. }
  335. return onenand_wait(mtd, state);
  336. }
  337. /*
  338. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  339. * @param mtd MTD device structure
  340. *
  341. * There's two method to wait onenand work
  342. * 1. polling - read interrupt status register
  343. * 2. interrupt - use the kernel interrupt method
  344. */
  345. static void onenand_setup_wait(struct mtd_info *mtd)
  346. {
  347. struct onenand_chip *this = mtd->priv;
  348. int syscfg;
  349. init_completion(&this->complete);
  350. if (this->irq <= 0) {
  351. this->wait = onenand_wait;
  352. return;
  353. }
  354. if (request_irq(this->irq, &onenand_interrupt,
  355. IRQF_SHARED, "onenand", this)) {
  356. /* If we can't get irq, use the normal wait */
  357. this->wait = onenand_wait;
  358. return;
  359. }
  360. /* Enable interrupt */
  361. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  362. syscfg |= ONENAND_SYS_CFG1_IOBE;
  363. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  364. this->wait = onenand_try_interrupt_wait;
  365. }
  366. /**
  367. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  368. * @param mtd MTD data structure
  369. * @param area BufferRAM area
  370. * @return offset given area
  371. *
  372. * Return BufferRAM offset given area
  373. */
  374. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  375. {
  376. struct onenand_chip *this = mtd->priv;
  377. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  378. if (area == ONENAND_DATARAM)
  379. return mtd->writesize;
  380. if (area == ONENAND_SPARERAM)
  381. return mtd->oobsize;
  382. }
  383. return 0;
  384. }
  385. /**
  386. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  387. * @param mtd MTD data structure
  388. * @param area BufferRAM area
  389. * @param buffer the databuffer to put/get data
  390. * @param offset offset to read from or write to
  391. * @param count number of bytes to read/write
  392. *
  393. * Read the BufferRAM area
  394. */
  395. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  396. unsigned char *buffer, int offset, size_t count)
  397. {
  398. struct onenand_chip *this = mtd->priv;
  399. void __iomem *bufferram;
  400. bufferram = this->base + area;
  401. bufferram += onenand_bufferram_offset(mtd, area);
  402. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  403. unsigned short word;
  404. /* Align with word(16-bit) size */
  405. count--;
  406. /* Read word and save byte */
  407. word = this->read_word(bufferram + offset + count);
  408. buffer[count] = (word & 0xff);
  409. }
  410. memcpy(buffer, bufferram + offset, count);
  411. return 0;
  412. }
  413. /**
  414. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  415. * @param mtd MTD data structure
  416. * @param area BufferRAM area
  417. * @param buffer the databuffer to put/get data
  418. * @param offset offset to read from or write to
  419. * @param count number of bytes to read/write
  420. *
  421. * Read the BufferRAM area with Sync. Burst Mode
  422. */
  423. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  424. unsigned char *buffer, int offset, size_t count)
  425. {
  426. struct onenand_chip *this = mtd->priv;
  427. void __iomem *bufferram;
  428. bufferram = this->base + area;
  429. bufferram += onenand_bufferram_offset(mtd, area);
  430. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  431. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  432. unsigned short word;
  433. /* Align with word(16-bit) size */
  434. count--;
  435. /* Read word and save byte */
  436. word = this->read_word(bufferram + offset + count);
  437. buffer[count] = (word & 0xff);
  438. }
  439. memcpy(buffer, bufferram + offset, count);
  440. this->mmcontrol(mtd, 0);
  441. return 0;
  442. }
  443. /**
  444. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  445. * @param mtd MTD data structure
  446. * @param area BufferRAM area
  447. * @param buffer the databuffer to put/get data
  448. * @param offset offset to read from or write to
  449. * @param count number of bytes to read/write
  450. *
  451. * Write the BufferRAM area
  452. */
  453. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  454. const unsigned char *buffer, int offset, size_t count)
  455. {
  456. struct onenand_chip *this = mtd->priv;
  457. void __iomem *bufferram;
  458. bufferram = this->base + area;
  459. bufferram += onenand_bufferram_offset(mtd, area);
  460. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  461. unsigned short word;
  462. int byte_offset;
  463. /* Align with word(16-bit) size */
  464. count--;
  465. /* Calculate byte access offset */
  466. byte_offset = offset + count;
  467. /* Read word and save byte */
  468. word = this->read_word(bufferram + byte_offset);
  469. word = (word & ~0xff) | buffer[count];
  470. this->write_word(word, bufferram + byte_offset);
  471. }
  472. memcpy(bufferram + offset, buffer, count);
  473. return 0;
  474. }
  475. /**
  476. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  477. * @param mtd MTD data structure
  478. * @param addr address to check
  479. * @return 1 if there are valid data, otherwise 0
  480. *
  481. * Check bufferram if there is data we required
  482. */
  483. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  484. {
  485. struct onenand_chip *this = mtd->priv;
  486. int blockpage, found = 0;
  487. unsigned int i;
  488. blockpage = (int) (addr >> this->page_shift);
  489. /* Is there valid data? */
  490. i = ONENAND_CURRENT_BUFFERRAM(this);
  491. if (this->bufferram[i].blockpage == blockpage)
  492. found = 1;
  493. else {
  494. /* Check another BufferRAM */
  495. i = ONENAND_NEXT_BUFFERRAM(this);
  496. if (this->bufferram[i].blockpage == blockpage) {
  497. ONENAND_SET_NEXT_BUFFERRAM(this);
  498. found = 1;
  499. }
  500. }
  501. if (found && ONENAND_IS_DDP(this)) {
  502. /* Select DataRAM for DDP */
  503. int block = (int) (addr >> this->erase_shift);
  504. int value = onenand_bufferram_address(this, block);
  505. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  506. }
  507. return found;
  508. }
  509. /**
  510. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  511. * @param mtd MTD data structure
  512. * @param addr address to update
  513. * @param valid valid flag
  514. *
  515. * Update BufferRAM information
  516. */
  517. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  518. int valid)
  519. {
  520. struct onenand_chip *this = mtd->priv;
  521. int blockpage;
  522. unsigned int i;
  523. blockpage = (int) (addr >> this->page_shift);
  524. /* Invalidate another BufferRAM */
  525. i = ONENAND_NEXT_BUFFERRAM(this);
  526. if (this->bufferram[i].blockpage == blockpage)
  527. this->bufferram[i].blockpage = -1;
  528. /* Update BufferRAM */
  529. i = ONENAND_CURRENT_BUFFERRAM(this);
  530. if (valid)
  531. this->bufferram[i].blockpage = blockpage;
  532. else
  533. this->bufferram[i].blockpage = -1;
  534. }
  535. /**
  536. * onenand_get_device - [GENERIC] Get chip for selected access
  537. * @param mtd MTD device structure
  538. * @param new_state the state which is requested
  539. *
  540. * Get the device and lock it for exclusive access
  541. */
  542. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  543. {
  544. struct onenand_chip *this = mtd->priv;
  545. DECLARE_WAITQUEUE(wait, current);
  546. /*
  547. * Grab the lock and see if the device is available
  548. */
  549. while (1) {
  550. spin_lock(&this->chip_lock);
  551. if (this->state == FL_READY) {
  552. this->state = new_state;
  553. spin_unlock(&this->chip_lock);
  554. break;
  555. }
  556. if (new_state == FL_PM_SUSPENDED) {
  557. spin_unlock(&this->chip_lock);
  558. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  559. }
  560. set_current_state(TASK_UNINTERRUPTIBLE);
  561. add_wait_queue(&this->wq, &wait);
  562. spin_unlock(&this->chip_lock);
  563. schedule();
  564. remove_wait_queue(&this->wq, &wait);
  565. }
  566. return 0;
  567. }
  568. /**
  569. * onenand_release_device - [GENERIC] release chip
  570. * @param mtd MTD device structure
  571. *
  572. * Deselect, release chip lock and wake up anyone waiting on the device
  573. */
  574. static void onenand_release_device(struct mtd_info *mtd)
  575. {
  576. struct onenand_chip *this = mtd->priv;
  577. /* Release the chip */
  578. spin_lock(&this->chip_lock);
  579. this->state = FL_READY;
  580. wake_up(&this->wq);
  581. spin_unlock(&this->chip_lock);
  582. }
  583. /**
  584. * onenand_read - [MTD Interface] Read data from flash
  585. * @param mtd MTD device structure
  586. * @param from offset to read from
  587. * @param len number of bytes to read
  588. * @param retlen pointer to variable to store the number of read bytes
  589. * @param buf the databuffer to put data
  590. *
  591. * Read with ecc
  592. */
  593. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  594. size_t *retlen, u_char *buf)
  595. {
  596. struct onenand_chip *this = mtd->priv;
  597. struct mtd_ecc_stats stats;
  598. int read = 0, column;
  599. int thislen;
  600. int ret = 0, boundary = 0;
  601. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  602. /* Do not allow reads past end of device */
  603. if ((from + len) > mtd->size) {
  604. printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
  605. *retlen = 0;
  606. return -EINVAL;
  607. }
  608. /* Grab the lock and see if the device is available */
  609. onenand_get_device(mtd, FL_READING);
  610. stats = mtd->ecc_stats;
  611. /* Read-while-load method */
  612. /* Do first load to bufferRAM */
  613. if (read < len) {
  614. if (!onenand_check_bufferram(mtd, from)) {
  615. this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
  616. ret = this->wait(mtd, FL_READING);
  617. onenand_update_bufferram(mtd, from, !ret);
  618. }
  619. }
  620. thislen = min_t(int, mtd->writesize, len - read);
  621. column = from & (mtd->writesize - 1);
  622. if (column + thislen > mtd->writesize)
  623. thislen = mtd->writesize - column;
  624. while (!ret) {
  625. /* If there is more to load then start next load */
  626. from += thislen;
  627. if (read + thislen < len) {
  628. this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
  629. /*
  630. * Chip boundary handling in DDP
  631. * Now we issued chip 1 read and pointed chip 1
  632. * bufferam so we have to point chip 0 bufferam.
  633. */
  634. if (ONENAND_IS_DDP(this) &&
  635. unlikely(from == (this->chipsize >> 1))) {
  636. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  637. boundary = 1;
  638. } else
  639. boundary = 0;
  640. ONENAND_SET_PREV_BUFFERRAM(this);
  641. }
  642. /* While load is going, read from last bufferRAM */
  643. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  644. /* See if we are done */
  645. read += thislen;
  646. if (read == len)
  647. break;
  648. /* Set up for next read from bufferRAM */
  649. if (unlikely(boundary))
  650. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  651. ONENAND_SET_NEXT_BUFFERRAM(this);
  652. buf += thislen;
  653. thislen = min_t(int, mtd->writesize, len - read);
  654. column = 0;
  655. cond_resched();
  656. /* Now wait for load */
  657. ret = this->wait(mtd, FL_READING);
  658. onenand_update_bufferram(mtd, from, !ret);
  659. }
  660. /* Deselect and wake up anyone waiting on the device */
  661. onenand_release_device(mtd);
  662. /*
  663. * Return success, if no ECC failures, else -EBADMSG
  664. * fs driver will take care of that, because
  665. * retlen == desired len and result == -EBADMSG
  666. */
  667. *retlen = read;
  668. if (mtd->ecc_stats.failed - stats.failed)
  669. return -EBADMSG;
  670. if (ret)
  671. return ret;
  672. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  673. }
  674. /**
  675. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  676. * @param mtd MTD device structure
  677. * @param buf destination address
  678. * @param column oob offset to read from
  679. * @param thislen oob length to read
  680. */
  681. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  682. int thislen)
  683. {
  684. struct onenand_chip *this = mtd->priv;
  685. struct nand_oobfree *free;
  686. int readcol = column;
  687. int readend = column + thislen;
  688. int lastgap = 0;
  689. uint8_t *oob_buf = this->page_buf + mtd->writesize;
  690. for (free = this->ecclayout->oobfree; free->length; ++free) {
  691. if (readcol >= lastgap)
  692. readcol += free->offset - lastgap;
  693. if (readend >= lastgap)
  694. readend += free->offset - lastgap;
  695. lastgap = free->offset + free->length;
  696. }
  697. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  698. for (free = this->ecclayout->oobfree; free->length; ++free) {
  699. int free_end = free->offset + free->length;
  700. if (free->offset < readend && free_end > readcol) {
  701. int st = max_t(int,free->offset,readcol);
  702. int ed = min_t(int,free_end,readend);
  703. int n = ed - st;
  704. memcpy(buf, oob_buf + st, n);
  705. buf += n;
  706. }
  707. }
  708. return 0;
  709. }
  710. /**
  711. * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
  712. * @param mtd MTD device structure
  713. * @param from offset to read from
  714. * @param len number of bytes to read
  715. * @param retlen pointer to variable to store the number of read bytes
  716. * @param buf the databuffer to put data
  717. * @param mode operation mode
  718. *
  719. * OneNAND read out-of-band data from the spare area
  720. */
  721. static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
  722. size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
  723. {
  724. struct onenand_chip *this = mtd->priv;
  725. int read = 0, thislen, column, oobsize;
  726. int ret = 0;
  727. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  728. /* Initialize return length value */
  729. *retlen = 0;
  730. if (mode == MTD_OOB_AUTO)
  731. oobsize = this->ecclayout->oobavail;
  732. else
  733. oobsize = mtd->oobsize;
  734. column = from & (mtd->oobsize - 1);
  735. if (unlikely(column >= oobsize)) {
  736. printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
  737. return -EINVAL;
  738. }
  739. /* Do not allow reads past end of device */
  740. if (unlikely(from >= mtd->size ||
  741. column + len > ((mtd->size >> this->page_shift) -
  742. (from >> this->page_shift)) * oobsize)) {
  743. printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
  744. return -EINVAL;
  745. }
  746. /* Grab the lock and see if the device is available */
  747. onenand_get_device(mtd, FL_READING);
  748. while (read < len) {
  749. cond_resched();
  750. thislen = oobsize - column;
  751. thislen = min_t(int, thislen, len);
  752. this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
  753. onenand_update_bufferram(mtd, from, 0);
  754. ret = this->wait(mtd, FL_READING);
  755. /* First copy data and check return value for ECC handling */
  756. if (mode == MTD_OOB_AUTO)
  757. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  758. else
  759. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  760. if (ret) {
  761. printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
  762. break;
  763. }
  764. read += thislen;
  765. if (read == len)
  766. break;
  767. buf += thislen;
  768. /* Read more? */
  769. if (read < len) {
  770. /* Page size */
  771. from += mtd->writesize;
  772. column = 0;
  773. }
  774. }
  775. /* Deselect and wake up anyone waiting on the device */
  776. onenand_release_device(mtd);
  777. *retlen = read;
  778. return ret;
  779. }
  780. /**
  781. * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
  782. * @mtd: MTD device structure
  783. * @from: offset to read from
  784. * @ops: oob operation description structure
  785. */
  786. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  787. struct mtd_oob_ops *ops)
  788. {
  789. switch (ops->mode) {
  790. case MTD_OOB_PLACE:
  791. case MTD_OOB_AUTO:
  792. break;
  793. case MTD_OOB_RAW:
  794. /* Not implemented yet */
  795. default:
  796. return -EINVAL;
  797. }
  798. return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
  799. &ops->oobretlen, ops->oobbuf, ops->mode);
  800. }
  801. /**
  802. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  803. * @param mtd MTD device structure
  804. * @param state state to select the max. timeout value
  805. *
  806. * Wait for command done.
  807. */
  808. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  809. {
  810. struct onenand_chip *this = mtd->priv;
  811. unsigned long timeout;
  812. unsigned int interrupt;
  813. unsigned int ctrl;
  814. /* The 20 msec is enough */
  815. timeout = jiffies + msecs_to_jiffies(20);
  816. while (time_before(jiffies, timeout)) {
  817. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  818. if (interrupt & ONENAND_INT_MASTER)
  819. break;
  820. }
  821. /* To get correct interrupt status in timeout case */
  822. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  823. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  824. if (ctrl & ONENAND_CTRL_ERROR) {
  825. printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
  826. /* Initial bad block case */
  827. if (ctrl & ONENAND_CTRL_LOAD)
  828. return ONENAND_BBT_READ_ERROR;
  829. return ONENAND_BBT_READ_FATAL_ERROR;
  830. }
  831. if (interrupt & ONENAND_INT_READ) {
  832. int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  833. if (ecc & ONENAND_ECC_2BIT_ALL)
  834. return ONENAND_BBT_READ_ERROR;
  835. } else {
  836. printk(KERN_ERR "onenand_bbt_wait: read timeout!"
  837. "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
  838. return ONENAND_BBT_READ_FATAL_ERROR;
  839. }
  840. return 0;
  841. }
  842. /**
  843. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  844. * @param mtd MTD device structure
  845. * @param from offset to read from
  846. * @param @ops oob operation description structure
  847. *
  848. * OneNAND read out-of-band data from the spare area for bbt scan
  849. */
  850. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  851. struct mtd_oob_ops *ops)
  852. {
  853. struct onenand_chip *this = mtd->priv;
  854. int read = 0, thislen, column;
  855. int ret = 0;
  856. size_t len = ops->ooblen;
  857. u_char *buf = ops->oobbuf;
  858. DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, len);
  859. /* Initialize return value */
  860. ops->oobretlen = 0;
  861. /* Do not allow reads past end of device */
  862. if (unlikely((from + len) > mtd->size)) {
  863. printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
  864. return ONENAND_BBT_READ_FATAL_ERROR;
  865. }
  866. /* Grab the lock and see if the device is available */
  867. onenand_get_device(mtd, FL_READING);
  868. column = from & (mtd->oobsize - 1);
  869. while (read < len) {
  870. cond_resched();
  871. thislen = mtd->oobsize - column;
  872. thislen = min_t(int, thislen, len);
  873. this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
  874. onenand_update_bufferram(mtd, from, 0);
  875. ret = onenand_bbt_wait(mtd, FL_READING);
  876. if (ret)
  877. break;
  878. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  879. read += thislen;
  880. if (read == len)
  881. break;
  882. buf += thislen;
  883. /* Read more? */
  884. if (read < len) {
  885. /* Update Page size */
  886. from += mtd->writesize;
  887. column = 0;
  888. }
  889. }
  890. /* Deselect and wake up anyone waiting on the device */
  891. onenand_release_device(mtd);
  892. ops->oobretlen = read;
  893. return ret;
  894. }
  895. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  896. /**
  897. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  898. * @param mtd MTD device structure
  899. * @param buf the databuffer to verify
  900. * @param to offset to read from
  901. *
  902. */
  903. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  904. {
  905. struct onenand_chip *this = mtd->priv;
  906. char *readp = this->page_buf + mtd->writesize;
  907. int status, i;
  908. this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
  909. onenand_update_bufferram(mtd, to, 0);
  910. status = this->wait(mtd, FL_READING);
  911. if (status)
  912. return status;
  913. this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
  914. for(i = 0; i < mtd->oobsize; i++)
  915. if (buf[i] != 0xFF && buf[i] != readp[i])
  916. return -EBADMSG;
  917. return 0;
  918. }
  919. /**
  920. * onenand_verify - [GENERIC] verify the chip contents after a write
  921. * @param mtd MTD device structure
  922. * @param buf the databuffer to verify
  923. * @param addr offset to read from
  924. * @param len number of bytes to read and compare
  925. *
  926. */
  927. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  928. {
  929. struct onenand_chip *this = mtd->priv;
  930. void __iomem *dataram;
  931. int ret = 0;
  932. int thislen, column;
  933. while (len != 0) {
  934. thislen = min_t(int, mtd->writesize, len);
  935. column = addr & (mtd->writesize - 1);
  936. if (column + thislen > mtd->writesize)
  937. thislen = mtd->writesize - column;
  938. this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
  939. onenand_update_bufferram(mtd, addr, 0);
  940. ret = this->wait(mtd, FL_READING);
  941. if (ret)
  942. return ret;
  943. onenand_update_bufferram(mtd, addr, 1);
  944. dataram = this->base + ONENAND_DATARAM;
  945. dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
  946. if (memcmp(buf, dataram + column, thislen))
  947. return -EBADMSG;
  948. len -= thislen;
  949. buf += thislen;
  950. addr += thislen;
  951. }
  952. return 0;
  953. }
  954. #else
  955. #define onenand_verify(...) (0)
  956. #define onenand_verify_oob(...) (0)
  957. #endif
  958. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  959. /**
  960. * onenand_write - [MTD Interface] write buffer to FLASH
  961. * @param mtd MTD device structure
  962. * @param to offset to write to
  963. * @param len number of bytes to write
  964. * @param retlen pointer to variable to store the number of written bytes
  965. * @param buf the data to write
  966. *
  967. * Write with ECC
  968. */
  969. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  970. size_t *retlen, const u_char *buf)
  971. {
  972. struct onenand_chip *this = mtd->priv;
  973. int written = 0;
  974. int ret = 0;
  975. int column, subpage;
  976. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  977. /* Initialize retlen, in case of early exit */
  978. *retlen = 0;
  979. /* Do not allow writes past end of device */
  980. if (unlikely((to + len) > mtd->size)) {
  981. printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
  982. return -EINVAL;
  983. }
  984. /* Reject writes, which are not page aligned */
  985. if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
  986. printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
  987. return -EINVAL;
  988. }
  989. column = to & (mtd->writesize - 1);
  990. /* Grab the lock and see if the device is available */
  991. onenand_get_device(mtd, FL_WRITING);
  992. /* Loop until all data write */
  993. while (written < len) {
  994. int thislen = min_t(int, mtd->writesize - column, len - written);
  995. u_char *wbuf = (u_char *) buf;
  996. cond_resched();
  997. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  998. /* Partial page write */
  999. subpage = thislen < mtd->writesize;
  1000. if (subpage) {
  1001. memset(this->page_buf, 0xff, mtd->writesize);
  1002. memcpy(this->page_buf + column, buf, thislen);
  1003. wbuf = this->page_buf;
  1004. }
  1005. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1006. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  1007. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1008. ret = this->wait(mtd, FL_WRITING);
  1009. /* In partial page write we don't update bufferram */
  1010. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1011. if (ret) {
  1012. printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
  1013. break;
  1014. }
  1015. /* Only check verify write turn on */
  1016. ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
  1017. if (ret) {
  1018. printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
  1019. break;
  1020. }
  1021. written += thislen;
  1022. if (written == len)
  1023. break;
  1024. column = 0;
  1025. to += thislen;
  1026. buf += thislen;
  1027. }
  1028. /* Deselect and wake up anyone waiting on the device */
  1029. onenand_release_device(mtd);
  1030. *retlen = written;
  1031. return ret;
  1032. }
  1033. /**
  1034. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  1035. * @param mtd MTD device structure
  1036. * @param oob_buf oob buffer
  1037. * @param buf source address
  1038. * @param column oob offset to write to
  1039. * @param thislen oob length to write
  1040. */
  1041. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1042. const u_char *buf, int column, int thislen)
  1043. {
  1044. struct onenand_chip *this = mtd->priv;
  1045. struct nand_oobfree *free;
  1046. int writecol = column;
  1047. int writeend = column + thislen;
  1048. int lastgap = 0;
  1049. for (free = this->ecclayout->oobfree; free->length; ++free) {
  1050. if (writecol >= lastgap)
  1051. writecol += free->offset - lastgap;
  1052. if (writeend >= lastgap)
  1053. writeend += free->offset - lastgap;
  1054. lastgap = free->offset + free->length;
  1055. }
  1056. for (free = this->ecclayout->oobfree; free->length; ++free) {
  1057. int free_end = free->offset + free->length;
  1058. if (free->offset < writeend && free_end > writecol) {
  1059. int st = max_t(int,free->offset,writecol);
  1060. int ed = min_t(int,free_end,writeend);
  1061. int n = ed - st;
  1062. memcpy(oob_buf + st, buf, n);
  1063. buf += n;
  1064. }
  1065. }
  1066. return 0;
  1067. }
  1068. /**
  1069. * onenand_do_write_oob - [Internal] OneNAND write out-of-band
  1070. * @param mtd MTD device structure
  1071. * @param to offset to write to
  1072. * @param len number of bytes to write
  1073. * @param retlen pointer to variable to store the number of written bytes
  1074. * @param buf the data to write
  1075. * @param mode operation mode
  1076. *
  1077. * OneNAND write out-of-band
  1078. */
  1079. static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
  1080. size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
  1081. {
  1082. struct onenand_chip *this = mtd->priv;
  1083. int column, ret = 0, oobsize;
  1084. int written = 0;
  1085. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  1086. /* Initialize retlen, in case of early exit */
  1087. *retlen = 0;
  1088. if (mode == MTD_OOB_AUTO)
  1089. oobsize = this->ecclayout->oobavail;
  1090. else
  1091. oobsize = mtd->oobsize;
  1092. column = to & (mtd->oobsize - 1);
  1093. if (unlikely(column >= oobsize)) {
  1094. printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
  1095. return -EINVAL;
  1096. }
  1097. /* For compatibility with NAND: Do not allow write past end of page */
  1098. if (column + len > oobsize) {
  1099. printk(KERN_ERR "onenand_write_oob: "
  1100. "Attempt to write past end of page\n");
  1101. return -EINVAL;
  1102. }
  1103. /* Do not allow reads past end of device */
  1104. if (unlikely(to >= mtd->size ||
  1105. column + len > ((mtd->size >> this->page_shift) -
  1106. (to >> this->page_shift)) * oobsize)) {
  1107. printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
  1108. return -EINVAL;
  1109. }
  1110. /* Grab the lock and see if the device is available */
  1111. onenand_get_device(mtd, FL_WRITING);
  1112. /* Loop until all data write */
  1113. while (written < len) {
  1114. int thislen = min_t(int, oobsize, len - written);
  1115. cond_resched();
  1116. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1117. /* We send data to spare ram with oobsize
  1118. * to prevent byte access */
  1119. memset(this->page_buf, 0xff, mtd->oobsize);
  1120. if (mode == MTD_OOB_AUTO)
  1121. onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
  1122. else
  1123. memcpy(this->page_buf + column, buf, thislen);
  1124. this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
  1125. this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  1126. onenand_update_bufferram(mtd, to, 0);
  1127. ret = this->wait(mtd, FL_WRITING);
  1128. if (ret) {
  1129. printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
  1130. break;
  1131. }
  1132. ret = onenand_verify_oob(mtd, this->page_buf, to);
  1133. if (ret) {
  1134. printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
  1135. break;
  1136. }
  1137. written += thislen;
  1138. if (written == len)
  1139. break;
  1140. to += mtd->writesize;
  1141. buf += thislen;
  1142. column = 0;
  1143. }
  1144. /* Deselect and wake up anyone waiting on the device */
  1145. onenand_release_device(mtd);
  1146. *retlen = written;
  1147. return ret;
  1148. }
  1149. /**
  1150. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1151. * @mtd: MTD device structure
  1152. * @from: offset to read from
  1153. * @ops: oob operation description structure
  1154. */
  1155. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1156. struct mtd_oob_ops *ops)
  1157. {
  1158. switch (ops->mode) {
  1159. case MTD_OOB_PLACE:
  1160. case MTD_OOB_AUTO:
  1161. break;
  1162. case MTD_OOB_RAW:
  1163. /* Not implemented yet */
  1164. default:
  1165. return -EINVAL;
  1166. }
  1167. return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
  1168. &ops->oobretlen, ops->oobbuf, ops->mode);
  1169. }
  1170. /**
  1171. * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
  1172. * @param mtd MTD device structure
  1173. * @param ofs offset from device start
  1174. * @param getchip 0, if the chip is already selected
  1175. * @param allowbbt 1, if its allowed to access the bbt area
  1176. *
  1177. * Check, if the block is bad. Either by reading the bad block table or
  1178. * calling of the scan function.
  1179. */
  1180. static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
  1181. {
  1182. struct onenand_chip *this = mtd->priv;
  1183. struct bbm_info *bbm = this->bbm;
  1184. /* Return info from the table */
  1185. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1186. }
  1187. /**
  1188. * onenand_erase - [MTD Interface] erase block(s)
  1189. * @param mtd MTD device structure
  1190. * @param instr erase instruction
  1191. *
  1192. * Erase one ore more blocks
  1193. */
  1194. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  1195. {
  1196. struct onenand_chip *this = mtd->priv;
  1197. unsigned int block_size;
  1198. loff_t addr;
  1199. int len;
  1200. int ret = 0;
  1201. DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
  1202. block_size = (1 << this->erase_shift);
  1203. /* Start address must align on block boundary */
  1204. if (unlikely(instr->addr & (block_size - 1))) {
  1205. printk(KERN_ERR "onenand_erase: Unaligned address\n");
  1206. return -EINVAL;
  1207. }
  1208. /* Length must align on block boundary */
  1209. if (unlikely(instr->len & (block_size - 1))) {
  1210. printk(KERN_ERR "onenand_erase: Length not block aligned\n");
  1211. return -EINVAL;
  1212. }
  1213. /* Do not allow erase past end of device */
  1214. if (unlikely((instr->len + instr->addr) > mtd->size)) {
  1215. printk(KERN_ERR "onenand_erase: Erase past end of device\n");
  1216. return -EINVAL;
  1217. }
  1218. instr->fail_addr = 0xffffffff;
  1219. /* Grab the lock and see if the device is available */
  1220. onenand_get_device(mtd, FL_ERASING);
  1221. /* Loop throught the pages */
  1222. len = instr->len;
  1223. addr = instr->addr;
  1224. instr->state = MTD_ERASING;
  1225. while (len) {
  1226. cond_resched();
  1227. /* Check if we have a bad block, we do not erase bad blocks */
  1228. if (onenand_block_checkbad(mtd, addr, 0, 0)) {
  1229. printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
  1230. instr->state = MTD_ERASE_FAILED;
  1231. goto erase_exit;
  1232. }
  1233. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1234. ret = this->wait(mtd, FL_ERASING);
  1235. /* Check, if it is write protected */
  1236. if (ret) {
  1237. printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
  1238. instr->state = MTD_ERASE_FAILED;
  1239. instr->fail_addr = addr;
  1240. goto erase_exit;
  1241. }
  1242. len -= block_size;
  1243. addr += block_size;
  1244. }
  1245. instr->state = MTD_ERASE_DONE;
  1246. erase_exit:
  1247. ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
  1248. /* Do call back function */
  1249. if (!ret)
  1250. mtd_erase_callback(instr);
  1251. /* Deselect and wake up anyone waiting on the device */
  1252. onenand_release_device(mtd);
  1253. return ret;
  1254. }
  1255. /**
  1256. * onenand_sync - [MTD Interface] sync
  1257. * @param mtd MTD device structure
  1258. *
  1259. * Sync is actually a wait for chip ready function
  1260. */
  1261. static void onenand_sync(struct mtd_info *mtd)
  1262. {
  1263. DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
  1264. /* Grab the lock and see if the device is available */
  1265. onenand_get_device(mtd, FL_SYNCING);
  1266. /* Release it and go back */
  1267. onenand_release_device(mtd);
  1268. }
  1269. /**
  1270. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  1271. * @param mtd MTD device structure
  1272. * @param ofs offset relative to mtd start
  1273. *
  1274. * Check whether the block is bad
  1275. */
  1276. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  1277. {
  1278. /* Check for invalid offset */
  1279. if (ofs > mtd->size)
  1280. return -EINVAL;
  1281. return onenand_block_checkbad(mtd, ofs, 1, 0);
  1282. }
  1283. /**
  1284. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  1285. * @param mtd MTD device structure
  1286. * @param ofs offset from device start
  1287. *
  1288. * This is the default implementation, which can be overridden by
  1289. * a hardware specific driver.
  1290. */
  1291. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1292. {
  1293. struct onenand_chip *this = mtd->priv;
  1294. struct bbm_info *bbm = this->bbm;
  1295. u_char buf[2] = {0, 0};
  1296. size_t retlen;
  1297. int block;
  1298. /* Get block number */
  1299. block = ((int) ofs) >> bbm->bbt_erase_shift;
  1300. if (bbm->bbt)
  1301. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  1302. /* We write two bytes, so we dont have to mess with 16 bit access */
  1303. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  1304. return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
  1305. }
  1306. /**
  1307. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  1308. * @param mtd MTD device structure
  1309. * @param ofs offset relative to mtd start
  1310. *
  1311. * Mark the block as bad
  1312. */
  1313. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1314. {
  1315. struct onenand_chip *this = mtd->priv;
  1316. int ret;
  1317. ret = onenand_block_isbad(mtd, ofs);
  1318. if (ret) {
  1319. /* If it was bad already, return success and do nothing */
  1320. if (ret > 0)
  1321. return 0;
  1322. return ret;
  1323. }
  1324. return this->block_markbad(mtd, ofs);
  1325. }
  1326. /**
  1327. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  1328. * @param mtd MTD device structure
  1329. * @param ofs offset relative to mtd start
  1330. * @param len number of bytes to lock or unlock
  1331. *
  1332. * Lock or unlock one or more blocks
  1333. */
  1334. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  1335. {
  1336. struct onenand_chip *this = mtd->priv;
  1337. int start, end, block, value, status;
  1338. int wp_status_mask;
  1339. start = ofs >> this->erase_shift;
  1340. end = len >> this->erase_shift;
  1341. if (cmd == ONENAND_CMD_LOCK)
  1342. wp_status_mask = ONENAND_WP_LS;
  1343. else
  1344. wp_status_mask = ONENAND_WP_US;
  1345. /* Continuous lock scheme */
  1346. if (this->options & ONENAND_HAS_CONT_LOCK) {
  1347. /* Set start block address */
  1348. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1349. /* Set end block address */
  1350. this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  1351. /* Write lock command */
  1352. this->command(mtd, cmd, 0, 0);
  1353. /* There's no return value */
  1354. this->wait(mtd, FL_LOCKING);
  1355. /* Sanity check */
  1356. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1357. & ONENAND_CTRL_ONGO)
  1358. continue;
  1359. /* Check lock status */
  1360. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1361. if (!(status & wp_status_mask))
  1362. printk(KERN_ERR "wp status = 0x%x\n", status);
  1363. return 0;
  1364. }
  1365. /* Block lock scheme */
  1366. for (block = start; block < start + end; block++) {
  1367. /* Set block address */
  1368. value = onenand_block_address(this, block);
  1369. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1370. /* Select DataRAM for DDP */
  1371. value = onenand_bufferram_address(this, block);
  1372. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1373. /* Set start block address */
  1374. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1375. /* Write lock command */
  1376. this->command(mtd, cmd, 0, 0);
  1377. /* There's no return value */
  1378. this->wait(mtd, FL_LOCKING);
  1379. /* Sanity check */
  1380. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1381. & ONENAND_CTRL_ONGO)
  1382. continue;
  1383. /* Check lock status */
  1384. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1385. if (!(status & wp_status_mask))
  1386. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1387. }
  1388. return 0;
  1389. }
  1390. /**
  1391. * onenand_lock - [MTD Interface] Lock block(s)
  1392. * @param mtd MTD device structure
  1393. * @param ofs offset relative to mtd start
  1394. * @param len number of bytes to unlock
  1395. *
  1396. * Lock one or more blocks
  1397. */
  1398. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1399. {
  1400. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  1401. }
  1402. /**
  1403. * onenand_unlock - [MTD Interface] Unlock block(s)
  1404. * @param mtd MTD device structure
  1405. * @param ofs offset relative to mtd start
  1406. * @param len number of bytes to unlock
  1407. *
  1408. * Unlock one or more blocks
  1409. */
  1410. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1411. {
  1412. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  1413. }
  1414. /**
  1415. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  1416. * @param this onenand chip data structure
  1417. *
  1418. * Check lock status
  1419. */
  1420. static void onenand_check_lock_status(struct onenand_chip *this)
  1421. {
  1422. unsigned int value, block, status;
  1423. unsigned int end;
  1424. end = this->chipsize >> this->erase_shift;
  1425. for (block = 0; block < end; block++) {
  1426. /* Set block address */
  1427. value = onenand_block_address(this, block);
  1428. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1429. /* Select DataRAM for DDP */
  1430. value = onenand_bufferram_address(this, block);
  1431. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1432. /* Set start block address */
  1433. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1434. /* Check lock status */
  1435. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1436. if (!(status & ONENAND_WP_US))
  1437. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1438. }
  1439. }
  1440. /**
  1441. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  1442. * @param mtd MTD device structure
  1443. *
  1444. * Unlock all blocks
  1445. */
  1446. static int onenand_unlock_all(struct mtd_info *mtd)
  1447. {
  1448. struct onenand_chip *this = mtd->priv;
  1449. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  1450. /* Set start block address */
  1451. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1452. /* Write unlock command */
  1453. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  1454. /* There's no return value */
  1455. this->wait(mtd, FL_LOCKING);
  1456. /* Sanity check */
  1457. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1458. & ONENAND_CTRL_ONGO)
  1459. continue;
  1460. /* Workaround for all block unlock in DDP */
  1461. if (ONENAND_IS_DDP(this)) {
  1462. /* 1st block on another chip */
  1463. loff_t ofs = this->chipsize >> 1;
  1464. size_t len = mtd->erasesize;
  1465. onenand_unlock(mtd, ofs, len);
  1466. }
  1467. onenand_check_lock_status(this);
  1468. return 0;
  1469. }
  1470. onenand_unlock(mtd, 0x0, this->chipsize);
  1471. return 0;
  1472. }
  1473. #ifdef CONFIG_MTD_ONENAND_OTP
  1474. /* Interal OTP operation */
  1475. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  1476. size_t *retlen, u_char *buf);
  1477. /**
  1478. * do_otp_read - [DEFAULT] Read OTP block area
  1479. * @param mtd MTD device structure
  1480. * @param from The offset to read
  1481. * @param len number of bytes to read
  1482. * @param retlen pointer to variable to store the number of readbytes
  1483. * @param buf the databuffer to put/get data
  1484. *
  1485. * Read OTP block area.
  1486. */
  1487. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  1488. size_t *retlen, u_char *buf)
  1489. {
  1490. struct onenand_chip *this = mtd->priv;
  1491. int ret;
  1492. /* Enter OTP access mode */
  1493. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1494. this->wait(mtd, FL_OTPING);
  1495. ret = mtd->read(mtd, from, len, retlen, buf);
  1496. /* Exit OTP access mode */
  1497. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1498. this->wait(mtd, FL_RESETING);
  1499. return ret;
  1500. }
  1501. /**
  1502. * do_otp_write - [DEFAULT] Write OTP block area
  1503. * @param mtd MTD device structure
  1504. * @param from The offset to write
  1505. * @param len number of bytes to write
  1506. * @param retlen pointer to variable to store the number of write bytes
  1507. * @param buf the databuffer to put/get data
  1508. *
  1509. * Write OTP block area.
  1510. */
  1511. static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
  1512. size_t *retlen, u_char *buf)
  1513. {
  1514. struct onenand_chip *this = mtd->priv;
  1515. unsigned char *pbuf = buf;
  1516. int ret;
  1517. /* Force buffer page aligned */
  1518. if (len < mtd->writesize) {
  1519. memcpy(this->page_buf, buf, len);
  1520. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  1521. pbuf = this->page_buf;
  1522. len = mtd->writesize;
  1523. }
  1524. /* Enter OTP access mode */
  1525. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1526. this->wait(mtd, FL_OTPING);
  1527. ret = mtd->write(mtd, from, len, retlen, pbuf);
  1528. /* Exit OTP access mode */
  1529. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1530. this->wait(mtd, FL_RESETING);
  1531. return ret;
  1532. }
  1533. /**
  1534. * do_otp_lock - [DEFAULT] Lock OTP block area
  1535. * @param mtd MTD device structure
  1536. * @param from The offset to lock
  1537. * @param len number of bytes to lock
  1538. * @param retlen pointer to variable to store the number of lock bytes
  1539. * @param buf the databuffer to put/get data
  1540. *
  1541. * Lock OTP block area.
  1542. */
  1543. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  1544. size_t *retlen, u_char *buf)
  1545. {
  1546. struct onenand_chip *this = mtd->priv;
  1547. int ret;
  1548. /* Enter OTP access mode */
  1549. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1550. this->wait(mtd, FL_OTPING);
  1551. ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
  1552. /* Exit OTP access mode */
  1553. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1554. this->wait(mtd, FL_RESETING);
  1555. return ret;
  1556. }
  1557. /**
  1558. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  1559. * @param mtd MTD device structure
  1560. * @param from The offset to read/write
  1561. * @param len number of bytes to read/write
  1562. * @param retlen pointer to variable to store the number of read bytes
  1563. * @param buf the databuffer to put/get data
  1564. * @param action do given action
  1565. * @param mode specify user and factory
  1566. *
  1567. * Handle OTP operation.
  1568. */
  1569. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  1570. size_t *retlen, u_char *buf,
  1571. otp_op_t action, int mode)
  1572. {
  1573. struct onenand_chip *this = mtd->priv;
  1574. int otp_pages;
  1575. int density;
  1576. int ret = 0;
  1577. *retlen = 0;
  1578. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1579. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  1580. otp_pages = 20;
  1581. else
  1582. otp_pages = 10;
  1583. if (mode == MTD_OTP_FACTORY) {
  1584. from += mtd->writesize * otp_pages;
  1585. otp_pages = 64 - otp_pages;
  1586. }
  1587. /* Check User/Factory boundary */
  1588. if (((mtd->writesize * otp_pages) - (from + len)) < 0)
  1589. return 0;
  1590. while (len > 0 && otp_pages > 0) {
  1591. if (!action) { /* OTP Info functions */
  1592. struct otp_info *otpinfo;
  1593. len -= sizeof(struct otp_info);
  1594. if (len <= 0)
  1595. return -ENOSPC;
  1596. otpinfo = (struct otp_info *) buf;
  1597. otpinfo->start = from;
  1598. otpinfo->length = mtd->writesize;
  1599. otpinfo->locked = 0;
  1600. from += mtd->writesize;
  1601. buf += sizeof(struct otp_info);
  1602. *retlen += sizeof(struct otp_info);
  1603. } else {
  1604. size_t tmp_retlen;
  1605. int size = len;
  1606. ret = action(mtd, from, len, &tmp_retlen, buf);
  1607. buf += size;
  1608. len -= size;
  1609. *retlen += size;
  1610. if (ret < 0)
  1611. return ret;
  1612. }
  1613. otp_pages--;
  1614. }
  1615. return 0;
  1616. }
  1617. /**
  1618. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  1619. * @param mtd MTD device structure
  1620. * @param buf the databuffer to put/get data
  1621. * @param len number of bytes to read
  1622. *
  1623. * Read factory OTP info.
  1624. */
  1625. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  1626. struct otp_info *buf, size_t len)
  1627. {
  1628. size_t retlen;
  1629. int ret;
  1630. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  1631. return ret ? : retlen;
  1632. }
  1633. /**
  1634. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  1635. * @param mtd MTD device structure
  1636. * @param from The offset to read
  1637. * @param len number of bytes to read
  1638. * @param retlen pointer to variable to store the number of read bytes
  1639. * @param buf the databuffer to put/get data
  1640. *
  1641. * Read factory OTP area.
  1642. */
  1643. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  1644. size_t len, size_t *retlen, u_char *buf)
  1645. {
  1646. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  1647. }
  1648. /**
  1649. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  1650. * @param mtd MTD device structure
  1651. * @param buf the databuffer to put/get data
  1652. * @param len number of bytes to read
  1653. *
  1654. * Read user OTP info.
  1655. */
  1656. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  1657. struct otp_info *buf, size_t len)
  1658. {
  1659. size_t retlen;
  1660. int ret;
  1661. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  1662. return ret ? : retlen;
  1663. }
  1664. /**
  1665. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  1666. * @param mtd MTD device structure
  1667. * @param from The offset to read
  1668. * @param len number of bytes to read
  1669. * @param retlen pointer to variable to store the number of read bytes
  1670. * @param buf the databuffer to put/get data
  1671. *
  1672. * Read user OTP area.
  1673. */
  1674. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1675. size_t len, size_t *retlen, u_char *buf)
  1676. {
  1677. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  1678. }
  1679. /**
  1680. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  1681. * @param mtd MTD device structure
  1682. * @param from The offset to write
  1683. * @param len number of bytes to write
  1684. * @param retlen pointer to variable to store the number of write bytes
  1685. * @param buf the databuffer to put/get data
  1686. *
  1687. * Write user OTP area.
  1688. */
  1689. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1690. size_t len, size_t *retlen, u_char *buf)
  1691. {
  1692. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  1693. }
  1694. /**
  1695. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  1696. * @param mtd MTD device structure
  1697. * @param from The offset to lock
  1698. * @param len number of bytes to unlock
  1699. *
  1700. * Write lock mark on spare area in page 0 in OTP block
  1701. */
  1702. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1703. size_t len)
  1704. {
  1705. unsigned char oob_buf[64];
  1706. size_t retlen;
  1707. int ret;
  1708. memset(oob_buf, 0xff, mtd->oobsize);
  1709. /*
  1710. * Note: OTP lock operation
  1711. * OTP block : 0xXXFC
  1712. * 1st block : 0xXXF3 (If chip support)
  1713. * Both : 0xXXF0 (If chip support)
  1714. */
  1715. oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
  1716. /*
  1717. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  1718. * We write 16 bytes spare area instead of 2 bytes.
  1719. */
  1720. from = 0;
  1721. len = 16;
  1722. ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
  1723. return ret ? : retlen;
  1724. }
  1725. #endif /* CONFIG_MTD_ONENAND_OTP */
  1726. /**
  1727. * onenand_check_features - Check and set OneNAND features
  1728. * @param mtd MTD data structure
  1729. *
  1730. * Check and set OneNAND features
  1731. * - lock scheme
  1732. */
  1733. static void onenand_check_features(struct mtd_info *mtd)
  1734. {
  1735. struct onenand_chip *this = mtd->priv;
  1736. unsigned int density, process;
  1737. /* Lock scheme depends on density and process */
  1738. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1739. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  1740. /* Lock scheme */
  1741. if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
  1742. /* A-Die has all block unlock */
  1743. if (process) {
  1744. printk(KERN_DEBUG "Chip support all block unlock\n");
  1745. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1746. }
  1747. } else {
  1748. /* Some OneNAND has continues lock scheme */
  1749. if (!process) {
  1750. printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
  1751. this->options |= ONENAND_HAS_CONT_LOCK;
  1752. }
  1753. }
  1754. }
  1755. /**
  1756. * onenand_print_device_info - Print device ID
  1757. * @param device device ID
  1758. *
  1759. * Print device ID
  1760. */
  1761. static void onenand_print_device_info(int device, int version)
  1762. {
  1763. int vcc, demuxed, ddp, density;
  1764. vcc = device & ONENAND_DEVICE_VCC_MASK;
  1765. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  1766. ddp = device & ONENAND_DEVICE_IS_DDP;
  1767. density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  1768. printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  1769. demuxed ? "" : "Muxed ",
  1770. ddp ? "(DDP)" : "",
  1771. (16 << density),
  1772. vcc ? "2.65/3.3" : "1.8",
  1773. device);
  1774. printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
  1775. }
  1776. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  1777. {ONENAND_MFR_SAMSUNG, "Samsung"},
  1778. };
  1779. /**
  1780. * onenand_check_maf - Check manufacturer ID
  1781. * @param manuf manufacturer ID
  1782. *
  1783. * Check manufacturer ID
  1784. */
  1785. static int onenand_check_maf(int manuf)
  1786. {
  1787. int size = ARRAY_SIZE(onenand_manuf_ids);
  1788. char *name;
  1789. int i;
  1790. for (i = 0; i < size; i++)
  1791. if (manuf == onenand_manuf_ids[i].id)
  1792. break;
  1793. if (i < size)
  1794. name = onenand_manuf_ids[i].name;
  1795. else
  1796. name = "Unknown";
  1797. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  1798. return (i == size);
  1799. }
  1800. /**
  1801. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  1802. * @param mtd MTD device structure
  1803. *
  1804. * OneNAND detection method:
  1805. * Compare the the values from command with ones from register
  1806. */
  1807. static int onenand_probe(struct mtd_info *mtd)
  1808. {
  1809. struct onenand_chip *this = mtd->priv;
  1810. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  1811. int density;
  1812. int syscfg;
  1813. /* Save system configuration 1 */
  1814. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  1815. /* Clear Sync. Burst Read mode to read BootRAM */
  1816. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
  1817. /* Send the command for reading device ID from BootRAM */
  1818. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  1819. /* Read manufacturer and device IDs from BootRAM */
  1820. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  1821. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  1822. /* Reset OneNAND to read default register values */
  1823. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  1824. /* Wait reset */
  1825. this->wait(mtd, FL_RESETING);
  1826. /* Restore system configuration 1 */
  1827. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  1828. /* Check manufacturer ID */
  1829. if (onenand_check_maf(bram_maf_id))
  1830. return -ENXIO;
  1831. /* Read manufacturer and device IDs from Register */
  1832. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  1833. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  1834. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  1835. /* Check OneNAND device */
  1836. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  1837. return -ENXIO;
  1838. /* Flash device information */
  1839. onenand_print_device_info(dev_id, ver_id);
  1840. this->device_id = dev_id;
  1841. this->version_id = ver_id;
  1842. density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1843. this->chipsize = (16 << density) << 20;
  1844. /* Set density mask. it is used for DDP */
  1845. if (ONENAND_IS_DDP(this))
  1846. this->density_mask = (1 << (density + 6));
  1847. else
  1848. this->density_mask = 0;
  1849. /* OneNAND page size & block size */
  1850. /* The data buffer size is equal to page size */
  1851. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  1852. mtd->oobsize = mtd->writesize >> 5;
  1853. /* Pages per a block are always 64 in OneNAND */
  1854. mtd->erasesize = mtd->writesize << 6;
  1855. this->erase_shift = ffs(mtd->erasesize) - 1;
  1856. this->page_shift = ffs(mtd->writesize) - 1;
  1857. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  1858. /* REVIST: Multichip handling */
  1859. mtd->size = this->chipsize;
  1860. /* Check OneNAND features */
  1861. onenand_check_features(mtd);
  1862. return 0;
  1863. }
  1864. /**
  1865. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  1866. * @param mtd MTD device structure
  1867. */
  1868. static int onenand_suspend(struct mtd_info *mtd)
  1869. {
  1870. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  1871. }
  1872. /**
  1873. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  1874. * @param mtd MTD device structure
  1875. */
  1876. static void onenand_resume(struct mtd_info *mtd)
  1877. {
  1878. struct onenand_chip *this = mtd->priv;
  1879. if (this->state == FL_PM_SUSPENDED)
  1880. onenand_release_device(mtd);
  1881. else
  1882. printk(KERN_ERR "resume() called for the chip which is not"
  1883. "in suspended state\n");
  1884. }
  1885. /**
  1886. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  1887. * @param mtd MTD device structure
  1888. * @param maxchips Number of chips to scan for
  1889. *
  1890. * This fills out all the not initialized function pointers
  1891. * with the defaults.
  1892. * The flash ID is read and the mtd/chip structures are
  1893. * filled with the appropriate values.
  1894. */
  1895. int onenand_scan(struct mtd_info *mtd, int maxchips)
  1896. {
  1897. int i;
  1898. struct onenand_chip *this = mtd->priv;
  1899. if (!this->read_word)
  1900. this->read_word = onenand_readw;
  1901. if (!this->write_word)
  1902. this->write_word = onenand_writew;
  1903. if (!this->command)
  1904. this->command = onenand_command;
  1905. if (!this->wait)
  1906. onenand_setup_wait(mtd);
  1907. if (!this->read_bufferram)
  1908. this->read_bufferram = onenand_read_bufferram;
  1909. if (!this->write_bufferram)
  1910. this->write_bufferram = onenand_write_bufferram;
  1911. if (!this->block_markbad)
  1912. this->block_markbad = onenand_default_block_markbad;
  1913. if (!this->scan_bbt)
  1914. this->scan_bbt = onenand_default_bbt;
  1915. if (onenand_probe(mtd))
  1916. return -ENXIO;
  1917. /* Set Sync. Burst Read after probing */
  1918. if (this->mmcontrol) {
  1919. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  1920. this->read_bufferram = onenand_sync_read_bufferram;
  1921. }
  1922. /* Allocate buffers, if necessary */
  1923. if (!this->page_buf) {
  1924. size_t len;
  1925. len = mtd->writesize + mtd->oobsize;
  1926. this->page_buf = kmalloc(len, GFP_KERNEL);
  1927. if (!this->page_buf) {
  1928. printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
  1929. return -ENOMEM;
  1930. }
  1931. this->options |= ONENAND_PAGEBUF_ALLOC;
  1932. }
  1933. this->state = FL_READY;
  1934. init_waitqueue_head(&this->wq);
  1935. spin_lock_init(&this->chip_lock);
  1936. /*
  1937. * Allow subpage writes up to oobsize.
  1938. */
  1939. switch (mtd->oobsize) {
  1940. case 64:
  1941. this->ecclayout = &onenand_oob_64;
  1942. mtd->subpage_sft = 2;
  1943. break;
  1944. case 32:
  1945. this->ecclayout = &onenand_oob_32;
  1946. mtd->subpage_sft = 1;
  1947. break;
  1948. default:
  1949. printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
  1950. mtd->oobsize);
  1951. mtd->subpage_sft = 0;
  1952. /* To prevent kernel oops */
  1953. this->ecclayout = &onenand_oob_32;
  1954. break;
  1955. }
  1956. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  1957. /*
  1958. * The number of bytes available for a client to place data into
  1959. * the out of band area
  1960. */
  1961. this->ecclayout->oobavail = 0;
  1962. for (i = 0; this->ecclayout->oobfree[i].length; i++)
  1963. this->ecclayout->oobavail +=
  1964. this->ecclayout->oobfree[i].length;
  1965. mtd->ecclayout = this->ecclayout;
  1966. /* Fill in remaining MTD driver data */
  1967. mtd->type = MTD_NANDFLASH;
  1968. mtd->flags = MTD_CAP_NANDFLASH;
  1969. mtd->ecctype = MTD_ECC_SW;
  1970. mtd->erase = onenand_erase;
  1971. mtd->point = NULL;
  1972. mtd->unpoint = NULL;
  1973. mtd->read = onenand_read;
  1974. mtd->write = onenand_write;
  1975. mtd->read_oob = onenand_read_oob;
  1976. mtd->write_oob = onenand_write_oob;
  1977. #ifdef CONFIG_MTD_ONENAND_OTP
  1978. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  1979. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  1980. mtd->get_user_prot_info = onenand_get_user_prot_info;
  1981. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  1982. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  1983. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  1984. #endif
  1985. mtd->sync = onenand_sync;
  1986. mtd->lock = onenand_lock;
  1987. mtd->unlock = onenand_unlock;
  1988. mtd->suspend = onenand_suspend;
  1989. mtd->resume = onenand_resume;
  1990. mtd->block_isbad = onenand_block_isbad;
  1991. mtd->block_markbad = onenand_block_markbad;
  1992. mtd->owner = THIS_MODULE;
  1993. /* Unlock whole block */
  1994. onenand_unlock_all(mtd);
  1995. return this->scan_bbt(mtd);
  1996. }
  1997. /**
  1998. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  1999. * @param mtd MTD device structure
  2000. */
  2001. void onenand_release(struct mtd_info *mtd)
  2002. {
  2003. struct onenand_chip *this = mtd->priv;
  2004. #ifdef CONFIG_MTD_PARTITIONS
  2005. /* Deregister partitions */
  2006. del_mtd_partitions (mtd);
  2007. #endif
  2008. /* Deregister the device */
  2009. del_mtd_device (mtd);
  2010. /* Free bad block table memory, if allocated */
  2011. if (this->bbm) {
  2012. struct bbm_info *bbm = this->bbm;
  2013. kfree(bbm->bbt);
  2014. kfree(this->bbm);
  2015. }
  2016. /* Buffer allocated by onenand_scan */
  2017. if (this->options & ONENAND_PAGEBUF_ALLOC)
  2018. kfree(this->page_buf);
  2019. }
  2020. EXPORT_SYMBOL_GPL(onenand_scan);
  2021. EXPORT_SYMBOL_GPL(onenand_release);
  2022. MODULE_LICENSE("GPL");
  2023. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  2024. MODULE_DESCRIPTION("Generic OneNAND flash driver code");