time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #include <linux/errno.h>
  15. #include <linux/module.h>
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/param.h>
  19. #include <linux/string.h>
  20. #include <linux/mm.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/cpu.h>
  23. #include <linux/stop_machine.h>
  24. #include <linux/time.h>
  25. #include <linux/sysdev.h>
  26. #include <linux/delay.h>
  27. #include <linux/init.h>
  28. #include <linux/smp.h>
  29. #include <linux/types.h>
  30. #include <linux/profile.h>
  31. #include <linux/timex.h>
  32. #include <linux/notifier.h>
  33. #include <linux/clocksource.h>
  34. #include <linux/clockchips.h>
  35. #include <linux/bootmem.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/delay.h>
  38. #include <asm/s390_ext.h>
  39. #include <asm/div64.h>
  40. #include <asm/vdso.h>
  41. #include <asm/irq.h>
  42. #include <asm/irq_regs.h>
  43. #include <asm/timer.h>
  44. #include <asm/etr.h>
  45. #include <asm/cio.h>
  46. /* change this if you have some constant time drift */
  47. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  48. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  49. /* The value of the TOD clock for 1.1.1970. */
  50. #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
  51. /*
  52. * Create a small time difference between the timer interrupts
  53. * on the different cpus to avoid lock contention.
  54. */
  55. #define CPU_DEVIATION (smp_processor_id() << 12)
  56. #define TICK_SIZE tick
  57. static ext_int_info_t ext_int_info_cc;
  58. static ext_int_info_t ext_int_etr_cc;
  59. static u64 sched_clock_base_cc;
  60. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  61. /*
  62. * Scheduler clock - returns current time in nanosec units.
  63. */
  64. unsigned long long sched_clock(void)
  65. {
  66. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  67. }
  68. /*
  69. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  70. */
  71. unsigned long long monotonic_clock(void)
  72. {
  73. return sched_clock();
  74. }
  75. EXPORT_SYMBOL(monotonic_clock);
  76. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  77. {
  78. unsigned long long sec;
  79. sec = todval >> 12;
  80. do_div(sec, 1000000);
  81. xtime->tv_sec = sec;
  82. todval -= (sec * 1000000) << 12;
  83. xtime->tv_nsec = ((todval * 1000) >> 12);
  84. }
  85. #ifdef CONFIG_PROFILING
  86. #define s390_do_profile() profile_tick(CPU_PROFILING)
  87. #else
  88. #define s390_do_profile() do { ; } while(0)
  89. #endif /* CONFIG_PROFILING */
  90. void clock_comparator_work(void)
  91. {
  92. struct clock_event_device *cd;
  93. S390_lowcore.clock_comparator = -1ULL;
  94. set_clock_comparator(S390_lowcore.clock_comparator);
  95. cd = &__get_cpu_var(comparators);
  96. cd->event_handler(cd);
  97. s390_do_profile();
  98. }
  99. /*
  100. * Fixup the clock comparator.
  101. */
  102. static void fixup_clock_comparator(unsigned long long delta)
  103. {
  104. /* If nobody is waiting there's nothing to fix. */
  105. if (S390_lowcore.clock_comparator == -1ULL)
  106. return;
  107. S390_lowcore.clock_comparator += delta;
  108. set_clock_comparator(S390_lowcore.clock_comparator);
  109. }
  110. static int s390_next_event(unsigned long delta,
  111. struct clock_event_device *evt)
  112. {
  113. S390_lowcore.clock_comparator = get_clock() + delta;
  114. set_clock_comparator(S390_lowcore.clock_comparator);
  115. return 0;
  116. }
  117. static void s390_set_mode(enum clock_event_mode mode,
  118. struct clock_event_device *evt)
  119. {
  120. }
  121. /*
  122. * Set up lowcore and control register of the current cpu to
  123. * enable TOD clock and clock comparator interrupts.
  124. */
  125. void init_cpu_timer(void)
  126. {
  127. struct clock_event_device *cd;
  128. int cpu;
  129. S390_lowcore.clock_comparator = -1ULL;
  130. set_clock_comparator(S390_lowcore.clock_comparator);
  131. cpu = smp_processor_id();
  132. cd = &per_cpu(comparators, cpu);
  133. cd->name = "comparator";
  134. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  135. cd->mult = 16777;
  136. cd->shift = 12;
  137. cd->min_delta_ns = 1;
  138. cd->max_delta_ns = LONG_MAX;
  139. cd->rating = 400;
  140. cd->cpumask = cpumask_of_cpu(cpu);
  141. cd->set_next_event = s390_next_event;
  142. cd->set_mode = s390_set_mode;
  143. clockevents_register_device(cd);
  144. /* Enable clock comparator timer interrupt. */
  145. __ctl_set_bit(0,11);
  146. /* Always allow the timing alert external interrupt. */
  147. __ctl_set_bit(0, 4);
  148. }
  149. static void clock_comparator_interrupt(__u16 code)
  150. {
  151. if (S390_lowcore.clock_comparator == -1ULL)
  152. set_clock_comparator(S390_lowcore.clock_comparator);
  153. }
  154. static void etr_timing_alert(struct etr_irq_parm *);
  155. static void stp_timing_alert(struct stp_irq_parm *);
  156. static void timing_alert_interrupt(__u16 code)
  157. {
  158. if (S390_lowcore.ext_params & 0x00c40000)
  159. etr_timing_alert((struct etr_irq_parm *)
  160. &S390_lowcore.ext_params);
  161. if (S390_lowcore.ext_params & 0x00038000)
  162. stp_timing_alert((struct stp_irq_parm *)
  163. &S390_lowcore.ext_params);
  164. }
  165. static void etr_reset(void);
  166. static void stp_reset(void);
  167. /*
  168. * Get the TOD clock running.
  169. */
  170. static u64 __init reset_tod_clock(void)
  171. {
  172. u64 time;
  173. etr_reset();
  174. stp_reset();
  175. if (store_clock(&time) == 0)
  176. return time;
  177. /* TOD clock not running. Set the clock to Unix Epoch. */
  178. if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
  179. panic("TOD clock not operational.");
  180. return TOD_UNIX_EPOCH;
  181. }
  182. static cycle_t read_tod_clock(void)
  183. {
  184. return get_clock();
  185. }
  186. static struct clocksource clocksource_tod = {
  187. .name = "tod",
  188. .rating = 400,
  189. .read = read_tod_clock,
  190. .mask = -1ULL,
  191. .mult = 1000,
  192. .shift = 12,
  193. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  194. };
  195. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  196. {
  197. if (clock != &clocksource_tod)
  198. return;
  199. /* Make userspace gettimeofday spin until we're done. */
  200. ++vdso_data->tb_update_count;
  201. smp_wmb();
  202. vdso_data->xtime_tod_stamp = clock->cycle_last;
  203. vdso_data->xtime_clock_sec = xtime.tv_sec;
  204. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  205. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  206. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  207. smp_wmb();
  208. ++vdso_data->tb_update_count;
  209. }
  210. extern struct timezone sys_tz;
  211. void update_vsyscall_tz(void)
  212. {
  213. /* Make userspace gettimeofday spin until we're done. */
  214. ++vdso_data->tb_update_count;
  215. smp_wmb();
  216. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  217. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  218. smp_wmb();
  219. ++vdso_data->tb_update_count;
  220. }
  221. /*
  222. * Initialize the TOD clock and the CPU timer of
  223. * the boot cpu.
  224. */
  225. void __init time_init(void)
  226. {
  227. sched_clock_base_cc = reset_tod_clock();
  228. /* set xtime */
  229. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime);
  230. set_normalized_timespec(&wall_to_monotonic,
  231. -xtime.tv_sec, -xtime.tv_nsec);
  232. /* request the clock comparator external interrupt */
  233. if (register_early_external_interrupt(0x1004,
  234. clock_comparator_interrupt,
  235. &ext_int_info_cc) != 0)
  236. panic("Couldn't request external interrupt 0x1004");
  237. if (clocksource_register(&clocksource_tod) != 0)
  238. panic("Could not register TOD clock source");
  239. /* request the timing alert external interrupt */
  240. if (register_early_external_interrupt(0x1406,
  241. timing_alert_interrupt,
  242. &ext_int_etr_cc) != 0)
  243. panic("Couldn't request external interrupt 0x1406");
  244. /* Enable TOD clock interrupts on the boot cpu. */
  245. init_cpu_timer();
  246. /* Enable cpu timer interrupts on the boot cpu. */
  247. vtime_init();
  248. }
  249. /*
  250. * The time is "clock". old is what we think the time is.
  251. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  252. * "delay" is an approximation how long the synchronization took. If
  253. * the time correction is positive, then "delay" is subtracted from
  254. * the time difference and only the remaining part is passed to ntp.
  255. */
  256. static unsigned long long adjust_time(unsigned long long old,
  257. unsigned long long clock,
  258. unsigned long long delay)
  259. {
  260. unsigned long long delta, ticks;
  261. struct timex adjust;
  262. if (clock > old) {
  263. /* It is later than we thought. */
  264. delta = ticks = clock - old;
  265. delta = ticks = (delta < delay) ? 0 : delta - delay;
  266. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  267. adjust.offset = ticks * (1000000 / HZ);
  268. } else {
  269. /* It is earlier than we thought. */
  270. delta = ticks = old - clock;
  271. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  272. delta = -delta;
  273. adjust.offset = -ticks * (1000000 / HZ);
  274. }
  275. sched_clock_base_cc += delta;
  276. if (adjust.offset != 0) {
  277. printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
  278. adjust.offset);
  279. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  280. do_adjtimex(&adjust);
  281. }
  282. return delta;
  283. }
  284. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  285. static unsigned long clock_sync_flags;
  286. #define CLOCK_SYNC_HAS_ETR 0
  287. #define CLOCK_SYNC_HAS_STP 1
  288. #define CLOCK_SYNC_ETR 2
  289. #define CLOCK_SYNC_STP 3
  290. /*
  291. * The synchronous get_clock function. It will write the current clock
  292. * value to the clock pointer and return 0 if the clock is in sync with
  293. * the external time source. If the clock mode is local it will return
  294. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  295. * reference.
  296. */
  297. int get_sync_clock(unsigned long long *clock)
  298. {
  299. atomic_t *sw_ptr;
  300. unsigned int sw0, sw1;
  301. sw_ptr = &get_cpu_var(clock_sync_word);
  302. sw0 = atomic_read(sw_ptr);
  303. *clock = get_clock();
  304. sw1 = atomic_read(sw_ptr);
  305. put_cpu_var(clock_sync_sync);
  306. if (sw0 == sw1 && (sw0 & 0x80000000U))
  307. /* Success: time is in sync. */
  308. return 0;
  309. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  310. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  311. return -ENOSYS;
  312. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  313. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  314. return -EACCES;
  315. return -EAGAIN;
  316. }
  317. EXPORT_SYMBOL(get_sync_clock);
  318. /*
  319. * Make get_sync_clock return -EAGAIN.
  320. */
  321. static void disable_sync_clock(void *dummy)
  322. {
  323. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  324. /*
  325. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  326. * fail until the sync bit is turned back on. In addition
  327. * increase the "sequence" counter to avoid the race of an
  328. * etr event and the complete recovery against get_sync_clock.
  329. */
  330. atomic_clear_mask(0x80000000, sw_ptr);
  331. atomic_inc(sw_ptr);
  332. }
  333. /*
  334. * Make get_sync_clock return 0 again.
  335. * Needs to be called from a context disabled for preemption.
  336. */
  337. static void enable_sync_clock(void)
  338. {
  339. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  340. atomic_set_mask(0x80000000, sw_ptr);
  341. }
  342. /* Single threaded workqueue used for etr and stp sync events */
  343. static struct workqueue_struct *time_sync_wq;
  344. static void __init time_init_wq(void)
  345. {
  346. if (!time_sync_wq)
  347. time_sync_wq = create_singlethread_workqueue("timesync");
  348. }
  349. /*
  350. * External Time Reference (ETR) code.
  351. */
  352. static int etr_port0_online;
  353. static int etr_port1_online;
  354. static int etr_steai_available;
  355. static int __init early_parse_etr(char *p)
  356. {
  357. if (strncmp(p, "off", 3) == 0)
  358. etr_port0_online = etr_port1_online = 0;
  359. else if (strncmp(p, "port0", 5) == 0)
  360. etr_port0_online = 1;
  361. else if (strncmp(p, "port1", 5) == 0)
  362. etr_port1_online = 1;
  363. else if (strncmp(p, "on", 2) == 0)
  364. etr_port0_online = etr_port1_online = 1;
  365. return 0;
  366. }
  367. early_param("etr", early_parse_etr);
  368. enum etr_event {
  369. ETR_EVENT_PORT0_CHANGE,
  370. ETR_EVENT_PORT1_CHANGE,
  371. ETR_EVENT_PORT_ALERT,
  372. ETR_EVENT_SYNC_CHECK,
  373. ETR_EVENT_SWITCH_LOCAL,
  374. ETR_EVENT_UPDATE,
  375. };
  376. /*
  377. * Valid bit combinations of the eacr register are (x = don't care):
  378. * e0 e1 dp p0 p1 ea es sl
  379. * 0 0 x 0 0 0 0 0 initial, disabled state
  380. * 0 0 x 0 1 1 0 0 port 1 online
  381. * 0 0 x 1 0 1 0 0 port 0 online
  382. * 0 0 x 1 1 1 0 0 both ports online
  383. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  384. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  385. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  386. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  387. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  388. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  389. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  390. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  391. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  392. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  393. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  394. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  395. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  396. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  397. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  398. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  399. */
  400. static struct etr_eacr etr_eacr;
  401. static u64 etr_tolec; /* time of last eacr update */
  402. static struct etr_aib etr_port0;
  403. static int etr_port0_uptodate;
  404. static struct etr_aib etr_port1;
  405. static int etr_port1_uptodate;
  406. static unsigned long etr_events;
  407. static struct timer_list etr_timer;
  408. static void etr_timeout(unsigned long dummy);
  409. static void etr_work_fn(struct work_struct *work);
  410. static DEFINE_MUTEX(etr_work_mutex);
  411. static DECLARE_WORK(etr_work, etr_work_fn);
  412. /*
  413. * Reset ETR attachment.
  414. */
  415. static void etr_reset(void)
  416. {
  417. etr_eacr = (struct etr_eacr) {
  418. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  419. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  420. .es = 0, .sl = 0 };
  421. if (etr_setr(&etr_eacr) == 0) {
  422. etr_tolec = get_clock();
  423. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  424. } else if (etr_port0_online || etr_port1_online) {
  425. printk(KERN_WARNING "Running on non ETR capable "
  426. "machine, only local mode available.\n");
  427. etr_port0_online = etr_port1_online = 0;
  428. }
  429. }
  430. static int __init etr_init(void)
  431. {
  432. struct etr_aib aib;
  433. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  434. return 0;
  435. time_init_wq();
  436. /* Check if this machine has the steai instruction. */
  437. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  438. etr_steai_available = 1;
  439. setup_timer(&etr_timer, etr_timeout, 0UL);
  440. if (etr_port0_online) {
  441. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  442. queue_work(time_sync_wq, &etr_work);
  443. }
  444. if (etr_port1_online) {
  445. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  446. queue_work(time_sync_wq, &etr_work);
  447. }
  448. return 0;
  449. }
  450. arch_initcall(etr_init);
  451. /*
  452. * Two sorts of ETR machine checks. The architecture reads:
  453. * "When a machine-check niterruption occurs and if a switch-to-local or
  454. * ETR-sync-check interrupt request is pending but disabled, this pending
  455. * disabled interruption request is indicated and is cleared".
  456. * Which means that we can get etr_switch_to_local events from the machine
  457. * check handler although the interruption condition is disabled. Lovely..
  458. */
  459. /*
  460. * Switch to local machine check. This is called when the last usable
  461. * ETR port goes inactive. After switch to local the clock is not in sync.
  462. */
  463. void etr_switch_to_local(void)
  464. {
  465. if (!etr_eacr.sl)
  466. return;
  467. if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
  468. disable_sync_clock(NULL);
  469. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  470. queue_work(time_sync_wq, &etr_work);
  471. }
  472. /*
  473. * ETR sync check machine check. This is called when the ETR OTE and the
  474. * local clock OTE are farther apart than the ETR sync check tolerance.
  475. * After a ETR sync check the clock is not in sync. The machine check
  476. * is broadcasted to all cpus at the same time.
  477. */
  478. void etr_sync_check(void)
  479. {
  480. if (!etr_eacr.es)
  481. return;
  482. if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
  483. disable_sync_clock(NULL);
  484. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  485. queue_work(time_sync_wq, &etr_work);
  486. }
  487. /*
  488. * ETR timing alert. There are two causes:
  489. * 1) port state change, check the usability of the port
  490. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  491. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  492. * or ETR-data word 4 (edf4) has changed.
  493. */
  494. static void etr_timing_alert(struct etr_irq_parm *intparm)
  495. {
  496. if (intparm->pc0)
  497. /* ETR port 0 state change. */
  498. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  499. if (intparm->pc1)
  500. /* ETR port 1 state change. */
  501. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  502. if (intparm->eai)
  503. /*
  504. * ETR port alert on either port 0, 1 or both.
  505. * Both ports are not up-to-date now.
  506. */
  507. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  508. queue_work(time_sync_wq, &etr_work);
  509. }
  510. static void etr_timeout(unsigned long dummy)
  511. {
  512. set_bit(ETR_EVENT_UPDATE, &etr_events);
  513. queue_work(time_sync_wq, &etr_work);
  514. }
  515. /*
  516. * Check if the etr mode is pss.
  517. */
  518. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  519. {
  520. return eacr.es && !eacr.sl;
  521. }
  522. /*
  523. * Check if the etr mode is etr.
  524. */
  525. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  526. {
  527. return eacr.es && eacr.sl;
  528. }
  529. /*
  530. * Check if the port can be used for TOD synchronization.
  531. * For PPS mode the port has to receive OTEs. For ETR mode
  532. * the port has to receive OTEs, the ETR stepping bit has to
  533. * be zero and the validity bits for data frame 1, 2, and 3
  534. * have to be 1.
  535. */
  536. static int etr_port_valid(struct etr_aib *aib, int port)
  537. {
  538. unsigned int psc;
  539. /* Check that this port is receiving OTEs. */
  540. if (aib->tsp == 0)
  541. return 0;
  542. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  543. if (psc == etr_lpsc_pps_mode)
  544. return 1;
  545. if (psc == etr_lpsc_operational_step)
  546. return !aib->esw.y && aib->slsw.v1 &&
  547. aib->slsw.v2 && aib->slsw.v3;
  548. return 0;
  549. }
  550. /*
  551. * Check if two ports are on the same network.
  552. */
  553. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  554. {
  555. // FIXME: any other fields we have to compare?
  556. return aib1->edf1.net_id == aib2->edf1.net_id;
  557. }
  558. /*
  559. * Wrapper for etr_stei that converts physical port states
  560. * to logical port states to be consistent with the output
  561. * of stetr (see etr_psc vs. etr_lpsc).
  562. */
  563. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  564. {
  565. BUG_ON(etr_steai(aib, func) != 0);
  566. /* Convert port state to logical port state. */
  567. if (aib->esw.psc0 == 1)
  568. aib->esw.psc0 = 2;
  569. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  570. aib->esw.psc0 = 1;
  571. if (aib->esw.psc1 == 1)
  572. aib->esw.psc1 = 2;
  573. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  574. aib->esw.psc1 = 1;
  575. }
  576. /*
  577. * Check if the aib a2 is still connected to the same attachment as
  578. * aib a1, the etv values differ by one and a2 is valid.
  579. */
  580. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  581. {
  582. int state_a1, state_a2;
  583. /* Paranoia check: e0/e1 should better be the same. */
  584. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  585. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  586. return 0;
  587. /* Still connected to the same etr ? */
  588. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  589. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  590. if (state_a1 == etr_lpsc_operational_step) {
  591. if (state_a2 != etr_lpsc_operational_step ||
  592. a1->edf1.net_id != a2->edf1.net_id ||
  593. a1->edf1.etr_id != a2->edf1.etr_id ||
  594. a1->edf1.etr_pn != a2->edf1.etr_pn)
  595. return 0;
  596. } else if (state_a2 != etr_lpsc_pps_mode)
  597. return 0;
  598. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  599. if (a1->edf2.etv + 1 != a2->edf2.etv)
  600. return 0;
  601. if (!etr_port_valid(a2, p))
  602. return 0;
  603. return 1;
  604. }
  605. struct clock_sync_data {
  606. atomic_t cpus;
  607. int in_sync;
  608. unsigned long long fixup_cc;
  609. int etr_port;
  610. struct etr_aib *etr_aib;
  611. };
  612. static void clock_sync_cpu(struct clock_sync_data *sync)
  613. {
  614. atomic_dec(&sync->cpus);
  615. enable_sync_clock();
  616. /*
  617. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  618. * is called on all other cpus while the TOD clocks is stopped.
  619. * __udelay will stop the cpu on an enabled wait psw until the
  620. * TOD is running again.
  621. */
  622. while (sync->in_sync == 0) {
  623. __udelay(1);
  624. /*
  625. * A different cpu changes *in_sync. Therefore use
  626. * barrier() to force memory access.
  627. */
  628. barrier();
  629. }
  630. if (sync->in_sync != 1)
  631. /* Didn't work. Clear per-cpu in sync bit again. */
  632. disable_sync_clock(NULL);
  633. /*
  634. * This round of TOD syncing is done. Set the clock comparator
  635. * to the next tick and let the processor continue.
  636. */
  637. fixup_clock_comparator(sync->fixup_cc);
  638. }
  639. /*
  640. * Sync the TOD clock using the port refered to by aibp. This port
  641. * has to be enabled and the other port has to be disabled. The
  642. * last eacr update has to be more than 1.6 seconds in the past.
  643. */
  644. static int etr_sync_clock(void *data)
  645. {
  646. static int first;
  647. unsigned long long clock, old_clock, delay, delta;
  648. struct clock_sync_data *etr_sync;
  649. struct etr_aib *sync_port, *aib;
  650. int port;
  651. int rc;
  652. etr_sync = data;
  653. if (xchg(&first, 1) == 1) {
  654. /* Slave */
  655. clock_sync_cpu(etr_sync);
  656. return 0;
  657. }
  658. /* Wait until all other cpus entered the sync function. */
  659. while (atomic_read(&etr_sync->cpus) != 0)
  660. cpu_relax();
  661. port = etr_sync->etr_port;
  662. aib = etr_sync->etr_aib;
  663. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  664. enable_sync_clock();
  665. /* Set clock to next OTE. */
  666. __ctl_set_bit(14, 21);
  667. __ctl_set_bit(0, 29);
  668. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  669. old_clock = get_clock();
  670. if (set_clock(clock) == 0) {
  671. __udelay(1); /* Wait for the clock to start. */
  672. __ctl_clear_bit(0, 29);
  673. __ctl_clear_bit(14, 21);
  674. etr_stetr(aib);
  675. /* Adjust Linux timing variables. */
  676. delay = (unsigned long long)
  677. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  678. delta = adjust_time(old_clock, clock, delay);
  679. etr_sync->fixup_cc = delta;
  680. fixup_clock_comparator(delta);
  681. /* Verify that the clock is properly set. */
  682. if (!etr_aib_follows(sync_port, aib, port)) {
  683. /* Didn't work. */
  684. disable_sync_clock(NULL);
  685. etr_sync->in_sync = -EAGAIN;
  686. rc = -EAGAIN;
  687. } else {
  688. etr_sync->in_sync = 1;
  689. rc = 0;
  690. }
  691. } else {
  692. /* Could not set the clock ?!? */
  693. __ctl_clear_bit(0, 29);
  694. __ctl_clear_bit(14, 21);
  695. disable_sync_clock(NULL);
  696. etr_sync->in_sync = -EAGAIN;
  697. rc = -EAGAIN;
  698. }
  699. xchg(&first, 0);
  700. return rc;
  701. }
  702. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  703. {
  704. struct clock_sync_data etr_sync;
  705. struct etr_aib *sync_port;
  706. int follows;
  707. int rc;
  708. /* Check if the current aib is adjacent to the sync port aib. */
  709. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  710. follows = etr_aib_follows(sync_port, aib, port);
  711. memcpy(sync_port, aib, sizeof(*aib));
  712. if (!follows)
  713. return -EAGAIN;
  714. memset(&etr_sync, 0, sizeof(etr_sync));
  715. etr_sync.etr_aib = aib;
  716. etr_sync.etr_port = port;
  717. get_online_cpus();
  718. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  719. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  720. put_online_cpus();
  721. return rc;
  722. }
  723. /*
  724. * Handle the immediate effects of the different events.
  725. * The port change event is used for online/offline changes.
  726. */
  727. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  728. {
  729. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  730. eacr.es = 0;
  731. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  732. eacr.es = eacr.sl = 0;
  733. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  734. etr_port0_uptodate = etr_port1_uptodate = 0;
  735. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  736. if (eacr.e0)
  737. /*
  738. * Port change of an enabled port. We have to
  739. * assume that this can have caused an stepping
  740. * port switch.
  741. */
  742. etr_tolec = get_clock();
  743. eacr.p0 = etr_port0_online;
  744. if (!eacr.p0)
  745. eacr.e0 = 0;
  746. etr_port0_uptodate = 0;
  747. }
  748. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  749. if (eacr.e1)
  750. /*
  751. * Port change of an enabled port. We have to
  752. * assume that this can have caused an stepping
  753. * port switch.
  754. */
  755. etr_tolec = get_clock();
  756. eacr.p1 = etr_port1_online;
  757. if (!eacr.p1)
  758. eacr.e1 = 0;
  759. etr_port1_uptodate = 0;
  760. }
  761. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  762. return eacr;
  763. }
  764. /*
  765. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  766. * one of the ports needs an update.
  767. */
  768. static void etr_set_tolec_timeout(unsigned long long now)
  769. {
  770. unsigned long micros;
  771. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  772. (!etr_eacr.p1 || etr_port1_uptodate))
  773. return;
  774. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  775. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  776. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  777. }
  778. /*
  779. * Set up a time that expires after 1/2 second.
  780. */
  781. static void etr_set_sync_timeout(void)
  782. {
  783. mod_timer(&etr_timer, jiffies + HZ/2);
  784. }
  785. /*
  786. * Update the aib information for one or both ports.
  787. */
  788. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  789. struct etr_eacr eacr)
  790. {
  791. /* With both ports disabled the aib information is useless. */
  792. if (!eacr.e0 && !eacr.e1)
  793. return eacr;
  794. /* Update port0 or port1 with aib stored in etr_work_fn. */
  795. if (aib->esw.q == 0) {
  796. /* Information for port 0 stored. */
  797. if (eacr.p0 && !etr_port0_uptodate) {
  798. etr_port0 = *aib;
  799. if (etr_port0_online)
  800. etr_port0_uptodate = 1;
  801. }
  802. } else {
  803. /* Information for port 1 stored. */
  804. if (eacr.p1 && !etr_port1_uptodate) {
  805. etr_port1 = *aib;
  806. if (etr_port0_online)
  807. etr_port1_uptodate = 1;
  808. }
  809. }
  810. /*
  811. * Do not try to get the alternate port aib if the clock
  812. * is not in sync yet.
  813. */
  814. if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
  815. return eacr;
  816. /*
  817. * If steai is available we can get the information about
  818. * the other port immediately. If only stetr is available the
  819. * data-port bit toggle has to be used.
  820. */
  821. if (etr_steai_available) {
  822. if (eacr.p0 && !etr_port0_uptodate) {
  823. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  824. etr_port0_uptodate = 1;
  825. }
  826. if (eacr.p1 && !etr_port1_uptodate) {
  827. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  828. etr_port1_uptodate = 1;
  829. }
  830. } else {
  831. /*
  832. * One port was updated above, if the other
  833. * port is not uptodate toggle dp bit.
  834. */
  835. if ((eacr.p0 && !etr_port0_uptodate) ||
  836. (eacr.p1 && !etr_port1_uptodate))
  837. eacr.dp ^= 1;
  838. else
  839. eacr.dp = 0;
  840. }
  841. return eacr;
  842. }
  843. /*
  844. * Write new etr control register if it differs from the current one.
  845. * Return 1 if etr_tolec has been updated as well.
  846. */
  847. static void etr_update_eacr(struct etr_eacr eacr)
  848. {
  849. int dp_changed;
  850. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  851. /* No change, return. */
  852. return;
  853. /*
  854. * The disable of an active port of the change of the data port
  855. * bit can/will cause a change in the data port.
  856. */
  857. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  858. (etr_eacr.dp ^ eacr.dp) != 0;
  859. etr_eacr = eacr;
  860. etr_setr(&etr_eacr);
  861. if (dp_changed)
  862. etr_tolec = get_clock();
  863. }
  864. /*
  865. * ETR work. In this function you'll find the main logic. In
  866. * particular this is the only function that calls etr_update_eacr(),
  867. * it "controls" the etr control register.
  868. */
  869. static void etr_work_fn(struct work_struct *work)
  870. {
  871. unsigned long long now;
  872. struct etr_eacr eacr;
  873. struct etr_aib aib;
  874. int sync_port;
  875. /* prevent multiple execution. */
  876. mutex_lock(&etr_work_mutex);
  877. /* Create working copy of etr_eacr. */
  878. eacr = etr_eacr;
  879. /* Check for the different events and their immediate effects. */
  880. eacr = etr_handle_events(eacr);
  881. /* Check if ETR is supposed to be active. */
  882. eacr.ea = eacr.p0 || eacr.p1;
  883. if (!eacr.ea) {
  884. /* Both ports offline. Reset everything. */
  885. eacr.dp = eacr.es = eacr.sl = 0;
  886. on_each_cpu(disable_sync_clock, NULL, 1);
  887. del_timer_sync(&etr_timer);
  888. etr_update_eacr(eacr);
  889. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  890. goto out_unlock;
  891. }
  892. /* Store aib to get the current ETR status word. */
  893. BUG_ON(etr_stetr(&aib) != 0);
  894. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  895. now = get_clock();
  896. /*
  897. * Update the port information if the last stepping port change
  898. * or data port change is older than 1.6 seconds.
  899. */
  900. if (now >= etr_tolec + (1600000 << 12))
  901. eacr = etr_handle_update(&aib, eacr);
  902. /*
  903. * Select ports to enable. The prefered synchronization mode is PPS.
  904. * If a port can be enabled depends on a number of things:
  905. * 1) The port needs to be online and uptodate. A port is not
  906. * disabled just because it is not uptodate, but it is only
  907. * enabled if it is uptodate.
  908. * 2) The port needs to have the same mode (pps / etr).
  909. * 3) The port needs to be usable -> etr_port_valid() == 1
  910. * 4) To enable the second port the clock needs to be in sync.
  911. * 5) If both ports are useable and are ETR ports, the network id
  912. * has to be the same.
  913. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  914. */
  915. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  916. eacr.sl = 0;
  917. eacr.e0 = 1;
  918. if (!etr_mode_is_pps(etr_eacr))
  919. eacr.es = 0;
  920. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  921. eacr.e1 = 0;
  922. // FIXME: uptodate checks ?
  923. else if (etr_port0_uptodate && etr_port1_uptodate)
  924. eacr.e1 = 1;
  925. sync_port = (etr_port0_uptodate &&
  926. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  927. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  928. eacr.sl = 0;
  929. eacr.e0 = 0;
  930. eacr.e1 = 1;
  931. if (!etr_mode_is_pps(etr_eacr))
  932. eacr.es = 0;
  933. sync_port = (etr_port1_uptodate &&
  934. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  935. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  936. eacr.sl = 1;
  937. eacr.e0 = 1;
  938. if (!etr_mode_is_etr(etr_eacr))
  939. eacr.es = 0;
  940. if (!eacr.es || !eacr.p1 ||
  941. aib.esw.psc1 != etr_lpsc_operational_alt)
  942. eacr.e1 = 0;
  943. else if (etr_port0_uptodate && etr_port1_uptodate &&
  944. etr_compare_network(&etr_port0, &etr_port1))
  945. eacr.e1 = 1;
  946. sync_port = (etr_port0_uptodate &&
  947. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  948. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  949. eacr.sl = 1;
  950. eacr.e0 = 0;
  951. eacr.e1 = 1;
  952. if (!etr_mode_is_etr(etr_eacr))
  953. eacr.es = 0;
  954. sync_port = (etr_port1_uptodate &&
  955. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  956. } else {
  957. /* Both ports not usable. */
  958. eacr.es = eacr.sl = 0;
  959. sync_port = -1;
  960. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  961. }
  962. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
  963. eacr.es = 0;
  964. /*
  965. * If the clock is in sync just update the eacr and return.
  966. * If there is no valid sync port wait for a port update.
  967. */
  968. if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
  969. eacr.es || sync_port < 0) {
  970. etr_update_eacr(eacr);
  971. etr_set_tolec_timeout(now);
  972. goto out_unlock;
  973. }
  974. /*
  975. * Prepare control register for clock syncing
  976. * (reset data port bit, set sync check control.
  977. */
  978. eacr.dp = 0;
  979. eacr.es = 1;
  980. /*
  981. * Update eacr and try to synchronize the clock. If the update
  982. * of eacr caused a stepping port switch (or if we have to
  983. * assume that a stepping port switch has occured) or the
  984. * clock syncing failed, reset the sync check control bit
  985. * and set up a timer to try again after 0.5 seconds
  986. */
  987. etr_update_eacr(eacr);
  988. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  989. if (now < etr_tolec + (1600000 << 12) ||
  990. etr_sync_clock_stop(&aib, sync_port) != 0) {
  991. /* Sync failed. Try again in 1/2 second. */
  992. eacr.es = 0;
  993. etr_update_eacr(eacr);
  994. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  995. etr_set_sync_timeout();
  996. } else
  997. etr_set_tolec_timeout(now);
  998. out_unlock:
  999. mutex_unlock(&etr_work_mutex);
  1000. }
  1001. /*
  1002. * Sysfs interface functions
  1003. */
  1004. static struct sysdev_class etr_sysclass = {
  1005. .name = "etr",
  1006. };
  1007. static struct sys_device etr_port0_dev = {
  1008. .id = 0,
  1009. .cls = &etr_sysclass,
  1010. };
  1011. static struct sys_device etr_port1_dev = {
  1012. .id = 1,
  1013. .cls = &etr_sysclass,
  1014. };
  1015. /*
  1016. * ETR class attributes
  1017. */
  1018. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1019. {
  1020. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1021. }
  1022. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1023. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1024. {
  1025. char *mode_str;
  1026. if (etr_mode_is_pps(etr_eacr))
  1027. mode_str = "pps";
  1028. else if (etr_mode_is_etr(etr_eacr))
  1029. mode_str = "etr";
  1030. else
  1031. mode_str = "local";
  1032. return sprintf(buf, "%s\n", mode_str);
  1033. }
  1034. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1035. /*
  1036. * ETR port attributes
  1037. */
  1038. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1039. {
  1040. if (dev == &etr_port0_dev)
  1041. return etr_port0_online ? &etr_port0 : NULL;
  1042. else
  1043. return etr_port1_online ? &etr_port1 : NULL;
  1044. }
  1045. static ssize_t etr_online_show(struct sys_device *dev,
  1046. struct sysdev_attribute *attr,
  1047. char *buf)
  1048. {
  1049. unsigned int online;
  1050. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1051. return sprintf(buf, "%i\n", online);
  1052. }
  1053. static ssize_t etr_online_store(struct sys_device *dev,
  1054. struct sysdev_attribute *attr,
  1055. const char *buf, size_t count)
  1056. {
  1057. unsigned int value;
  1058. value = simple_strtoul(buf, NULL, 0);
  1059. if (value != 0 && value != 1)
  1060. return -EINVAL;
  1061. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1062. return -EOPNOTSUPP;
  1063. if (dev == &etr_port0_dev) {
  1064. if (etr_port0_online == value)
  1065. return count; /* Nothing to do. */
  1066. etr_port0_online = value;
  1067. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1068. queue_work(time_sync_wq, &etr_work);
  1069. } else {
  1070. if (etr_port1_online == value)
  1071. return count; /* Nothing to do. */
  1072. etr_port1_online = value;
  1073. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1074. queue_work(time_sync_wq, &etr_work);
  1075. }
  1076. return count;
  1077. }
  1078. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1079. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1080. struct sysdev_attribute *attr,
  1081. char *buf)
  1082. {
  1083. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1084. etr_eacr.e0 : etr_eacr.e1);
  1085. }
  1086. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1087. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1088. struct sysdev_attribute *attr, char *buf)
  1089. {
  1090. if (!etr_port0_online && !etr_port1_online)
  1091. /* Status word is not uptodate if both ports are offline. */
  1092. return -ENODATA;
  1093. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1094. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1095. }
  1096. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1097. static ssize_t etr_untuned_show(struct sys_device *dev,
  1098. struct sysdev_attribute *attr, char *buf)
  1099. {
  1100. struct etr_aib *aib = etr_aib_from_dev(dev);
  1101. if (!aib || !aib->slsw.v1)
  1102. return -ENODATA;
  1103. return sprintf(buf, "%i\n", aib->edf1.u);
  1104. }
  1105. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1106. static ssize_t etr_network_id_show(struct sys_device *dev,
  1107. struct sysdev_attribute *attr, char *buf)
  1108. {
  1109. struct etr_aib *aib = etr_aib_from_dev(dev);
  1110. if (!aib || !aib->slsw.v1)
  1111. return -ENODATA;
  1112. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1113. }
  1114. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1115. static ssize_t etr_id_show(struct sys_device *dev,
  1116. struct sysdev_attribute *attr, char *buf)
  1117. {
  1118. struct etr_aib *aib = etr_aib_from_dev(dev);
  1119. if (!aib || !aib->slsw.v1)
  1120. return -ENODATA;
  1121. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1122. }
  1123. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1124. static ssize_t etr_port_number_show(struct sys_device *dev,
  1125. struct sysdev_attribute *attr, char *buf)
  1126. {
  1127. struct etr_aib *aib = etr_aib_from_dev(dev);
  1128. if (!aib || !aib->slsw.v1)
  1129. return -ENODATA;
  1130. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1131. }
  1132. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1133. static ssize_t etr_coupled_show(struct sys_device *dev,
  1134. struct sysdev_attribute *attr, char *buf)
  1135. {
  1136. struct etr_aib *aib = etr_aib_from_dev(dev);
  1137. if (!aib || !aib->slsw.v3)
  1138. return -ENODATA;
  1139. return sprintf(buf, "%i\n", aib->edf3.c);
  1140. }
  1141. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1142. static ssize_t etr_local_time_show(struct sys_device *dev,
  1143. struct sysdev_attribute *attr, char *buf)
  1144. {
  1145. struct etr_aib *aib = etr_aib_from_dev(dev);
  1146. if (!aib || !aib->slsw.v3)
  1147. return -ENODATA;
  1148. return sprintf(buf, "%i\n", aib->edf3.blto);
  1149. }
  1150. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1151. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1152. struct sysdev_attribute *attr, char *buf)
  1153. {
  1154. struct etr_aib *aib = etr_aib_from_dev(dev);
  1155. if (!aib || !aib->slsw.v3)
  1156. return -ENODATA;
  1157. return sprintf(buf, "%i\n", aib->edf3.buo);
  1158. }
  1159. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1160. static struct sysdev_attribute *etr_port_attributes[] = {
  1161. &attr_online,
  1162. &attr_stepping_control,
  1163. &attr_state_code,
  1164. &attr_untuned,
  1165. &attr_network,
  1166. &attr_id,
  1167. &attr_port,
  1168. &attr_coupled,
  1169. &attr_local_time,
  1170. &attr_utc_offset,
  1171. NULL
  1172. };
  1173. static int __init etr_register_port(struct sys_device *dev)
  1174. {
  1175. struct sysdev_attribute **attr;
  1176. int rc;
  1177. rc = sysdev_register(dev);
  1178. if (rc)
  1179. goto out;
  1180. for (attr = etr_port_attributes; *attr; attr++) {
  1181. rc = sysdev_create_file(dev, *attr);
  1182. if (rc)
  1183. goto out_unreg;
  1184. }
  1185. return 0;
  1186. out_unreg:
  1187. for (; attr >= etr_port_attributes; attr--)
  1188. sysdev_remove_file(dev, *attr);
  1189. sysdev_unregister(dev);
  1190. out:
  1191. return rc;
  1192. }
  1193. static void __init etr_unregister_port(struct sys_device *dev)
  1194. {
  1195. struct sysdev_attribute **attr;
  1196. for (attr = etr_port_attributes; *attr; attr++)
  1197. sysdev_remove_file(dev, *attr);
  1198. sysdev_unregister(dev);
  1199. }
  1200. static int __init etr_init_sysfs(void)
  1201. {
  1202. int rc;
  1203. rc = sysdev_class_register(&etr_sysclass);
  1204. if (rc)
  1205. goto out;
  1206. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1207. if (rc)
  1208. goto out_unreg_class;
  1209. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1210. if (rc)
  1211. goto out_remove_stepping_port;
  1212. rc = etr_register_port(&etr_port0_dev);
  1213. if (rc)
  1214. goto out_remove_stepping_mode;
  1215. rc = etr_register_port(&etr_port1_dev);
  1216. if (rc)
  1217. goto out_remove_port0;
  1218. return 0;
  1219. out_remove_port0:
  1220. etr_unregister_port(&etr_port0_dev);
  1221. out_remove_stepping_mode:
  1222. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1223. out_remove_stepping_port:
  1224. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1225. out_unreg_class:
  1226. sysdev_class_unregister(&etr_sysclass);
  1227. out:
  1228. return rc;
  1229. }
  1230. device_initcall(etr_init_sysfs);
  1231. /*
  1232. * Server Time Protocol (STP) code.
  1233. */
  1234. static int stp_online;
  1235. static struct stp_sstpi stp_info;
  1236. static void *stp_page;
  1237. static void stp_work_fn(struct work_struct *work);
  1238. static DEFINE_MUTEX(stp_work_mutex);
  1239. static DECLARE_WORK(stp_work, stp_work_fn);
  1240. static int __init early_parse_stp(char *p)
  1241. {
  1242. if (strncmp(p, "off", 3) == 0)
  1243. stp_online = 0;
  1244. else if (strncmp(p, "on", 2) == 0)
  1245. stp_online = 1;
  1246. return 0;
  1247. }
  1248. early_param("stp", early_parse_stp);
  1249. /*
  1250. * Reset STP attachment.
  1251. */
  1252. static void __init stp_reset(void)
  1253. {
  1254. int rc;
  1255. stp_page = alloc_bootmem_pages(PAGE_SIZE);
  1256. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1257. if (rc == 0)
  1258. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1259. else if (stp_online) {
  1260. printk(KERN_WARNING "Running on non STP capable machine.\n");
  1261. free_bootmem((unsigned long) stp_page, PAGE_SIZE);
  1262. stp_page = NULL;
  1263. stp_online = 0;
  1264. }
  1265. }
  1266. static int __init stp_init(void)
  1267. {
  1268. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1269. return 0;
  1270. time_init_wq();
  1271. if (!stp_online)
  1272. return 0;
  1273. queue_work(time_sync_wq, &stp_work);
  1274. return 0;
  1275. }
  1276. arch_initcall(stp_init);
  1277. /*
  1278. * STP timing alert. There are three causes:
  1279. * 1) timing status change
  1280. * 2) link availability change
  1281. * 3) time control parameter change
  1282. * In all three cases we are only interested in the clock source state.
  1283. * If a STP clock source is now available use it.
  1284. */
  1285. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1286. {
  1287. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1288. queue_work(time_sync_wq, &stp_work);
  1289. }
  1290. /*
  1291. * STP sync check machine check. This is called when the timing state
  1292. * changes from the synchronized state to the unsynchronized state.
  1293. * After a STP sync check the clock is not in sync. The machine check
  1294. * is broadcasted to all cpus at the same time.
  1295. */
  1296. void stp_sync_check(void)
  1297. {
  1298. if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  1299. return;
  1300. disable_sync_clock(NULL);
  1301. queue_work(time_sync_wq, &stp_work);
  1302. }
  1303. /*
  1304. * STP island condition machine check. This is called when an attached
  1305. * server attempts to communicate over an STP link and the servers
  1306. * have matching CTN ids and have a valid stratum-1 configuration
  1307. * but the configurations do not match.
  1308. */
  1309. void stp_island_check(void)
  1310. {
  1311. if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  1312. return;
  1313. disable_sync_clock(NULL);
  1314. queue_work(time_sync_wq, &stp_work);
  1315. }
  1316. static int stp_sync_clock(void *data)
  1317. {
  1318. static int first;
  1319. unsigned long long old_clock, delta;
  1320. struct clock_sync_data *stp_sync;
  1321. int rc;
  1322. stp_sync = data;
  1323. if (xchg(&first, 1) == 1) {
  1324. /* Slave */
  1325. clock_sync_cpu(stp_sync);
  1326. return 0;
  1327. }
  1328. /* Wait until all other cpus entered the sync function. */
  1329. while (atomic_read(&stp_sync->cpus) != 0)
  1330. cpu_relax();
  1331. enable_sync_clock();
  1332. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1333. if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
  1334. queue_work(time_sync_wq, &etr_work);
  1335. rc = 0;
  1336. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1337. stp_info.todoff[2] || stp_info.todoff[3] ||
  1338. stp_info.tmd != 2) {
  1339. old_clock = get_clock();
  1340. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1341. if (rc == 0) {
  1342. delta = adjust_time(old_clock, get_clock(), 0);
  1343. fixup_clock_comparator(delta);
  1344. rc = chsc_sstpi(stp_page, &stp_info,
  1345. sizeof(struct stp_sstpi));
  1346. if (rc == 0 && stp_info.tmd != 2)
  1347. rc = -EAGAIN;
  1348. }
  1349. }
  1350. if (rc) {
  1351. disable_sync_clock(NULL);
  1352. stp_sync->in_sync = -EAGAIN;
  1353. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1354. if (etr_port0_online || etr_port1_online)
  1355. queue_work(time_sync_wq, &etr_work);
  1356. } else
  1357. stp_sync->in_sync = 1;
  1358. xchg(&first, 0);
  1359. return 0;
  1360. }
  1361. /*
  1362. * STP work. Check for the STP state and take over the clock
  1363. * synchronization if the STP clock source is usable.
  1364. */
  1365. static void stp_work_fn(struct work_struct *work)
  1366. {
  1367. struct clock_sync_data stp_sync;
  1368. int rc;
  1369. /* prevent multiple execution. */
  1370. mutex_lock(&stp_work_mutex);
  1371. if (!stp_online) {
  1372. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1373. goto out_unlock;
  1374. }
  1375. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1376. if (rc)
  1377. goto out_unlock;
  1378. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1379. if (rc || stp_info.c == 0)
  1380. goto out_unlock;
  1381. memset(&stp_sync, 0, sizeof(stp_sync));
  1382. get_online_cpus();
  1383. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1384. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1385. put_online_cpus();
  1386. out_unlock:
  1387. mutex_unlock(&stp_work_mutex);
  1388. }
  1389. /*
  1390. * STP class sysfs interface functions
  1391. */
  1392. static struct sysdev_class stp_sysclass = {
  1393. .name = "stp",
  1394. };
  1395. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1396. {
  1397. if (!stp_online)
  1398. return -ENODATA;
  1399. return sprintf(buf, "%016llx\n",
  1400. *(unsigned long long *) stp_info.ctnid);
  1401. }
  1402. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1403. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1404. {
  1405. if (!stp_online)
  1406. return -ENODATA;
  1407. return sprintf(buf, "%i\n", stp_info.ctn);
  1408. }
  1409. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1410. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1411. {
  1412. if (!stp_online || !(stp_info.vbits & 0x2000))
  1413. return -ENODATA;
  1414. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1415. }
  1416. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1417. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1418. {
  1419. if (!stp_online || !(stp_info.vbits & 0x8000))
  1420. return -ENODATA;
  1421. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1422. }
  1423. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1424. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1425. {
  1426. if (!stp_online)
  1427. return -ENODATA;
  1428. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1429. }
  1430. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1431. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1432. {
  1433. if (!stp_online || !(stp_info.vbits & 0x0800))
  1434. return -ENODATA;
  1435. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1436. }
  1437. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1438. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1439. {
  1440. if (!stp_online || !(stp_info.vbits & 0x4000))
  1441. return -ENODATA;
  1442. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1443. }
  1444. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1445. stp_time_zone_offset_show, NULL);
  1446. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1447. {
  1448. if (!stp_online)
  1449. return -ENODATA;
  1450. return sprintf(buf, "%i\n", stp_info.tmd);
  1451. }
  1452. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1453. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1454. {
  1455. if (!stp_online)
  1456. return -ENODATA;
  1457. return sprintf(buf, "%i\n", stp_info.tst);
  1458. }
  1459. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1460. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1461. {
  1462. return sprintf(buf, "%i\n", stp_online);
  1463. }
  1464. static ssize_t stp_online_store(struct sysdev_class *class,
  1465. const char *buf, size_t count)
  1466. {
  1467. unsigned int value;
  1468. value = simple_strtoul(buf, NULL, 0);
  1469. if (value != 0 && value != 1)
  1470. return -EINVAL;
  1471. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1472. return -EOPNOTSUPP;
  1473. stp_online = value;
  1474. queue_work(time_sync_wq, &stp_work);
  1475. return count;
  1476. }
  1477. /*
  1478. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1479. * stp/online but attr_online already exists in this file ..
  1480. */
  1481. static struct sysdev_class_attribute attr_stp_online = {
  1482. .attr = { .name = "online", .mode = 0600 },
  1483. .show = stp_online_show,
  1484. .store = stp_online_store,
  1485. };
  1486. static struct sysdev_class_attribute *stp_attributes[] = {
  1487. &attr_ctn_id,
  1488. &attr_ctn_type,
  1489. &attr_dst_offset,
  1490. &attr_leap_seconds,
  1491. &attr_stp_online,
  1492. &attr_stratum,
  1493. &attr_time_offset,
  1494. &attr_time_zone_offset,
  1495. &attr_timing_mode,
  1496. &attr_timing_state,
  1497. NULL
  1498. };
  1499. static int __init stp_init_sysfs(void)
  1500. {
  1501. struct sysdev_class_attribute **attr;
  1502. int rc;
  1503. rc = sysdev_class_register(&stp_sysclass);
  1504. if (rc)
  1505. goto out;
  1506. for (attr = stp_attributes; *attr; attr++) {
  1507. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1508. if (rc)
  1509. goto out_unreg;
  1510. }
  1511. return 0;
  1512. out_unreg:
  1513. for (; attr >= stp_attributes; attr--)
  1514. sysdev_class_remove_file(&stp_sysclass, *attr);
  1515. sysdev_class_unregister(&stp_sysclass);
  1516. out:
  1517. return rc;
  1518. }
  1519. device_initcall(stp_init_sysfs);