cx18-av-core.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883
  1. /*
  2. * cx18 ADEC audio functions
  3. *
  4. * Derived from cx25840-core.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21. * 02110-1301, USA.
  22. */
  23. #include "cx18-driver.h"
  24. int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
  25. {
  26. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  27. u32 mask = 0xff;
  28. int shift = (addr & 3) * 8;
  29. x = (x & ~(mask << shift)) | ((u32)value << shift);
  30. writel(x, cx->reg_mem + 0xc40000 + (addr & ~3));
  31. return 0;
  32. }
  33. int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
  34. {
  35. writel(value, cx->reg_mem + 0xc40000 + addr);
  36. return 0;
  37. }
  38. u8 cx18_av_read(struct cx18 *cx, u16 addr)
  39. {
  40. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  41. int shift = (addr & 3) * 8;
  42. return (x >> shift) & 0xff;
  43. }
  44. u32 cx18_av_read4(struct cx18 *cx, u16 addr)
  45. {
  46. return readl(cx->reg_mem + 0xc40000 + addr);
  47. }
  48. int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
  49. u8 or_value)
  50. {
  51. return cx18_av_write(cx, addr,
  52. (cx18_av_read(cx, addr) & and_mask) |
  53. or_value);
  54. }
  55. int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
  56. u32 or_value)
  57. {
  58. return cx18_av_write4(cx, addr,
  59. (cx18_av_read4(cx, addr) & and_mask) |
  60. or_value);
  61. }
  62. /* ----------------------------------------------------------------------- */
  63. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  64. enum cx18_av_audio_input aud_input);
  65. static void log_audio_status(struct cx18 *cx);
  66. static void log_video_status(struct cx18 *cx);
  67. /* ----------------------------------------------------------------------- */
  68. static void cx18_av_initialize(struct cx18 *cx)
  69. {
  70. u32 v;
  71. cx18_av_loadfw(cx);
  72. /* Stop 8051 code execution */
  73. cx18_av_write4(cx, CXADEC_DL_CTL, 0x03000000);
  74. /* initallize the PLL by toggling sleep bit */
  75. v = cx18_av_read4(cx, CXADEC_HOST_REG1);
  76. /* enable sleep mode */
  77. cx18_av_write4(cx, CXADEC_HOST_REG1, v | 1);
  78. /* disable sleep mode */
  79. cx18_av_write4(cx, CXADEC_HOST_REG1, v & 0xfffe);
  80. /* initialize DLLs */
  81. v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
  82. /* disable FLD */
  83. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
  84. /* enable FLD */
  85. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
  86. v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
  87. /* disable FLD */
  88. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
  89. /* enable FLD */
  90. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
  91. /* set analog bias currents. Set Vreg to 1.20V. */
  92. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
  93. v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
  94. /* enable TUNE_FIL_RST */
  95. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v);
  96. /* disable TUNE_FIL_RST */
  97. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v & 0xFFFFFFFE);
  98. /* enable 656 output */
  99. cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
  100. /* video output drive strength */
  101. cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
  102. /* reset video */
  103. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
  104. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
  105. /* set video to auto-detect */
  106. /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */
  107. /* set the comb notch = 1 */
  108. cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
  109. /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
  110. /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
  111. cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
  112. /* Set VGA_TRACK_RANGE to 0x20 */
  113. cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
  114. /* Enable VBI capture */
  115. cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
  116. /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
  117. /* Set the video input.
  118. The setting in MODE_CTRL gets lost when we do the above setup */
  119. /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
  120. /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
  121. v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
  122. v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */
  123. v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */
  124. v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */
  125. /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */
  126. cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
  127. /* if(dwEnable && dw3DCombAvailable) { */
  128. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
  129. /* } else { */
  130. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
  131. /* } */
  132. cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
  133. }
  134. /* ----------------------------------------------------------------------- */
  135. static void input_change(struct cx18 *cx)
  136. {
  137. struct cx18_av_state *state = &cx->av_state;
  138. v4l2_std_id std = state->std;
  139. /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
  140. cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
  141. cx18_av_and_or(cx, 0x401, ~0x60, 0);
  142. cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
  143. if (std & V4L2_STD_525_60) {
  144. if (std == V4L2_STD_NTSC_M_JP) {
  145. /* Japan uses EIAJ audio standard */
  146. cx18_av_write(cx, 0x808, 0xf7);
  147. cx18_av_write(cx, 0x80b, 0x02);
  148. } else if (std == V4L2_STD_NTSC_M_KR) {
  149. /* South Korea uses A2 audio standard */
  150. cx18_av_write(cx, 0x808, 0xf8);
  151. cx18_av_write(cx, 0x80b, 0x03);
  152. } else {
  153. /* Others use the BTSC audio standard */
  154. cx18_av_write(cx, 0x808, 0xf6);
  155. cx18_av_write(cx, 0x80b, 0x01);
  156. }
  157. } else if (std & V4L2_STD_PAL) {
  158. /* Follow tuner change procedure for PAL */
  159. cx18_av_write(cx, 0x808, 0xff);
  160. cx18_av_write(cx, 0x80b, 0x03);
  161. } else if (std & V4L2_STD_SECAM) {
  162. /* Select autodetect for SECAM */
  163. cx18_av_write(cx, 0x808, 0xff);
  164. cx18_av_write(cx, 0x80b, 0x03);
  165. }
  166. if (cx18_av_read(cx, 0x803) & 0x10) {
  167. /* restart audio decoder microcontroller */
  168. cx18_av_and_or(cx, 0x803, ~0x10, 0x00);
  169. cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
  170. }
  171. }
  172. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  173. enum cx18_av_audio_input aud_input)
  174. {
  175. struct cx18_av_state *state = &cx->av_state;
  176. u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
  177. vid_input <= CX18_AV_COMPOSITE8);
  178. u8 reg;
  179. CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
  180. vid_input, aud_input);
  181. if (is_composite) {
  182. reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
  183. } else {
  184. int luma = vid_input & 0xf0;
  185. int chroma = vid_input & 0xf00;
  186. if ((vid_input & ~0xff0) ||
  187. luma < CX18_AV_SVIDEO_LUMA1 ||
  188. luma > CX18_AV_SVIDEO_LUMA8 ||
  189. chroma < CX18_AV_SVIDEO_CHROMA4 ||
  190. chroma > CX18_AV_SVIDEO_CHROMA8) {
  191. CX18_ERR("0x%04x is not a valid video input!\n",
  192. vid_input);
  193. return -EINVAL;
  194. }
  195. reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
  196. if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
  197. reg &= 0x3f;
  198. reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
  199. } else {
  200. reg &= 0xcf;
  201. reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
  202. }
  203. }
  204. switch (aud_input) {
  205. case CX18_AV_AUDIO_SERIAL:
  206. /* do nothing, use serial audio input */
  207. break;
  208. case CX18_AV_AUDIO4: reg &= ~0x30; break;
  209. case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
  210. case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
  211. case CX18_AV_AUDIO7: reg &= ~0xc0; break;
  212. case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
  213. default:
  214. CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
  215. return -EINVAL;
  216. }
  217. cx18_av_write(cx, 0x103, reg);
  218. /* Set INPUT_MODE to Composite (0) or S-Video (1) */
  219. cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
  220. /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
  221. cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
  222. /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
  223. if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
  224. cx18_av_and_or(cx, 0x102, ~0x4, 4);
  225. else
  226. cx18_av_and_or(cx, 0x102, ~0x4, 0);
  227. /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
  228. state->vid_input = vid_input;
  229. state->aud_input = aud_input;
  230. cx18_av_audio_set_path(cx);
  231. input_change(cx);
  232. return 0;
  233. }
  234. /* ----------------------------------------------------------------------- */
  235. static int set_v4lstd(struct cx18 *cx)
  236. {
  237. struct cx18_av_state *state = &cx->av_state;
  238. u8 fmt = 0; /* zero is autodetect */
  239. u8 pal_m = 0;
  240. /* First tests should be against specific std */
  241. if (state->std == V4L2_STD_NTSC_M_JP) {
  242. fmt = 0x2;
  243. } else if (state->std == V4L2_STD_NTSC_443) {
  244. fmt = 0x3;
  245. } else if (state->std == V4L2_STD_PAL_M) {
  246. pal_m = 1;
  247. fmt = 0x5;
  248. } else if (state->std == V4L2_STD_PAL_N) {
  249. fmt = 0x6;
  250. } else if (state->std == V4L2_STD_PAL_Nc) {
  251. fmt = 0x7;
  252. } else if (state->std == V4L2_STD_PAL_60) {
  253. fmt = 0x8;
  254. } else {
  255. /* Then, test against generic ones */
  256. if (state->std & V4L2_STD_NTSC)
  257. fmt = 0x1;
  258. else if (state->std & V4L2_STD_PAL)
  259. fmt = 0x4;
  260. else if (state->std & V4L2_STD_SECAM)
  261. fmt = 0xc;
  262. }
  263. CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
  264. /* Follow step 9 of section 3.16 in the cx18_av datasheet.
  265. Without this PAL may display a vertical ghosting effect.
  266. This happens for example with the Yuan MPC622. */
  267. if (fmt >= 4 && fmt < 8) {
  268. /* Set format to NTSC-M */
  269. cx18_av_and_or(cx, 0x400, ~0xf, 1);
  270. /* Turn off LCOMB */
  271. cx18_av_and_or(cx, 0x47b, ~6, 0);
  272. }
  273. cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
  274. cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
  275. cx18_av_vbi_setup(cx);
  276. input_change(cx);
  277. return 0;
  278. }
  279. /* ----------------------------------------------------------------------- */
  280. static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  281. {
  282. switch (ctrl->id) {
  283. case V4L2_CID_BRIGHTNESS:
  284. if (ctrl->value < 0 || ctrl->value > 255) {
  285. CX18_ERR("invalid brightness setting %d\n",
  286. ctrl->value);
  287. return -ERANGE;
  288. }
  289. cx18_av_write(cx, 0x414, ctrl->value - 128);
  290. break;
  291. case V4L2_CID_CONTRAST:
  292. if (ctrl->value < 0 || ctrl->value > 127) {
  293. CX18_ERR("invalid contrast setting %d\n",
  294. ctrl->value);
  295. return -ERANGE;
  296. }
  297. cx18_av_write(cx, 0x415, ctrl->value << 1);
  298. break;
  299. case V4L2_CID_SATURATION:
  300. if (ctrl->value < 0 || ctrl->value > 127) {
  301. CX18_ERR("invalid saturation setting %d\n",
  302. ctrl->value);
  303. return -ERANGE;
  304. }
  305. cx18_av_write(cx, 0x420, ctrl->value << 1);
  306. cx18_av_write(cx, 0x421, ctrl->value << 1);
  307. break;
  308. case V4L2_CID_HUE:
  309. if (ctrl->value < -127 || ctrl->value > 127) {
  310. CX18_ERR("invalid hue setting %d\n", ctrl->value);
  311. return -ERANGE;
  312. }
  313. cx18_av_write(cx, 0x422, ctrl->value);
  314. break;
  315. case V4L2_CID_AUDIO_VOLUME:
  316. case V4L2_CID_AUDIO_BASS:
  317. case V4L2_CID_AUDIO_TREBLE:
  318. case V4L2_CID_AUDIO_BALANCE:
  319. case V4L2_CID_AUDIO_MUTE:
  320. return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
  321. default:
  322. return -EINVAL;
  323. }
  324. return 0;
  325. }
  326. static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  327. {
  328. switch (ctrl->id) {
  329. case V4L2_CID_BRIGHTNESS:
  330. ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
  331. break;
  332. case V4L2_CID_CONTRAST:
  333. ctrl->value = cx18_av_read(cx, 0x415) >> 1;
  334. break;
  335. case V4L2_CID_SATURATION:
  336. ctrl->value = cx18_av_read(cx, 0x420) >> 1;
  337. break;
  338. case V4L2_CID_HUE:
  339. ctrl->value = (s8)cx18_av_read(cx, 0x422);
  340. break;
  341. case V4L2_CID_AUDIO_VOLUME:
  342. case V4L2_CID_AUDIO_BASS:
  343. case V4L2_CID_AUDIO_TREBLE:
  344. case V4L2_CID_AUDIO_BALANCE:
  345. case V4L2_CID_AUDIO_MUTE:
  346. return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
  347. default:
  348. return -EINVAL;
  349. }
  350. return 0;
  351. }
  352. /* ----------------------------------------------------------------------- */
  353. static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  354. {
  355. switch (fmt->type) {
  356. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  357. return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
  358. default:
  359. return -EINVAL;
  360. }
  361. return 0;
  362. }
  363. static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  364. {
  365. struct cx18_av_state *state = &cx->av_state;
  366. struct v4l2_pix_format *pix;
  367. int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
  368. int is_50Hz = !(state->std & V4L2_STD_525_60);
  369. switch (fmt->type) {
  370. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  371. pix = &(fmt->fmt.pix);
  372. Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
  373. Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
  374. Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
  375. Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
  376. Vlines = pix->height + (is_50Hz ? 4 : 7);
  377. if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
  378. (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
  379. CX18_ERR("%dx%d is not a valid size!\n",
  380. pix->width, pix->height);
  381. return -ERANGE;
  382. }
  383. HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
  384. VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
  385. VSC &= 0x1fff;
  386. if (pix->width >= 385)
  387. filter = 0;
  388. else if (pix->width > 192)
  389. filter = 1;
  390. else if (pix->width > 96)
  391. filter = 2;
  392. else
  393. filter = 3;
  394. CX18_DEBUG_INFO("decoder set size %dx%d -> scale %ux%u\n",
  395. pix->width, pix->height, HSC, VSC);
  396. /* HSCALE=HSC */
  397. cx18_av_write(cx, 0x418, HSC & 0xff);
  398. cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
  399. cx18_av_write(cx, 0x41a, HSC >> 16);
  400. /* VSCALE=VSC */
  401. cx18_av_write(cx, 0x41c, VSC & 0xff);
  402. cx18_av_write(cx, 0x41d, VSC >> 8);
  403. /* VS_INTRLACE=1 VFILT=filter */
  404. cx18_av_write(cx, 0x41e, 0x8 | filter);
  405. break;
  406. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  407. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  408. case V4L2_BUF_TYPE_VBI_CAPTURE:
  409. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  410. default:
  411. return -EINVAL;
  412. }
  413. return 0;
  414. }
  415. /* ----------------------------------------------------------------------- */
  416. int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
  417. {
  418. struct cx18_av_state *state = &cx->av_state;
  419. struct v4l2_tuner *vt = arg;
  420. struct v4l2_routing *route = arg;
  421. /* ignore these commands */
  422. switch (cmd) {
  423. case TUNER_SET_TYPE_ADDR:
  424. return 0;
  425. }
  426. if (!state->is_initialized) {
  427. CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
  428. /* initialize on first use */
  429. state->is_initialized = 1;
  430. cx18_av_initialize(cx);
  431. }
  432. switch (cmd) {
  433. case VIDIOC_INT_DECODE_VBI_LINE:
  434. return cx18_av_vbi(cx, cmd, arg);
  435. case VIDIOC_INT_AUDIO_CLOCK_FREQ:
  436. return cx18_av_audio(cx, cmd, arg);
  437. case VIDIOC_STREAMON:
  438. CX18_DEBUG_INFO("enable output\n");
  439. cx18_av_write(cx, 0x115, 0x8c);
  440. cx18_av_write(cx, 0x116, 0x07);
  441. break;
  442. case VIDIOC_STREAMOFF:
  443. CX18_DEBUG_INFO("disable output\n");
  444. cx18_av_write(cx, 0x115, 0x00);
  445. cx18_av_write(cx, 0x116, 0x00);
  446. break;
  447. case VIDIOC_LOG_STATUS:
  448. log_video_status(cx);
  449. log_audio_status(cx);
  450. break;
  451. case VIDIOC_G_CTRL:
  452. return get_v4lctrl(cx, (struct v4l2_control *)arg);
  453. case VIDIOC_S_CTRL:
  454. return set_v4lctrl(cx, (struct v4l2_control *)arg);
  455. case VIDIOC_QUERYCTRL:
  456. {
  457. struct v4l2_queryctrl *qc = arg;
  458. switch (qc->id) {
  459. case V4L2_CID_BRIGHTNESS:
  460. case V4L2_CID_CONTRAST:
  461. case V4L2_CID_SATURATION:
  462. case V4L2_CID_HUE:
  463. return v4l2_ctrl_query_fill_std(qc);
  464. default:
  465. break;
  466. }
  467. switch (qc->id) {
  468. case V4L2_CID_AUDIO_VOLUME:
  469. case V4L2_CID_AUDIO_MUTE:
  470. case V4L2_CID_AUDIO_BALANCE:
  471. case V4L2_CID_AUDIO_BASS:
  472. case V4L2_CID_AUDIO_TREBLE:
  473. return v4l2_ctrl_query_fill_std(qc);
  474. default:
  475. return -EINVAL;
  476. }
  477. return -EINVAL;
  478. }
  479. case VIDIOC_G_STD:
  480. *(v4l2_std_id *)arg = state->std;
  481. break;
  482. case VIDIOC_S_STD:
  483. if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
  484. return 0;
  485. state->radio = 0;
  486. state->std = *(v4l2_std_id *)arg;
  487. return set_v4lstd(cx);
  488. case AUDC_SET_RADIO:
  489. state->radio = 1;
  490. break;
  491. case VIDIOC_INT_G_VIDEO_ROUTING:
  492. route->input = state->vid_input;
  493. route->output = 0;
  494. break;
  495. case VIDIOC_INT_S_VIDEO_ROUTING:
  496. return set_input(cx, route->input, state->aud_input);
  497. case VIDIOC_INT_G_AUDIO_ROUTING:
  498. route->input = state->aud_input;
  499. route->output = 0;
  500. break;
  501. case VIDIOC_INT_S_AUDIO_ROUTING:
  502. return set_input(cx, state->vid_input, route->input);
  503. case VIDIOC_S_FREQUENCY:
  504. input_change(cx);
  505. break;
  506. case VIDIOC_G_TUNER:
  507. {
  508. u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
  509. u8 mode;
  510. int val = 0;
  511. if (state->radio)
  512. break;
  513. vt->signal = vpres ? 0xffff : 0x0;
  514. vt->capability |=
  515. V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
  516. V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
  517. mode = cx18_av_read(cx, 0x804);
  518. /* get rxsubchans and audmode */
  519. if ((mode & 0xf) == 1)
  520. val |= V4L2_TUNER_SUB_STEREO;
  521. else
  522. val |= V4L2_TUNER_SUB_MONO;
  523. if (mode == 2 || mode == 4)
  524. val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
  525. if (mode & 0x10)
  526. val |= V4L2_TUNER_SUB_SAP;
  527. vt->rxsubchans = val;
  528. vt->audmode = state->audmode;
  529. break;
  530. }
  531. case VIDIOC_S_TUNER:
  532. if (state->radio)
  533. break;
  534. switch (vt->audmode) {
  535. case V4L2_TUNER_MODE_MONO:
  536. /* mono -> mono
  537. stereo -> mono
  538. bilingual -> lang1 */
  539. cx18_av_and_or(cx, 0x809, ~0xf, 0x00);
  540. break;
  541. case V4L2_TUNER_MODE_STEREO:
  542. case V4L2_TUNER_MODE_LANG1:
  543. /* mono -> mono
  544. stereo -> stereo
  545. bilingual -> lang1 */
  546. cx18_av_and_or(cx, 0x809, ~0xf, 0x04);
  547. break;
  548. case V4L2_TUNER_MODE_LANG1_LANG2:
  549. /* mono -> mono
  550. stereo -> stereo
  551. bilingual -> lang1/lang2 */
  552. cx18_av_and_or(cx, 0x809, ~0xf, 0x07);
  553. break;
  554. case V4L2_TUNER_MODE_LANG2:
  555. /* mono -> mono
  556. stereo -> stereo
  557. bilingual -> lang2 */
  558. cx18_av_and_or(cx, 0x809, ~0xf, 0x01);
  559. break;
  560. default:
  561. return -EINVAL;
  562. }
  563. state->audmode = vt->audmode;
  564. break;
  565. case VIDIOC_G_FMT:
  566. return get_v4lfmt(cx, (struct v4l2_format *)arg);
  567. case VIDIOC_S_FMT:
  568. return set_v4lfmt(cx, (struct v4l2_format *)arg);
  569. case VIDIOC_INT_RESET:
  570. cx18_av_initialize(cx);
  571. break;
  572. default:
  573. return -EINVAL;
  574. }
  575. return 0;
  576. }
  577. /* ----------------------------------------------------------------------- */
  578. /* ----------------------------------------------------------------------- */
  579. static void log_video_status(struct cx18 *cx)
  580. {
  581. static const char *const fmt_strs[] = {
  582. "0x0",
  583. "NTSC-M", "NTSC-J", "NTSC-4.43",
  584. "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
  585. "0x9", "0xA", "0xB",
  586. "SECAM",
  587. "0xD", "0xE", "0xF"
  588. };
  589. struct cx18_av_state *state = &cx->av_state;
  590. u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
  591. u8 gen_stat1 = cx18_av_read(cx, 0x40d);
  592. u8 gen_stat2 = cx18_av_read(cx, 0x40e);
  593. int vid_input = state->vid_input;
  594. CX18_INFO("Video signal: %spresent\n",
  595. (gen_stat2 & 0x20) ? "" : "not ");
  596. CX18_INFO("Detected format: %s\n",
  597. fmt_strs[gen_stat1 & 0xf]);
  598. CX18_INFO("Specified standard: %s\n",
  599. vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
  600. if (vid_input >= CX18_AV_COMPOSITE1 &&
  601. vid_input <= CX18_AV_COMPOSITE8) {
  602. CX18_INFO("Specified video input: Composite %d\n",
  603. vid_input - CX18_AV_COMPOSITE1 + 1);
  604. } else {
  605. CX18_INFO("Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
  606. (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
  607. }
  608. CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
  609. }
  610. /* ----------------------------------------------------------------------- */
  611. static void log_audio_status(struct cx18 *cx)
  612. {
  613. struct cx18_av_state *state = &cx->av_state;
  614. u8 download_ctl = cx18_av_read(cx, 0x803);
  615. u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
  616. u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
  617. u8 audio_config = cx18_av_read(cx, 0x808);
  618. u8 pref_mode = cx18_av_read(cx, 0x809);
  619. u8 afc0 = cx18_av_read(cx, 0x80b);
  620. u8 mute_ctl = cx18_av_read(cx, 0x8d3);
  621. int aud_input = state->aud_input;
  622. char *p;
  623. switch (mod_det_stat0) {
  624. case 0x00: p = "mono"; break;
  625. case 0x01: p = "stereo"; break;
  626. case 0x02: p = "dual"; break;
  627. case 0x04: p = "tri"; break;
  628. case 0x10: p = "mono with SAP"; break;
  629. case 0x11: p = "stereo with SAP"; break;
  630. case 0x12: p = "dual with SAP"; break;
  631. case 0x14: p = "tri with SAP"; break;
  632. case 0xfe: p = "forced mode"; break;
  633. default: p = "not defined"; break;
  634. }
  635. CX18_INFO("Detected audio mode: %s\n", p);
  636. switch (mod_det_stat1) {
  637. case 0x00: p = "not defined"; break;
  638. case 0x01: p = "EIAJ"; break;
  639. case 0x02: p = "A2-M"; break;
  640. case 0x03: p = "A2-BG"; break;
  641. case 0x04: p = "A2-DK1"; break;
  642. case 0x05: p = "A2-DK2"; break;
  643. case 0x06: p = "A2-DK3"; break;
  644. case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
  645. case 0x08: p = "AM-L"; break;
  646. case 0x09: p = "NICAM-BG"; break;
  647. case 0x0a: p = "NICAM-DK"; break;
  648. case 0x0b: p = "NICAM-I"; break;
  649. case 0x0c: p = "NICAM-L"; break;
  650. case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
  651. case 0x0e: p = "IF FM Radio"; break;
  652. case 0x0f: p = "BTSC"; break;
  653. case 0x10: p = "detected chrominance"; break;
  654. case 0xfd: p = "unknown audio standard"; break;
  655. case 0xfe: p = "forced audio standard"; break;
  656. case 0xff: p = "no detected audio standard"; break;
  657. default: p = "not defined"; break;
  658. }
  659. CX18_INFO("Detected audio standard: %s\n", p);
  660. CX18_INFO("Audio muted: %s\n",
  661. (mute_ctl & 0x2) ? "yes" : "no");
  662. CX18_INFO("Audio microcontroller: %s\n",
  663. (download_ctl & 0x10) ? "running" : "stopped");
  664. switch (audio_config >> 4) {
  665. case 0x00: p = "undefined"; break;
  666. case 0x01: p = "BTSC"; break;
  667. case 0x02: p = "EIAJ"; break;
  668. case 0x03: p = "A2-M"; break;
  669. case 0x04: p = "A2-BG"; break;
  670. case 0x05: p = "A2-DK1"; break;
  671. case 0x06: p = "A2-DK2"; break;
  672. case 0x07: p = "A2-DK3"; break;
  673. case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
  674. case 0x09: p = "AM-L"; break;
  675. case 0x0a: p = "NICAM-BG"; break;
  676. case 0x0b: p = "NICAM-DK"; break;
  677. case 0x0c: p = "NICAM-I"; break;
  678. case 0x0d: p = "NICAM-L"; break;
  679. case 0x0e: p = "FM radio"; break;
  680. case 0x0f: p = "automatic detection"; break;
  681. default: p = "undefined"; break;
  682. }
  683. CX18_INFO("Configured audio standard: %s\n", p);
  684. if ((audio_config >> 4) < 0xF) {
  685. switch (audio_config & 0xF) {
  686. case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
  687. case 0x01: p = "MONO2 (LANGUAGE B)"; break;
  688. case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
  689. case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
  690. case 0x04: p = "STEREO"; break;
  691. case 0x05: p = "DUAL1 (AC)"; break;
  692. case 0x06: p = "DUAL2 (BC)"; break;
  693. case 0x07: p = "DUAL3 (AB)"; break;
  694. default: p = "undefined";
  695. }
  696. CX18_INFO("Configured audio mode: %s\n", p);
  697. } else {
  698. switch (audio_config & 0xF) {
  699. case 0x00: p = "BG"; break;
  700. case 0x01: p = "DK1"; break;
  701. case 0x02: p = "DK2"; break;
  702. case 0x03: p = "DK3"; break;
  703. case 0x04: p = "I"; break;
  704. case 0x05: p = "L"; break;
  705. case 0x06: p = "BTSC"; break;
  706. case 0x07: p = "EIAJ"; break;
  707. case 0x08: p = "A2-M"; break;
  708. case 0x09: p = "FM Radio (4.5 MHz)"; break;
  709. case 0x0a: p = "FM Radio (5.5 MHz)"; break;
  710. case 0x0b: p = "S-Video"; break;
  711. case 0x0f: p = "automatic standard and mode detection"; break;
  712. default: p = "undefined"; break;
  713. }
  714. CX18_INFO("Configured audio system: %s\n", p);
  715. }
  716. if (aud_input)
  717. CX18_INFO("Specified audio input: Tuner (In%d)\n",
  718. aud_input);
  719. else
  720. CX18_INFO("Specified audio input: External\n");
  721. switch (pref_mode & 0xf) {
  722. case 0: p = "mono/language A"; break;
  723. case 1: p = "language B"; break;
  724. case 2: p = "language C"; break;
  725. case 3: p = "analog fallback"; break;
  726. case 4: p = "stereo"; break;
  727. case 5: p = "language AC"; break;
  728. case 6: p = "language BC"; break;
  729. case 7: p = "language AB"; break;
  730. default: p = "undefined"; break;
  731. }
  732. CX18_INFO("Preferred audio mode: %s\n", p);
  733. if ((audio_config & 0xf) == 0xf) {
  734. switch ((afc0 >> 3) & 0x1) {
  735. case 0: p = "system DK"; break;
  736. case 1: p = "system L"; break;
  737. }
  738. CX18_INFO("Selected 65 MHz format: %s\n", p);
  739. switch (afc0 & 0x7) {
  740. case 0: p = "Chroma"; break;
  741. case 1: p = "BTSC"; break;
  742. case 2: p = "EIAJ"; break;
  743. case 3: p = "A2-M"; break;
  744. case 4: p = "autodetect"; break;
  745. default: p = "undefined"; break;
  746. }
  747. CX18_INFO("Selected 45 MHz format: %s\n", p);
  748. }
  749. }