wm831x-dcdc.c 26 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 6
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. struct regulator_desc desc;
  46. int base;
  47. struct wm831x *wm831x;
  48. struct regulator_dev *regulator;
  49. int dvs_gpio;
  50. int dvs_gpio_state;
  51. int on_vsel;
  52. int dvs_vsel;
  53. };
  54. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  55. {
  56. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  57. struct wm831x *wm831x = dcdc->wm831x;
  58. int mask = 1 << rdev_get_id(rdev);
  59. int reg;
  60. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  61. if (reg < 0)
  62. return reg;
  63. if (reg & mask)
  64. return 1;
  65. else
  66. return 0;
  67. }
  68. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  69. {
  70. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  71. struct wm831x *wm831x = dcdc->wm831x;
  72. int mask = 1 << rdev_get_id(rdev);
  73. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  74. }
  75. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  76. {
  77. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  78. struct wm831x *wm831x = dcdc->wm831x;
  79. int mask = 1 << rdev_get_id(rdev);
  80. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  81. }
  82. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  83. {
  84. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  85. struct wm831x *wm831x = dcdc->wm831x;
  86. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  87. int val;
  88. val = wm831x_reg_read(wm831x, reg);
  89. if (val < 0)
  90. return val;
  91. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  92. switch (val) {
  93. case WM831X_DCDC_MODE_FAST:
  94. return REGULATOR_MODE_FAST;
  95. case WM831X_DCDC_MODE_NORMAL:
  96. return REGULATOR_MODE_NORMAL;
  97. case WM831X_DCDC_MODE_STANDBY:
  98. return REGULATOR_MODE_STANDBY;
  99. case WM831X_DCDC_MODE_IDLE:
  100. return REGULATOR_MODE_IDLE;
  101. default:
  102. BUG();
  103. return -EINVAL;
  104. }
  105. }
  106. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  107. unsigned int mode)
  108. {
  109. int val;
  110. switch (mode) {
  111. case REGULATOR_MODE_FAST:
  112. val = WM831X_DCDC_MODE_FAST;
  113. break;
  114. case REGULATOR_MODE_NORMAL:
  115. val = WM831X_DCDC_MODE_NORMAL;
  116. break;
  117. case REGULATOR_MODE_STANDBY:
  118. val = WM831X_DCDC_MODE_STANDBY;
  119. break;
  120. case REGULATOR_MODE_IDLE:
  121. val = WM831X_DCDC_MODE_IDLE;
  122. break;
  123. default:
  124. return -EINVAL;
  125. }
  126. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  127. val << WM831X_DC1_ON_MODE_SHIFT);
  128. }
  129. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  130. {
  131. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  132. struct wm831x *wm831x = dcdc->wm831x;
  133. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  134. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  135. }
  136. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  137. unsigned int mode)
  138. {
  139. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  140. struct wm831x *wm831x = dcdc->wm831x;
  141. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  142. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  143. }
  144. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  145. {
  146. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  147. struct wm831x *wm831x = dcdc->wm831x;
  148. int ret;
  149. /* First, check for errors */
  150. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  151. if (ret < 0)
  152. return ret;
  153. if (ret & (1 << rdev_get_id(rdev))) {
  154. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  155. rdev_get_id(rdev) + 1);
  156. return REGULATOR_STATUS_ERROR;
  157. }
  158. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  159. if (rdev_get_id(rdev) < 2) {
  160. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  161. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  162. rdev_get_id(rdev) + 1);
  163. return REGULATOR_STATUS_ERROR;
  164. }
  165. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  166. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  167. rdev_get_id(rdev) + 1);
  168. return REGULATOR_STATUS_ERROR;
  169. }
  170. }
  171. /* Is the regulator on? */
  172. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  173. if (ret < 0)
  174. return ret;
  175. if (!(ret & (1 << rdev_get_id(rdev))))
  176. return REGULATOR_STATUS_OFF;
  177. /* TODO: When we handle hardware control modes so we can report the
  178. * current mode. */
  179. return REGULATOR_STATUS_ON;
  180. }
  181. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  182. {
  183. struct wm831x_dcdc *dcdc = data;
  184. regulator_notifier_call_chain(dcdc->regulator,
  185. REGULATOR_EVENT_UNDER_VOLTAGE,
  186. NULL);
  187. return IRQ_HANDLED;
  188. }
  189. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  190. {
  191. struct wm831x_dcdc *dcdc = data;
  192. regulator_notifier_call_chain(dcdc->regulator,
  193. REGULATOR_EVENT_OVER_CURRENT,
  194. NULL);
  195. return IRQ_HANDLED;
  196. }
  197. /*
  198. * BUCKV specifics
  199. */
  200. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  201. unsigned selector)
  202. {
  203. if (selector <= 0x8)
  204. return 600000;
  205. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  206. return 600000 + ((selector - 0x8) * 12500);
  207. return -EINVAL;
  208. }
  209. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  210. int min_uV, int max_uV)
  211. {
  212. u16 vsel;
  213. if (min_uV < 600000)
  214. vsel = 0;
  215. else if (min_uV <= 1800000)
  216. vsel = ((min_uV - 600000) / 12500) + 8;
  217. else
  218. return -EINVAL;
  219. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  220. return -EINVAL;
  221. return vsel;
  222. }
  223. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  224. {
  225. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  226. if (state == dcdc->dvs_gpio_state)
  227. return 0;
  228. dcdc->dvs_gpio_state = state;
  229. gpio_set_value(dcdc->dvs_gpio, state);
  230. /* Should wait for DVS state change to be asserted if we have
  231. * a GPIO for it, for now assume the device is configured
  232. * for the fastest possible transition.
  233. */
  234. return 0;
  235. }
  236. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  237. int min_uV, int max_uV, unsigned *selector)
  238. {
  239. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  240. struct wm831x *wm831x = dcdc->wm831x;
  241. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  242. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  243. int vsel, ret;
  244. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  245. if (vsel < 0)
  246. return vsel;
  247. *selector = vsel;
  248. /* If this value is already set then do a GPIO update if we can */
  249. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  250. return wm831x_buckv_set_dvs(rdev, 0);
  251. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  252. return wm831x_buckv_set_dvs(rdev, 1);
  253. /* Always set the ON status to the minimum voltage */
  254. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  255. if (ret < 0)
  256. return ret;
  257. dcdc->on_vsel = vsel;
  258. if (!dcdc->dvs_gpio)
  259. return ret;
  260. /* Kick the voltage transition now */
  261. ret = wm831x_buckv_set_dvs(rdev, 0);
  262. if (ret < 0)
  263. return ret;
  264. /*
  265. * If this VSEL is higher than the last one we've seen then
  266. * remember it as the DVS VSEL. This is optimised for CPUfreq
  267. * usage where we want to get to the highest voltage very
  268. * quickly.
  269. */
  270. if (vsel > dcdc->dvs_vsel) {
  271. ret = wm831x_set_bits(wm831x, dvs_reg,
  272. WM831X_DC1_DVS_VSEL_MASK,
  273. dcdc->dvs_vsel);
  274. if (ret == 0)
  275. dcdc->dvs_vsel = vsel;
  276. else
  277. dev_warn(wm831x->dev,
  278. "Failed to set DCDC DVS VSEL: %d\n", ret);
  279. }
  280. return 0;
  281. }
  282. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  283. int uV)
  284. {
  285. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  286. struct wm831x *wm831x = dcdc->wm831x;
  287. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  288. int vsel;
  289. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  290. if (vsel < 0)
  291. return vsel;
  292. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  293. }
  294. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  295. {
  296. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  297. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  298. return dcdc->dvs_vsel;
  299. else
  300. return dcdc->on_vsel;
  301. }
  302. /* Current limit options */
  303. static u16 wm831x_dcdc_ilim[] = {
  304. 125, 250, 375, 500, 625, 750, 875, 1000
  305. };
  306. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  307. int min_uA, int max_uA)
  308. {
  309. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  310. struct wm831x *wm831x = dcdc->wm831x;
  311. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  312. int i;
  313. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  314. if (max_uA <= wm831x_dcdc_ilim[i])
  315. break;
  316. }
  317. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  318. return -EINVAL;
  319. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
  320. }
  321. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  322. {
  323. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  324. struct wm831x *wm831x = dcdc->wm831x;
  325. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  326. int val;
  327. val = wm831x_reg_read(wm831x, reg);
  328. if (val < 0)
  329. return val;
  330. return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
  331. }
  332. static struct regulator_ops wm831x_buckv_ops = {
  333. .set_voltage = wm831x_buckv_set_voltage,
  334. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  335. .list_voltage = wm831x_buckv_list_voltage,
  336. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  337. .set_current_limit = wm831x_buckv_set_current_limit,
  338. .get_current_limit = wm831x_buckv_get_current_limit,
  339. .is_enabled = wm831x_dcdc_is_enabled,
  340. .enable = wm831x_dcdc_enable,
  341. .disable = wm831x_dcdc_disable,
  342. .get_status = wm831x_dcdc_get_status,
  343. .get_mode = wm831x_dcdc_get_mode,
  344. .set_mode = wm831x_dcdc_set_mode,
  345. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  346. };
  347. /*
  348. * Set up DVS control. We just log errors since we can still run
  349. * (with reduced performance) if we fail.
  350. */
  351. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  352. struct wm831x_buckv_pdata *pdata)
  353. {
  354. struct wm831x *wm831x = dcdc->wm831x;
  355. int ret;
  356. u16 ctrl;
  357. if (!pdata || !pdata->dvs_gpio)
  358. return;
  359. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  360. if (ret < 0) {
  361. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  362. dcdc->name, ret);
  363. return;
  364. }
  365. /* gpiolib won't let us read the GPIO status so pick the higher
  366. * of the two existing voltages so we take it as platform data.
  367. */
  368. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  369. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  370. if (ret < 0) {
  371. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  372. dcdc->name, ret);
  373. gpio_free(pdata->dvs_gpio);
  374. return;
  375. }
  376. dcdc->dvs_gpio = pdata->dvs_gpio;
  377. switch (pdata->dvs_control_src) {
  378. case 1:
  379. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  380. break;
  381. case 2:
  382. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  383. break;
  384. default:
  385. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  386. pdata->dvs_control_src, dcdc->name);
  387. return;
  388. }
  389. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  390. * to make bootstrapping a bit smoother.
  391. */
  392. if (!dcdc->dvs_vsel) {
  393. ret = wm831x_set_bits(wm831x,
  394. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  395. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  396. if (ret == 0)
  397. dcdc->dvs_vsel = dcdc->on_vsel;
  398. else
  399. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  400. ret);
  401. }
  402. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  403. WM831X_DC1_DVS_SRC_MASK, ctrl);
  404. if (ret < 0) {
  405. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  406. dcdc->name, ret);
  407. }
  408. }
  409. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  410. {
  411. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  412. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  413. struct regulator_config config = { };
  414. int id;
  415. struct wm831x_dcdc *dcdc;
  416. struct resource *res;
  417. int ret, irq;
  418. if (pdata && pdata->wm831x_num)
  419. id = (pdata->wm831x_num * 10) + 1;
  420. else
  421. id = 0;
  422. id = pdev->id - id;
  423. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  424. if (pdata == NULL || pdata->dcdc[id] == NULL)
  425. return -ENODEV;
  426. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  427. GFP_KERNEL);
  428. if (dcdc == NULL) {
  429. dev_err(&pdev->dev, "Unable to allocate private data\n");
  430. return -ENOMEM;
  431. }
  432. dcdc->wm831x = wm831x;
  433. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  434. if (res == NULL) {
  435. dev_err(&pdev->dev, "No I/O resource\n");
  436. ret = -EINVAL;
  437. goto err;
  438. }
  439. dcdc->base = res->start;
  440. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  441. dcdc->desc.name = dcdc->name;
  442. dcdc->desc.id = id;
  443. dcdc->desc.type = REGULATOR_VOLTAGE;
  444. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  445. dcdc->desc.ops = &wm831x_buckv_ops;
  446. dcdc->desc.owner = THIS_MODULE;
  447. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  448. if (ret < 0) {
  449. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  450. goto err;
  451. }
  452. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  453. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  454. if (ret < 0) {
  455. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  456. goto err;
  457. }
  458. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  459. if (pdata->dcdc[id])
  460. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  461. config.dev = pdev->dev.parent;
  462. config.init_data = pdata->dcdc[id];
  463. config.driver_data = dcdc;
  464. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  465. if (IS_ERR(dcdc->regulator)) {
  466. ret = PTR_ERR(dcdc->regulator);
  467. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  468. id + 1, ret);
  469. goto err;
  470. }
  471. irq = platform_get_irq_byname(pdev, "UV");
  472. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  473. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  474. if (ret != 0) {
  475. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  476. irq, ret);
  477. goto err_regulator;
  478. }
  479. irq = platform_get_irq_byname(pdev, "HC");
  480. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
  481. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  482. if (ret != 0) {
  483. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  484. irq, ret);
  485. goto err_uv;
  486. }
  487. platform_set_drvdata(pdev, dcdc);
  488. return 0;
  489. err_uv:
  490. free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
  491. err_regulator:
  492. regulator_unregister(dcdc->regulator);
  493. err:
  494. if (dcdc->dvs_gpio)
  495. gpio_free(dcdc->dvs_gpio);
  496. return ret;
  497. }
  498. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  499. {
  500. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  501. platform_set_drvdata(pdev, NULL);
  502. free_irq(platform_get_irq_byname(pdev, "HC"), dcdc);
  503. free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
  504. regulator_unregister(dcdc->regulator);
  505. if (dcdc->dvs_gpio)
  506. gpio_free(dcdc->dvs_gpio);
  507. return 0;
  508. }
  509. static struct platform_driver wm831x_buckv_driver = {
  510. .probe = wm831x_buckv_probe,
  511. .remove = __devexit_p(wm831x_buckv_remove),
  512. .driver = {
  513. .name = "wm831x-buckv",
  514. .owner = THIS_MODULE,
  515. },
  516. };
  517. /*
  518. * BUCKP specifics
  519. */
  520. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  521. unsigned selector)
  522. {
  523. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  524. return 850000 + (selector * 25000);
  525. else
  526. return -EINVAL;
  527. }
  528. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  529. int min_uV, int max_uV, int *selector)
  530. {
  531. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  532. struct wm831x *wm831x = dcdc->wm831x;
  533. u16 vsel;
  534. if (min_uV <= 34000000)
  535. vsel = (min_uV - 850000) / 25000;
  536. else
  537. return -EINVAL;
  538. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  539. return -EINVAL;
  540. *selector = vsel;
  541. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  542. }
  543. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  544. int min_uV, int max_uV,
  545. unsigned *selector)
  546. {
  547. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  548. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  549. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
  550. selector);
  551. }
  552. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  553. int uV)
  554. {
  555. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  556. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  557. unsigned selector;
  558. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
  559. }
  560. static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)
  561. {
  562. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  563. struct wm831x *wm831x = dcdc->wm831x;
  564. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  565. int val;
  566. val = wm831x_reg_read(wm831x, reg);
  567. if (val < 0)
  568. return val;
  569. return val & WM831X_DC3_ON_VSEL_MASK;
  570. }
  571. static struct regulator_ops wm831x_buckp_ops = {
  572. .set_voltage = wm831x_buckp_set_voltage,
  573. .get_voltage_sel = wm831x_buckp_get_voltage_sel,
  574. .list_voltage = wm831x_buckp_list_voltage,
  575. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  576. .is_enabled = wm831x_dcdc_is_enabled,
  577. .enable = wm831x_dcdc_enable,
  578. .disable = wm831x_dcdc_disable,
  579. .get_status = wm831x_dcdc_get_status,
  580. .get_mode = wm831x_dcdc_get_mode,
  581. .set_mode = wm831x_dcdc_set_mode,
  582. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  583. };
  584. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  585. {
  586. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  587. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  588. struct regulator_config config = { };
  589. int id;
  590. struct wm831x_dcdc *dcdc;
  591. struct resource *res;
  592. int ret, irq;
  593. if (pdata && pdata->wm831x_num)
  594. id = (pdata->wm831x_num * 10) + 1;
  595. else
  596. id = 0;
  597. id = pdev->id - id;
  598. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  599. if (pdata == NULL || pdata->dcdc[id] == NULL)
  600. return -ENODEV;
  601. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  602. GFP_KERNEL);
  603. if (dcdc == NULL) {
  604. dev_err(&pdev->dev, "Unable to allocate private data\n");
  605. return -ENOMEM;
  606. }
  607. dcdc->wm831x = wm831x;
  608. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  609. if (res == NULL) {
  610. dev_err(&pdev->dev, "No I/O resource\n");
  611. ret = -EINVAL;
  612. goto err;
  613. }
  614. dcdc->base = res->start;
  615. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  616. dcdc->desc.name = dcdc->name;
  617. dcdc->desc.id = id;
  618. dcdc->desc.type = REGULATOR_VOLTAGE;
  619. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  620. dcdc->desc.ops = &wm831x_buckp_ops;
  621. dcdc->desc.owner = THIS_MODULE;
  622. config.dev = pdev->dev.parent;
  623. config.init_data = pdata->dcdc[id];
  624. config.driver_data = dcdc;
  625. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  626. if (IS_ERR(dcdc->regulator)) {
  627. ret = PTR_ERR(dcdc->regulator);
  628. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  629. id + 1, ret);
  630. goto err;
  631. }
  632. irq = platform_get_irq_byname(pdev, "UV");
  633. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  634. IRQF_TRIGGER_RISING, dcdc->name, dcdc);
  635. if (ret != 0) {
  636. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  637. irq, ret);
  638. goto err_regulator;
  639. }
  640. platform_set_drvdata(pdev, dcdc);
  641. return 0;
  642. err_regulator:
  643. regulator_unregister(dcdc->regulator);
  644. err:
  645. return ret;
  646. }
  647. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  648. {
  649. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  650. platform_set_drvdata(pdev, NULL);
  651. free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
  652. regulator_unregister(dcdc->regulator);
  653. return 0;
  654. }
  655. static struct platform_driver wm831x_buckp_driver = {
  656. .probe = wm831x_buckp_probe,
  657. .remove = __devexit_p(wm831x_buckp_remove),
  658. .driver = {
  659. .name = "wm831x-buckp",
  660. .owner = THIS_MODULE,
  661. },
  662. };
  663. /*
  664. * DCDC boost convertors
  665. */
  666. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  667. {
  668. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  669. struct wm831x *wm831x = dcdc->wm831x;
  670. int ret;
  671. /* First, check for errors */
  672. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  673. if (ret < 0)
  674. return ret;
  675. if (ret & (1 << rdev_get_id(rdev))) {
  676. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  677. rdev_get_id(rdev) + 1);
  678. return REGULATOR_STATUS_ERROR;
  679. }
  680. /* Is the regulator on? */
  681. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  682. if (ret < 0)
  683. return ret;
  684. if (ret & (1 << rdev_get_id(rdev)))
  685. return REGULATOR_STATUS_ON;
  686. else
  687. return REGULATOR_STATUS_OFF;
  688. }
  689. static struct regulator_ops wm831x_boostp_ops = {
  690. .get_status = wm831x_boostp_get_status,
  691. .is_enabled = wm831x_dcdc_is_enabled,
  692. .enable = wm831x_dcdc_enable,
  693. .disable = wm831x_dcdc_disable,
  694. };
  695. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  696. {
  697. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  698. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  699. struct regulator_config config = { };
  700. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  701. struct wm831x_dcdc *dcdc;
  702. struct resource *res;
  703. int ret, irq;
  704. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  705. if (pdata == NULL || pdata->dcdc[id] == NULL)
  706. return -ENODEV;
  707. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  708. if (dcdc == NULL) {
  709. dev_err(&pdev->dev, "Unable to allocate private data\n");
  710. return -ENOMEM;
  711. }
  712. dcdc->wm831x = wm831x;
  713. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  714. if (res == NULL) {
  715. dev_err(&pdev->dev, "No I/O resource\n");
  716. ret = -EINVAL;
  717. goto err;
  718. }
  719. dcdc->base = res->start;
  720. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  721. dcdc->desc.name = dcdc->name;
  722. dcdc->desc.id = id;
  723. dcdc->desc.type = REGULATOR_VOLTAGE;
  724. dcdc->desc.ops = &wm831x_boostp_ops;
  725. dcdc->desc.owner = THIS_MODULE;
  726. config.dev = pdev->dev.parent;
  727. config.init_data = pdata->dcdc[id];
  728. config.driver_data = dcdc;
  729. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  730. if (IS_ERR(dcdc->regulator)) {
  731. ret = PTR_ERR(dcdc->regulator);
  732. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  733. id + 1, ret);
  734. goto err;
  735. }
  736. irq = platform_get_irq_byname(pdev, "UV");
  737. ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
  738. IRQF_TRIGGER_RISING, dcdc->name,
  739. dcdc);
  740. if (ret != 0) {
  741. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  742. irq, ret);
  743. goto err_regulator;
  744. }
  745. platform_set_drvdata(pdev, dcdc);
  746. return 0;
  747. err_regulator:
  748. regulator_unregister(dcdc->regulator);
  749. err:
  750. return ret;
  751. }
  752. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  753. {
  754. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  755. platform_set_drvdata(pdev, NULL);
  756. free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
  757. regulator_unregister(dcdc->regulator);
  758. return 0;
  759. }
  760. static struct platform_driver wm831x_boostp_driver = {
  761. .probe = wm831x_boostp_probe,
  762. .remove = __devexit_p(wm831x_boostp_remove),
  763. .driver = {
  764. .name = "wm831x-boostp",
  765. .owner = THIS_MODULE,
  766. },
  767. };
  768. /*
  769. * External Power Enable
  770. *
  771. * These aren't actually DCDCs but look like them in hardware so share
  772. * code.
  773. */
  774. #define WM831X_EPE_BASE 6
  775. static struct regulator_ops wm831x_epe_ops = {
  776. .is_enabled = wm831x_dcdc_is_enabled,
  777. .enable = wm831x_dcdc_enable,
  778. .disable = wm831x_dcdc_disable,
  779. .get_status = wm831x_dcdc_get_status,
  780. };
  781. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  782. {
  783. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  784. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  785. struct regulator_config config = { };
  786. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  787. struct wm831x_dcdc *dcdc;
  788. int ret;
  789. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  790. if (pdata == NULL || pdata->epe[id] == NULL)
  791. return -ENODEV;
  792. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  793. if (dcdc == NULL) {
  794. dev_err(&pdev->dev, "Unable to allocate private data\n");
  795. return -ENOMEM;
  796. }
  797. dcdc->wm831x = wm831x;
  798. /* For current parts this is correct; probably need to revisit
  799. * in future.
  800. */
  801. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  802. dcdc->desc.name = dcdc->name;
  803. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  804. dcdc->desc.ops = &wm831x_epe_ops;
  805. dcdc->desc.type = REGULATOR_VOLTAGE;
  806. dcdc->desc.owner = THIS_MODULE;
  807. config.dev = pdev->dev.parent;
  808. config.init_data = pdata->epe[id];
  809. config.driver_data = dcdc;
  810. dcdc->regulator = regulator_register(&dcdc->desc, &config);
  811. if (IS_ERR(dcdc->regulator)) {
  812. ret = PTR_ERR(dcdc->regulator);
  813. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  814. id + 1, ret);
  815. goto err;
  816. }
  817. platform_set_drvdata(pdev, dcdc);
  818. return 0;
  819. err:
  820. return ret;
  821. }
  822. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  823. {
  824. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  825. platform_set_drvdata(pdev, NULL);
  826. regulator_unregister(dcdc->regulator);
  827. return 0;
  828. }
  829. static struct platform_driver wm831x_epe_driver = {
  830. .probe = wm831x_epe_probe,
  831. .remove = __devexit_p(wm831x_epe_remove),
  832. .driver = {
  833. .name = "wm831x-epe",
  834. .owner = THIS_MODULE,
  835. },
  836. };
  837. static int __init wm831x_dcdc_init(void)
  838. {
  839. int ret;
  840. ret = platform_driver_register(&wm831x_buckv_driver);
  841. if (ret != 0)
  842. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  843. ret = platform_driver_register(&wm831x_buckp_driver);
  844. if (ret != 0)
  845. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  846. ret = platform_driver_register(&wm831x_boostp_driver);
  847. if (ret != 0)
  848. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  849. ret = platform_driver_register(&wm831x_epe_driver);
  850. if (ret != 0)
  851. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  852. return 0;
  853. }
  854. subsys_initcall(wm831x_dcdc_init);
  855. static void __exit wm831x_dcdc_exit(void)
  856. {
  857. platform_driver_unregister(&wm831x_epe_driver);
  858. platform_driver_unregister(&wm831x_boostp_driver);
  859. platform_driver_unregister(&wm831x_buckp_driver);
  860. platform_driver_unregister(&wm831x_buckv_driver);
  861. }
  862. module_exit(wm831x_dcdc_exit);
  863. /* Module information */
  864. MODULE_AUTHOR("Mark Brown");
  865. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  866. MODULE_LICENSE("GPL");
  867. MODULE_ALIAS("platform:wm831x-buckv");
  868. MODULE_ALIAS("platform:wm831x-buckp");
  869. MODULE_ALIAS("platform:wm831x-epe");